LPSPI FRAMESZ and Receive Data Register Hello, I'm interfacing S32K3xx with an external flash memory. This chip requires different size command and data combinations. For example, to read the status register one needs to send 1 byte command and wait for 1 byte of data to appear on the MISO line. Frame size can range from 8 bits to several bytes. Is there a way to interface this chip without needing changing FRAMESZ each time? In the above example, I couldn't just send 1 byte of command. I had to send an extra dummy byte to allow for the memory chip to respond. So, my frame size had to be 16 bits long. I have other use cases where I am sending 1 byte of command + 3 bytes of address + 10 bytes of data (just an example). It seem like each time my data changes I have to modify the FRAMESZ. Another question: It seem like to get correct data in the SPI data register I have to read that register each time I send out a frame. Is this how the SPI set up? LPSPI1_transmit_16bits(tx_16bits); /* Transmit half word (16 bits) on LPSPI1 */ LPSPI1_16bits_read = LPSPI1_receive_16bits(); /* Receive half word on LSPI1 */ Thank you very much for your help! Vusal Re: LPSPI FRAMESZ and Receive Data Register Thank you! Re: LPSPI FRAMESZ and Receive Data Register There is 4x32b RX FIFO disabled by default. BR, Daniel Re: LPSPI FRAMESZ and Receive Data Register Hi Daniel, Thank you for your message. This fixed the issue. One more quick question: It seem like to get correct data in the SPI data register I have to read that register each time I send out a frame. Is this how the SPI set up? LPSPI1_transmit_16bits(tx_16bits); /* Transmit half word (16 bits) on LPSPI1 */ LPSPI1_16bits_read = LPSPI1_receive_16bits(); /* Receive half word on LSPI1 */ Thank you! Best, Vusal Re: LPSPI FRAMESZ and Receive Data Register Hello Vusal, I understand you need to keep CS asserted throughout the whole 14-byte transfer (using the example, 1 byte of command + 3 bytes of address + 10 bytes of data). For that, the LPSPI Continous mode can be used (TCR[CONT = 1]). FRAMESZ can be set to 8bit frames. The LPSPI will keep CS asserted until a new command with TCR[CONT = 0]. RTD LPSPI_IP driver Call the function below with Length = 14. Regards, Daniel

尽管连续转换已禁用，ADC 回调例程仍会触发多次 配置如下： /*!@brief PAL 实例信息 */ const adc_instance_t adc_pal_1_instance = { ADC_INST_TYPE_ADC_S32K1xx，0u }; /*!@brief PAL扩展*/ 静态扩展_adc_s32k1xx_t adc_pal_1_extensionConfig = { .clockDivide= ADC_CLK_DIVIDE_1， 。解决=ADC分辨率_12位， .输入时钟=ADC_CLK_ALT_1， .电压参考= ADC_VOLTAGEREF_VREF， .supplyMonitoringEnable= 假， .pdb预分频器= PDB_CLK_PREDIV_BY_1 }; /*!@brief 配置结构 */ const adc_config_t adc_pal_1_config = { .groupConfigArray=adc_pal_1_groupArray， .numGroups= 2u， .sampleTicks= 12u， 。扩大= &adc_pal_1_extensionConfig }; /*!@brief 转换组数组 */ const adc_group_config_t adc_pal_1_groupArray[2u] = { /* 转换组 0 */ { .inputChannelArray=adc_pal_1_channelsArray0， .resultBuffer=adc_pal_1_results0， .numChannels= 8u， .numSetsResultBuffer= 1u， .hwTriggerSupport= 假， .triggerSource= TRGMUX_TRIG_SOURCE_DISABLED， .delayType= ADC_DELAY_TYPE_NO_DELAY， .delayArray= 空， .continuousConvEn= 假， 。打回来=系统_ADC_模块1_组1_IRQ_处理程序， .callbackUserData= 空 }, /* 转换组 1 */ { .inputChannelArray=adc_pal_1_channelsArray1， .resultBuffer=adc_pal_1_结果1， .numChannels= 4u， .numSetsResultBuffer= 1u， .hwTriggerSupport= 假， .triggerSource= TRGMUX_TRIG_SOURCE_DISABLED， .delayType= ADC_DELAY_TYPE_NO_DELAY， .delayArray= 空， .continuousConvEn= 假， 。打回来=系统_ADC_模块1_组2_IRQ_处理程序， .callbackUserData= 空 }, }; /*!@brief group 0: 输入通道数组 */ adc_input_chan_t adc_pal_1_channelsArray0[8u] = { /* 0 */ ADC_INPUTCHAN_EXT2， /* 1 */ ADC_INPUTCHAN_EXT3， /* 2 */ ADC_INPUTCHAN_EXT4， /* 3 */ ADC_INPUTCHAN_EXT5， /* 4 */ ADC_INPUTCHAN_EXT8， /* 5 */ ADC_INPUTCHAN_EXT9， /* 6 */ ADC_INPUTCHAN_EXT10， /* 7 */ ADC_INPUTCHAN_EXT11， }; /*!@brief group 0: 结果缓冲区 */ uint16_t adc_pal_1_results0[8u]； /*!@brief group 1: 输入通道数组 */ adc_input_chan_t adc_pal_1_channelsArray1[4u] = { /* 0 */ ADC_INPUTCHAN_EXT12， /* 1 */ ADC_INPUTCHAN_EXT13， /* 2 */ ADC_INPUTCHAN_EXT14， /* 3 */ ADC_INPUTCHAN_EXT15， }; /*!@brief 组 1：结果缓冲区 */ uint16_t adc_pal_1_results1[4u]； 在S32DS 3.4上使用SDK 4.0.2 回复：尽管连续转换被禁用，ADC 回调例程仍会触发多次 抱歉，在其他地方发现错误。可以关闭

IOMUX Spreadsheet for i.MX8-ULP Hi, I am currently working on the i.MX8ULP device tree files to have the OV5640 camera working with libcamera on the MCIMX8ULP-EVK9 evaluation kit. The modifications Among the changes I have made, I replaced the following in imx8ulp.dtsi: - mipi_csi0: csi@2daf0000 { - compatible = "fsl,imx8ulp-mipi-csi2", "fsl,mxc-mipi-csi2"; - reg = <0x2daf0000 0x10000>, - <0x2dad0000 0x10000>; - clocks = <&pcc5 IMX8ULP_CLK_CSI>, - <&pcc5 IMX8ULP_CLK_CSI_CLK_UI>, - <&pcc5 IMX8ULP_CLK_CSI_CLK_ESC>, - <&pcc5 IMX8ULP_CLK_CSI_REGS>; - clock-names = "clk_core", "clk_ui", "clk_esc", "clk_regs"; - power-domains = <&scmi_devpd IMX8ULP_PD_MIPI_CSI>; - assigned-clocks = <&cgc2 IMX8ULP_CLK_PLL4_PFD1>, - <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV1>, - <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV2>, - <&pcc5 IMX8ULP_CLK_CSI>, - <&pcc5 IMX8ULP_CLK_CSI_CLK_UI>, - <&pcc5 IMX8ULP_CLK_CSI_CLK_ESC>; - assigned-clock-parents = <0>, <0>, <0>, - <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV1>, - <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV2>, - <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV2>; - assigned-clock-rates = <316800000>, - <316800000>, - <316800000>, - <105600000>, - <79200000>, - <79200000>; - runtime_suspend; - status = "disabled"; + mipi_csi0: csi@2daf0000 { + compatible = "fsl,imx8mp-mipi-csi2", "fsl,imx8mm-mipi-csi2"; + reg = <0x2daf0000 0x10000>, + <0x2dad0000 0x10000>; + interrupts = ; + clocks = <&cgc2 IMX8ULP_CLK_LPAV_BUS_DIV>, + <&pcc5 IMX8ULP_CLK_CSI_CLK_UI>, + <&pcc5 IMX8ULP_CLK_CSI>; + clock-names = "pclk", "wrap", "phy"; + power-domains = <&scmi_devpd IMX8ULP_PD_MIPI_CSI>; + assigned-clocks = <&cgc2 IMX8ULP_CLK_PLL4_PFD1>, + <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV1>, + <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV2>, + <&pcc5 IMX8ULP_CLK_CSI>, + <&pcc5 IMX8ULP_CLK_CSI_CLK_UI>, + <&pcc5 IMX8ULP_CLK_CSI_CLK_ESC>; + assigned-clock-parents = <0>, <0>, <0>, + <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV1>, + <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV2>, + <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV2>; + assigned-clock-rates = <316800000>, + <316800000>, + <316800000>, + <105600000>, + <79200000>, + <79200000>; + runtime_suspend; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + + mipi_csi_0_out: endpoint { + remote-endpoint = <&isi_in_0>; + }; + }; }; }; I know those modification are not likely to be enough as they are, but the imx-mipi-csis driver does not support i.MX8ULP so I am trying to baby step towards a working device tree. (I am using this binding documentation https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/Documentation/devicetree/bindings/media/nxp%2Cimx-mipi-csi2.yaml and looking at the associated driver source code https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/drivers/media/platform/nxp/imx-mipi-csis.c). The patch is attached to this message (0002-remove-camdev-modify-csi-and-isi-drivers-change-clocks-dtsi.patch) The issue Now, when I flash the imx-image-full to the board, everything boots but the mipi-csi node is not binding. When I check why, I have the following log: root@imx8ulp-9x9-lpddr4-evk:~# dmesg | grep 2daf [ 2.175433] /soc@0/bus@2d800000/csi@2daf0000: Relaxing link with /i2c-rpbus-0/ov5640_mipi@3c/port/endpoint [ 2.175476] /i2c-rpbus-0/ov5640_mipi@3c: Relaxing link with /soc@0/bus@2d800000/csi@2daf0000/ports/port@0/endpoint [ 2.175523] i2c 0-003c: Fixed dependency cycle(s) with /soc@0/bus@2d800000/csi@2daf0000/ports/port@0/endpoint [ 2.246985] /i2c-rpbus-0/ov5640_mipi@3c Dropping the fwnode link to /soc@0/bus@2d800000/csi@2daf0000/ports/port@0/endpoint [ 2.247043] /soc@0/bus@2d800000/csi@2daf0000 Linked as a fwnode consumer to /i2c-rpbus-0/ov5640_mipi@3c [ 2.247072] /soc@0/bus@2d800000/csi@2daf0000 Dropping the fwnode link to /i2c-rpbus-0/ov5640_mipi@3c/port/endpoint [ 2.247125] device: 'i2c:0-003c--platform:2daf0000.csi': device_add [ 2.247220] platform 2daf0000.csi: Linked as a sync state only consumer to 0-003c [ 2.247233] /soc@0/bus@2d800000/csi@2daf0000 Dropping the fwnode link to /i2c-rpbus-0/ov5640_mipi@3c [ 2.712236] platform 2daf0000.csi: Retrying from deferred list [ 2.713521] bus: 'platform': __driver_probe_device: matched device 2daf0000.csi with driver imx-mipi-csis [ 2.713542] bus: 'platform': really_probe: probing driver imx-mipi-csis with device 2daf0000.csi [ 2.713573] imx-mipi-csis 2daf0000.csi: no pinctrl handle [ 2.713793] imx-mipi-csis 2daf0000.csi: adding to PM domain MIPI_CSI [ 2.713809] imx-mipi-csis 2daf0000.csi: genpd_add_device() [ 2.714562] imx-mipi-csis 2daf0000.csi: error -ENOENT: Failed to get clk 'axi' [ 2.721895] imx-mipi-csis 2daf0000.csi: removing from PM domain MIPI_CSI [ 2.721910] imx-mipi-csis 2daf0000.csi: genpd_remove_device() [ 2.722391] imx-mipi-csis: probe of 2daf0000.csi failed with error -2 The line [ 2.713573] imx-mipi-csis 2daf0000.csi: no pinctrl handle indicates that I should add some pinctrl management in the node. When I look in the IOMUXC chapter of the i.MX8ULP reference manual, an IOMUX spreadsheet that could help me with this is mentioned but I can't find it. Does somebody know where I can get this IOMUX spreadsheet ? Thanks Karim i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus Re: IOMUX Spreadsheet for i.MX8-ULP Hi, Thanks for your reply, I was finally able to directly get the spreadsheet attached to the reference manual. Regards, Karim Re: IOMUX Spreadsheet for i.MX8-ULP Hi, Thank you for your interest in NXP Semiconductor products, For the DTS side, you can refer to the EVK reference. For the IOMUX matrix, please install Config Tools: Download latest exe. Execute installer and CFG Tools for first time as admin. Make sure your device complies with: The following lists the minimum system requirements to install and run the software: One of the following graphical operating systems: – Microsoft Windows 10 (64-bit) – Ubuntu 22.04 LTS Note: Linux-hosted variants of tools are distributed on Linux as 64-bit binaries, which may not work on 32-bit systems. – Supported desktop environments: GNOME – Mac OS X (12.x) 4 GB RAM Display with resolution 1024 x 768 Internet connection for dynamic download from processor database Regards

S32K312のリセット理由 こんにちは。 フィールドテストではS32K312チップを使用しています。 予期せぬことに、テスト中にチップが数回リセットされました。 これまでに読んだリセットの理由は15と30です。しかし、正確に何が起こったのかを把握することはできず、予期しないリセットの問題を解決したいと考えています。 15:MCU_F_EXR_RESET RESET_Bの立ち下がりエッジを検出すると、外部リセットが発生する可能性があることがわかっています。それは考えられる理由の1つですが、私たちはまだその兆候を見ていません。 MCU_F_EXR_RESETを引き起こす他の理由はありますか? 30:MCU_MULTIPLE_RESET_REASON コメントにはと書かれています。 それについてもう少し詳しく説明していただけますか? ありがとうございます。 #reset 理由

how to start with clock_ip_ReferencePoints In S32k358, how can I use  already defined clk ? Thanks! Re: how to start with clock_ip_ReferencePoints Hello @jimmy623, I see, it is a bug in RTD 3.0.0, it has been fixed in RTD 4.0.0 Regards, Daniel Re: how to start with clock_ip_ReferencePoints I will check RTD 4.0 later Re: how to start with clock_ip_ReferencePoints That is the Autosar version, I mean RTD version. For example, in this version, it is correct: Regards, Daniel Re: how to start with clock_ip_ReferencePoints Which RTD version is it? Thank you. Re: how to start with clock_ip_ReferencePoints This is a Bug? Re: how to start with clock_ip_ReferencePoints Hello @jimmy623, The LPUART modules are clocked either by AIPS_PLAT_CLK or AIPS_SLOW_CLK depending on the number of the instance, this cannot be changed. Refer to the RM. Regards, Daniel Re: how to start with clock_ip_ReferencePoints How can i use to LPUART driver ? default Baud rate is 40M ,which mismatch to Reference design. Thanks! Re: how to start with clock_ip_ReferencePoints Hello @jimmy623, The references can be used by other RTD drivers. Such as BaseNXP Osif Config, see below. There is no list of drivers dependent on the clock reference points. Regards, Daniel

S32K344-EVB test terminal Hello I am using the S32K344 EVB hardware and want to test the sleep wake-up function. I use the edge trigger of a terminal as the wake-up source, so I need a TP point of a terminal for external high level access. Is there a TP point of the terminal on the EVB board? BestRegards, Simon

UTEST 工厂数据内存区域 你好呀， 我正在寻找 S32K324 上的内存位置来存储我们的工厂数据，例如用户硬件版本、软件版本、引导加载程序版本等，我偶然发现了 UTEST 内存区域中的 dcf_client_sdid0-15 条目和 DCF 客户端表，它们显然是为此而制作的。但我对这个内存有点困惑，因为据我了解，处理器在启动期间使用这个区域进行一些设置。所以我想知道这是否是存储我的工厂数据的正确地方？ 问候， 菲利克斯。 回复：UTEST 工厂数据内存区域 啊，我明白了。最后一个简短的问题。我在参考手册中看到，UTEST 区域是 OTP，但“何时”是 OTP 有点模糊。参考手册说“UTest NVM 扇区是 OTP 扇区（假设写入了测试模式禁用密封）”。这是否意味着，在我写入测试模式禁用封条之前，我可以在我的 UTest 区域内进行多次写入，甚至可能覆盖我计划的工厂数据，以防我写入错误？ Re: UTEST memory area for factory data 你好@FelixR你找到解决方案了吗？ 如果是，请分享解决方案 谢谢 Re: UTEST memory area for factory data 嘿@Sanjana_k，最后我开始使用 DCFrecord 区域的一个切片来处理 OTP 数据。正如@petervlna在解决方案中所说，我本可以在 OTP 数据中使用两个应用区域，但是......这不可行，因为它们太小了。 我只是在版本过程中确保我计划写入的数据不会像 DCF 启动记录那样意外格式化（参见参考手册表 223），这样我就不会破坏任何处理器功能。

ADCコールバックルーチンは、連続変換が無効になっているにもかかわらず、複数回起動します 設定を次に示します。 /*!@brief PAL インスタンス情報 */ const adc_instance_t adc_pal_1_instance = { ADC_INST_TYPE_ADC_S32K1xx, 0u }; /*!@brief PALエクステンション */ 静的extension_adc_s32k1xx_t adc_pal_1_extensionConfig = { .clock除算= ADC_CLK_DIVIDE_1、 。解決= ADC_RESOLUTION_12BIT、 .inputClock= ADC_CLK_ALT_1、 .voltageRef= ADC_VOLTAGEREF_VREF、 .supplyMonitoringEnable (供給監視有効)= false、 .pdbPrescaler= PDB_CLK_PREDIV_BY_1 }; /*!@brief構成構造 */ 定数 adc_config_t adc_pal_1_config = { .groupConfigArrayの= adc_pal_1_groupArray、 .numGroups= 2u、 .sampleTicks(英語)= 12u、 。延長= &adc_pal_1_extensionConfig }; /*!変換グループの@brief配列 */ 定数 adc_group_config_t adc_pal_1_groupArray[2U] = { /* 変換グループ 0 */ { .inputChannelArray(英語)= adc_pal_1_channelsArray0、 .resultバッファ= adc_pal_1_results0、 .numチャンネル= 8u、 .numSetsResultBuffer= 1u、 .hwトリガーサポート= false、 .triggerソース= TRGMUX_TRIG_SOURCE_DISABLED、 .delayType (遅延タイプ)= ADC_DELAY_TYPE_NO_DELAY、 .delayArray= NULL の場合、 .continuousConvEn= false、 。コールバック= SYSTEM_ADC_MODULE1_GROUP1_IRQ_HANDLER、 .callbackUserData (コールバックユーザーデータ)= NULL }, /* 変換グループ 1 */ { .inputChannelArray(英語)= adc_pal_1_channelsArray1、 .resultバッファ= adc_pal_1_results1、 .numチャンネル= 4u、 .numSetsResultBuffer= 1u、 .hwトリガーサポート= false、 .triggerソース= TRGMUX_TRIG_SOURCE_DISABLED、 .delayType (遅延タイプ)= ADC_DELAY_TYPE_NO_DELAY、 .delayArray= NULL の場合、 .continuousConvEn= false、 。コールバック= SYSTEM_ADC_MODULE1_GROUP2_IRQ_HANDLER、 .callbackUserData (コールバックユーザーデータ)= NULL }, }; /*!@briefグループ0:入力チャンネル配列*/ adc_input_chan_t adc_pal_1_channelsArray0[8u] = { /* 0 */ ADC_INPUTCHAN_EXT2、 /* 1 */ ADC_INPUTCHAN_EXT3, /* 2 */ ADC_INPUTCHAN_EXT4、 /* 3 */ ADC_INPUTCHAN_EXT5、 /* 4 */ ADC_INPUTCHAN_EXT8, /* 5 */ ADC_INPUTCHAN_EXT9, /* 6 */ ADC_INPUTCHAN_EXT10, /* 7 */ ADC_INPUTCHAN_EXT11、 }; /*!@brief グループ 0: 結果バッファー */ uint16_t adc_pal_1_results0[8U]; /*!@briefグループ1:入力チャンネル配列*/ adc_input_chan_t adc_pal_1_channelsArray1[4U] = { /* 0 */ ADC_INPUTCHAN_EXT12、 /* 1 */ ADC_INPUTCHAN_EXT13、 /* 2 */ ADC_INPUTCHAN_EXT14、 /* 3 */ ADC_INPUTCHAN_EXT15、 }; /*!@briefグループ1:結果バッファ*/ uint16_t adc_pal_1_results1[4U]; S32DS3.4でSDK4.0.2を使用 Re:ADCコールバックルーチンは、連続変換が無効になっているにもかかわらず、複数回発生します 申し訳ありませんが、他の場所で障害が見つかりました。閉じることができます

Reset reasons on S32K312 Hi there. We're using S32K312 chips in the field test. Unexpectedly, the chips have reset several times during the test. So far the reset reasons we've read are 15 and 30. But we can't figure out what exactly happened and we're eager to solve the unexpected reset issues. 15: MCU_F_EXR_RESET We know the detection of a falling edge on RESET_B could cause external reset. It is one of the possible reasons but we haven't seen a sign of it yet. Are there any other reasons that would cause MCU_F_EXR_RESET? 30: MCU_MULTIPLE_RESET_REASON The comment says . Could you explain more about it? Thanks. #reset reasons Re: Reset reasons on S32K312 The driver returns MCU_MULTIPLE_RESET_REASON, but it does not specify which ones. You can read it directly in the two registers right at the beginning of main() after the reset. Regards, Daniel Re: Reset reasons on S32K312 Hi @danielmartynek  Thanks for the reply. What's the purpose of reading RGM_FES, RGM_DES registers? And I didn't find their addresses from the reference manual. Could you find them for us? Thank you. Re: Reset reasons on S32K312 Hi @jetty_1012, Can you read the RGM_FES, RGM_DES registers directly before the Power_Ip_GetResetReason() is called? Is it possible to disconnect the SBC or other devices from the reset_b pin on the PCB? Regards, Daniel

LPSPI FRAMESZ と受信データ レジスタ こんにちは S32K3xx を外部フラッシュ メモリと接続しています。このチップには、さまざまなサイズのコマンドとデータの組み合わせが必要です。たとえば、ステータスレジスタを読み取るには、1バイトのコマンドを送信し、1バイトのデータがMISOラインに表示されるのを待つ必要があります。フレーム サイズの範囲は 8 ビットから数バイトです。毎回FRAMESZを変更することなく、このチップをインターフェースする方法はありますか? 上記の例では、1バイトのコマンドを送ることはできませんでした。メモリチップが応答できるように、追加のダミーバイトを送信する必要がありました。そのため、フレーム サイズは 16 ビット長にする必要がありました。私はコマンドの1バイト+ アドレスの3バイト+ 10バイトのデータ(単なる例)を送信している他のユースケースがあります。データが変更されるたびに、FRAMESZを変更する必要があるようです。 別の質問:SPIデータレジスタで正しいデータを取得するには、フレームを送信するたびにそのレジスタを読み取る必要があるようです。SPIはこのように設定されていますか? LPSPI1_transmit_16bits(tx_16bits);/* LPSPI1でハーフワード(16ビット)を送信 */ LPSPI1_16bits_read = LPSPI1_receive_16bits();/* LSPI1 でハーフワードを受け取る */ ご協力いただき、誠にありがとうございます! Vusal(ブーサル) 日時:LPSPI FRAMESZおよび受信データレジスタ ご回答をよろしくお願い申し上げます。 日時:LPSPI FRAMESZおよび受信データレジスタ こんにちはダニエル、 メッセージありがとうございます。これで問題は修正されました。 もう1つの簡単な質問:SPIデータレジスタで正しいデータを取得するには、フレームを送信するたびにそのレジスタを読み取る必要があるようです。SPIはこのように設定されていますか? LPSPI1_transmit_16bits(tx_16bits);/* LPSPI1でハーフワード(16ビット)を送信 */ LPSPI1_16bits_read = LPSPI1_receive_16bits();/* LSPI1 でハーフワードを受け取る */ ありがとうございます！ 最良 Vusal(ブーサル)

UTEST memory area for factory data Hello there, I am looking for a memory location on the S32K324 to store our factory data like the user hardware revision, softwar version, bootloader version and so on and I stumbled uppon the dcf_client_sdid0-15 entries in the UTEST Memory area and the DCF Clients sheet which apparently are made for that. But I am a bit confused about this Memory since the processor uses this area for some setups during boot as far as I did understand it. So I was wondering if this is even the right place to store my factory data? regards, Felix. Re: UTEST memory area for factory data Hello, No. You cant rewrite data in OTP as customer. The UTEST flash is made OTP via burning out TEST mode fuse in NXP factory. There is no reverse possibility. It is permanent. You simply tune the OTP in your development, which will maybe require several chips to be used for that purpose. But for factory production you will go with only one config as majority of customers. Best regards, Peter Re: UTEST memory area for factory data Ah I see. One last quick question. I read in the reference manual that the UTEST area is OTP but it is a bit ambiguous "when" it is OTP. The reference manual says that "the UTest NVM sector is an OTP sector (assuming Test mode disable seal is written)". Does that mean that until I write the Test mode disable seal I can write multiple times inside my UTest Area, probably over my planned factory data just in case I write it wrongly? Re: UTEST memory area for factory data Hello, You can store your factory data in the following location: The first 2 marked locations are made for that purpose. In case you require more space you can also use DCF records space, but you must pay attention here to not overwrite DCFs. In such case it is best to add it after stop record which is represented here by 0xFFFF_FFFF. I would do this only once DCFs are finalized and no more will be added. Also I will leave a enough space in case some will be added in future. Best regards, Peter Re: UTEST memory area for factory data hello @FelixR   did u get the solution ?  If yes please do share the solution  Thank you  Re: UTEST memory area for factory data Hey @Sanjana_k, in the end I started using a slice of the DCFrecord area for my OTP data. As stated by @petervlna in the solution, I could have used the two application areas inside the OTP data but... that's not feasable since they are to small. I just ensure during build that the Data I plan to write into this is not accidentally formated like DCF start Record (See the reference Manual Table 223) so I don't corrupt any processor functionality.

S32K312的重置原因 你好呀。 我们在现场测试中使用 S32K312 芯片。 没想到，测试过程中芯片竟然重置了好几次。 到目前为止，我们读到的重置原因是 15 和 30。但我们无法弄清楚到底发生了什么，我们渴望解决意外重置问题。 15：MCU_F_EXR_重置 我们知道，检测到 RESET_B 上的下降沿可能会导致外部复位。这可能是原因之一，但我们尚未看到任何迹象。 还有其他原因会导致 MCU_F_EXR_RESET 吗？ 30：MCU_多次复位_原因 注释为<除“开机事件”外，还记录了多个重置事件>。 你能进一步解释一下吗？ 谢谢。 #重置原因

ADC callback routine fires multiple times although continuous conversion is disabled Here is the configuration: /*! @brief PAL instance information */ const adc_instance_t adc_pal_1_instance = { ADC_INST_TYPE_ADC_S32K1xx, 0u }; /*! @brief PAL extension */ static extension_adc_s32k1xx_t adc_pal_1_extensionConfig = { .clockDivide = ADC_CLK_DIVIDE_1, .resolution = ADC_RESOLUTION_12BIT, .inputClock = ADC_CLK_ALT_1, .voltageRef = ADC_VOLTAGEREF_VREF, .supplyMonitoringEnable = false, .pdbPrescaler = PDB_CLK_PREDIV_BY_1 }; /*! @brief configuration structure */ const adc_config_t adc_pal_1_config = { .groupConfigArray = adc_pal_1_groupArray, .numGroups = 2u, .sampleTicks = 12u, .extension = &adc_pal_1_extensionConfig }; /*! @brief array of conversion groups */ const adc_group_config_t adc_pal_1_groupArray[2u] = { /* Conversion group 0 */ { .inputChannelArray = adc_pal_1_channelsArray0, .resultBuffer = adc_pal_1_results0, .numChannels = 8u, .numSetsResultBuffer = 1u, .hwTriggerSupport = false, .triggerSource = TRGMUX_TRIG_SOURCE_DISABLED, .delayType = ADC_DELAY_TYPE_NO_DELAY, .delayArray = NULL, .continuousConvEn = false, .callback = SYSTEM_ADC_MODULE1_GROUP1_IRQ_HANDLER, .callbackUserData = NULL }, /* Conversion group 1 */ { .inputChannelArray = adc_pal_1_channelsArray1, .resultBuffer = adc_pal_1_results1, .numChannels = 4u, .numSetsResultBuffer = 1u, .hwTriggerSupport = false, .triggerSource = TRGMUX_TRIG_SOURCE_DISABLED, .delayType = ADC_DELAY_TYPE_NO_DELAY, .delayArray = NULL, .continuousConvEn = false, .callback = SYSTEM_ADC_MODULE1_GROUP2_IRQ_HANDLER, .callbackUserData = NULL }, }; /*! @brief group 0: input channels array */ adc_input_chan_t adc_pal_1_channelsArray0[8u] = { /* 0 */ ADC_INPUTCHAN_EXT2, /* 1 */ ADC_INPUTCHAN_EXT3, /* 2 */ ADC_INPUTCHAN_EXT4, /* 3 */ ADC_INPUTCHAN_EXT5, /* 4 */ ADC_INPUTCHAN_EXT8, /* 5 */ ADC_INPUTCHAN_EXT9, /* 6 */ ADC_INPUTCHAN_EXT10, /* 7 */ ADC_INPUTCHAN_EXT11, }; /*! @brief group 0: results buffer */ uint16_t adc_pal_1_results0[8u]; /*! @brief group 1: input channels array */ adc_input_chan_t adc_pal_1_channelsArray1[4u] = { /* 0 */ ADC_INPUTCHAN_EXT12, /* 1 */ ADC_INPUTCHAN_EXT13, /* 2 */ ADC_INPUTCHAN_EXT14, /* 3 */ ADC_INPUTCHAN_EXT15, }; /*! @brief group 1: results buffer */ uint16_t adc_pal_1_results1[4u]; used SDK 4.0.2 on S32DS 3.4 Re: ADC callback routine fires multiple times although continuous conversion is disabled Sorry, fault in other place found. Can be closed

LPSPI FRAMESZ 和接收数据寄存器 你好， 我正在将 S32K3xx 与外部闪存连接起来。该芯片需要不同大小的命令和数据组合。例如，要读取状态寄存器，需要发送 1 字节命令并等待 1 字节数据出现在 MISO 线上。帧大小可以从 8 位到几个字节。有没有办法连接这个芯片而不需要每次都改变 FRAMESZ？ 在上面的例子中，我不能只发送 1 个字节的命令。我必须发送一个额外的虚拟字节以便内存芯片能够做出响应。所以，我的帧大小必须是 16 位长。我还有其他用例，其中我发送 1 字节的命令 + 3 字节的地址 + 10 字节的数据（仅作为示例）。似乎每次我的数据发生变化时我都必须修改 FRAMESZ。 另一个问题：似乎为了在 SPI 数据寄存器中获取正确的数据，我必须在每次发送一帧时读取该寄存器。SPI 是这样设置的吗？ LPSPI1_transmit_16bits(tx_16bits); /* 在 LPSPI1 上传输半字（16 位）*/ LPSPI1_16bits_read = LPSPI1_receive_16bits(); /* 在 LSPI1 上接收半字 */ 非常感谢您的帮助！ 武萨尔 回复：LPSPI FRAMESZ 和接收数据寄存器 非常感谢！ 回复：LPSPI FRAMESZ 和接收数据寄存器 嗨，丹尼尔， 感谢您的留言。这解决了该问题。 还有一个快速问题：为了在SPI数据寄存器中获取正确的数据，我每次发送一帧时都必须读取该寄存器。SPI是这样设置的吗？ LPSPI1_transmit_16bits(tx_16bits); /* 在 LPSPI1 上传输半字（16 位）*/ LPSPI1_16bits_read = LPSPI1_receive_16bits(); /* 在 LSPI1 上接收半字 */ 谢谢你！ 最好的， 武萨尔

S32K3 HSE Hi, I'm working with Secure Debug feature using HSE firmware for S32K358. I have some questions regarding this topic: 1. Can Secure Debug feature be enabled/disabled directly with HSE firmware only (not via Demo APP)? 2. Do the other software need to implement anything to work if Secure Debug feature is enabled? Thanks a lot. Re: S32K3 HSE Thanks for your support. Re: S32K3 HSE Hi @HaiHoangSoftware  This configuration needs to be done by user application which triggers corresponding HSE services. Second option is to do that directly by debugger – i.e. write some script which will initialize HSE descriptors and triggers HSE services by JTAG. But first option is more common one. Yes, it’s shown in HSE DemoApp where Trace32 from Lauterbach is needed. But we have also these HSE demo examples: https://www.nxp.com/webapp/Download?colCode=S32K3_HSE_DemoExamples In fact, it’s HSE DemoApp ported to individual simple SW examples and you can use any debugger to run it. After installation of the package, you can find this example: c:\NXP\S32K3_HSE_DemoExamples_1_0_0\S32K3_HSE_DemoExamples\Device_Configuration\S32K344_CQC_DEMO\   And you can find in the readme file:   *** The main purpose of this example is to show different possible configurations that can be done over the HSE and the functionality of the MCU. These possible configuirations are: - Key Catalog Formatting - Plain ADKP provisioning - Secure Debug Mode selection (Static or Dynamic) - Life Cycle Advancement (Starting from CUST_DEL can advance the life cycle to OEM_PROD or IN_FIELD) ***   This is essentially what you need to do to enable secure debug feature. Key catalogs can be formatted only in CUST_DEL life cycle and it is mandatory to use secure debug when life cycle is advanced to OEM_PROD or IN_FIELD. So, the example shows how to do that.   Once secure debug is enabled, it’s necessary to configure your debugger accordingly.   If Pemicro is used, you can read this article on Pemicro site: https://www.pemicro.com/learningcenter/contents.cfm?content_id=82 We have also this article which describes how to set the password without HSE. Last part is valid also for a case when HSE is used: https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-Restrict-the-debug-access-with-a-password-when-HSE-is-not/ta-p/1735073   If you use debugger from Lauterbach, you can take a look at scripts in HSE DemoApp: c:\NXP\HSE_DEMOAPP_S32K3XX_0_2_40_0\demo_security_installer\scripts\   See the files like: debug_App_ADKP.py debug_authorization.cmm adkp_key_input.txt   Regards, Lukas

MIMXRT1170-EVKB 100M PHY shows full duplex but any device I connect to it shows half?? The subject covers my question... I've been working with the MIMXRT1170-EVKB board and I notice there are a lot of inbound frame errors when using the 100M port.  After tracking this down a bit I found that the PHY on the eval board thinks it is in full duplex mode, but any device I connect it to (Linux and others) come up in half duplex.  Any idea what would cause either end of the cable to have different duplex settings? Is this even a legal connection?  Re: MIMXRT1170-EVKB 100M PHY shows full duplex but any device I connect to it shows half?? I apologize... I can't reproduce this outside of my own application.  I verified that just running an untouched SDK example that uses the 100Mbit interface things work as expected.  I will close this (and if you prefer to just delete it, that's fine). Thanks! Re: MIMXRT1170-EVKB 100M PHY shows full duplex but any device I connect to it shows half?? @EdSutter Would you please give how to do this tracking with details or steps to us? Is there any data? For some errors, please share log, BTW which SDK version and examples are you using.

I.MX8虚拟化指南 我指的是文档IMXVIRTUG_ga - i.MX虚拟化用户指南 文档提到了在 I.MX Quad Max EVK 板上使用 Xen 同时启动和运行 Linux 和 Android 的步骤 1. 可以使用相同的步骤和文件在 I.MX8 Quad Max MEK 板上启动 Linux 和 android 吗？ 2. 是否可以使用相同的步骤通过 XEN 在 Linux 上启动 Android Automotive (14/15)？

MIMXRT1170-EVKB 100M PHY 显示全双工，但我连接到它的任何设备都显示一半？？ 该主题涵盖了我的问题...... 我一直在使用 MIMXRT1170-EVKB 板，我注意到使用 100M 端口时会出现很多入站帧错误。经过一番追踪后，我发现评估板上的 PHY 认为它处于全双工模式，但我将其连接到的任何设备（Linux 和其他设备）都处于半双工模式。知道什么原因会导致电缆两端有不同的双工设置吗？ 这到底是合法的联系吗？ 回复：MIMXRT1170-EVKB 100M PHY 显示全双工，但我连接到它的任何设备都显示一半？？ 我很抱歉……我无法在我自己的应用程序之外重现这一点。我验证了仅运行使用 100Mbit 接口的未触及的 SDK 示例就可以按预期工作。我将关闭它（如果你只想删除它，那也没问题）。 谢谢！ 回复：MIMXRT1170-EVKB 100M PHY 显示全双工，但我连接到它的任何设备都显示一半？？ @EdSutter您能否向我们提供如何进行此跟踪的详细信息或步骤？有數據嗎？对于某些错误，请分享日志，顺便问一下您使用的是哪个 SDK 版本和示例。

MIMXRT1170-EVKB 100M PHYは全二重を示していますが、接続するデバイスは半分を示していますか? 主題は私の質問をカバーしています... MIMXRT1170-EVKBボードで作業していると、100Mポートを使用すると多くのインバウンドフレームエラーが発生することに気づきました。これを少し追跡した結果、評価ボードのPHYは全二重モードであると考えていますが、接続するデバイス(Linuxなど)は半二重で起動することがわかりました。ケーブルの両端のデュプレックス設定が異なる原因は何ですか? これは法的なつながりですか? Re:MIMXRT1170-EVKB 100M PHYは全二重を示していますが、接続するデバイスは半分を示していますか? 申し訳ないです。。。私は自分のアプリケーションの外でこれを再現することはできません。100Mbitインターフェイスを使用する手つかずのSDKサンプルを実行するだけで、期待どおりに機能することを確認しました。これを閉じます(そして、単に削除したい場合は、それで問題ありません)。 ありがとうございます！ Re:MIMXRT1170-EVKB 100M PHYは全二重を示していますが、接続するデバイスは半分を示していますか? @EdSutterこの追跡方法を詳細や手順とともに教えていただけますか?データはありますか?一部のエラーについては、ログを共有し、ところで、使用しているSDKバージョンと例を共有してください。

EB软件Port模块设置多套引脚配置 EB Tresos有办法可以让Port模块有多套的全部Pin配置吗？在编译前通过宏或者变量名（Port_Init的输入参数）选择不同的Pin配置进行编译。我看到Config Variant使用VariantPostBuild应该可以实现这个功能，但是需要EcuC配置多个EcucPostBuildVariant，并且每个模块都会生成多个配置文件。如果目的只是让Port生成多个配置文件，有什么办法吗？