In-cache stack in MPC5674F (vs. MPC5777C) Hello, I followed AN5191 to set a MPC5777C board up and, for a given application, noticed a sizeable performance gain (~10%) when the stack was inside the data cache, rather than the internal SRAM. I tried to repeat the experiment with a MPC5674F board and had no gain at all - in fact, I got a slight performance loss of ~3%. Is this expected? I supposed gains might be smaller because the MPC5674F internal SRAM has a smaller latency than the MPC5777C one, but I did not expect to see a negative result. Both boards are running at 264MHz. Thanks, Ricardo Re: In-cache stack in MPC5674F (vs. MPC5777C) Hi @ricardofranca  "because the MPC5674F internal SRAM has a smaller latency than the MPC5777C one" - this is the key point. The stack in cache can help significantly on MPC5777C because of the mentioned latency. This effect won't be so visible on MPC5674F. I guess that the performance loss can be caused by fact that the size of cache used for application is smaller, so more flash reads are needed in runtime. Regards, Lukas

about S32DS3.5 project check waring 请问在打开S32DS软件的是否会出现这种警告，这个.doc文件如何生成或者修复？感谢！

CW11.1 license error   Installed Products:  - CodeWarrior for MCU Version: 11.1 Build Id:181224 #above is version and license information #but when i open the IDE it always report errors below how to fix this issue In addition i am not sure where i should place my licesne.dat in client side. Re: CW11.1 license error Hello @leolv , Thanks for your post. From your picture, it shows that your license.dat is in the right place and has been activated successfully. There's no problem. Regarding the log "CDE: no license found, using Community Edition License", it is not an error log but a normal one, and the appearance of this message will not affect the normal use of CodeWarrior. CDE means the Component Development Environment. You can refer to the link below for more details. Solved: What tool do I kneed for Component Development? - NXP Community In short, this log is not an error and won't affect your use.  Hope it can help you.  BRs, Celeste --------------------------------------------------------------------------------------------------- Note: If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! ---------------------------------------------------------------------------------------------------

Issue in working with arduino uno for S32k116 EVB. Hello all, Background: S32 DS 3.4 Software and for the example S32K1xx SDK RTM v4.0.3 Example Projects --> lpuart_echo_s32k116.  I'm working on lpUART with S32K116 EVB, everything is working as expected with the open a terminal emulator(tera term in my case). But my question was how to do the same from arduino uno intead of open terminal? I've tried to connect the pins tx, rx and gnd pins of arduino uno to s32k116 EVB pins PTA 2 and 3 which is said to be arduino compatible pins. but didn't get succeed in getting output as Hello World for the input Hello Board.  As we can see from the above figure, the first graph is the signal sent from arduino to S32k board and the second one is recieved from s32k board. The expected output from second figure was Hello World, but in my case i am getting back the same signal that has been sent. Am I missing something to include in order to work with arduino uno? Any suggestions or help would be highly appreciated! I've also attached necessary source file with this message for our reference.  Thanks & regards, Santhosh Re: Issue in working with arduino uno for S32k116 EVB. Hello @Julián_AragónM , Thank you so much for your resonse! It is working as expected with arduino uno as well. and the code I used in adruino IDE as follows: void setup() {   // Initialize serial communication at 9600 baud   Serial.begin(9600);     // Wait for a moment to ensure serial connection is established   delay(1000); } void loop() {   // Send "Hello Board" message followed by a newline (LF only)   Serial.print("Hello Board\n");     // Wait for 3 second before sending the next message   delay(3000); } Thanks & regards, Santhosh Re: Issue in working with arduino uno for S32k116 EVB. Hi @santhosh23, I believe this is because the board is expecting a "\n" when comparing the buffers at the EOL. It seems you are transmitting both CR and LF ("\r\n") in each message. This can be seen configuring Tera Term from CR+LF (which only echoes the characters) to LF (which does return the "Hello World"): Could you try sending "Hello Board\n" only?  Best regards, Julián

S32G3 QSpi NorFlash Hi, I was looking at the AN13563 document and saw that"S32G does not have internal flash", but in "S32G3 Reference Manual" annexes "S32G3_memory_map.xlsx",I see that the address from 0x0-0x1fff ffff is the QSPI AHB Buffer So I've got a few questions for you. 1. Is this QSPI AHB Buffer referring to the external 64M size flash? 2. So how does this portion of memory migrate to ram after power up and how is it mapped in ram, also please let me know,or maybe we should go to that document. 3. When I need to perform an erasure and write action on an external flash, how do I go about it? Please guide me,because the flash in the previous project was inside the chip. MY environments: S32G-VNP-RBD3, S32DS 3.5  S32G-VNP-RDB3 S32G3  Re: S32G3 QSpi NorFlash Hello @jiajun , Thanks for contacting NXP support. Here is the information I was able to find for all your questions: Q1. Is this QSPI AHB Buffer referring to the external 64M size flash? A1. This memory region, from 0x00_0000_0000 to 0x00_1FFF_FFFF, is not the 64M flash directly, it is the AHB buffer, that works like an intermediary between the real flash and the processors reading it. There is a direct mapping between the addresses in ram buffer and the flash device. You can read more about this in the following sections of the reference manual [S32G3 Reference Manual, Rev. 4, 02/2024]: 39.5 Flash memory mapped AMBA bus 39.5.1 AHB bus access read considerations 39.5.5.2 AHB RX Data Buffer Register (ARDB0 - ARDB127)   39.6.2.8 Flash memory read Q2. So how does this portion of memory migrate to ram after power up and how is it mapped in ram, also please let me know, or maybe we should go to that document. A2. This migration of data occurs during the boot process, you can find more info about it in the following documents: Reference manual [S32G3 Reference Manual, Rev. 4, 02/2024]: 31.7 Boot flow 31.7.1 Boot flow phases 31.7.2 Boot flow diagram AN13456 - S32G3 Boot Process [Rev. 1, 02/2023] 6. BootROM 7.2. QSPI Boot You can also check the application note “AN13750 - Enabling Multicore App” [Rev. 0, 11/2022] for the RDB2, although it may no work exactly like that in the RDB3, it can give you a good idea on how the mapping of the ram and the flash is done. As you will see in that App note, the exact mapping will is related your linker file. Q3. When I need to perform an erasure and write action on an external flash, how do I go about it? A3. There are two ways to do it: one is with the flash tool, you can also check the steps in the “AN13750 - Enabling Multicore App”, in section “6. Deployment on s32g-vnp-rdb2”, step 8. If you want to do it during runtime you can check the RTD example “Qspi_Ip_Example_S32G399A_M7”, there you can see how to init, erase, write and read the QSPI flash. You can also go inside the functions definitions for more details about the registers usage. Please let us know if this information answers all your questions.

Flash Programming Write & Erase fails on QSPI_B On our board design, we have two QSPI Flash Chips (1Gb each) that we will be operating in parallel mode on a LS1046A.  We are using the Flash Programmer utility in Code Warrior (version 11.5.12) to program the devices.  When we program QSPI A flash (Starting Address 0x40000000), everything works as expected.  When we attempt to program QSPI B flash (0x48000000), the data is not written to flash.  We also cannot successfully execute erase commands.  If we program the QSPI B chip using an external device (Corelis JTAG), we are able to successfully read in parallel mode. Upon investigation of the problem, we instrumented the QSPI Clock, Chip Select, and 4 data lines for the two QSPI chips.  When we issue an Erase command on QSPI A, we see a series of commands go out the QSPI A bus.  I think it’s a status register read, another status register read, a write enable, a status register read, and finally a series of sector erase commands.  This works as expected. When we issue the Erase command on QSPI B, the same set of commands are sent but the status register read and write enable commands are transmitted out to the QSPI A device while the Erase is sent to the QSPI B device. Since the QSPI B device has not received the WRITE enable command, the Erase does not work.  I’ve attached a scope capture that shows this behavior. QSPI_B Scope CaptureQSPI_B Scope Capture Here are the scope signals: D0 – QSPI_A Clock D1 – QSPI_A Chip Select D2 – QSPI_A D0 D3 – QSPI_A D1 D4 – QSPI_A D2 D5 – QSPI_A D3 D6 – QSPI_B Clock D7 – QSPI_B Chip Select D8 – QSPI_B D0 D9 – QSPI_B D1 D10 – QSPI_B D2 D11 – QSPI_B D3 Any ideas on what may be going on to cause this behavior? Re: Flash Programming Write & Erase fails on QSPI_B I finally solved this issue.  There are a few bugs in the QSPI_64b.bin file.  As shown in the original scope capture, all the status register reads and write enable commands are sent to the incorrect device.  This is controlled by the SFAR register of the QSPI controller.  In the QSPI_64b.bin logic, SFAR is set to the xspi_base_device address in these routines, which is hard-coded to 0x40000000 which results in these commands always going to QSPI A1.  The source code for the QSPI_64b.bin file can be obtained as discussed in this article: https://community.nxp.com/t5/CodeWarrior-for-QorIQ/Adding-a-flash-device-configuration-CodeWarrior-11-5/m-p/1404952 Application Note 5398 (https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/qoriq-grl/7636/2/AN5398%2520Adding%2520Devices%2520to%2520CW-ARMv8%2520Flash%2520Programmer.pdf) provides details on how to build and debug the QSPI algorithm file. @yipingwangYou might want to pass this along to the development team so that they can properly update this algorithm file to properly support the additional QSPI devices. Re: Flash Programming Write & Erase fails on QSPI_B @yipingwang As a more simple test case, I use the gdb command line interface to the flash programmer (using cwflash.py) with a target init script configured as described in my above response.  When I issue a fl_id command, the scope shows the register read occurring on the QSPI A lines.  If I issue a fl_dump command, I see the read activity correctly occurring on the QSPI B lines.  I believe there is an issue in the QSPI_64b.bin logic that executes these commands on the target, but I don't have access to the source code for this logic.  I suspect the Serial Flash Address Register (QuadSPI_SFAR at 0x1550100) is not being set properly which results in transactions occurring on chip A1 instead of the proper chip. Re: Flash Programming Write & Erase fails on QSPI_B I am back to troubleshooting this issue. Based on your latest comments, I have setup the target initialization file to not be in parallel mode and am attempting to do a simple erase on the Flash B device. We are using the MT25QU01GBBB (1 Gbit / 128 MB) part for both Flash A and Flash B. I have configured the top addresses for each device (A1, A2, B1, B2) as 0x48000000, 0x50000000, 0x58000000, and 0x60000000 respectively. I have configured a single flash device for the programmer using address 0x50000000 so I would expect all commands issued to go to Flash device B1. I am still seeing the same behavior as the original scope capture -- status register reads and Write Enable commands are going out on Flash A lines while the erase command is going out on the Flash B lines. I have attached the target initialization script as requested. I am unable to provide full schematics, but I have provided a snip of the schematic showing the two Flash devices. Again, if I program the flash devices using a different programmer, we are able to boot the board using the parallel mode so I believe the physical connections to the devices are correct. Re: Flash Programming Write & Erase fails on QSPI_B Please refer to the following update from the AE team. Please request the following information from the customer: 1) The connection scheme (schematic) of their design. 2) The scripting file or target initialization file used for initializing the QSPI flash devices. Have there been any changes to this file? 3) Are you able to access QSPI flash devices (A and B) in individual mode and successfully execute the erase command? Can the read and write commands be executed on the QSPI flash device? Please note that in parallel mode, only read commands are supported, whereas in individual flash mode, all supported commands are available. Refer to section 27.6.1 "Serial Flash Access Schemes" in the LS1046ARM for detailed information. 4) Is there a specific reason for using the CodeWarrior Flash Programmer utility to program the QSPI flash devices? Re: Flash Programming Write & Erase fails on QSPI_B We have made the suggested changes to our target initialization script and are still unable to program the device on QSPI B.  Our target initialization script was configured as you suggested with the exception of QSPI_BFGENCR[PAR_EN] and QuadSPI_IPCR[PAR_EN] as "1".  We added that change and saw the same behavior when attempting to program the QSPI_B flash chip. Re: Flash Programming Write & Erase fails on QSPI_B In the following "QSPI Initialization" section in "Target Initialization File", please configure  QSPI_BFGENCR[PAR_EN] and QuadSPI_IPCR[PAR_EN] as "1". ################################################################### # QSPI Initialization ################################################################### def Init_QSPI(): # QSPI_CFG CCSR_BE_M(0x157015C, 0x20100000) # SMPR CCSR_BE_M(0x1550108, 0x00000000) # QuadSPI_FLSHCR CCSR_BE_M(0x155000C, 0x00000303) # Set top address for each device CCSR_BE_M(0x1550180, 0x44000000) CCSR_BE_M(0x1550184, 0x48000000) CCSR_BE_M(0x1550188, 0x4C000000) CCSR_BE_M(0x155018C, 0x50000000) # BUF0CR CCSR_BE_M(0x1550010, 0x00000000) # BUF3CR CCSR_BE_M(0x155001C, 0x80000000) # BFGENCR CCSR_BE_M(0x1550020, 0x00000000) # QuadSPI_MCR CCSR_BE_M(0x1550000, 0x000f4000) In the following section in "Adds Flash devices for this board" in "Target Initialization File", please configure "address" as 0x48000000. # Add QSPI device fl.add_device({"alias": "qspi", "name": "S25FS512S", "address": 0x40000000, "ws_address": 0x10000000, "ws_size": 0x1FFFF, "geometry": "8x1", "controller": "QSPI"}) Re: Flash Programming Write & Erase fails on QSPI_B If we program the chips using external tools, we are able to boot and read from the parallel flash chips which confirm that the pin multiplexing settings in the RCW are correct.  I have verified these settings.  This issue only appears when programming using the CodeWarrior Flash Programming utility.  Re: Flash Programming Write & Erase fails on QSPI_B Do refer the section 27.7.7 Parallel mode in LS1046ARM to operate the QSPI flash in parallel mode. Check with the customer if the pin muxing is correctly set in IFC_GRP_[F/E1/D]_EXT RCW field for the QSPI A and B flash. Please Refer to section 3.4.7 IFC, QSPI, FTM and GPIO2 signal multiplexing in LS1046ARM for the same. We are further investigating the issue on our end. Re: Flash Programming Write & Erase fails on QSPI_B I am still working for the update from the expert team now. I have contacted them again, will update to you as soon as possible. Re: Flash Programming Write & Erase fails on QSPI_B @yipingwangHave you heard anything back from the expert team?  Do you need any additional information from me to help figure this out? Re: Flash Programming Write & Erase fails on QSPI_B Discussing with the expert team.

MPX5010DP offset and sensitivity strange values Hi, I have a MPX5010DP pressure sensor connected to an Arduino Uno. Pin 1 (with the mark) on the MPX5010DP is connected to Pin A0, Pin 2 is connected to Ground and Pin 3 to 5V on the Arduino.  Without any pressure applied, the offset value is about 1.58 V. The sensitivity is about 2.43 mV/mm H2O. These values does not match the datasheet values : 0.2 V for the offset, 4.413 mV/mm H2O for the sensitivity. I can't see anything wrong with my setup. Has anyone ever observed this kind of problem? Thanks Pressure Sensors Re: MPX5010DP offset and sensitivity strange values Hello, These devices are very sensitive. To ensure optimal performance, we recommend implementing auto-zero according to the application note linked below: Implementing Auto-Zero for Integrated Pressure Sensors Hope this helps.

s32k3 where does adkp_master defined? Hi NXP,    in S32K3, doc says the ADKP saved in NVM in origin  or with uid diversified. but in demo example, the function  HSE_ProgramAdkp() just use HSE_APP_DEBUG_KEY_ATTR_ID to write the key. my question is , what does ADKP_MASTER defined and how to config it?   Re: s32k3 where does adkp_master defined? Hi @victory  ADKP_MASTER selects the method to provisioning ADKP: diversified with the device’s UID or written “as is” in secure NVM. Refer to sections 2.6.1.4.4 (Provisioning a device-dependent ADKP) and 2.6.1.4.5 (Secure ADKP Provisioning) of the HSE_B Firmware Reference Manual, Rev. 2.3.  If you are loking to configure ADKP with UID diversification option, you must set ADKP_MASTER before programming ADKP (HSE_APP_DEBUG_KEY_ATTR_ID). TS32K3 will automatically perform the UID diversification operation when programming ADKP. BR, VaneB

An error occurred after the library file was imported I am using S32K311, I added the library file to the project through new, after compiling, there will be an error. May I ask if there is any solution HiRe: An error occurred after the library file was imported Hi,  the app_callbacks.h is not visible for the Release configuration. Please check the Include paths.  Re: An error occurred after the library file was imported HI,@stanish  As you suggested, I enabled --gc-sections and recompiled the project. When I use Debug_Flash, I can enter the debug phase normally. However, I find that I still get an error when I use release_Flash. I want to ask how to solve it. Re: An error occurred after the library file was imported Hi, This linking error indicates the data sections do not fit into internal SRAM memory. If this happen after you add a library to the project - it may indicate that the linker does not dead-strip the unused library functions. Could you check if the linker option is enabled:  --gc-sections enable the option and rebuild the project. If it does not help, please check your code/data may not fit into the memory. Hope it helps. Stan

"FreeRTOS Task Aware Debugger for GDB" no information Hi NXP: I'm using FreeRTOS for developing with PEMicro(MultiLink) in my project, and my code works in FreeRTOS system. I'd like to debug further detail information of FreeRTOS status by "FreeRTOS Task Aware Debugger for GDB" from NXP, but it can't display any message, please help me, thanks. environment: S32DS Product=>3.5.0.202207261815 RTD S32K3XX=>5.0.0.202410011049 FREERTOS S32K3XX=>5.0.0.202409270704 FreeRTOS Task Aware Debugger for GDB=>1.0.8.202407261901 attachment: 20250102-task_list(FreeRTOS)_empty.png (stop step) 20250102-task_list(FreeRTOS)_no_information.png (full run) 20250102-console_message.txt (connected status with PEMicor) Re: "FreeRTOS Task Aware Debugger for GDB" no information Hi NXP: sorry~~I solved, never mind. thanks.

TEA2017 PFC OVP Issue Dear All, I hope this message finds you well. I am reaching out regarding an application issue with the TEA2017. Our end customer requires the output to be shut off when the input voltage exceeds 275Vac. In my design, the PFC output voltage is set at 385Vdc. When the input voltage surpasses 310Vac, the SNSBOOST Pin voltage is 3.0V, at which point the PFC boost function is deactivated. However, the LLC continues to operate normally. We are seeking a solution to achieve the desired functionality of shutting down the output when the input voltage exceeds 275Vac. Your prompt assistance in this matter would be greatly appreciated. TEA2017  Re: TEA2017 PFC OVP Issue Dear Tino, The customer's requirement is not completely clear to me, but maybe an option is to disable LLC operation after the PFC stops operation because of OVP on SNSBOOST. By MTP setting: BRs, Tomas

“FreeRTOS Task Aware Debugger for GDB” 没有信息 你好，恩智浦： 我在我的项目中使用 FreeRTOS 和 PEMicro（MultiLink）进行开发， 我的代码在 FreeRTOS 系统上运行。我想调试更多详细信息 NXP 的“FreeRTOS Task Aware Debugger for GDB”可以检测 FreeRTOS 的状态，但无法 显示任何消息，请帮助我，谢谢。 环境： S32DS产品=>3.5.0.202207261815 RTD S32K3XX=>5.0.0.202410011049 FREERTOS S32K3XX=>5.0.0.202409270704 FreeRTOS 任务感知调试器（适用于 GDB）=>1.0.8.202407261901 依恋： 20250102-task_list(FreeRTOS)_empty.png（停止步骤） 20250102-task_list(FreeRTOS)_no_information.png（完整运行） 20250102-console_message.txt（与PEMicor的连接状态） 回复：“FreeRTOS 任务感知调试器（用于 GDB）”无信息 你好，恩智浦： 抱歉~~我解决了，没关系。谢谢。

KEAZN64 CAN communication routine Unable to find the CAN communication routine for KEAZAN64 Re: KEAZN64 CAN communication routine thank you very much！ Re: KEAZN64 CAN communication routine Hello @poorgay  KEAZN64 doesn't support the CAN module. In the part number, "N" means CAN is not available. Hope it helps. BR Alice

KEAZN64 CAN通讯例程 无法找到 KEAZAN64 的 CAN 通信例程 回复：KEAZN64 CAN通信例程 非常感谢！

「FreeRTOS Task Aware Debugger for GDB」の情報なし こんにちはNXPの皆さん。 私はプロジェクトでPEMicro(MultiLink)を使用して開発するためにFreeRTOSを使用していますが、 そして私のコードはFreeRTOSシステムで動作します。さらに詳細な情報をデバッグしたいと思います NXPの「FreeRTOS Task Aware Debugger for GDB」によるFreeRTOSステータスの、しかしそれはできません メッセージを表示します、助けてください、ありがとう。 環境： S32DS製品= >3.5.0.202207261815 測温抵抗体 S32K3XX=>5.0.0.202410011049 FREERTOS S32K3XX=>5.0.0.202409270704 GDB の FreeRTOS タスク認識デバッガー=>1.0.8.202407261901 愛着： 20250102-task_list(FreeRTOS)_empty.png (停止ステップ) 20250102-task_list(FreeRTOS)_no_information.png (フルラン) 20250102-console_message.txt (PEMicor との接続状態) Re: 「FreeRTOS Task Aware Debugger for GDB」の情報がありません こんにちはNXPの皆さん。 ごめんなさい~~解決しました、気にしないでください。感謝。

License expired and not updated on NXP site Hello ,  I am using NXP S32G3 and GoldVIP package with EB but from 2 days i am not able to open the configurator since license got expired . As a regular process i have check the NXP product manager for the new key but there also it is not been updated kindly request you to resolve this  Re: License expired and not updated on NXP site Hello @chenyin_h , Thank you , license is updated now , Thank you for the support. Regards Karthik Mallya M  Re: License expired and not updated on NXP site Hello @chenyin_h , This is very critical at the movement  , Its been 10 days , We are completely blocked by this ,Could you please tell me how long it may take to resolve the issue  , so I can prepare for it . Regards Karthik Mallya M Re: License expired and not updated on NXP site Hello, @Karthik_7  I am very sorry for your inconvenience. The issue has been escalated to the responsible team by me and I still keep tracking on it during the work. I will update the status once getting formal replies from the internal team. ​ Again, apologize for the issue. BR Chenyin Re: License expired and not updated on NXP site Hello@chenyin_h , Still the issue is not been resolved ,kindly let me know if you have any other workaround solution to use EB with GoldVIP plugins and package. We are blocked since a week, kindly request you to escalate this issue further. Regards Karthik Mallya M Re: License expired and not updated on NXP site Hello, @Karthik_7  Very sorry for your inconvenience, I will keep tracking on this issue BR Chenyin Re: License expired and not updated on NXP site Hello @chenyin_h , Thank you for the support , kindly request you to push this issue, its very critical for me at the movement , my work has been blocked . Regards Karthik Mallya M Re: License expired and not updated on NXP site Hello, @Karthik_7  Thanks for your post. I have checked the activation code for the EB AutoCore 8.8.7 from my end, seems the activation code is also not updated yet, it is expired on 2024/12/31, the same for the issue you met. From my experience, the code may be updated in recent few days, you may check it from the account and try again if the code is updated. Also, I have reported it to corresponding team for solving this issue. I feel very sorry for your inconvenience.   BR Chenyin

KEAZN64 CAN通信ルーチン KEAZAN64 の CAN 通信ルーチンが見つかりません Re:KEAZN64 CAN通信ルーチン ありがとうございました！

TEA2017 PFC OVP问题 尊敬的各位， 我希望你一切安好。我正在咨询有关 TEA2017 的应用程序问题。我们的最终客户要求当输入电压超过 275Vac 时关闭输出。在我的设计中，PFC输出电压设置为385Vdc。当输入电压超过310Vac时，SNSBOOST引脚电压为3.0V，此时PFC升压功能停用。然而，该有限责任公司继续正常运营。 我们正在寻求一种解决方案，以实现当输入电压超过 275Vac 时关闭输出的所需功能。非常感谢您就此事提供及时帮助。 2017年茶会

TEA2017 PFC OVP の問題 皆様 このメッセージがあなたによく伝わることを願っています。TEA2017のアプリケーションの問題について連絡しています。当社の最終顧客は、入力電圧が275Vacを超えたときに出力をシャットオフすることを求めています。私の設計では、PFC 出力電圧は 385Vdc に設定されています。入力電圧が310Vacを超えると、SNSBOOSTピン電圧は3.0Vになり、その時点でPFCブースト機能は非アクティブになります。ただし、LLCは通常どおり運営されています。 入力電圧が275Vacを超えたときに出力をシャットダウンするという望ましい機能を実現するためのソリューションを探しています。この件について、迅速なご協力をお願いいたします。 TEA2017 

S32G399A的PFE 嗨，专家们 我正在调试我们自己生产的S32G399A。根据S32G399ARDB3，我发现它使用了gmac0、PFE2（用于独立PHY）和PFE0（用于SJA1110） 。我们已将此网络配置更改为PFE1、PFE2（用于独立PHY）和PFE0（用于SJA1110）。关于dts，我应该修复哪个文件？谢谢！