S32K1xx lpUART driver Implement Hello NXP Teams I'm using the SW32K1_S32M24x FreeRTOS 10.5.1 library and would like to add a UART driver under the driver layer. Is there any sample code I can reference? thank you Re: S32K1xx lpUART driver Implement Hi, trying selecting IP level demo example, there is just IP level components   BR, Petr Re: S32K1xx lpUART driver Implement Hi PetrS I have imported the example project from S32K1 AUTOSAR R21-11 RTD 2.0.0 P04 D2404 Example Project, but this sample project only includes examples for the MCAL layer. I would like to implement peripheral devices at the driver layer. Is there any sample project available for download? thank you Example ProjectExample Project MACL layerMACL layer Driver layerDriver layer Re: S32K1xx lpUART driver Implement Hi, you can refer to RTD demo directly   BR, Petr Re: S32K1xx lpUART driver Implement Hi PetrS, Thank you for your reply. Since there is no demo code for implementing peripherals on the driver layer with FreeRTOS, could you kindly provide sample code for peripheral devices at the driver layer? I appreciate your help!     Re: S32K1xx lpUART driver Implement Hi, I am not aware of RTD demo for this, but maybe you can refer to below example using SDK https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/EXAMPLE-S32k144-UART-printf-scanf-under-FreeRTOS-S32DS/ta-p/1122496 BR, Petr Re: S32K1xx lpUART driver Implement

S32K1xx lpUART驱动程序实现 恩智浦团队您好 我正在使用SW32K1_S32M24x FreeRTOS 10.5.1库，并想在驱动程序层下添加一个 UART 驱动程序。 是否有我可以参考的示例代码？ 谢谢

error when build linux kernel with kvm Hello Community, I want to build linux kernel with kvm feature, but I met some problems: implicit declaration of function '__tlbi_ipas2e1is', and also '__tlbi_vmalls12e1is' and '__tlbi_alle1is'. How can I fix this problem? Re: error when build linux kernel with kvm I'm not working with it. It shows kvm initiation failed at kernel starting. Re: error when build linux kernel with kvm Hello, I have the same question with you, it seems the official release of S32G does not support KVM. Are you still working on it? have you solved it? Re: error when build linux kernel with kvm Hello @stedylan, There is no current support from NXP to use KVM in the S32G3, I'm sorry for the inconveniences. In theory the A53 cores could support KVM (as mentioned in this article https://lwn.net/Articles/557132/) but the implementation should be on your side.  What I can recommend is to try using the ubuntu build, you follow the steps in section 3.1.3 BSP Ubuntu Build of the user manual [Linux BSP 40.0 User Manual for S32G3 platforms], you might be able to enable KVM more easily in that configuration. If the KVM is not specifically required I can recommend also traying Linux containers, you can learn more abut them in section 24 Virtualization of the same document. And the Xen Hypervisor you have already mentioned. Again, I apologize for the inconveniences. Let me know if this information was useful.  Re: error when build linux kernel with kvm   Hello alejandro_e:  Thank you for your reply. Last I was using bsp 38, and I update yocto version to BSP40, and find this patch https://lists.yoctoproject.org/g/linux-yocto/message/14190 , finally build successfully. But I met another problem when init kvm driver: kvm [1]: HYP mode not available. I'm using S32G399. I read the manual, it doesn't show any information about kvm but xen.  Does S32G399 not support kvm? If support, how can I fix this problem. And the manual only shows xen not kvm, why not using kvm instead xen?  Thanks! Re: error when build linux kernel with kvm Hello @stedylan , Checking the latest BSP user manual (BSP41) I don't see anything relevant related to KVM, can you provide more details about your setup? What is the BSP version you are using? Are you working with manual build or Yocto build? Are you working with the S32G2 or S32G3? What are the steps you are following to add KVM to your kernel? Thanks in advance for the information, Best regards

CAN メッセージ受け入れフィルターとマスク KEA128 MCUで拡張IDの受け入れフィルタとマスク値を計算する方法を知りたいです Kinetis Eシリーズ・マイクロコントローラ Kinetis EAシリーズMCU

CAN message acceptance filter and mask I would like to know how to calculate acceptance filter and mask values for extended IDs in KEA128 MCU Kinetis E Series MCUs Kinetis EA Series MCUs Re: CAN message acceptance filter and mask Hi, There are two banks of CAN receiver ID acceptance filter as the rectangle registers which can function for Extended ID filter(29 bits) and standard ID filter(11 bits). The MSCAN_CANIDARn is the ID that the CAN module wants to accept, the MSCAN_CANIDMRn include the mask bit. The MSCAN_CANIDAC[IDAM] defines the filter mode. For the acceptance pls refer to section 32.4.5 Identifier acceptance filter Hope it can help you BR XiangJun Rong

JTAG connection for burning some Fuses on i.MX8M Nano UltraLite (BGA306) Hello, The „i.MX 8M Nano Hardware Developer’s Guide” has a new statement (compared to Mini) in Table 42 – Board bring-up checklist (item 5): “i.MX 8M Nano cannot be connected to the JTAG controller while it is running in the ROM code space. It can only be connected to the JTAG controller when it has booted up successfully from the external boot device.“ We use our own JTAG equipment to burn few Fuses (Boot mode, Key, JTAG Disable) on iMX8M Mini and Nano (also refer to https://community.nxp.com/t5/i-MX-Processors/Can-I-burn-eFuses-for-iMX8M-Mini-family-using-direct-register/m-p/989578). At this stage there is no boot media on the adapter, but only the power supply and clock. The boot mode is Internal Boot (10b). Now we would like to do the same JTAG-Fuse programming for the Nano UltraLite. Would this be possible or is there a new restriction that was not present in the Mini/Nano? Thanks. Stefan i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: JTAG connection for burning some Fuses on i.MX8M Nano UltraLite (BGA306) Hello @s_k  After double check, the i.MX8MN should have the same behavior as the i.MX8MM according to the JTAG DAP after of reset. Best regards, Salas. Re: JTAG connection for burning some Fuses on i.MX8M Nano UltraLite (BGA306) Hello Alejandro_Salas, Thanks for your reply. I understood that the fuse map is the same. But would the Nano UltraLite allow JTAG DAP access right after reset (JTAG_MOD = 0, no boot media), like the Mini? Best regards, Stefan Re: JTAG connection for burning some Fuses on i.MX8M Nano UltraLite (BGA306) Hello @s_k  I hope you are doing very well. As i.MX8MN has a "sub-family", all the i.MX8MN share the same fuse maps, so, there is not a restriction with i.MX8MN Ultra Lite. Best regards, Salas.

Choosing ethernet PHY TSN compliant for iMX93 Hello, I have to design a custom board using iMX93 for a Time Sensitive Network application. I found the following information about TSN compliance into iMX93 datasheet:  So I found an Ethernet Phy with the feature "TSN compliant" without any further details about it. I did a web research and someone said that 802.1 Qbv, 802.1 Qbu and Time based scheduling are implemented by MAC controller, while PHY has to care about the latency and nothing more than that. Is it true? Is there anything else I must check in order to choose a PHY for TSN application? Thanks in advance Re: Choosing ethernet PHY TSN compliant for iMX93 Hi, Thank you for your interest in NXP Semiconductor products, As found in the internet, the features for IEEE 1588 need the frame preemption for time critical and shorting long frames, it's implemented by the MAC and when received, they're interpreted by the MAC. Also the PHY side is ok, the PHY just improves latency when the accuracy really needs it, but for most cases, a regular PHY should do the trick, as IEEE 1588 can be explored in i.MX 93 EVK which features a regular PHY. Conclusion, your application may or may not need a low latency PHY, but in both cases can use IEEE 1588 features. https://iebmedia.com/technology/tsn/tsn-technology-basics-of-ethernet-frame-preemption-part-2/ Regards Re: Choosing ethernet PHY TSN compliant for iMX93 That is mostly true with the only exception being older PHYs that are not 802.3br complaint and would complain about the use of SMD for frame preemption over SFD. As far as latency, you are correct that it is the PHYs main concern, its just not strictly defined in any TSN spec, yet it is good for a TSN system to have low and deterministic latency. <<Is there anything else I must check in order to choose a PHY for TSN application?>> A newer PHY that is 802.3br compliant, has a latency that is acceptable to your application, and I guess check that it supports the correct MDI and MII. For reference, the i.MX93EVK uses a RTL8211. Regards, Clay

Effect of GPIO input I plan to use the i.MX RT 1010. Use SAI1 to create the following circuit. I would like to create a combined SYNC and DATA1 output using this circuit. When outputting SYNC, set DATA1 to GPIO input via SW_MUX_CTL_PAD_XXX SW MUX Control Register. When outputting DATA1, set SYNC to GPIO input via the SW_MUX_CTL_PAD_XXX SW MUX Control Register. I would like to know the external effects of GPIO inputs. Since this is input, I don't think it will have any impact, but is that correct? Re: @Re: Effect of GPIO input Hi @yoshida_satoru , Thanks for your updated information. I understood your design concept from your circuit diagram. I know that you want to set the functions of unused pins to GPIO ,and configure GPIO pin as inputs with the aim of eliminating any external influences. However, this method may not very reliable for your entire audio system. Regarding you said before "It is also possible to physically switch between SAI1_TX_SYNC (LRCK) and SAI1_TX_DATA1 using a switch circuit or the like." I agree with your point, I suggest using a low cost switch might be the most straightforward and reliable solution. Wish it helps you. If you still have question about it, please kindly let me know. BR MayLiu Re: @Re: Effect of GPIO input thank you for your reply. Let me provide some additional explanation. I want to output PCM and DSD from the SAI1 and input it into an Audio DAC. For PCM, use SAI1_TX_BCLK, SAI1_TX_SYNC(LRCK), and SAI1_TX_DATA0. SAI1_TX_DATA1 is not used when playing PCM. For DSD, use SAI1_TX_BCLK, SAI1_TX_DATA0, and SAI1_TX_DATA1. SAI1_TX_SYNC (LRCK) is not used when playing DSD. Another thing I would like to do is connect the SAI1 directly to an Audio DAC. The Audio DAC has a shared input pin for SAI1_TX_SYNC (LRCK) and SAI1_TX_DATA1. Do not use PCM and DSD at the same time. To achieve this, we are considering the following circuit: I would like to use SAI1_TX_SYNC (LRCK) and SAI1_TX_DATA1 connected in the circuit exclusively. To achieve this, we are considering setting the functions of unused pins to GPIO. The function of the pin is to change the MUX_MODE bit of the SW_MUX_CTL_PAD_XXX SW MUX Control Register. In addition, set the GPIO to input to eliminate any external influence. It is also possible to physically switch between SAI1_TX_SYNC (LRCK) and SAI1_TX_DATA1 using a switch circuit or the like. However, in order to keep costs down, I would like to reduce the number of ICs, such as switch circuits, so I am considering the above circuit and implementation. I have a question. I would like to achieve a shared output for SAI1_TX_SYNC (LRCK) and SAI1_TX_DATA1. Is it possible to achieve shared output with the circuit and implementation shown above? @Re: Effect of GPIO input Hi @yoshida_satoru , Thank you so much for your interest in our products and for using our community. I'm sorry that I don't  quite understand your design. Are you trying to use the function of the SAI module? If so, SYNC clock and Tx data  should not be connected. If I don't understood your question correctly, please provide me with more information so that I can better support you. Wish it helps you. If you still have question about it, please kindly let me know. BR MayLiu

BESS_Demo_BmsSL_SAF_V0_8_0 build fail Hi experts I'm using BESS_Demo_BmsSL_SAF_V0_8_0. I have installed all the sdk in the dependencies.txt , imported Reference_Application_1500 ,generated code in mex file ,and modified these macros as follow #define IPCF_IP_CFG_VENDOR_ID_C 43 #define IPCF_IP_CFG_VENDOR_ID 43 When I want to build the porject , I got many erros as below Then , I found that there is no file in the folder s32k_saf_1_0_4 Is there any problem? Thanks Re: BESS_Demo_BmsSL_SAF_V0_8_0 build fail Hi Robin Thanks a lot It turns out that I didn't change the location of this folder. Now it's all right Best Regards Nick Re: BESS_Demo_BmsSL_SAF_V0_8_0 build fail Hi Did you install S32K3_SAF_1.0.4_EVAL_DS_updatesite.zip? (BESS\BESS_2024_06\Safety_Software_Framework_Demo_1_0_4\S32K3_SAF_1.0.4_EVAL_DS_updatesite.zip) After the installation is complete, you need to modify the Location: Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------

Build Error for Android 15.0.0_1.0.0 BSP Source Hi, I downloaded the Android 15.0.0_1.0.0 (L6.6.52_2.2.0 BSP) source from the NXP site and attempted to build it. However, I encountered the following error while compiling several .cpp files: ~/imx-android-15/android_build$ lunch evk_8mp-trunk_staging-userdebug ~/imx-android-15/android_build$ ./imx-make.sh -j11 2>&1 (...) d3d346dec8/obj/hardware/nxp/wlan/wifi_hal/wifi_hal.o.d -o out/soong/.intermediates/hardware/nxp/wlan/wifi_hal/libwifi-hal-nxp/android_vendor_arm64_armv8-a_cortex-a53_static_cfi/e560d7b19ebf7276b3e850d3d346dec8/obj/hardware/nxp/wlan/wifi_hal/wifi_hal.o hardware/nxp/wlan/wifi_hal/wifi_hal.cpp In file included from hardware/nxp/wlan/wifi_hal/wifi_hal.cpp:43: hardware/nxp/wlan/wifi_hal/common.h:22:10: fatal error: 'wifi_hal.h' file not found 22 | #include "wifi_hal.h" | ^~~~~~~~~~~~ 1 error generated. [ 2% 1044/42576] //frameworks/opt/net/wifi/libwifi_system_iface:libwifi-system-iface clang++ interface_tool.cpp ninja: build stopped: subcommand failed. 09:56:02 ninja failed with: exit status 1 #### failed to build some targets (02:05 (mm:ss)) #### * Build Host: Ubuntu Desktop 22.04 LTS * EVK : i.MX 8M Plus It seems that the issue is caused by the absence of the wifi_hal.h file in the hardware/nxp/wlan/wifi_hal directory. Could you please provide guidance on how to resolve this issue? Re: Build Error for Android 15.0.0_1.0.0 BSP Source Hi, Harvey, I followed your instructions, and the build succeeded. Thanks, Best regards, David KS Re: Build Error for Android 15.0.0_1.0.0 BSP Source Hi, Please follow up the guide - ANDROID_USERS_GUIDE  Configuration example as below i.MX 8M Plus EVK board $ lunch evk_8mp-nxp_stable-userdebug Regards Harvey

マーカーあたりのimxrt ADCサンプリングレート 皆さん、こんにちは i.MX RT1010 プロセッサ リファレンス マニュアルには、ADC には次のものがあると記載されています。 • 最大1MS/sのサンプリングレート • 最大 16 個のシングルエンド外部アナログ入力 チャネルごとに 1MSps と記載されているか (したがって 16 × 1Msps のサンプリングが可能)、それとも ADC 全体で使用できますか (したがって、16 の入力すべてを一度にサンプリングすると ~62 ksps) になりますか。 図 53-2.1924ページのADCブロック図には、複数の入力が接続されたアナログコンパレータが1つだけ示されていますが、後者は正しいと思いますか?

S32DS for Arm 2.2 Terminal Window Hello, We've been working with S32DS for Arm 2.0 on Windows 10 for a few years and are now looking to move to Windows 11 and S32DS for Arm 2.2 In the 2.0 version, there's a rather useful serial terminal feature accessible through Window > Show View > Other > Terminal, but it seems to be absent in the 2.2 version Searching for "terminal" in the menus reveals preference settings for the terminal window, but still no way to enable it Has the terminal window been deprecated? If not, where would one find the new enable option? Thank you for your time! Eclipse IDE Usage and Settings Re: S32DS for Arm 2.2 Terminal Window Hi, Thank you so much for your interest in our products and for using our community. Good observation! S32DS for Arm 2.2 do not have terminal. However you could use third party terminal, there are several free ones on the web. On the other hand, taking advantage of your IDE migration and supposing that you are working with an S32K1, please consider migrating to a newest development environment like S32DS for S32 Platform, which do have terminal, please refer to the following community post: https://community.nxp.com/t5/S32-Design-Studio/S32K1xx-SDK-in-S32DS/td-p/2032492 Hope it helps you. Have a nice day!

M7 boot with secure boot feature enabled on RDB3 SDK BSP43 Hi, I noticed that SDK BSP43 has been released, and I am testing M7 boot with secure boot enabled on RDB3 v1.1 silicon, but the board boot failed after excuting hse-secboot command and rebooting, command is following: hse-secboot -s -d /dev/mmcblk0 -b sd --bl2_bin bl2_w_dtb.bin --bl2_key /etc/keys/secboot/bl2_rsa2048_public.pem /etc/keys/secboot/bl2_rsa2048_public.pem --bl31_key -:0x010700 --bl33_key -:0x010700 --bl2_sign bl2-signature.bin The HSE firmware version is 0.2.51.0 for Gen3 v1.1 SOC, so would you please help to tell how to test this case, is there any other settings or configures? Thanks, Zhantao Re: M7 boot with secure boot feature enabled on RDB3 SDK BSP43 Hello, @hittzt  Thanks for the reply. Yes, from my understanding, the secure boot example shown in BSP UM is for default settings. BR Chenyin Re: M7 boot with secure boot feature enabled on RDB3 SDK BSP43 Hi @chenyin_h, Thanks for your reply. It is reasonable that the default command: “hse-secboot -s -d /dev/mmcblk0 --bl2_key /etc/keys/secboot/bl2_rsa2048_public.pem --bl31_key -:0x010700 --bl33_key -:0x010700 --bl2_sign /etc/keys/secboot/bl2-signature.bin-sdcard --bl2_bin /etc/keys/secboot/bl2_w_dtb.bin-sdcard” is only for normal secure boot, not for m7 case. So it is to say that we can not enable m7 and secure boot at same time currently, or else, the issue will show, right? Thanks, Zhantao Re: M7 boot with secure boot feature enabled on RDB3 SDK BSP43 Hello, @hittzt  Thanks for your confirmation. I tested it without m7boot added to the local.conf, and seems there are no issues, the possible reason for the issue you met seems to be secure boot verification fail. While you added m7boot to the local.conf, then a small m7 bootloader would be appended, the boot image could be changed to the bl2_w_dtb.s32-sdcard.m7 instead of the original one, but when booted to Linux, while enabling secure boot, the command is like: hse-secboot -s -d /dev/mmcblk0 --bl2_key /etc/keys/secboot/bl2_rsa2048_public.pem --bl31_key -:0x010700 --bl33_key -:0x010700 --bl2_sign /etc/keys/secboot/bl2-signature.bin-sdcard --bl2_bin /etc/keys/secboot/bl2_w_dtb.bin-sdcard Which does not match the boot image specified. From my understanding, the default secboot operation steps are only reference for default settings, if there are some additional configurations added, there may be issues. BR Chenyin Re: M7 boot with secure boot feature enabled on RDB3 SDK BSP43 Hi @chenyin_h, I followed the steps in SDK BSP43 user manual section "3.1.6 Building Images with M7 as Boot Target" to test the m7 boot, and there seems no other commands or settings when booting the board with the output image. For this test, I just add the following lines in project conf/local.conf: DISTRO_FEATURES:append = " m7boot secboot" NXP_FIRMWARE_LOCAL_DIR = "<0.2.51.0 hse firmware path>" And then I used the output image "fsl-image-auto-s32g399ardb3.sdcard" to boot up the board and test as the log shows. If I missed something please tell me. Thanks, Zhantao Re: M7 boot with secure boot feature enabled on RDB3 SDK BSP43 Thanks, @hittzt  I have checked the log, and do not see M7 bootloader information, which version M7 bootloader is used? any applications running on M7 side? And, may I know if you have tested it with A53 standalone boot without M7 involved? I just tested it only with BSP, and found no issues on my local RDB3. BR Chenyin Re: M7 boot with secure boot feature enabled on RDB3 SDK BSP43 Yes, I tested it using the command in reference manual: /etc/keys/secboot/secboot_script.sh sd /dev/mmcblk0 \ > /etc/keys/secboot/bl2_w_dtb.bin-sdcard \ > /etc/keys/secboot/bl2-signature.bin-sdcard And the whole test log is attached. Thanks, Zhantao Re: M7 boot with secure boot feature enabled on RDB3 SDK BSP43 Hello, @hittzt  Thanks for your post. Would you mind testing it with the following command on your board to check if it is correct? "/etc/keys/secboot/secboot_script.sh sd /dev/mmcblk0  /etc/keys/secboot/bl2_w_dtb.bin-sdcard /etc/keys/secboot/bl2-signature.bin-sdcard" BR Chenyin

RTC callback function cannot be triggered I am using the S32K344 chip and plan to use RTC to generate logs with timestamps and store them in the SD card, but I am unable to access callback functions. Re: RTC callback function cannot be triggered Yes, I did all of these。 Re: RTC callback function cannot be triggered Hi @SCoder41, Have you set a date and time configuration for the RTC? You also need to set the interrupt driver for the RTC IRQ: After setting a date and time, and the RTC IRQ, the RTC alarm callback should be stepped into when the alarm date&time = current date&time. Keep in mind you do need to install the handler and enable the IRQ in the source code, as well as setting the time&date, configuring the alarm, enabling interrupt and starting the counter to enable the basic functionality of the RTC alarm. Best regards, Julián

Can I check the CPU Usage in S32DS3.5? Hello, I am developing a program in the S32DS 3.5 RTD 4.0.0 environment. I would like to compare the CPU load when using DMA vs. Interrupts. Does S32DS support such functionality? For reference, I am working in a bare-metal environment with an S32K314 MCU and a PE Micro MULTILINK LC debugger. Thank you. Re: Can I check the CPU Usage in S32DS3.5? Thank you for answer @davidtosenovjan  I found that the Data Watchpoint and Trace (DWT) feature in the ARM M7 architecture can be used to measure function execution cycles. Could you provide an example of how to use DWT for cycle measurement on the S32K3XX series? Re: Can I check the CPU Usage in S32DS3.5? I am afraid there’s no such feature in S32DS and there’s no hardware support in ARM core on S32K devices.

imxrt ADC 每通道采样率 大家好 i.MX RT1010 处理器参考手册指出 ADC 具有： • 高达 1MS/s 的采样率 • 最多 16 个单端外部模拟输入 1MSps 是针对每个通道而言的（因此可以进行 16 * 1Msps 采样）还是针对整个 ADC 而言的（因此一次对所有 16 个输入进行采样将给我 ~62 ksps）？ 图 53-2。第 1924 页上的 ADC 框图仅显示一个模拟比较器，其中连接了多个输入，所以我相信后者是正确的？

MBDT SIMULINK But i have an issue, if i interchange the rgb leds i am unable to see the change even after building it to the microprocessor. My question is apart from led configuration shoud we configure any other peripherals to see that in effect. I have replicated this in the nxps32k312 please clarify! This is the reference link that i used to build or simply configured to the s32k312 mcu  https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/Interacting-with-Digital-Inputs-Outputs-on-MR-CANHUBK344/tac-p/1957504#M285 Example Models HotFix Re: MBDT SIMULINK The problem still occurs!  only after deleting the ert file after every modification the change seems to be reflected in the s32k312evb! is there any additional configurations  to be done for it to work seamlessly after every bulid  apart from DIO and Port configurations. please clarify!  Re: MBDT SIMULINK Hi, @paul_ephraim_13  I downloaded the model you gave me and tested it on the board. I notice that it was configured to toggle RGBLED0_BLUE, as it appears from the generated code. After that, I modified the DIO block to toggle the RED color, on the RGBLED0_RED channel. Everything worked correctly, the led being red this time. As a note, if sometimes the application is not in sync with the latest changes, try to view the generated C code, it is possible that sometimes, even if you change settings in blocks, the code remains from the previous version. I think this happened in your case. You can view the generated code directly in Simulink, by accessing the Apps section, followed by the Embedded Coder section. The C Code tab will open and you can access the generated code by pressing the View Code button. By clicking on a block in Simulink, you can see the generated code related to that block and thus you can see if the parameters are updated or not. 1. RGBLED0_BLUE 2. RGBLED0_RED Additionally, you can open the generated code in text format, from the following location: model_name_ert_rtw folder -> model_name.c. In this case would be temp_2_ert_rtw -> temp_2.c If you notice discrepancies between the model and the generated code, you can do a cleanup and delete the ert_rtw folder, where the generated code is located, and building the model again, the new code will be generated and thus make sure that it is in sync with the latest version. Hope this helps, Dragos Re: MBDT SIMULINK Thankyou mam for your information, but it seems that the port pins  are already configured by default in the port component. Actually, what i am going through is that when Iinitially build the simulink model into the target (s32k312), the light does glow according to the initial setup, but when i change that in the model like in the below demonstrated image(blue to red) and building it once agaiin to the target, it seems to stick around with the initial build-up. I have also attached my model, please consider, you could also provide some manuals for the setup procedure! Sorry to keep pstig my queries! cause i am pretty new to this area! Re: MBDT SIMULINK Hi @paul_ephraim_13  If you are using MBDT for S32K3 v1.5.0, besides the Pins Tool configuration, where you should configure the pins used inside the application, you would also need to ensure the same pins configuration inside the Port component. This is because, during the initialization sequence, the Port_Init function is called. Hence, not having the pin configured there as well, won't produce your expected results. This linkage between the Pins Tool and the Port component is mandatory, as specified by the RTD (Real-Time Drivers) implementation. MBDT uses this software drivers for ensuring hardware configuration and access from the Simulink environment. Please check the S32K3 Release Notes document - Section 3.6 where you could find details on the correspondence between the Port component and the Pins tool (attached a snippet from the section in discussion). Please let us know if this helps, or please provide any additional information that could help us identify the issue you are currently encountering. Irina

S32K148 MCAL ENET EBERR 问题 您好 .遇到了问题. 以下是描述 目前正在配置S32K148-MCAL的Eth模块. port中配置好pin脚 配置eth 生成代码后 组入 先调用eth_init Eth_Init(&Eth_Config_VS_0); 随后使能控制器 Eth_SetControllerMode(EthConf_EthCtrlConfig_EthCtrlConfig_0, ETH_MODE_ACTIVE); 在此过程中     Base->ECR |= ((uint32)(0x2U) | (0x100U));     Base->ECR |= ((uint32)1U << (4U)); 是可以正常配置ETHEREN为1的 但是一旦尝试初始化收发时,便会BUS ERROR 后续的发送更不可能了 请问我该如何继续调查 回复： S32K148 MCAL ENET EBERR 问题 感谢 问题解决 问题解决 感谢回复 问题已经 解决 原因是没配置MCAL的RM模块导致MPU模块没初始化ENET相关的内存访问权限 回复： S32K148 MCAL ENET EBERR 问题 问题进展更新 : 现在追查到MPU的 CESR 寄存器了.看起来好像是uDMA尝试访问内存时被内存保护察觉到并拦截了.

KM34Z75M Maintenance Mode Hi I have TWR-KM34Z75M board and it goes under Maintenance mode. Can you please guide to resolve it.  I tried and logs of that  "Type "connect" to establish a target connection, '?' for help J-Link>connect Please specify device / core. : MKM34Z256XXX7 Type '?' for selection dialog Device>? Please specify target interface: J) JTAG (Default) S) SWD T) cJTAG TIF>S Specify target interface speed [kHz]. : 4000 kHz Speed> Device "MKM34Z256XXX7" selected. Connecting to target via SWD InitTarget() SWD selected. Executing JTAG -> SWD switching sequence. Connect Under Reset SWD selected. Executing JTAG -> SWD switching sequence. Readout protection is set and mass erase is disabled. J-Link cannot unprotect the device. Found SW-DP with ID 0x2BA01477 Failed to power up DAP InitTarget() SWD selected. Executing JTAG -> SWD switching sequence. Connect Under Reset SWD selected. Executing JTAG -> SWD switching sequence. Readout protection is set and mass erase is disabled. J-Link cannot unprotect the device. Found SW-DP with ID 0x2BA01477 Failed to power up DAP Cannot connect to target." Thankyou Re: KM34Z75M Maintenance Mode Hello, my name is Pavel, and I will be supporting your case, I reviewed your information, and the mode of Maintenance Mode sometimes is when the MK20 (debugger) of the frdm is prepared to update the firmware. *So, this thread could help you the debugger on the board, to get out of the maintenance mode. OpenSDA Serial and Debug Adapter | NXP Semiconductors *The other part of the message from the JLink Commander mentioned is not possible to communicate via SWD with the target because is locked. Readout protection is set, and mass erase is disabled. J-Link cannot unprotect the device. The JLink commander cannot establish the communication, the MCU is lock, to get more details about the level of this will need to read the FSEC register, notice if the back door key is available to recovery the MCU, the other way the MCU could be stay in brick mode. Here you can read more about the FSEC register. Using Kinetis Security and Flash Protection Features (nxp.com) Best regards, Pavel

android UI format not match issue on imx7d android-pie Hi,        I'm porting a new LCD to my imx7d DIY development board. kernel: 4.14 android: 9       Screen size is 320x240, physical format is RGB565. And I get a very weird issue. The main screen and some android applications can showing correctly. But some android applications are not refresh.       If I do further debugging, I can find in FbDisplay.cpp, the updateScreen() function report buffer format is RGBA8888 but config format is RGB565, so the refresh operation is stopped.      If I force the  getBE().mRenderEngine =          RE::impl::RenderEngine::create(HAL_PIXEL_FORMAT_RGBA_8888  to be  getBE().mRenderEngine =             RE::impl::RenderEngine::create(HAL_PIXEL_FORMAT_RGB_565 those android application can show on the screen, but red and blue pixel are oppsite. If I use this method, I can't monitor the screen on my PC. I want to know what thing cause this format not match issue and how do I perfectly fix it? Re: android UI format not match issue on imx7d android-pie Hi Zhiming,     Thank you with your suggestion. I already find out a solution to fix that issue. By rotate the screen orientation in kotlin project. Probably, layout height is too long for android framework to resize. I should change the width:height in my layout. Regards! PatrickZ Re: android UI format not match issue on imx7d android-pie Hello, As my understanding about surfaceflinger, the surfaceflinger is a Render Engine, it receives the operations from application layer  and then call the fbdisplay to display. So the issue could from application layer, the app tells Render Engine how to render a frame. I don't think the Render Engine is designed for one pixel format, the pixel format should be set from the app layer. Best Regards, Zhiming Re: android UI format not match issue on imx7d android-pie Hi Zhiming,     Do you mean it might be something wrong in the android kotlin application? The config.format in Fbdisplay is all right, and I think the issue is comes from surfaceflinger. The buffer.format remains RGBA8888. Regards! Patrick Zhang Re: android UI format not match issue on imx7d android-pie Hello, This may have something to do with the code of the application that is having problems, the application is using 32bit data, so in the HAL layer code the return is RGB888. You need to look at the code of the application again to try to fix the problem. https://github.com/nxp-imx-android/android-imx_platform_hardware_imx/blob/p9.0.0_2.3.4/display/display/FbDisplay.cpp#L457C1-L462C6 Best Regards, Zhiming