S32k116 read ADC interrupt in 3.3uSec I'm using read ADC ch03 every 50uSec. and ADC is trigger by PDB, PDB trigger from TRIGMUX, TRIGMUX tirigger from FTM0 in every 50uSec. After triggering from FTM0 to ADC interrupt calling, MCU is taking ~3.3uSec time to hit the ADC interrupt. but it should come less then 1.5uSec(including interrupt latency and API). Can you please help why it is 3.3uSec time is coming and how can i reduce it. Best Regards, Rohit RR_12RR_0-1781698547911.png Re: S32k116 read ADC interrupt in 3.3uSec Thank you for response and your understanding correct. - ADC clock frequency :- 48MHz - recalculate single ADC conversion time based on ADC clock. ADC total conversion time = Sample phase (SMPLTS + 1) + Hold (1 cycle) + Compare phase (8b: 20, 10b: 24, 12b: 28 cycles) + Single/first continuous adder (5 ADC cycles + 5 bus cycles) :- it is coming 958.18 nS - check PDB configuration; ensure no extra delay in pretrigger (if present, include it in timing) :- No extra delay. - check ISR overhead; toggle GPIO at ADC ISR entry :- please refer the image. RR_12RR_1-1781772395937.png Purple :-PWM Yellow :- GPIO toggle. Re: S32k116 read ADC interrupt in 3.3uSec Hi,
the info given is not enough to comment more. Below are hints to check: - ADC clock frequency (likely too low → main contributor) - revise sample time, must be >275 ns. For max ADC clock 50 MHz it gives ~14 ADCK cycles; increase further if ADCK is slower - recalculate single ADC conversion time based on ADC clock: ADC total conversion time = Sample phase (SMPLTS + 1) + Hold (1 cycle) + Compare phase (8b: 20, 10b: 24, 12b: 28 cycles) + Single/first continuous adder (5 ADC cycles + 5 bus cycles) - check PDB configuration; ensure no extra delay in pretrigger (if present, include it in timing) - check ISR overhead; toggle GPIO at ADC ISR entry
BR, Petr
Re: S32k116 read ADC interrupt in 3.3uSec Hi,
if you do additional toggle immediately how long is the pulse generated? This would give time you should substract from measured 3.3us.
BR, Petr Re: S32k116 read ADC interrupt in 3.3uSec Hi,
can you share clock setting as well? What is PCC_ADC register value? Where in code you put GPIO toggle? Have you checked how long this toggle function takes?
BR, Petr Re: S32k116 read ADC interrupt in 3.3uSec Please see the image for clock configuration on GUI and register value. can you share clock setting as well? What is PCC_ADC register value? RR_12RR_2-1781777567844.png RR_12RR_1-1781777543272.png Where in code you put GPIO toggle? --> inside the ADC interrupt handler. Have you checked how long this toggle function takes? --> No, i'm using standard NXP toggle API. Re: S32k116 read ADC interrupt in 3.3uSec Immediate GPIO toggle coming 380nSec. RR_12RR_0-1781785369985.png RR_12RR_1-1781785381949.png Re: S32k116 read ADC interrupt in 3.3uSec what is the IDE/driver you are using in fact? Looks like SDK one. --> S32 Design Studio for S32 Platform Version: 3.5 Build id: 220726 RTM 4.0.1 Can you share simplified project for testing? --> Attached additionally i'm also trying to configure other channel to read ADC. Channel is configured but always reading 0. Re: S32k116 read ADC interrupt in 3.3uSec Hi,
what is the IDE/driver you are using in fact? Looks like SDK one. Can you share simplified project for testing?
BR, Petr Re: S32k116 read ADC interrupt in 3.3uSec Did you do any kind of port/migration from SDK project or similar? A:- Yes, i used previously created workspace with diff. SDK for project file which i given to you. Should i send you snapshots of configuration and init function file to verify it? Re: S32k116 read ADC interrupt in 3.3uSec Hey PtrS, Any success or guidance in this? Re: S32k116 read ADC interrupt in 3.3uSec Hi,
I can see it finally. From code it seems you actually add PDB delay of 1us. So use no delay here
PetrS_0-1782217694177.png
Last direct register write is not taken as registers is buffered, you need to write to LDOK. Also change ADC interrupt to use direct register access to toggle pin
PetrS_1-1782217882079.png
With those changes and giving ADC SMPLTS=14 (conversion time around 1.125us) I can see delay around 1.8us. Subtracting conversion time and pulse time, there is around 600ns latency. This could be in line with expected ADC interrupt → NVIC → ISR latency on Cortex‑M0+ when running from flash, so it likely comes mainly from CPU exception entry and flash access, not from the trigger chain itself.
BR, Petr
Re: S32k116 read ADC interrupt in 3.3uSec Hi,
I tried to import your project into S32DS3.5 with RTM401 installed, but it seems you actually use RTM402
PetrS_0-1782207875981.png
i will try with RTM402 indeed. But, rtm402 should not be used in S32DS3.5; https://community.nxp.com/t5/S32-Design-Studio/my-IDE-ver-is-S32DS-3-5-How-can-i-install-S32K1XX-RTM-4-0-2/m-p/2062416#
Did you do any kind of port/migration from SDK project or similar? BR, Petr Re: S32k116 read ADC interrupt in 3.3uSec due to changing in SKD all project has been start getting error of RTM and project totolly not working. Apart from this, may you tell the configuration of using other 3 channel in back to back or software trigger. Best Regards, Rohit
查看全文
