SPDIF Rx 时钟 (SPDIF_SR_CLK) 脉冲率 我计划使用 i.MX RT 1060 的 SPDIF。 参考手册（IMXRT1060RM.pdf）在40.3.1.7中有以下解释： > DPLL 锁定后，产生脉冲，平均脉冲率为 128 x 采样频率。（对于44.1 Khz 输入采样频率，平均脉冲率 = 128 x 44.1 Khz。） 当 SPDIF 输入为 44100Hz、88200Hz 或 176400Hz 时，我希望获得 22,579,200Hz 的输出。 当 SPDIF 输入为 48000Hz、96000Hz 或 19200Hz 时，我希望获得 22,579,200Hz 的输出。 为了实现这一点，我想将乘数改为 x128。 可以改变 x128 放大倍数吗？

PN7220BP2 Usage problem At present, I have obtained the board of PN7220BP2. According to the PN7220 Bring-up on i.MX mini-. pdf written by kelly, the method of using BP2 seems to be still being written. Currently, I cannot communicate with the evaluation board of 7220BP2 using the IMX8MINI development board. The attachment is the logcat log that is started according to the 7220 quick start guide At present, IMX8mini burns the firmware of the single-host in the official website. By modifying the host_sel on the board to simulate the use of single-host to the ground, the connection to the port on the J27 or J43 seat can not establish communication. Meanwhile, we have checked the information of the IMX8mini board. VDDIO should be 3.3V. Then we modified VDDIO_SEL on the 7220BP2 board to 3.3V, but communication still cannot be established As described in PN7220 Bring-up on i.MX mini-. pdf, there should be a script（.bat file） after the PC is connected to the board through ADB, but it is not found. I am not sure whether it is relevant In general, I would like to be able to build on what I have at hand: IMX8mini, 7220BP2, and single-host firmware have established a complete link test (the dual-host version chip of 7220/C101 is also used as a single host in the actual application scenario). Is there any idea that I can test, thank you very much 回复： PN7220BP2 Usage problem Hi Kelly You can use the following cable connections to drive the BP2 evaluation board in the 8mini (single-host firmware)         7220BP2                      ->  IMX8MINI   (SDA)  ATX_A（J27-12） ->  J1003-3 （SCL）ATX_B（J27-14） ->  J1003-5              VEN （J43-24）   ->  J1003-40              IRQ  （J27-20）   ->  J1003-37              Mode（J43-32）  ->  J1003-38 The IIC address cable is grounded              ATX_C（J27-12） ->  J27-9                ATX_D（J27-14） ->  J27-10 The Host_sel jumper is grounded, and the IIC communication level is changed to 3.3V 回复： PN7220BP2 Usage problem Hello @ChumingYang  Since the platform you are debugging is based on NXP's development board, it is recommended to refer to AN14224, which should be helpful to you, please refer to it, and update us if you have any questions. 回复： PN7220BP2 Usage problem According to the pin description on page 13 in the Datasheet, 7220/C101 should operate in singlehost Mode when host_if_sel0 is low and the mode pin is also low. Is this correct 回复： PN7220BP2 Usage problem I don't have the firmware of BP2, currently I only have the firmware of BP1, but theoretically modifying Host_sel can make 7220 work in singlehost mode, but I can't establish communication with 7220，I suspect that after connecting Host_sel to the ground, not using the IIC interface on the J43 terminal 回复： PN7220BP2 Usage problem Hello @ChumingYang  I would say the Image on the product page does not support BP2 version. So, where did you get the Image file? 回复： PN7220BP2 Usage problem The PN7220BP2 board has been powered separately, and the wiring has been checked several times according to the quick start guide. At present, there is no other way to make them communicate successfully

IMX8MP micfilレコードデータ損失、ルートクロックとして12.288Mhzを使用する場合、レートは48kおよび8チャネルです こんにちはサポート、 外部クロック(EXT3)をmicfilのルートクロックとして使用すると、周波数は12.288Mhz、ORSは8、クロックdivは4、周波数分割後のクロックはマイクアレイセンサーの要件を満たしており、PDMサンプリングレートが48k、チャネル= 8の場合、データ損失が見つかりました。 しかし、48k & channel=4 または 16K & channel=8 は問題ありません。 外部クロック周波数は変更できないため、micfil を 48K および 8 チャンネルのオーディオサンプリング用にどのように設定できますか? 日時:IMX8MP micfilレコードデータ損失、ルートクロックとして12.288Mhzを使用する場合、レートは48kおよび8チャネルです こんにちは@ZenJeams  48k、8ch、div=4 の場合、div は最小要求 CLKDIV の要件を満たすことができません。 Very Low Quality モードで必要な最小 CLKDIV 値は次のとおりです。 floor(K*CLKDIV) >= K * (10+43EC) / (8*OSR) = 5.53. 実際には8チャンネルではなく4チャンネルしか必要としないことを認識しました。ただし、必要なチャネル番号はch0、ch2、ch4、ch6で、これらは8チャネルの中にあります。 必要なチャンネルのみを抽出するパッチを作成しましたので、試してみて結果をお知らせください。

SE050 Commercial middleware I would like to start selling my solution using SE050 on a custom PCB integrated with IoT contraption. I am using middleware downloaded as se05x_mw_v04.05.01.zip 1. Does license permit it (I do have the license but I can't figure out the meaning of pages of badly connected words)? 2. Compilation produces A LOT of deprecation warnings. Are we sure that code is maintained at all? 3. Python code is broken. You can't seriously expect to fix versions in your requirements.txt. And could you please explain this output: root@edge:~/simw-top/pycli/src# python3 setup.py develop /usr/local/lib/python3.11/dist-packages/setuptools/_distutils/dist.py:275: UserWarning: Unknown distribution option: 'console' warnings.warn(msg) running develop running egg_info file ssscli.py (for module ssscli) not found writing manifest file 'ssscli.egg-info/SOURCES.txt' running build_ext Re: SE050 Commercial middleware Hi @psvz , Yes, it is possible to do it via the command line, for your case, please use the following commands. cmake -DPTMW_OpenSSL=3_0 . cmake --build . Hope that helps, Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: SE050 Commercial middleware Hi @Kan_Li  Understood re python tooling. The former question got confused I think. There should be ccmake command - I just do automated installs, so I need to change that compile option from openssl 1.1.1 to 3.0. As you showed I can do it in interactive screen, but i' like to change it from a script. I'm new to cmake in general. Re: SE050 Commercial middleware Hi @psvz , As far as I know, no openssl command can be used to switch the version, but it is ok to build it from source and install in a different folder, such as /usr/local/ssl11. For the SSSCLI tool installation issue, I just confirmed with the expert that it is a known issue indeed and will be fixed in the next release which should be available in 2025Q1. Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: SE050 Commercial middleware Hi @Kan_Li  Thanks for this. Is there a way to change openssl version on command line to make it non-interactive? Also, what about the missing file in "/simw-top/pycli/src# python3 setup.py develop"? Re: SE050 Commercial middleware Hi @psvz , For the compilation issue, I found the Pi OS has openssl ver 3.0.15 preintalled, so you have to configure the cmake option before building the MW. you may run "ccmake ." to do that. The default value is still 1_1_1 here, so you will have warning during compilation.  I am testing on Raspberry Pi 4 B+ instead, but the OS version is the same. Please kindly let me know if the problem is still there , and I will continue to investigate the ssscli installation issue. Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: SE050 Commercial middleware Hi @Kan_Li  Yes, of course. I use very standard set-up with Raspberry Pi Imager App flashing memory card with Raspberry Pi OS Lite (64-bit) Released 2024-11-19, which is a port of Debian Bookworm. From the Pi itself: # uname -a Linux edge 6.6.51+rpt-rpi-2712 #1 SMP PREEMPT Debian 1:6.6.51-1+rpt3 (2024-10-08) aarch64 GNU/Linux Re: SE050 Commercial middleware Hi @psvz , May I have the version of Raspberry OS running on your Raspberry Pi 5? I will try to reproduce your issue here. Thanks for your patience! Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: SE050 Commercial middleware Hi @Kan_Li  I do it on Raspberry Pi 5 and I follow all the procedures, so it is all done the way you describe, and compiled C libraries do work, I am only saying the compilation produces a lot of deprecation warnings, so your code isn't properly maintained, yet working somehow. Re Python. You can't mix up apt and pip, and virtual environments aren't the answer because I want it all system-wide. Accordingly, all your requirements.txt are installed through apt-get. Apart from func-timeout, which is not available through apt-get, so I installed it into local folder (../simw-top/pycli) with pip. And that's not anything I need help with. What I say is that your key piece of software ssscli.py is missing in se05x_mw_v04.05.01.zip. So, the python part of your middleware is maintained so badly that it doesn't work 🙂 Re: SE050 Commercial middleware Hi @psvz , It is ok to use SE050 & MW on a custom PCB, so please just continue.  I am wondering the tool you use to compile the MW, would you please provide more details on it? such as the log?  For your CLI tool installation issue , not sure which platform your are using, but for raspberry Pi, you have to install some python packages previously. Please kindly refer to the following for details. Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------  

Using erpc in a frdmmcxn947, opening the ERPC_MESSAGE_LOGGING macro reported an error HI,  I'm using erpc in a frdm board and found that opening the ERPC_MESSAGE_LOGGING macro reported an error. The attached image shows the detailed error message. MCXN Re: Using erpc in a frdmmcxn947, opening the ERPC_MESSAGE_LOGGING macro reported an error Hello @yzs , You are welcome. If that reply answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! BRs, Celeste Re: Using erpc in a frdmmcxn947, opening the ERPC_MESSAGE_LOGGING macro reported an error Hello, Thank you for answering that question. BRs, yzs Re: Using erpc in a frdmmcxn947, opening the ERPC_MESSAGE_LOGGING macro reported an error Hello @yzs , Thanks for letting us know about this issue.  I have indeed reproduced your issue. The `logMessage` function expects a parameter of the `MessageBuffer *` pointer type. However, the previous error message indicated that it was not possible to convert an ordinary `erpc::MessageBuffer` object into an `erpc::MessageBuffer*` pointer type. Therefore, the following workaround can be considered to solve this type mismatch problem: obtain a reference using the `getBufferRef` function and then pass the pointer by taking the address. The code modification is as follows: In erpc_client_manager.cpp: By modifying the above code, it can be compiled successfully. However, this approach may not be the optimal solution. I will submit a Jira ticket to the SW Team to further investigate this issue. Thanks again for your post. Have a nice day~ BRs, Celeste

SE050 商用ミドルウェア SE050 を IoT 装置と統合されたカスタム PCB で使用して、ソリューションの販売を開始したいと考えています。 ダウンロードしたミドルウェアを使用していますse05x_mw_v04.05.01.zip 1. ライセンスは許可していますか（ライセンスは持っていますが、繋がりの悪い単語のページの意味が理解できません？ 2.コンパイルにより、多くの非推奨の警告が生成されます。コードはまったく維持されていると確信していますか? 3. Pythonのコードが壊れている。あなたは真剣にあなたのrequirements.txtのバージョンを修正することを期待することはできません。そして、この出力について説明していただけますか。 root@edge:~/simw-top/pycli/src# python3 setup.py 開発 /usr/local/lib/python3.11/dist-packages/setuptools/_distutils/dist.py:275:UserWarning: 不明な配布オプション: 'console' warnings.warn(msg) 開発の実行 ランニングegg_info ファイル ssscli.py(モジュールSSSCLI用)が見つかりません マニフェストファイル「ssscli.egg-info/SOURCES.txt」の書き込み ランニングbuild_ext

How are clock divisors enfc_pred and enfs_podf modified in Linux for the i.MX6ULL? When I set the values of enfc_pred and enfs_podf in U-Boot, they disappear in Linux. Here is the clk_summary: pll2_pfd2_396m 1 1 0 396000000 0 enfc_sel 0 0 0 396000000 0 enfc_pred 0 0 0 66000000 0 enfc_podf 0 0 0 22000000 0 gpmi_io 0 0 0 22000000  Here is a register dump in Linux that matches the clk_summary: bash# devmem2 0x20c402c w /dev/mem opened. Memory mapped at address 0x76fb7000. Read at address 0x020C402C (0x76fb702c): 0x0055B6C1 Here is the register setting in U-Boot that I would like to try in Linux: => md.l 0x20c402c 1 020c402c: 0015b6c1 I have been unable to find these divisors in existing device tree entries in the arch/arm/boot/dts directory. i.MX6UL Linux Re: How are clock divisors enfc_pred and enfs_podf modified in Linux for the i.MX6ULL? you can find this in the clock settings, I share the code here https://github.com/nxp-imx/uboot-imx/blob/lf_v2022.04/arch/arm/mach-imx/mx6/clock.c#L64 Re: How are clock divisors enfc_pred and enfs_podf modified in Linux for the i.MX6ULL? I found out that the driver attempts to set these parameters automatically in drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c The clock is set in this module to 22MHz for my part which has tRC_min of 30nS. This results in a read cycle and write cycle of 90nS as measured. By moving to a 66MHz clock, the read/write cycle time improves from 90nS to 30nS which matches the data sheet for my part. Why is the clock so slow? I will need to check other timings to see if they are within the specification for the part I have.

SE050 商业中间件 我想开始销售在集成 IoT 设备的定制 PCB 上使用 SE050 的解决方案。 我正在使用下载为 se05x_mw_v04.05.01.zip 的中间件 1. 许可证允许吗（我确实有许可证，但我无法弄清楚这些连贯性不好的单词的含义）？ 2. 编译产生大量的弃用警告。我们确定代码得到了维护吗？ 3. Python代码损坏。您不能真的期望修复 requirements.txt 中的版本。您能解释一下这个输出吗： root@edge:~/simw-top/pycli/src# python3 setup.py 开发 /usr/local/lib/python3.11/dist-packages/setuptools/_distutils/dist.py:275：UserWarning：未知的分发选项：“控制台” 警告.警告（msg） 运行开发 运行egg_info 未找到文件 ssscli.py（用于模块 ssscli） 写入清单文件‘ssscli.egg-info/SOURCES.txt’ 运行 build_ext

Question on "Getting Started with the i.MX 8M Nano UltraLite EVK" This is a very basic question, but it seems to be holding me up, so your help is much appreciated:  How can I use the UUU command to program an SD Card, as opposed to eMMC?  Following are the details... I'm following the instructions for Section 2 of Getting Started with the i.MX 8M Nano UltraLite EVK. One of the sentences in the Overview states: For this getting started guide, only a few methods to transfer the Linux BSP image to an SD card are listed. Based on this sentence, I would assume that if I followed the instructions as shown, the end result should be that: I will have written an image to the SD Card. If I boot with the SW1101 switches set to 1100xxxx, then it will boot from the SD Card using the image I wrote. What I'm finding, however, is that even if I follow the instructions verbatim, the SD Card doesn't get programmed, but the eMMC does.  I've even tried programming an older version and when I do, that version appears when I boot from the eMMC, and the SD Card still doesn't work. Here are some of the specifics: To put the board in programming boot mode, I set SW1101 to: 1000xxx To put the board in SD Card boot mode, I set SW1101 to: 1100xxxx To put the board in eMMC boot mode, I set SW1101 to: 0100xxxx To program v6.6.52 I use the following UUU command: uuu LF_v6.6.52-2.2.0_images_IMX8MNDDR3LEVK.zip To program v6.1.55, I use the following UUU command: uuu LF_v6.1.55-2.2.2_images_IMX8MNDDR3LEVK.zip After using UUU, it always indicates that it was successful (Success 1    Failure 0) Is it possible that the uuu command needs to be run with different parameters to tell it to program the SD Card instead of the eMMC? Thanks much Re: Question on "Getting Started with the i.MX 8M Nano UltraLite EVK" I've figured out the issue.  Despite all of the reassurances that the instructions describe how to program the SD Card: 02 - Embedded Linux "For this getting started guide, only a few methods to transfer the Linux BSP image to an SD card are listed." When it finishes, turn off the board, and consult Boot switch setup to configure the board to boot from the SDcard. 03 - MCUXpresso SDK Following the steps from section 2 - Embedded Linux, prepare an SD card with a pre-built U-Boot + Linux image from the Linux BSP package for the i.MX 8M Nano UL processor. The directions don't actually describe how to write an image to the SD Card.  This is because the instructions in this section state that you should run the following command: uuu imagefilename.zip However, the images provided on the Linux Download Page contain a "uuu.auto" file that is configured to write the image to eMMC rather than to the SD Card, and so you can't use the command above to write the image to the SD Card using these images. Instead, you need to extract the contents of the image file, and then you can use the following command: uuu -b sd_all bootloader image Specifically, the following command worked for me: uuu -b sd_all imx-boot-imx8mnddr3levk-sd.bin-flash_ddr3l_evk imx-image-full-imx8mnddr3levk.wic

S32K144WQ64 Demo Board cannot connect Dear NXP Friend, I have a S32K144WQ64 demo board, when I connect it to computer with USB cable, I can see a window pop out which means the board is recognized by computer, but shortly it will disapear and all the light on the board will turn off. I test the voltage of VDD and other power, they are all zero. would you please kindly give some suggestion how to save my board. Many thanks Sophie Re: S32K144WQ64 Demo Board cannot connect Hi Robin, thank you very much for your quick support! BR Sophie Re: S32K144WQ64 Demo Board cannot connect Hi Please refer to the discussion in  Open SDA P&E Error Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------

SPC5743RMLU5 bsdl files Hi NXP Experts, I need bsdl files for SPC5743RMLU5, anybody can help me? Thanks. Re: SPC5743RMLU5 bsdl files Got! thank you for your quick response! Re: SPC5743RMLU5 bsdl files I am attaching requested files.

INTC error handling in MPC5744P Hello, Regarding the INTC, what happens when the timer - in register INTC_TIMERnC0 - exceeds the pre-defined max allowed latency in INTC_LATnC0 register for MPC5744P controller? In the reference manual, it says "an error will be signaled"..but do not say who signal the error? to whom is it signaled? how is it signaled? i.e., will it be signaled to FCCU for example, so the NCF[INTC] is set high? or it sets a bit in a specific register for example? Also, what happens to the timer in case the timer exceeds INTC_LATn or if the TIMERn reaches the maximum count? does it stay at latest value it reached, or is it set to zero again? Lastly, does FCCU have anything to do with INTC? i.e, does INTC send anything to FCCU in case of REAL faults in INTC, like when timer exceeds INTC_LATn or if the TIMERn reaches the maximum count? (i am not talking about fake error injection by FCCU here). Thank you. Re: INTC error handling in MPC5744P Hello, Regarding the INTC, what happens when the timer - in register INTC_TIMERnC0 - exceeds the pre-defined max allowed latency in INTC_LATnC0 register for MPC5744P controller? The Timer funciton is explained in the chapter 21.6.4.1.1 TIMERn of reference manual. Basically Timer just count until it reach maximum, so you SW can read it anytime. LAT is your compare threshold: i agree that the reporting mechanism is not explained in details here. INTC will signal it to the FCCU: Also, what happens to the timer in case the timer exceeds INTC_LATn or if the TIMERn reaches the maximum count? does it stay at latest value it reached, or is it set to zero again? It will hold the value or max. Timer is stopped if the action is taken (fault /interrupt) once it reach max value. Lastly, does FCCU have anything to do with INTC? i.e, does INTC send anything to FCCU in case of REAL faults in INTC, like when timer exceeds INTC_LATn or if the TIMERn reaches the maximum count? (i am not talking about fake error injection by FCCU here). Yes. There are physically lines from INTC to FCCU. Fake faults are injection fault to FCCU State machine, not to INTC. Best regards, Peter

Build sdk failed for libraries not found Hi     I couldn'd found the old topic with the same name. So I setup this again.     I tried to build sdk for imx8mm-evk, using command `bitbake -c populate_sdk imx-image-full`. But there is an error about qtpdf as follow picture          Hope could get someone help again here. Best regards Mingheng Re: Build sdk failed for libraries not found The sstate-cache is just a spot for yocto to consolidate packages that it checks before looking at mirrors. One way to speed up yocto builds with different configurations is to use a locally defined sstated-cache, but sometimes when doing so across several builds you can end up with multiple package versions that cause a similar problem. Fortunately, that is not the issue here.  Did Harley's link solve your issue? Regards, Clay Re: Build sdk failed for libraries not found Encounter-error-when-bitbake-qtwebengine  Regards Harvey Re: Build sdk failed for libraries not found Thanks for your reply It's a fresh yocto setup. OTOH, there is a folder named "sstate-cache", did you mean that? The configuration is in default. BTW, this issue was been repeated by another NXP employee and solved by adding some command in `local.conf` and `bblayers.conf` few days ago. But I forgot to markdown the modification and now I can not find that topic any more. Re: Build sdk failed for libraries not found Looks like you might be either missing some QT packages or having some versioning conflicts. If the goal is to just generate the SDK. Try building a smaller option without all the QT and machine learning. It'll build much quicker as well.  bitbake core-image-minimal -c populate_sdk Also is this a fresh yocto setup? Are you using a shared state cache? Regards, Clay

Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode Hi team, I am currently working on a project that involves using the eMIOS in the OPWFMB mode. My goal is to implement a control strategy where both the phase shift and the switching frequency can be dynamically adjusted based on real-time system requirements. While I have successfully configured the eMIOS module in OPWFMB mode for basic PWM generation, I am finding it challenging to synchronise and control the phase shift along with switching frequency variation. How can I dynamically introduce phase shift adjustments in OPWFMB mode while maintaining PWM synchronisation? Are there any recommended techniques or examples for implementing both these adjustments in a microcontroller with eMIOS capabilities? Thanks in advance! Re: Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode Solution for frequency + phase shift of PWM pulses:- 1. Set the eMIOS mode in OPWMB mode. 2. Use the eMIOS_Mcl function "Emios_Mcl_Ip_SetCounterBusPeriod" to change the frequency. Using the "Emios_Pwm_Ip_SetPeriod" to control the frequency will not work in OPWMB mode. 3. Use the eMIOS_Pwm function "Emios_Pwm_Ip_SetPhaseShift" to change the phase shift. Re: Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode Hi @_Leo_  Its been more than 2 weeks since I've asked about this. Please reply. Re: Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode Hi @_Leo_  Thank you for the reply.  But I require dual control of frequency as well as phase shift modulation of PWM signals. Can you please suggest any other peripheral apart from eMIOS that can achieve this type of control?  Or else, can you suggest me any microcontroller from NXP which is compatible for this type of dual control? Re: Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode Frequency modulation is only possible in OPWFMB. You could refer to the following training presentation to see how eMIOS modes work. Re: Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode Hi @_Leo_  Then how do I implement frequency modulation along with phase delay/shifting in the OPWMCB, OPWMB or OPWMT modes, that you mentioned? Re: Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode Hi, Thank you so much for your interest in our products and for using our community. Phase shift capability is not supported in OPWFMB. If you require phase shift feature you need to implement OPWMCB, OPWMB or OPWMT modes. For reference: Example S32K344 eMIOS DS3.5 RTD500 Hope it helps you. Have a nice day! Re: Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode @VaneB @joanxie @Senlent Please reply. Re: Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode @VaneB @Julián_AragónM @Senlent or anyone else from NXP, please reply. This is really urgent. Re: Implementing Phase Shift Change Along with Switching Frequency in eMIOS OPWFMB Mode @VaneB @Julián_AragónM or anyone else from NXP, please reply. This is really urgent.

eMIOS OPWFMB モードでのスイッチング周波数に伴う位相シフト変化の実装 こんにちはチーム、 私は現在、OPWFMBモードでeMIOSを使用するプロジェクトに取り組んでいます。私の目標は、位相シフトとスイッチング周波数の両方をリアルタイムのシステム要件に基づいて動的に調整できる制御戦略を実装することです。 基本的なPWM生成のためにeMIOSモジュールをOPWFMBモードで正常に構成できましたが、スイッチング周波数の変動に伴う位相シフトの同期と制御が困難であると感じています。OPWFMB モードで位相シフト調整を動的に導入し、PWM 同期を維持するにはどうすればよいか。これらの調整を eMIOS 機能を持つマイクロコントローラに実装するための推奨手法や例はありますか? よろしくお願いいたします！ Re: eMIOS OPWFMB モードでのスイッチング周波数に伴う位相シフト変更の実装 PWMパルスの周波数+位相シフトのソリューション:- 1. eMIOSモードを OPWMB モードに設定します。 2.eMIOS_Mcl機能「Emios_Mcl_Ip_SetCounterBusPeriod」を使用して周波数を変更します。「Emios_Pwm_Ip_SetPeriod」 を使用して周波数を制御すると、OPWMBモードでは機能しません。 3.eMIOS_Pwm機能「Emios_Pwm_Ip_SetPhaseShift」を使用して、位相シフトを変更します。 Re: eMIOS OPWFMB モードでのスイッチング周波数に伴う位相シフト変更の実装 周波数変調はOPWFMBでのみ可能です。次のトレーニング プレゼンテーションを参照して、eMIOS モードがどのように機能するかを確認できます。 Re: eMIOS OPWFMB モードでのスイッチング周波数に伴う位相シフト変更の実装 @VaneB @joanxie @Senlent ご返信ください。 Re: eMIOS OPWFMB モードでのスイッチング周波数に伴う位相シフト変更の実装 @VaneB @Julián_AragónM @SenlentまたはNXPの他の誰か、返信してください。これは本当に緊急です。 Re: eMIOS OPWFMB モードでのスイッチング周波数に伴う位相シフト変更の実装 @VaneB @Julián_AragónMまたはNXPの他の誰か、返信してください。これは本当に緊急です。

在 eMIOS OPWFMB 模式下实现相移随开关频率的变化 大家好， 我目前正在从事一个涉及在 OPWFMB 模式下使用 eMIOS 的项目。我的目标是实施一种控制策略，其中相移和开关频率都可以根据实时系统要求动态调整。 虽然我已经成功将 eMIOS 模块配置为 OPWFMB 模式以生成基本 PWM，但我发现同步和控制相移以及开关频率变化具有挑战性。如何在保持 PWM 同步的同时在 OPFFMB 模式下动态引入相移调整？是否有任何推荐的技术或示例可用于在具有 eMIOS 功能的微控制器中实现这两种调整？ 提前感谢！ 回复：在 eMIOS OPWFMB 模式下实现相移变化以及开关频率 PWM脉冲频率+相移的解决方案： 1. 将 eMIOS 模式设置为OPWMB模式。 2. 使用 eMIOS_Mcl 函数“ Emios_Mcl_Ip_SetCounterBusPeriod ”来改变频率。使用“ Emios_Pwm_Ip_SetPeriod”控制频率在 OPWMB 模式下不起作用。 3. 使用 eMIOS_Pwm 函数“ Emios_Pwm_Ip_SetPhaseShift ”来改变相移。 回复：在 eMIOS OPWFMB 模式下实现相移变化以及开关频率 频率调制仅在 OPWFMB 中可行。您可以参考以下培训演示来了解 eMIOS 模式的工作原理。 回复：在 eMIOS OPWFMB 模式下实现相移变化以及开关频率 @VaneB @joanxie @Senlent请回复。 回复：在 eMIOS OPWFMB 模式下实现相移变化以及开关频率 @VaneB @Julián_AragónM @Senlent或恩智浦的其他人员，请回复。情况真的很紧急。 回复：在 eMIOS OPWFMB 模式下实现相移变化以及开关频率 @VaneB @Julián_AragónM或 NXP 的其他任何人，请回复。这事确实很紧急。

Codewarrior Flash Programmer Icon Not coming in software Hi, I am using codewarrior Studio Qoirq LS series software to flash uboot on NOR flash, I am able to connect through code warrior TAP debugger but I am not able to use the flash programmer which is disabled in the software which I downloaded from NXP site. I have attached the JPEG image with red circle. I am not sure what I am missing here. Please help me. I am trying to flash the UBOOT(.PBL), combination of other binaries to Nor flash. red circle flash icon not workingred circle flash icon not working Thanks, Gopi Krishna M Re: Codewarrior Flash Programmer Icon Not coming in software Hi @gkrishna, Just to let you know that I working on your issue, When I have any update I will let you know Regards

Require guidance to create .wic image with my Customising image and dtbs Hi, Actually i am new to this community. I have a imx 8m quad dev kit. I have succesfully flashed the image using uuu tool. I have applied uuu uuu.auto file. It flashed the kernel-5.10.72 image to board through emmc. I have tried this link from yocto porting guide $ git clone https://source.codeaurora.org/external/imx/linux-imx. But there is no directory. Then i have downloaded manually and added my driver, device tree. Finally i have created the image, modules, dtbs using the make Image, make modules, make dtbs. Now i am facing difficulties, how to flash this customized one, where we need to place the files. Could you please direct me to the right direction? Please share any related document. Thanks. Regards, Kamalesh i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: Require guidance to create .wic image with my Customising image and dtbs Okay. Thanks. Re: Require guidance to create .wic image with my Customising image and dtbs Please refer to the patch I provided in my previous post. Please continue to discuss the Linux driver porting problem in your new thread. Thanks. Re: Require guidance to create .wic image with my Customising image and dtbs Hi, Yes, I have given. I can able to see the kernel message driver succesfully loaded , after loaded the driver using insmod. But our driver is a universal one. There is no v4l2 registration is present in our driver. Whether this may be the reason for not creating video node? Regards, Kamalesh Re: Require guidance to create .wic image with my Customising image and dtbs In Kernel configuration, please do the following modification, then rebuild Linux Kernel image. CONFIG_VIDEO_LT9211C=m => CONFIG_VIDEO_LT9211C=y In your current environment, please try to insert Kernel module for LT9211C manually with "insmod  *.ko". Re: Require guidance to create .wic image with my Customising image and dtbs Hi, I have created new forum. In my case, LT9211 bridge is using as lvds to mipi camera bridge. Thanks for your support. Regards, kamalesh Re: Require guidance to create .wic image with my Customising image and dtbs Please build LT9211 driver into Linux Kernel rather than building it as a Kernel module. In addition, please refer the this patch https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/Patch-for-LT9211-bridge-on-i-MX/ta-p/1685417 If your problem persists, would you please create a new thread to discuss you Linux Kernel driver porting? It's not related with images deployment.  Re: Require guidance to create .wic image with my Customising image and dtbs Hi, Please find the attachment of kernel configuration file. Thank you. Re: Require guidance to create .wic image with my Customising image and dtbs Hi, I am using Universal driver for LT9211 which I have received from vendor itself. Kernel configuation file means config.gz right? I will attach these file in my next one. Yes, I have added device tree details. &mipi_csi_1 { #address-cells = <1>; #size-cells = <0>; status = "okay"; port { mipi1_sensor_ep: endpoint@0 { remote-endpoint = <&lt9211c_mipi1_ep>; data-lanes = < 0 1 2 3 >; bus-type = <4>; }; csi1_mipi_ep: endpoint@1 { remote-endpoint = <&csi1_ep>; }; }; }; &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; lt9211c_mipi: lt9211c_mipi@2d { compatible = "lontium,lt9211c"; reg = <0x2d>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_csi1_pwn>; clocks = <&clk IMX8MQ_CLK_CLKO2>; clock-names = "csi_mclk"; assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>; assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_200M>; assigned-clock-rates = <20000000>; csi_id = <0>; reset-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; mclk = <20000000>; mclk_source = <0>; port { lt9211c_mipi1_ep: endpoint { remote-endpoint = <&mipi1_sensor_ep>; }; }; }; }; Yes, Below I have given my procedure. 1) I have downloaded the linux-imx directory from github. 2) I have added my driver file(LT9211.c), Makefile and Kconfig files under /kernel/media/i2c/ and made configurations in menuconfig file. 3) I have modified or included my lt9211 details in /arch/arm64/boot/dts/freescale/ directory. (imx8mq-evk.dts file) 4) Finally i have compiled for image, modules, dtbs and drivers. 5) After this I have flashed the raw image.wic from Downloaded file of LF_v5.10.72-2.2.3_images_IMX8MQEVK.zip. 6) Then i have replaced the kernel(rootfs), Image and dts file. Thanks. Regards, Kamalesh Re: Require guidance to create .wic image with my Customising image and dtbs What Linux driver do you use in your Kernel? Would you please provide your Linux Kernel configuration file? Have you add the device node in dts file? Would you please describe your modification regarding Linux Kernel and dts in details？ Re: Require guidance to create .wic image with my Customising image and dtbs Hi, Sorry for the late reply. Here I attached the boot log and Kernel log(dmesg). Please review and give comments. Regards, kamalesh Re: Require guidance to create .wic image with my Customising image and dtbs Yes, please also provide Linux Kernel booting up log. Re: Require guidance to create .wic image with my Customising image and dtbs I will create new thread for my current issue. Below is the procedure. I have flashed imx-image-multimedia-imx8mqevk.wic to my dev kit. As per your statement. I have mounted the mmcblk0p1 to one folder, then i have replaced my custome image(Image) and device tree9imx8mq-evk.dtb) in mmcblk0p1 mounted folder. I mounted the mmcblk0p2 in another folder, then i have replaced the customized kernel/* files. Finally umounted this mmcblk0p1 and mmcblk0p2 folder. Then sudo reboot. Are you asking my dmesg kernel messages? Regards, Kamalesh. Re: Require guidance to create .wic image with my Customising image and dtbs Would you please create a new thread to address your current problem? Please describe your modification for Kernel and dts in details. Please provide your Linux console log. Re: Require guidance to create .wic image with my Customising image and dtbs Hi yipingwang and bernhardfink, Thank you for the technical explanation. This forum will be useful for everyone. I have successfully replaced my custom BSP files in the i.MX8M Quad development kit. Could you please help resolve my doubts below? I have flashed the image imx-image-multimedia-imx8mqevk.wic and uploaded my driver as well as the device tree to the correct path. I checked lsmod, and only my driver is loaded. In the original DTS (DTB), my information is also present. However, the video node is not being created. There are already four default video nodes. My driver is a universal driver for my camera chip. Is a universal driver sufficient to create the video node? Please help me resolve these queries. Regards, Kamalesh Re: Require guidance to create .wic image with my Customising image and dtbs You could deploy your custom images to emmc with the following procedure on the target board. 1. Mount the formatted partition with this command: $ mkdir mnt $ sudo mount /dev/mmcblk0p1  mnt 2. Copy the your Image and *.dtb files to the mnt folder by using cp. The device tree name should be same as the original. Unmount the partition with this command: $ sudo umount mnt For Kernel module, please deploy them to rootfs partition. $ mkdir mnt $ sudo mount /dev/mmcblk0p2 mnt $ cd mnt Then copy Kernel modules to folder lib/modules/*/kernel/ Re: Require guidance to create .wic image with my Customising image and dtbs The SD card is just a good analogy to understand the situation on an eMMC. If you have a Linux PC and an SD card, you can program the SD card with the *.wic image like this: $ sudo dd if=*.wic of=/dev/sdx bs=1M && sync The wic file is a complete storage image, containg everything from the first to the last byte (a kind ISO file). So everything is written at once. You can now inspect the structure and the content of the SD card on your Windows or Linux PC: The boot image partition can be changed with low level utilities, the other two partitions have a file system (FAT and ext4) and can be changed easily form a Windows or Linux OS. The same would apply to an eMMC if you would be able to connect it to a PC. It's fixed to the i.MX 8M Plus, so you can see the 8M Plus as the Linux PC which allows you to work on these three partitions. What I do for example: I update my DTS file on the Linux PC and copy the resulting DTS file on a USB stick I boot Linux on the 8M Plus and connect the USB stick Replace the DTB file on the second partition with the new file from the USB stick You could do the same with the Linux kernel ( = Image). Updating things in the root fs is working in the same way until you run out of space on the partition. For example if you wnat to have a test video in the home directory, take one from a PC and transfer it to the root fs using a USB stick. In case you have no option to connect a USB stick, you could maybe realize a connection over ethernet. Updating things on the first partition is more complicated, if you renew one of the components there (for example the LPDDR4 training firmware), then you need to re-package all involved components using the imx-mkimage utility. Maybe you find one or the other interesting command in this article:  https://www.emcraft.com/som/imx-8m/booting-linux-from-emmc Regards, Bernhard. Re: Require guidance to create .wic image with my Customising image and dtbs Hi, I have checked in my imx8m quad dev kit. Two partition detected as your statement. I have to do the all procedure  in this development kit board right? Regards, kamalesh Re: Require guidance to create .wic image with my Customising image and dtbs As you mentioned previously, you have used UUU to program the pre-built .wic image to emmc on the target board. After booting up to Linux on the target board, you will find the following information after run command "fdisk -l" command. Disk /dev/mmcblk0: 29.12 GiB, 31268536320 bytes, 61071360 sectors Units: sectors of 1 * 512 = 512 bytes Sector size (logical/physical): 512 bytes / 512 bytes I/O size (minimum/optimal): 512 bytes / 512 bytes Disklabel type: dos Disk identifier: 0x076c4a2a Device Boot Start End Sectors Size Id Type /dev/mmcblk0p1 * 16384 697957 681574 332.8M c W95 FAT32 (LBA) /dev/mmcblk0p2 704512 19152713 18448202 8.8G 83 Linux Re: Require guidance to create .wic image with my Customising image and dtbs Hi, I have connected my board with my host pc. I have done the dip switch as 1100 for detection. For lsusb, lsusb Bus 004 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub Bus 003 Device 003: ID 04f3:0c4f Elan Microelectronics Corp. ELAN:Fingerprint Bus 003 Device 002: ID 0408:4033 Quanta Computer, Inc. ACER HD User Facing Bus 003 Device 011: ID 1fc9:012b NXP Semiconductors i.MX 8M Dual/8M QuadLite/8M Quad Serial Downloader But, It did not detected as mmcblk0p1. what to do. I will clearly explain my position now. I have extracted the linux-imx directory from NXP github. I have compiled the image, modules, dtbs and root file systems as per my requirement. Now i want to merge these files and have to see camera video node created or not. Note:- I have compiled the linux-imx directory and created the rootfs in the name of 5.10.72-dirty. How to proceed? Thanks for your quick support. Regards, Kamalesh Re: Require guidance to create .wic image with my Customising image and dtbs If you are using emmc, you could did the above procedure on the target board. Please use /dev/mmcblk0p1 to replace /dev/sdx1  Please use /dev/mmcblk0p2 to replace /dev/sdx2 in the above procedure. Re: Require guidance to create .wic image with my Customising image and dtbs Hi yipingwang, Thanks for your quickly reply. Actually i have some doubts. I have extracted this LF_v5.10.72-2.2.3_images_IMX8MQEVK.zip. From this I have flashed the uuu.auto file using emmc. In this file, they have used imx-image-full-imx8mqevk.wic(which is kerenel 5). Can i use the same image for these procedure which received from you? Regards, Kamalesh Re: Require guidance to create .wic image with my Customising image and dtbs First of all, please deploy SD card with the following command. $ sudo dd if=*.wic of=/dev/sdx bs=1M && sync Please refer to the following procedure on your host PC to deploy your custom images. 1. Format partition 1 on the card as VFAT with this command: $ sudo mkfs.vfat /dev/sdx1 2. Mount the formatted partition with this command: $ mkdir mountpoint $ sudo mount /dev/sdx1 mountpoint 3. Copy the Image and *.dtb files to the mountpoint by using cp. The device tree names should match the one used by the variable specified by U-Boot. Unmount the partition with this command: $ sudo umount mountpoint For Kernel module, please deploy them to rootfs partition. $ mkdir /home/user/mountpoint $ sudo mount /dev/sdx2 /home/user/mountpoint $ cd /home/user/mountpoint Then copy Kernel modules to folder lib/modules/6.12.3-lts-next-g24e49103b666/kernel/ Please refer to section "4.3.5 Copying the kernel image and DTB file" in https://www.nxp.com.cn/docs/en/user-guide/IMX_LINUX_USERS_GUIDE.pdf

S32G-VNP-RDB3 - PCIe via card edge connector (P1) not working I'm trying to establish a PCIe connection via the PCIe card edge connector P1 on the S32G-VNP-RDB3 board. Regardless of jumper settings and U-Boot hwconfig settings, I am not able get this working. Has anyone been able to successfully get this working? The hardware design is suspicious, the differential pairs are connected with inverted polarity at the card edge connector: Re: S32G-VNP-RDB3 - PCIe via card edge connector (P1) not working Hi Chenyin, thanks, with your notes I got it working. I think the main issue was that I had to run the saveenv command after setting the hwconfig variable, and then rebooting! Cheers, Felix Re: S32G-VNP-RDB3 - PCIe via card edge connector (P1) not working Hello, @felixn  Thanks for your post. May I know which version RDB3 is used from your side? which version BSP is used during your test? I have tested it with my local RDB3(REVF) with BSP42, seems the PCIe device that connect to the P1 is fine. I suggest firstly setting the SW8 to OFF, then using the following hwconfig under U-boot: hwconfig=serdes0:mode=pcie,clock=ext;pcie0:mode=rc;serdes1:mode=pcie&xpcs1,clock=int,fmhz=100;pcie1:mode=rc;xpcs1_1:speed=2G5 After resetting the board, my PCIe device connected to P1(one e1000 network card) could be detected in Linux correctly: 0001:01:00.0 Ethernet controller: Intel Corporation 82572EI Gigabit Ethernet Controller (Copper) (rev 06) BR Chenyin

Windows 11 driver for Pagoda CLRD710 device Where can I find updated drivers for the CLRD710? It seems the latest ones does not work with windows 11 64 bit Intel Re: Windows 11 driver for Pagoda CLRD710 device Thank you for you reply, we have ordered the CLRD730 Re: Windows 11 driver for Pagoda CLRD710 device Hello @ffrumento, Hope you are doing well. Please consider that this is an old device and the drivers may not have received more updates. The available driver for Pegoda RD710 can be found in PEGODA Contactless Smart Card Reader based on MFRC523 product page, under Software section. If possible, I will recommend you using the PEGODA Contactless Smart Card Reader Based on PN7642. Regards, Eduardo.