i.MX93 EVK SDIO Wifi DTS Reset Pin I'm having trouble bringing up an external uSD module (TI cc33xx) on the imx93 EVK. I've compiled and built a kernel and DTS files from the linux-imx github repo, and gotten them up and running from eMMC on the EVK. In the DTS, I've disabled the M.2 SDIO interface usdhc3, and modified usdhc2 to support the microSD slot. The wifi card powers up and tries to initialize, but fails at loading the firmware because it's missing a connection to the reset pin of the module. I've tried many different settings and can't get it to work. I'm trying to wire the reset pin from the module to the 40 pin GPIO header on the imx 93 EVK (11x11). Best I can tell from the code and EVK reference manual, the imx93 40 pin header is addressed as gpio2, and I have these relevant parts in my DTS settings: reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
regulator-name = "WLAN_EN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>;
/*
* IW612 wifi chip needs more delay than other wifi chips to complete
* the host interface initialization after power up, otherwise the
* internal state of IW612 may be unstable, resulting in the failure of
* the SDIO3.0 switch voltage.
*/
startup-delay-us = <20000>;
enable-active-high;
regulator-always-on;
};
usdhc2_pwrseq: usdhc2_pwrseq {
compatible = "mmc-pwrseq-simple";
// reset-gpios = <&pcal6524 20 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
post-power-on-delay-ms = <10>;
power-off-delay-us = <80>;
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_wlan>;
mmc-pwrseq = <&usdhc2_pwrseq>;
vmmc-supply = <®_usdhc2_vmmc>;
bus-width = <4>;
keep-power-in-suspend;
cap-power-off-card;
non-removable;
max-frequency = <10000000>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,cc33xx";
reg = <2>;
//interrupt-parent = <&pcal6524>;
//interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
};
btti: btti@1 {
compatible = "ti,cc33xxbt";
reg = <1>;
};
};
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
fsl,pins = <
MX93_PAD_SD2_RESET_B__USDHC2_RESET_B 0x31e
>;
}; I have the reset pin from the module connected to pin 26 on the 40 pin header. What am I doing wrong? Should I use a different pin on the EVK for reset? Re: i.MX93 EVK SDIO Wifi DTS Reset Pin Hello!
It seems well. Just onr recommendation is to use two different PADs for Enable and Reset. In this case you are using the SAM GPIO2_IO07 for those.
Best regards,
Salas. Re: i.MX93 EVK SDIO Wifi DTS Reset Pin @Manuel_Salas thanks for your reply. Do these usdhc2 parts look better? reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
regulator-name = "WLAN_EN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>;
/*
* IW612 wifi chip needs more delay than other wifi chips to complete
* the host interface initialization after power up, otherwise the
* internal state of IW612 may be unstable, resulting in the failure of
* the SDIO3.0 switch voltage.
*/
startup-delay-us = <20000>;
enable-active-high;
regulator-always-on;
};
usdhc2_pwrseq: usdhc2_pwrseq {
compatible = "mmc-pwrseq-simple";
// reset-gpios = <&pcal6524 20 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
post-power-on-delay-ms = <10>;
power-off-delay-us = <80>;
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_wlan>, <&pinctrl_reg_usdhc2_vmmc>;
mmc-pwrseq = <&usdhc2_pwrseq>;
vmmc-supply = <®_usdhc2_vmmc>;
bus-width = <4>;
keep-power-in-suspend;
no-1-8-v;
cap-power-off-card;
//non-removable;
max-frequency = <10000000>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,cc33xx";
reg = <2>;
//interrupt-parent = <&pcal6524>;
//interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
};
btti: btti@1 {
compatible = "ti,cc33xxbt";
reg = <1>;
};
};
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
fsl,pins = <
MX93_PAD_GPIO_IO07__GPIO2_IO07 0x31e
>;
};
pinctrl_usdhc2_wlan: usdhc2wlangrp {
fsl,pins = <
MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x31e
>;
}; or, should I address it differently than with pinctrl-0 in &usdhc2? Re: i.MX93 EVK SDIO Wifi DTS Reset Pin Hello @rtwheato
I hpe you are doing very well.
There is a confusion with the PADs.
The PAD 26 in the 40 pin Header is the &gpio2 7 (EXP_GPIO_IO07), you are using a different PAD in your device tree SD2_RESET_B.
If you want to use the PIN 26 (EXP_GPIO_IO07) you should change to:
MX93_PAD_GPIO_IO07__GPIO2_IO07
Best regards,
Salas.
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