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How to Set Up CS2100 and Configure PTA26 on S32K344 to Enable STGL5000? Hello, all I 'm working with the S32K344 WB and trying to enable the STGL5000. According to the STGL5000 datasheet, the SYS_MCLK pin needs a clock signal before activation.   However, in the provided example Sound Mixer Release Pack, I couldn't find any setup for generating the clock signal on SYS_MCLK using CS2100CP.   I have the following questions: How can I properly configure CS2100CP to provide the necessary clock signal for SYS_MCLK? How should I set up PTA26 on the S32K344 to output the clock signal correctly? Any guidance, example code, or register configuration detail   s would be greatly appreciated. Thank you! Re: How to Set Up CS2100 and Configure PTA26 on S32K344 to Enable STGL5000? Hi Are you referring to the Sound Mixer Release Pack.zip attached in S32K Sound Mixer? S32K Sound Mixer User Guide.pdf mentions: The S32K Sound Mixer demo includes K3 and K1 series, the test HW are listed below: S32K3x4EVB-Q257 S32K148-T-BOX Sorry, due to the hardware differences between S32K3x4EVB-Q257 and S32K344-WB you are using, you cannot run that project directly. It is recommended that you download S32K344_Whiteboard_Example_RTM_1.0.0.zip in S32K344 Whiteboard Example Project. It contains the Sai_47478A_440_100 project meet your need. C:\NXP\S32K344_Whiteboard_Example_RTM_1.0.0\S32K344_Whiteboard_Example_RTM_1.0.0\SAI\Sai_47478A_440_100 Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
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S32K3 SecureBoot Is there any document about S32K3 HSE safe start-up plan decision? I did not find detailed instructions in RM758221-HSE-B Firmware Reference Manual-V2.1.For example, as mentioned in the image below.   回复: S32K3 SecureBoot Ok, thanks for your reply Re: S32K3 SecureBoot Hi @ZY2  There are some trainings like "S32K3 HSE Training - Oct2022" which can be found in Documentation -> Secure Files: https://www.nxp.com/products/S32K3 There are some details about life cycles and debug access and key management etc. But your requirements are given mainly by OEM. I don't think we have such documentation. Regards, Lukas
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S32K3安全启动 有没有关于S32K3 HSE安全启动计划决策的文件?我在RM758221-HSE-B固件参考手册-V2.1中没有找到详细的说明。例如,如下图所示。  
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How to configure the clock source of TPM in iMX8ULP dts? Dear all,     I want to enable TPM4,7,8 on iMX8ULP,but the dts doesn't have device note.     So, I add TPM8 device node by myself.     But during probe, the kernel crashes.     Therefore, how to configure the clock source of TPM?     log and dts are as below. i.MX8ULP 回复: How to configure the clock source of TPM in iMX8ULP dts? Thanks a lot !!! It works well! 回复: How to configure the clock source of TPM in iMX8ULP dts? Hello, Thank you for the update, please try by not commenting the assigned-clock-rates & clock-names properties in the tpm node. Also, please enable the clock to be configured early on ATF: https://github.com/nxp-imx/imx-atf/blob/lf-6.6.36-2.1.0/plat/imx/imx8ulp/imx8ulp_bl31_setup.c#L68 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3) { static console_t console; + /* config the TPM7 clock */ + mmio_write_32(IMX_CGC1_BASE + 0x908, 0x300); + /* config the TPM5 clock */ mmio_write_32(IMX_PCC3_BASE + 0xd0, 0x92000000); mmio_write_32(IMX_PCC3_BASE + 0xd0, 0xd2000000); Please try it and let me know of your results. Best regards/Saludos, Aldo. 回复: How to configure the clock source of TPM in iMX8ULP dts? Hello! Here are some updates  I'd like to share with you. Fortunately, I enable TPM7 CH5(PTF25) successfully, but there is no output waveform. my device node  : +tpm7: tpm@29830000 { + //compatible = "fsl,imx8ulp-tpm", "fsl,imx7ulp-tpm"; + compatible = "fsl,imx7ulp-pwm"; + reg = <0x29830000 0x10000>; + //interrupts = ; + clocks = <&pcc4 IMX8ULP_CLK_TPM7>, <&pcc4 IMX8ULP_CLK_TPM7>; + assigned-clocks = <&pcc4 IMX8ULP_CLK_TPM7>; + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>; + //assigned-clock-rates = <48000000>; + //clock-names = "ipg", "per"; + status = "okay"; +}; +&tpm7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tpm7>; + #pwm-cells = <3>; +}; pinctrl_tpm7: tpm7grp {                 fsl,pins = <                         MX8ULP_PAD_PTF25__TPM7_CH5      0x2                 >; };   my commands : root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8# echo 5 > export root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8# cd pwm5/ root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 400000 > period root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 200000 > duty_cycle root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 1 > enable root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# Re: How to configure the clock source of TPM in iMX8ULP dts? I successfully enable pwm signal of TPM7 CH5(PTF25), but there is no output waveform tpm7: tpm@29830000 { //compatible = "fsl,imx8ulp-tpm", "fsl,imx7ulp-tpm"; compatible = "fsl,imx7ulp-pwm"; reg = <0x29830000 0x10000>; //interrupts = ; clocks = <&pcc4 IMX8ULP_CLK_TPM7>, <&pcc4 IMX8ULP_CLK_TPM7>; assigned-clocks = <&pcc4 IMX8ULP_CLK_TPM7>; assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>; //assigned-clock-rates = <48000000>; //clock-names = "ipg", "per"; status = "okay"; }; &tpm7 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tpm7>; #pwm-cells = <3>; }; pinctrl_tpm7: tpm7grp { fsl,pins = < MX8ULP_PAD_PTF25__TPM7_CH5 0x2 >; }; root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 400000 > period root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 200000 > duty_cycle root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 1 > enable Re: How to configure the clock source of TPM in iMX8ULP dts? Now, the kernel starts normally.But when I enable PWM channal, it will report an error! root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 100000 > period root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 50000 > duty_cycle root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 1 > enable -sh: echo: write error: Timer expired Re: How to configure the clock source of TPM in iMX8ULP dts? ok, I will show it for you. node TPM7,8 are added by myself. Re: How to configure the clock source of TPM in iMX8ULP dts? Hello, Could you share the full device tree that you are using? Also, the node you have added seems to be incomplete that may be part of the reason as to why it does fail to boot correctly. Best regards/Saludos, Aldo.
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Fail to install S32K396 development package fails Hello, We recently bought a S32K396-BGA-DC1 Evaluation Board to evaluate S32K396 MCU for a future project. I'm trying to complete the "Getting Started" tutorial: https://www.nxp.com/document/guide/getting-started-with-s32k396-bga-dc1-evaluation-board:GS-S32K396-BGA-DC1?section=get-software Unfortunately, i'm not able to complete point 2.4 : Install the S32K3xx Development Package and RTD Indeed, despite multiple tries, installation of the S32K396 development package always fails I'm not getting always the same error Not sure whether it may be linked, but at the beginning of package installation, it have this message Can someone help with this ? Thank you Vincent Re: Fail to install S32K396 development package fails Hello, I could install all packages mentioned in starting guide. Thank you very much for your help Regards Vincent Re: Fail to install S32K396 development package fails Hi,  Great that you got it installed already! The S32DS Extensions and Updates is empty because it gets populated from the software site list. You can just use Package Manager to get the offline pack for the drivers as well, select:    and add the ..._DS_updatesite.zip archive to the software site list. This should give you the RTD drivers in the extensions and updates list. Re: Fail to install S32K396 development package fails Hello, I had alredy the HTTPS option enabled. I have removed all NXP sites and I could complete point 2.4. I think it works since i've been able to rebuild a project created by MBDT (the Matlab tool box) Now i'm trying to complete point 2.5 "Install the RTD Drivers". Unfortunatelly, the "Availble/Update" tab of the "S32DS Extensions and Updates" is empty. It has always been empty, not since i removed NXP sites. I tried to download the package from NXP web site : https://nxp.flexnetoperations.com/control/frse/product?child_plneID=837767 But I can't find the exact same package name "S32K396 RTD AUTOSAR® R21-11 Version 3.0.0". Could you please indicate which package corresponds to the package that i'm supposed to download from "S32DS Extensions and Updates" or give me a direct link ? Thank you very much for your help Best regards Vincent Re: Fail to install S32K396 development package fails Hello @Vincent_91687, It seems you have some issues with the web update site. I tried to reproduce it, but the steps in the guide worked for me. Some things you can try: In Window-> Preferences->S32 Design Studio for S32 Platform -> S32DS Extensions and Updates You have a table of software sites, like:  You can change the S32DesignStudio site to use https, or, if you updated your S32DS3.5 to update 8 or later, you can click on Restore Defaults and it will change your sites to https versions. If that does not fix it, you can try to remove the NXP website software sites from your list, and keep just the software bundle contents added locally, this should still resolve all the dependencies, but it will no longer install the latest available updates from the web. Let us know if you need further assistance!
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使用 kl2 6p100 主板和 mkl26z256vll4 处理器时出现问题 我有 kl2 6p100 主板和 mkl26z256vll4 处理器。但我无法找到 mcuxpresso 板列表中的板和必要的资源。那么我应该使用哪个主板,或者在哪里可以找到关于主板的资源和文档 回复:使用 kl2 6p100 主板和 mkl26z256vll4 处理器时出现的问题 当然,我非常高兴能帮助你。但是,该帖子已被标记为“已解决”,因此您的信息可能会被忽略。我建议您创建一个新帖子。感谢您的理解。 回复:使用 kl2 6p100 主板和 mkl26z256vll4 处理器时出现的问题 亲爱的 Celeste_Liu, 我希望你一切安好。我目前正在为我的最后一年的项目建造一辆 Alamak 汽车,并且我正在努力完成配置步骤。您能否帮助我提供与项目此阶段相关的资源或参考资料? 非常感谢您的帮助。我非常感谢您的支持。 此致, 卡福 kifluteklay30@gmail.com 回复:使用 kl2 6p100 主板和 mkl26z256vll4 处理器时出现的问题 不客气。有任何新问题,欢迎创建新帖子。 回复:使用 kl2 6p100 主板和 mkl26z256vll4 处理器时出现的问题 非常感谢。这对我很有帮助 回复:使用 kl2 6p100 主板和 mkl26z256vll4 处理器时出现的问题 感谢您的回复 但是主板 frdm-kl26z 有 64 个引脚,而我的处理器 mkl26z256vll4 有 100 个引脚。 处理器 mkl26z256vll4 未安装在主板上。它是独立的,我的意思是您可以将处理器插入或拔出主板。我认为它是专门为 nxp 汽车比赛设计的。车型是 alamak。我改用 frdm-kl46z。 我的问题是,我可以将代码刻录到处理器中,但无法控制伺服电机或控制 LED。
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KL2 6P100 ボードと MKL26Z256VLL4 プロセッサの問題での作業 KL2 6P100ボードとMKL26Z256VLL4プロセッサを持っています。しかし、MCUXPRESSOボードのリストと必要なリソースのボードは見つかりませんでした。では、代わりにどのボードを使用すべきか、またはボードに関するリソースとドキュメントはどこで見つけることができますか Re:kl2 6p100ボードとmkl26z256vll4プロセッサの問題での作業 もちろん、私はあなたを助けることを非常にうれしく思います。ただし、この投稿はすでに「解決済み」としてマークされているため、あなたの情報が見落とされる可能性があります。新しい投稿を作成することをお勧めします。ご理解のほどよろしくお願いいたします。 Re:kl2 6p100ボードとmkl26z256vll4プロセッサの問題での作業 親愛なるCeleste_Liu、 このメッセージがあなたによく伝わることを願っています。私は現在、最終学年のプロジェクトのためにアラマックの車を作っていますが、構成手順に苦労しています。プロジェクトのこの段階に関連するリソースや参照を提供していただけますか? ご協力いただき、誠にありがとうございました。皆様のご支援に心より感謝申し上げます。 よろしくお願いいたします カフー kifluteklay30@gmail.com Re:kl2 6p100ボードとmkl26z256vll4プロセッサの問題での作業 どういたしまして。新しい問題がある場合は、新しい投稿を作成することを歓迎します。 Re:kl2 6p100ボードとmkl26z256vll4プロセッサの問題での作業 ありがとうございました。これは私を大いに助けます Re:kl2 6p100ボードとmkl26z256vll4プロセッサの問題での作業 返信ありがとうございます しかし、ボードFRDM-KL26Zは64ピンですが、私が持っているプロセッサMKL26Z256VLL4は100ピンです。 プロセッサMKL26Z256VLL4は board.it に詰め込まれていないため、スタンドアロンであるため、プロセッサをボードに差し込んだり抜き差ししたりできます。私はそれがNXPカーコンペティションのために特別に設計されていると思います.車のモデルはアラマックです。代わりにFRDM-KL46Zを使用しています。 私の質問は、プロセッサにコードを書き込むことはできましたが、サーボモーターを制御したり、LEDを制御したりすることはできませんでした。
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CLI based tool to handle OTP, eFuse to help with board bring-up Hello, I'd like to know if there is a possibility to handle the read/write functionalities of eFuses on IMXRT1176 microcontroller. In my case, I have a custom board that requires me to verify the state of fuse bits and if it's needed to set them to a proper state. I need to configure boot pins for my every board with my uC, which will have set it to internal boot mode. Having to do so manually (via seria bootloader using UART/USB) is a total waste of time when a considerable numbers of boards is considered. There are 2 solutions that I see here: - run this via dedicated CLI based tool that can communicate via some interface like UART/USB (or over a debug probe?), execute commands and then flash the image and run the code. - Run the code from RAM, set proper eFuses if necessary and then boot from FLASH. It could be automated via some debug probe like Jlink or mcu-Link to run 2 consequent images, One from RAM that will set the fuses, disconnect and then load the code to FLASH where the application can start from after setting the eFuses to correct boot mode in previous RAM based application. Are there any useful other alternatives?  i.MXRT Re: CLI based tool to handle OTP, eFuse to help with board bring-up Hi @mimlo  I am glad that the information worked for you! That is a good question, I have not tested so far, as this is trick that can be used for customization,  but I presume that there will be some exeptions, generally speaking there  are several registers, memory map areas, that I think would need to be initialized before reading them, using a routine.  Diego Re: CLI based tool to handle OTP, eFuse to help with board bring-up Hi @diego_charles, Thank you very much for the link to the flash programmer github link. We have our flash programmer design and it's a great idea to incorporate setting the eFUSEs in the flash loader application code since it's loaded into RAM memory every time the debugger tries to upload the image into the flash memory of the uC. That would definitely take care of things for us and there would be no need to come up with anything custom made besides the flash loader itself, but we already have that. Reading shadow registers is also a great idea, thanks for that as well. Last question to you: I assume I can read any memory mapped address of the microcontroller that is available for reading and display that or there are some exceptions to this? Thanks again! Re: CLI based tool to handle OTP, eFuse to help with board bring-up Hi @mimlo  Thank you for your reply!  I have more details about the Linkserver and .scp script option I mentioned earlier. The .scp files are used by linkserver. If you debug/program a project using the MCUXpresso IDE and an NXP debug probe, running CMSIS DAP. You will see the execution of a connect script .scp. Below an example.  This sample log on the terminal comes from Using the GUI Flash Tool, embeded on the IDE with a customized .scp file. This time using i.MX RT1020 On simple terms, this customized .scp allows you to use a NXP debug probe to read registers of the MCU and print their value on the terminal. The customization came from adding extra code lines to the default, RT1020 scp file to read UUID value, Boot_CFGx registers and another register, the SRC_SBMR2, which reflects the value of the boot mode pins.  The UUID and Boot_CFGx registes are not actual OTP fuses, they are shadow registers, that can be easily accessed. So far Linkserver, or NXP debug probes does not provide a way to burn fuses for the i.MX RT. As seen in this example, you could read shadow registers easily.  If you want to program fuses easily, over SWD using Segger-s J-Link, you can use .jlinkscript or flashloader to implement fuse programming. Additionally and derived from that  you could explore on your own, other options. Our FAE colleague Calvin Ji had  created one J-Link flashloader with fuse programming feature https://github.com/jicheng0622/All-in-One-Flash-Algorithm-for-NXP-i.MXRT I hope this could help you! Diego Re: CLI based tool to handle OTP, eFuse to help with board bring-up Hi @diego_charles , In terms of NXP debug probes, I'm currently using NXP MCU-Link debug probe. I do not have an access to to other debug probes from NXP right now. Since we already had some Jlinks around, I thought about using them as they seem to be more feature rich (even though the MCU-Link does the job well). It's just there may come a time when we will need some features from Jlink and if we were already accustomed to using it, the whole experience would be much more pleasant and smoother. For the redundancy reasons, we will probably keep support for both for better safe than sorry reasons as well as due to the fact that MCU-Link probes are much cheaper than jlink ones. Please keep me posted about your finding. Maybe it'd be worth to add this document to knowledge database on the forum or via some blogpost? - Just an idea. Best regards, Michael Re: CLI based tool to handle OTP, eFuse to help with board bring-up Hi @mimlo  Thank you very much for your reply and interest.  Currently, we do not have such documentation, but I am checking internally about an example for read and write  using our Linkserver. So I want to get back to you, if we do not have anything I will let you know.  Btw, our MCU-Link Pro supports  Segger's  J-link  and NXP's linkserver. It just comes from factory with our Linkserver FW installed but you could manually update to Segger's J-link with some simple steps. Maybe getting this as well this debug probe could be handy for your developing experience of testing concepts.  Additionally, please feel free to explore the SPT GUI, you can create another detailed post if you have questions or comments for the SPT.  I hope this could help you.  Diego Re: CLI based tool to handle OTP, eFuse to help with board bring-up Hi @diego_charles, The idea with custom SCP script seems like a way to go for me, at least for now. I will probably investigate other methods (like the provisioning tool you mentioned) as well to just see how it can handle things. Since I will be using jlink in a matter of weeks (replacing nxp debug probe), I guess the same thing can be done there but using .jlink files, which are equivalent in terms of purpose (but may differ in terms of offered functionality). Could you be so kind and point me to some SCP script file documentation/manual? I failed to find any documentation on that topic. I guess it should exists somewhere right? Re: CLI based tool to handle OTP, eFuse to help with board bring-up Hi @mimlo  I am sorry for the delayed response! I do not see, at this moment, other way to write and read fuses than the two ones you are describing. What is the best alternative for you? Are you willing to use SWD or UART/USB instead? Asking this to determine the best way to help you.  For example you could run an script to read fuses using MCU-Link.  For example adding this to the scp. We have tested this for the RT1020 .scp 450 REM ====== READ UUID ====== 460 r% = Peek32 this 0x401F4410 470 PRINT "UUID0 : "; ~r% 480 r% = Peek32 this 0x401F4420 490 PRINT "UUID1 : "; ~r% 500 REM ======================== You could use our MCUxpresso Secure Provisioning tool ( SPT) to read manually and program fuses. This involves using UART/USB alternative.  The tool also lets you to use an automated way for production with is called manufacturing tool.  Of course you could create your own scripts for your method and use low level SPSDK APIs, which are invoked by the SPT tool CLI.  If I can help you further please let me know. What makes this reply to be general is that I do not know the fuses you want to check and write. Maybe there could be a better alternative for you or a different path. For example, if you enable HAB or secure JTAG.  If you think this information is way to sensitive, we could create an support ticket and discuss there.  Diego
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I have a problem about the Sleep wake up of MM9ZJ638 Hello, big guys, I have a problem about the Sleep wake up of MM9ZJ638, which is mainly related to the Sleep of can module. I found through the manual that CAN Sleep module CAN automatically enter the sleep mode after writing SLPRQ bit of CANCTL0 and waiting for CAN module to check the completion of sending and receiving. The SLPAK bit of CANCTL1 CAN be confirmed by reading the SLPAK bit of CANCTL1. In the test, I found that when my control board was in Busoff state, after setting the SLPRQ bit of CANCTL0, the SLPAK bit of CANCTL1 of CAN module was always in 0 state and was not updated to sleep state. What register configuration should I check to ensure that I CAN sleep in Busoff state? Please help me, thank you! Re: I have a problem about the Sleep wake up of MM9ZJ638 According to your idea, I solved the problem, thank you Re: I have a problem about the Sleep wake up of MM9ZJ638 Hi, The MM9Z1_638 features three main operation modes: Normal operation, Stop mode, and Sleep mode. Sleep mode of CAN is different from sleep mode of the MCU. a device's DS mentions the MSCAN enters Sleep mode, when requested, after all scheduled TX MBs are empty.  You wrote you are in Bus Off state, which occurs during message transmission if error is detected. Thus the MCU does not set MB flag as message was not transmitted successfully. Most probably this prevents the module to acknowledge Sleep mode request. I can recommend to check TXEx flags in CANTFLG, if any is cleared, try to Abort message using respective bit in CANTAAK before Sleep request. Best regards, Ladislav
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S32K344 Flexio模拟SPI程序不能正常执行 S32DS版本3.5 RTD版本:S32K3_RTD_3_0_0_D2303 MCU:S32K344HVS BGA257封装 我需要使用Flexio模拟SPI驱动SD卡,参考了T-Box设计,与示例不同的是SPI传输我采用的是异步DMA方式。测试发现在SPI传输完毕之后,标志位正常置位,但是main函数中程序执行异常。 如下图所示,flag已经置1了,但是不能执行到92行,因此不能正常退出最内层while循环,导致程序卡死。不清楚问题出现的原因,希望有谁能帮帮我,谢谢! 附件是我的测试工程。 Re: S32K344 Flexio模拟SPI程序不能正常执行 确实是编译器的优化问题,你提供的方式可以解决,不过我在flag前加volatile也能解决这个问题,我个人认为这种方式可能更好,避免影响整个工程。 Re: S32K344 Flexio模拟SPI程序不能正常执行 Hi@ZDDL 这种状况你可以将工程编译的优先级设置一下,设置为-o0再试一下  
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MC9S12C64 Flash Burner Question MC9S12C64, CW V5.9.0, coding in assembler. I'm trying to write code to erase and burn one sector in Flash but I don't seem to be able to figure it out. I've spent hours studying the MC9S12C128V1 reference manual but there are things that just are not clear to me. I'll start with the basics as I understand them: RAM is from address $0400 to address $0FFF (3Kb). Unpaged Flash is from $4000 to $7FFF (16Kb). The Flash erase sector size is 1024 bytes (512 words) I have less than 1024 bytes of configurable constants in my program. They are placed in Flash but copied to RAM on start up to be used from RAM. I want to be able to change some of these values in RAM and burn them back into Flash without having to erase everything and reload the whole program. I have more than enough room in RAM for all my variables plus the copies of the configurable constants, so RAM size is not an issue. My entire program is not all that large so I can dedicate one sector in Flash to these configurable constants and still have lots of room in the unpaged Flash area for my program. Do the Flash sectors have specific addresses, or can they start and stop at any point within the unpaged Flash area? Could I place my configurable constants in Flash from $4000 to $4400 and start my program from $4500 just to be safe? Any suggestions would be greatly appreciated. Thanks, Robert Re: MC9S12C64 Flash Burner Question Hi Ladislav, I did some more experimenting with DP51`2-FLASH-EW-ASM-CW47 and was eventually able to get it to work with my MC9S12C64. Then I was able to get it to work with the small program I wrote to test the erase and burn routine. Now I am quite confident that I will be able to integrate it into my main program. I can't thank you enough for sending that zip file as well as your explanations. I doubt if I ever could have figured it out on my own Regards, Robert Re: MC9S12C64 Flash Burner Question Well, I'm not getting anywhere with this at all. I had no success with any of the code for the C32. I was able to load the C128-FLASH_ERW_4000-7FFF_+CW47 project into my controller. I changed the derivative to MC9S12C64 and it will run, but I have no idea what it's doing. I disassembled main.C and the assembler makes no sense to me either. Is there a code version of this in assembler so I can see if I can integrate it into my code? I am running with an 8mHz oscillator with a bus speed of 24mHz using the PLL. I do have the divider settings calculated correctly. Regards, Robert Re: MC9S12C64 Flash Burner Question Hi Ladislav, Thank you so much for that detailer response. CW is a very powerful program and I have only just touched on what it can do for debugging. I wasn't aware of the "disassemble" feature, or the refresh Flash either. I'll try those with your examples and see what happens. Now that you have confirmed that the erase sector size is 1024 bytes, it makes things much simpler for me. The default RAM from $0400 to $0FFF is more than adequate for my program variables. I can fit all of my configurable constants, (the ones copy I to RAM at start up so I can modify them in RAM  and burn back to Flash) into one sector. My program can easily fit into either of the near Flash blocks ($4000 to $7FFF or $C000 to $FFFF). I would like to place my program, including your example E/W code into $4000 to $7FFF and my configurable constants into $C000 to $FFFF. Does this sound right? Now, which of your example codes should I use? I don't think I could use the C32-FLASH E_R-ASM because of the 512 byte sector erase size.  I could probably use either C128-FLASH_ERW-4000-7FFF-CW47 or C128-FLASH_ERW_CW47 if I can get them disassembled successfully. What about DP512-FLASH_EW_ASM_CW47? I don't think I need that but could it be used for the 9S12XEP100? Many Thanks, Robert  Re: MC9S12C64 Flash Burner Question Hi, I am a little bit confused. The C in the examples is like flow chart in the form I provide it. Moreover, you can use disassemble function. Mouse right button click at C code. Plus you can compare Figure 19-26. Example Program Command Flow from the data sheet with code. Yu can also use simulator for these MCUs or just load my example int the MCU you have and step it. Important note....Do not visualize in memory window of debugger the flash address which is currently E/W. Why? Because BDM reads it and it is also reading while writing. For tests, it is better to read the written word back to some variable....or you can move memory window up and down. Next good note is to set for flash "refresh memory when halting" in the debugger select correct flash blocks...this is only example and match "refresh memory when halting" Of course it is suitable if you also think about critical section and execution part of the code out of the flash…already described. Few words about memory map. If memories overlap then following priority scheme is valid. (page 127) Highest -  BDM (internal to core) firmware or register space …..... Internal register space …..... RAM memory block …..... EEPROM memory block …..... On-chip FLASH or ROM Lowest - Remaining external space Default value of the RAMHAL bit (INITRM) is 1 so the 4k RAM is mapped to higher part of the RAM block. However, 4kRAM is mappable to 4k block so RAMHAL has no meaning in the case of this MCU. Moreover, INITRM[7..3] is set to 0b00001 the RAM is placed to the 4k block where address 0b00001000 00000000 or 0x0800 belongs. 0000-0FFF    1st 4k block of RAM mapping possibility 1000-1FFF      2nd 4k block of RAM mapping possibility 2000-2FFF    3rd 4k block of RAM mapping possibility 3000-3FFF    4th 4k block of RAM mapping possibility So, by default the RAM is mapped to the space 0000-FFFF which means 0000-0FFF    1st 4k block of RAM mapping possibility If the Registers are mapped 0000~03FF and RAM is mapped 0000~0FFF then addresses: - 0000~03FF – address the registers - 0400~FFFF – address the RAM (1 st kB is overlapped by Regs) Near flash - 4000~7FFF – non paged flash addressable also via paged "far" address 0x3E_(8000~BFFF) - C000~FFFF – non paged flash addressable also via paged "far" address 0x3F_(8000~BFFF) Far flash - 0x3C_(8000~BFFF) - paged flash - 0x3D_(8000~BFFF) - paged flash - 0x3E_(8000~BFFF) - paged flash addressable also via no page "near" address 4000-7FFF - 0x3F_(8000~BFFF) - paged flash addressable also via no page "near" address C000-FFFF If you use default mapping then you have smaller RAM. The flash… data sheet page 18… Memory options: — 64K, 96K, or 128Kbyte Flash EEPROM (erasable in 1024-byte sectors) The word which is written must be in erased status. Cumulative programming is not allowed. So, writing to erased word is not problem anytime, but if you want to rewrite byte you have to erase entire sector and write back what was erased together with modified word. Now it is up to your SW how often you will erase sectors and what approach you will develop because the flash has given number of erase cycles for sector. The examples always erase sector before it is written…just an example. Best regards, Ladislav Re: MC9S12C64 Flash Burner Question Hi Ladislav, Thanks so much for your reply. I am programming in assembler and am not fluent in C, so I find it very difficult to translate any code written in C to assembler. Having said that, I really appreciate the zip file you sent. I'll study that and see if I can make sense of it. Besides the MC9S12C64 reference manual I have a book called " The HCS12/9S12" by Huang. It covers a lot of subjects but his examples of erase/burn are not clear to me. Specific to  HC9S12C64, are the sector sizes 512 bytes (256 words) or are they 1024 bytes? Also, does the erase/burn routine do one byte, or one word at a time? Regards, Robert Re: MC9S12C64 Flash Burner Question Hi, One important note… It is not allowed to be flash block E/W while it is read…also reading instruction is included. Because of this, there are two approaches> 1) Routine in RAM See C code flash.h file in SW-C32-FLASH-E_W-FunctionsInRAM-v1_0-CW47 where the routine in asm is placed into RAM and it is done automatically as variable initialization process in start12.c file. I think dissasseble or principle is clear from the C code. Also DP512 (larger device) example does it in this way and I think it also considers critical section which disables interrupt, then waits for flash and finally returns CCR I-bit to the status before action. It is necessary to avoid flash access while EW and interrupt can also do it. #pragma DATA_SEG DEFAULT static UBYTE WaitForFlash[]={   0xC6, 0x80,                           // LDAB #$80      // command buffer empty = 0  0x7B, 0x01, 0x05,                     // STAB _FSTAT   0xC7,                                 // CLRB           // clear return value   0x1E, 0x01, 0x05, 0x20, 0x05,         // BRSET _FSTAT,#32,*+10  0x1F, 0x01, 0x05, 0x10, 0x03,         // BRCLR _FSTAT,#16,*+8  0xC6, 0x05,                           // LDAB  #5             ;ERR_NOTAVAIL  0x3D,                                 // RTS  0x1F, 0x01, 0x05, 0x40, 0xFB,         // BRCLR _FSTAT,#64,*+0  0x3D                                  // RTS }; Or in the example …  C32 - FLASH E_R_W - ASM -01 it is done to the special RAM space once and then called by JSR   $0800                               ; call flash routine in RAM 2) Routine on stack … requires repeating writing the routine from flash to stack before each EW. In the attached asm file it is done onto stack. (There is also very old answer from past related to the mentioned SW-C32-FLASH-E_W-FunctionsInRAM-v1_0-CW47) So it is up to you which way is more suitable for you. Best regards, Ladislav
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Hse_lp_AesEncAsynclrg_S32K344 example issue Hello, Using this example, Hse_lp_AesEncAsynclrg_S32K344, did not complete successfully and encountered a return value of 0xbb55bb55. What is the reason for this issue? Thanks! Re: Hse_lp_AesEncAsynclrg_S32K344 example issue a1: It is recommended to read Table 165. SBAF and HSE Firmware version compatibility for S32K344, S32K324, and S32K314 devices in RM758224-HSE-B Firmware Reference Manual - V2.4(2.4).pdf, which mentions: Sequence of steps to be followed to update to the latest version of SBAF and HSE FW This is related to the HSE FW and SBAF versions in your current chip. 0x4039C020 will display the current installed SBAF version. HSE_GetVersion_Example(&gHseFwVersion); in the S32K344_HSE_FW_INSTALL project will show you the current HSE FW version. b1: It is listed in Table 98.Secure flash memory configuration of S32K3XXRM. a2: Cannot be any other value. You must program UTEST HSE FW feature usage flag value 0xAABBCCDDDDCCBBAA to address 0x1B000000. b2: I suggest you read AN744810-HSE FW install for S32K3xx(1.0) Rev. 1, 06 2021.pdf(please download it from secure file) c2: Refer to the answer in a1 Re: Hse_lp_AesEncAsynclrg_S32K344 example issue Hi @Robin_Shen , Thank you for your support! Regarding your questions about FW INSTALL and SBAF UPDATE demo: In the S32K344_SBAF_UPDATE example, the function sbafUpdateExample() returns a failure for srvResponse.   a. Is this a normal occurrence? If it is, how can I determine if the SBAF firmware updated        successfully?   b. Where exactly does the SBAF firmware reside in the flash memory address range?   please refer  to attachment. In the S32K344_HSE_FW_INSTALL example, as per the readme file, a reset is required after the first run. My specific queries are:   a. Does the UTEST flag 0xAABBCCDDDDCCBBAA hold any specific significance or can it be changed to another value?   b. After the HSE firmware undergoes a power-on reset, which flash memory address range did it get copied to? Was this done by sbaf?   c. What is the relationship between S32K344_HSE_FW_INSTALL and S32K344_SBAF_UPDATE? Are there any specific steps or order to follow? Additionally, I have successfully run the Hse_lp_AesEncAsynclrg_S32K344 example. Re: Hse_lp_AesEncAsynclrg_S32K344 example issue After installing HSE_FW_S32K344_0_2_40_0.exe and SBAF_S32K344_0_0_15_0.exe. You also need to install HSE FW for S32K344 and update SBAF. S32K344_HSE_FW_INSTALL project shows an option how to install HSE FW. Please read the description: C:\NXP\S32K3_HSE_DemoExamples_1_0_0\S32K3_HSE_DemoExamples\Device_Configuration\S32K344_HSE_FW_INSTALL\Readme.md S32K344_SBAF_UPDATE project shows an option how to update the SBAF. Please read the description: C:\NXP\S32K3_HSE_DemoExamples_1_0_0\S32K3_HSE_DemoExamples\Device_Configuration\S32K344_SBAF_UPDATE\Readme.md Those project can be found after installing S32K3 MCUs for General Purpose HSE Demo Examples(S32K3_HSE_DemoExamples). Re: Hse_lp_AesEncAsynclrg_S32K344 example issue Hi @Robin_Shen , After adding the header files from the interface directory to the INCLUDES path, the compilation has now passed. Additionally, I have installed SBAF_S32K344_0_0_15_0 and HSE_FW_S32K344_0_2_40_0, with their paths set to C:\NXP\SBAF_S32K344_0_0_15_0 and C:\NXP\HSE_FW_S32K344_0_2_40_0, respectively. However, after running the program, it still returns 0xbb55bb55. Could you please advise if there are any missing configurations? Re: Hse_lp_AesEncAsynclrg_S32K344 example issue Note that the 5 folders mentioned during import must be imported once. Re: Hse_lp_AesEncAsynclrg_S32K344 example issue Hi @Robin_Shen , Thank you for your support! I have integrated the HSE files, but the compilation still fails. Please refer to the attachment. Thanks!     Re: Hse_lp_AesEncAsynclrg_S32K344 example issue Hi Have you installed HSE FW before testing Hse_Ip_AesEncAsyncIrq_S32K344? The following is the version installed in my S32K344: HSE FW:  0.2.40.0 S32K344 HSE FW 0.2.40.0 SR Release_RTD400 SBAF:      0.15.0 S32K344 SBAF 0.15.0 RTM Release According to the 3.2 Compiling the application prompt of Hse_Ip_AesEncAsyncIrq_S32K344 description.txt, I imported the header file of the corresponding version, for example: C:\NXP\HSE_FW_S32K344_0_2_40_0\hse_ab_swap\interface Afterwards, when debugging, HseResponse = App_GetHseAttrCapabilities(MU0_INSTANCE_U8, &Hse_AttrCapabilities); the returned value is 0x55a5aa33, which means HSE_SRV_RSP_OK Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: Hse_lp_AesEncAsynclrg_S32K344 example issue update error screenshot.
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我对 MM9ZJ638 的睡眠唤醒功能有疑问 各位大佬好,我遇到一个关于MM9ZJ638的Sleep唤醒的问题,主要跟can模块的Sleep有关。通过手册发现,CAN Sleep模块在写入CANCTL0的SLPRQ位并等待CAN模块检查发送和接收完成之后,可以自动进入睡眠模式。可以通过读取 CANCTL1 的 SLPAK 位来确认 CANCTL1 的 SLPAK 位。在测试中发现我的控制板在Busoff状态时,设置CANCTL0的SLPRQ位后,CAN模块的CANCTL1的SLPAK位一直处于0状态,并没有更新到睡眠状态。我应该检查哪些寄存器配置以确保我可以在 Busoff 状态下睡眠?请帮帮我,谢谢! 回复:我有一个关于 MM9ZJ638 睡眠唤醒的问题 按照你的想法,我解决了问题,谢谢
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如何将 MM9Z1I638 设置为安全模式,我需要帮助,谢谢 我对使用MM9Z1I638打开安全模式有疑问。看了手册,知道了FSEC寄存器是用来打开安全模式的,但是这个寄存器好像不支持直接写,需要通过FLASH编程来写入。写入的地址段为P_FLASH块的0xFF_FE0F字节,支持的最小扇区大小 P_FLASH为512字节。我按照擦除扇区、校验扇区、写入扇区的流程写入字节,但是发现每次擦除扇区之后软件都会运行到非法的地方。检查后发现,这个扇区存储的所有信息都是地址 电池传感器 Re: HOW CAN set MM9Z1I638 to safe mode ,i need help,THANKS 这个是一个流程我建议您看下面的帖子: I have a question about using MM9Z1I638 to open the safe mode - NXP Community Re: HOW CAN set MM9Z1I638 to safe mode ,i need help,THANKS 我看了6.14.5里面的安全字节描述,上面写的是在下一次复位以后,会使用0xFF_FE0F地址的值来初始化FSEC寄存器,我现在的问题是如何对0XFF_FE0F这个地址写入值,我之前用上面描述的方法进行扇区擦除后,值通过单步调试的方法能检测到0XFF_FE0F地址的值进行了更改,但是随后运行,通过调试器的数据分析,软件就跳转到了非法的位置,所以我想问问正常的编写这个地址的流程是怎么样的,谢谢 Re: HOW CAN set MM9Z1I638 to safe mode ,i need help,THANKS Hi SHAOWEN 您说的是security吧? 如果是的话请仔细阅读datasheet page 403:6.14.5 Security,里面有详细的介绍
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IMX8QXP jpeg decoder Hi, We are experiencing an issue with the JPEG encoder on our IMX8QXP (var-som) system. We are using Yocto Scarthgap and require the encoder to convert JPEG images to raw NV12 or BGR24 formats. Currently, we are only receiving YUV444 (YUV3) output. Previously, with Yocto Sumo, we were able to obtain NV12 output successfully. The mxc-jpeg device driver appears to support multiple output formats, including BGR24, NV12, and NV12M. Furthermore, the command #v4l2-ctl --list-formats-ext -d /dev/video2 lists 13 compatible output types. We would appreciate assistance in understanding the specific requirements necessary to achieve NV12 or BGR24 output from the driver. A simplified version of our C code is attached for your reference. Sincerely, //Saber Re: IMX8QXP jpeg decoder "8QXP JPEG decoder only support such case of RGB format, for example if the input jpeg is encoding use RGB color space, then JPEG decoder output is RGB fmt; But if input jpeg is encoding use YUV color space, then output still is YUV fmt.If customer must use input YUV JPEG , but output need RGB fmt, suggest customer use hardware video convert, such as imxvideoconvert, other than software video convert." Re: IMX8QXP jpeg decoder Hi, Would you please try RGB or BGR? Regards, Saber Re: IMX8QXP jpeg decoder couldn't reproduce this on nxp board with official bsp I didnot reproduce any issue, below is cmd for make v4l2jpegdec plugin output fmt is NV12. root@imx8qxpc0mek:~# cat /proc/version Linux version 6.6.23-lts-next-06236-gb586a521770e (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 13.2.0, GNU ld (GNU Binutils) 2.42.0.20240216) #1 SMP PREEMPT Fri Jun 7 13:15:57 UTC 2024 root@imx8qxpc0mek:~# gst-launch-1.0 filesrc location=/root/thumbnail_image004.jpg ! jpegparse ! v4l2jpegdec ! "video/x-raw,format=NV12" ! filesink location=dmp.nv12 Setting pipeline to PAUSED ... ====== V4L2DEC: 1.24.0 build on May 6 2024 08:51:28. ====== Pipeline is PREROLLING ... Pipeline is PREROLLED ... Setting pipeline to PLAYING ... Redistribute latency... New clock: GstSystemClock Got EOS from element "pipeline0". Execution ended after 0:00:00.007471000 Setting pipeline to NULL ... Freeing pipeline . Re: IMX8QXP jpeg decoder My main question is, how do we get RGB (or BGR) out of decoder! Re: IMX8QXP jpeg decoder Yes, you are correct. Our product has Sumo right now and it can convert JPEG to NV12. However, with Scarthgap (kernel 6.6.23) the only output we get is YUV444, despite of whatever we configure the decoder. I have attached two images we are using for test.  Re: IMX8QXP jpeg decoder what format of your jpg source is? do you mean you can output nv12 on Yocto Sumo using the same command, right? if yes pls send your jpg file to me, and I checked the source code, it seems can support different format as output linux-imx/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c at lf-6.6.y · nxp-imx/linux-imx Re: IMX8QXP jpeg decoder Hi, Thanks for your replay. I have attached the output from gstreamer. I used the command below, as you can see in the logs, gstreamer uses HW JPEG coder to convert the input image to V308 (YUV444) and then converts YUV444 to RGB using software. # GST_DEBUG=3 gst-launch-1.0 -v filesrc location=/ANPR/DPRGremlin1080p.jpg ! jpegparse ! v4l2jpegdec capture-io-mode=dmabuf ! videoconvert ! video/x-raw,format=RGB ! filesink location=output.rgb I have also used the example code from https://github.com/nxp-imx/imx-test/tree/lf-6.6.23_2.0.0/test/mxc_jpeg_test It seems like, when we want to use ioctl and VIDIOC_STREAMON, then the output format changes to YUV444. Re: IMX8QXP jpeg decoder did you test the gstreamer with jpeg encoder on the imx8qxp? do you have any log or print information to share?
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Unsecure for mc9s12xd64? Hello, I'm trying to write the mc9s12xd64 with the PEMicro USB Multilink Rev.D and CodeWarrior 5.1. When I try to unsecure the micro, the program shows me this message. "Derivative could NOT be unsecured!!!! The Unsecure command file might be missing or disabled. Make sure the command file defined in the Unsecure panel of the Command File dialog contains the correct commands to unsecure the current connected derivative and the board oscillator frequency." I also use CodeWarrior 5.2 for other micros and this haven't happened in version 5.2. Could you help me? Do I need a driver or a package for this? Thank you for the help.  Re: Unsecure for mc9s12xd64? HI JesusCordoba, If your problem is because of unsecure, you have to do the following: once the Hi-Wave is open, click on "P&E Multilink/Cyclone Pro" and then click on the "Unsecure" option. This will execute the command file designed to unsecure the microcontroller. All the flash of the device will be erased and the security byte will be set to the Unsecure status (1:0 in the security bits). If this does not work, I suggest you checking P&E tools. Click on the support link and then Downloads and Documentation. Select “Utility” as the Download Type and HC(S)12 as the Product Family. On the available downloads( http://www.pemicro.com/support/download_processor.cfm ) look for the Unsecure12 Utility, download it and install it. This software will allow you to unsecure the S12 derivatives we have. Hope this helps, Jun Zhang
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请问GUI-Guider自带的Meter控件的刻度数字颜色是否单独可调? 请问GUI-Guider自带的Meter控件的刻度数字颜色是否单独可调?我把表盘的背景改为白色,刻度改为红色,但刻度的数字颜色无法改变。这种情况下无法显示刻度数字。
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MM9ZJ638のスリープウェイクアップについて問題があります こんにちは、大物、私は主に缶モジュールのスリープに関連するMM9ZJ638のスリープウェイクアップについて問題があります。マニュアルを通じて、CAN Sleepモジュールは、SLPRQビットのCANCTL0を書き込んでCANモジュールが送受信の完了を確認するのを待った後、自動的にスリープモードに入ることができることがわかりました。CANCTL1のSLPAKビットは、CANCTL1のSLPAKビットを読み取ることで確認できます。テストでは、コントロールボードがBusoff状態のとき、SLPRQビットのCANCTL0を設定した後、CANモジュールのSLPAKビットのCANCTL1が常に0状態になり、スリープ状態に更新されないことがわかりました。Busoff 状態でスリープできることを確認するには、どのレジスタ コンフィギュレーションを確認する必要がありますか。私を助けてください、ありがとう! Re:MM9ZJ638の睡眠の目覚めについて問題があります あなたの考えによると、私は問題を解決しました、ありがとう
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コード内のエラーまたはある種の非互換性? HvBms400_775_722_TPL_Bring_Upの例を開くときにエラーが表示されました。 Automotive Package Managerバージョン2024.01がダウンロードされ、開発パッケージがダウンロードされ、そこにあるはずのものすべてがそこにありました。
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Error : undefined identifier 'class' I'm starting a new project in CodeWarrior IDE version 5.7.0 Build 2264. I keep getting this message upon trying to build with make. It doesn't recognize my c++ code. How do I resolve this? Re: Error : undefined identifier 'class' I discovered that my license is supposed to give me all the c++ features and that my license needed to be upgraded. I consider this issue to be resolved and closed. Thank you for replying. Re: Error : undefined identifier 'class' I discovered that my problem is that my license is supposed to give me all the c++ features and my license needed to be upgraded. Thank you for replying. I consider this issue resolved and closed. Re: Error : undefined identifier 'class' Hi ShannonMt  What's your chip part number? Jun Zhang
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