MCUXpresso Config Tools Knowledge Base

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MCUXpresso Config Tools Knowledge Base

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The new NXP Pins tool which has been showcased at FTF 2016 in Austin is now available as Web and Desktop application. The Kinetis Expert Pins Tool makes configuring, muxing and routing of pins very easy and fast. It provides real-time feedback of conflicts and provides an intuitive graphical interface with several views. The tool generates Kinetis SDK V2.0 compatible sources files which can be directly integrated into C/C++ applications. The Pins tool is available both as Web application (no installation needed) and as a Desktop application for Linux, Mac and Windows.     You can use the Web version from Welcome to Kinetis Expert | Kinetis Expert.   It is available for download as Desktop version from Software Development Kit for Kinetis MCUs|NXP (Windows, Mac OS X and Linux 64bit) under the 'Software' category: There are two different installer types: 'offline' is a 130 MByte download. This method is recommended for slower internet connections or for installation on multiple machines. 'online' is a small 500 KByte download, all the other installation data will be loaded from the internet during installation. Mac OS X and Linux installers are 64bit. For Windows there are both 32bit and 64bit installers available.   Documenation is availble on Software Development Kit for Kinetis MCUs|NXP in the documenation download section, as well attached to this article (Getting Started is available in Chinese): An overview and tutorial can be found here: https://mcuoneclipse.com/2016/06/08/tutorial-muxing-with-the-new-nxp-pins-tool/   We hope you find this tool useful!
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This video provides an instruction to the NXP Pins tool (see New Kinetis Expert Pins Tool V1.0 Available!). It demonstrates how to use the tool and how to configure pins with the example of the FRDM-K64F Board.   Enjoy 🙂
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The MCUXpresso Config Tools is installed without the data for MCUs and boards, and the data are download on demand via internet. So this article describes how to use MCUXpresso Config Tools with offline Computer. There are two methods: - Copy and paste the data on computer; - Connect the internet when first using. About the detail steps, please have a look at attachment . Thanks for the suggestion from Petr Hradsky . Alice Yang
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The following article describes how the data files of the Pins Tool can be downloaded either for offline usage or processed further, for example in an automated build system or how to use it on a machine without network connection: https://mcuoneclipse.com/2016/07/29/nxp-pins-tool-understanding-data-for-offline-usage/   I hope you find this useful, Erich
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This community and forum is for the growing set of Kinetis Expert System Conguration Tools. The tools are acessible online on Welcome to Kinetis Expert | Kinetis Expert and include right now the 'Build an SDK' and 'Power Estimation' tools: So if you have any questions or need any further advice and information about the Kinetis Expert System Configuration Tools, this is the community for it!
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This post will include a history of releases for the MCUXpresso Config Tools.    Most Recent Release: MCUXpresso Config Tools v11 - Released on January 17, 2022   Download Links: MCUXpresso IDE with integrated Config Tools Standalone MCUXpresso Config Tool   Standalone MCUXpresso Config Tool vs MCUXpresso IDE integrated version The functionality of the MCUXpresso Config Tools is integrated directly within the MCUXpresso IDE as tool perspectives (Pins, Clock, Peripheral, etc).  The configuration tools/perspective will provide a seamless way to configure and modify projects developed within MCUXpresso IDE.  The MCUXpresso Config Tools are also provided as a standalone installation for use with other IDEs (IAR and Keil).  Additionally these tools can be used without an IDE for generating configuration files and generated source file for use without an IDE.   Receive email notification for new releases: If you would like to receive email notifications when a new version of the MCUXpresso Config Tools is released, consider adding an "Email Watch" to this post.   Previous Release History: MCUXpresso Config Tools v10 - Released on July 15, 2021 MCUXpresso Config Tools v9 - Released on January 15, 2021 MCUXpresso Config Tools v8 - Released on July 21, 2020 MCUXpresso Config Tools v7 - Released on Dec 19, 2019  MCUXpresso Config Tools v6 - Released on June 13, 2019 MCUXpresso Config Tools v5 - Released on January 10, 2019
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This tip will show you how to use MCUXpresso Config Tools V4.1 generate codes for KV5x with 50MHz external reference clock. The fec_extal in datasheet shows that the maximum frequency of Input clock frequency (external clock mode) is 48MHz. It will lead code generation failed when you configure 50MHz as the external reference clock in latest MCUXpresso Config Tools V4.1. (Code generation in case of warnings shouldn't be blocked. It will be fixed for MCUXpresso Config Tools V5.) Some customer had met this issue when using TWR-KV58F220M board, this board connect a 50MHz_OSC to EXTAL0. My colleague have prepared a hot fix for this issue (for all MKV5x MCUs). After install the attached hot_fix_MCUXpresso_Config_Tools_V4_1_data_MKV58_MCUCM-3936, customer is able to overcome it.(Notice: The ProgramData folder was hidden by default.)
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A new version of the Kinetis Expert Configuration Tools has been released and is available both online (Welcome to Kinetis Expert | Kinetis Expert ) or for download as desktop tool (Software Development Kit for Kinetis MCUs|NXP ).   The set of the tools has a new member: the Clocks Tool: Simple UI for clock parameter viewing and modification Graphical view for easy navigation and visualization of settings and frequencies Generate configuration code using KSDK v2 Inspect and modify clock configuration from clock input source up to the core/peripherals Validate clock settings and calculate the resulting output clock frequencies Determines suitable clock settings for given output requirements Integrated with the Pins Tool   Main features of Pins Tool and Clocks Tool: Available as Web and Desktop application Kinetis SDK v2 support Multicore support Localized for English and Simplified Chinese Mostly Connected: On-Demand device data download Integrates with any compiler and IDE Generation of documented C code which is C++ aware   What's New Added Clocks Tool Added Support for boards, kits and templates Added Labels and Identifier support Added Log and Problems View Export downloaded data to copy or share device information data Bug fixes and improved documentation The release notes of the desktop application are attached to this article.   Clocks Tool The new member of the suite of configuration tools is the Clocks Tool.  Use the Tools menu to select and switch between the tools:   The Clocks Tool provides graphical views for configuration and navigation in the clocks of the hardware:   Templates, Kits, Boards and Processors When creating a new configuration, it offers Templates, Kits, Boards and Processors. Custom configurations can be stored as templates and then used for new configurations.   Board Specific Functions With the provided board and kit configurations, there are now pre-configured initialization functions for major blocks on the board:   Labels and Identifiers In the Pins Tool there are two new columns: Label and Identifier: The Label is a user name/string to identify or describe the pin. The Identifier is a user C/C++ identifier which is added to the generated source code to be used by the application.   Export Data To simplify downloading the device specific data for the desktop tool, the 'Export' function can be used to download and export the data. The data can be copied that way to another machine or all data for a set of devices can be loaded.     The device support for the clocks tool is staged, so initially not all SDK V2 devices are included. As of Oct 14, the the following Kinetis SDK V2 R1 devices are supported by the Clocks Tool: MK21FN1M0AVLQ12 MK21FN1M0AVMC12 MK21FN1M0AVMD12 MK21FN1M0VLQ12 MK21FN1M0VMC12 MK21FN1M0VMD12 MK21FX512AVLQ12 MK21FX512AVMC12 MK21FX512AVMD12 MK21FX512VLQ12 MK21FX512VMC12 MK21FX512VMD12 MK22FN128CAH12 MK22FN128VDC10 MK22FN128VLH10 MK22FN128VLL10 MK22FN128VMP10 MK22FN1M0AVLH12 MK22FN1M0AVLK12 MK22FN1M0AVLL12 MK22FN1M0AVLQ12 MK22FN1M0AVMC12 MK22FN1M0AVMD12 MK22FN1M0VLH12 MK22FN1M0VLK12 MK22FN1M0VLL12 MK22FN1M0VLQ12 MK22FN1M0VMC12 MK22FN1M0VMD12 MK22FN256CAH12 MK22FN256VDC12 MK22FN256VLH12 MK22FN256VLL12 MK22FN256VMP12 MK22FN512CAP12 MK22FN512VDC12 MK22FN512VLH12 MK22FN512VLL12 MK22FN512VMP12 MK22FX512AVLH12 MK22FX512AVLK12 MK22FX512AVLL12 MK22FX512AVLQ12 MK22FX512AVMC12 MK22FX512AVMD12 MK22FX512VLH12 MK22FX512VLK12 MK22FX512VLL12 MK22FX512VLQ12 MK22FX512VMC12 MK22FX512VMD12 MK24FN1M0VDC12 MK24FN1M0VLL12 MK24FN1M0VLQ12 MK26FN2M0CAC18 MK26FN2M0VLQ18 MK26FN2M0VMD18 MK26FN2M0VMI18 MK63FN1M0VLQ12 MK63FN1M0VMD12 MK64FN1M0VDC12 MK64FN1M0VLL12 MK64FN1M0VLQ12 MK64FN1M0VMD12 MK64FX512VDC12 MK64FX512VLL12 MK64FX512VLQ12 MK64FX512VMD12 MK65FN2M0CAC18 MK65FN2M0VMI18 MK65FX1M0CAC18 MK65FX1M0VMI18 MK66FN2M0VLQ18 MK66FN2M0VMD18 MK66FX1M0VLQ18 MK66FX1M0VMD18 MK80FN256CAx15 MK80FN256VDC15 MK80FN256VLL15 MK80FN256VLQ15 MK81FN256CAx15 MK81FN256VDC15 MK81FN256VLL15 MK81FN256VLQ15 MK82FN256CAx15 MK82FN256VDC15 MK82FN256VLL15 MK82FN256VLQ15 MKL13Z32VFM4 MKL13Z32VFT4 MKL13Z32VLH4 MKL13Z32VLK4 MKL13Z32VMP4 MKL13Z64VFM4 MKL13Z64VFT4 MKL13Z64VLH4 MKL13Z64VLK4 MKL13Z64VMP4 MKL17Z128VFM4 MKL17Z128VFT4 MKL17Z128VLH4 MKL17Z128VMP4 MKL17Z256VFM4 MKL17Z256VFT4 MKL17Z256VLH4 MKL17Z256VMP4 MKL17Z32VDA4 MKL17Z32VFM4 MKL17Z32VFT4 MKL17Z32VLH4 MKL17Z32VMP4 MKL17Z64VDA4 MKL17Z64VFM4 MKL17Z64VFT4 MKL17Z64VLH4 MKL17Z64VMP4 MKL27Z128VFM4 MKL27Z128VFT4 MKL27Z128VLH4 MKL27Z128VMP4 MKL27Z256VFM4 MKL27Z256VFT4 MKL27Z256VLH4 MKL27Z256VMP4 MKL27Z32VDA4 MKL27Z32VFM4 MKL27Z32VFT4 MKL27Z32VLH4 MKL27Z32VMP4 MKL27Z64VDA4 MKL27Z64VFM4 MKL27Z64VFT4 MKL27Z64VLH4 MKL27Z64VMP4 MKL33Z128VLH4 MKL33Z128VMP4 MKL33Z256VLH4 MKL33Z256VMP4 MKL33Z32VFT4 MKL33Z32VLH4 MKL33Z32VLK4 MKL33Z32VMP4 MKL33Z64VFT4 MKL33Z64VLH4 MKL33Z64VLK4 MKL33Z64VMP4 MKL43Z128VLH4 MKL43Z128VMP4 MKL43Z256VLH4 MKL43Z256VMP4 MKS22FN256VLL12 MKS22FN256VLH12 MKS22FN128VLL12 MKS22FN128VLH12   In November, the following SDK V2.0 R2 and R3 devices will be available in the Clocks Tool: MKL14Z32VFM4 MKL14Z32VFT4 MKL14Z32VLH4 MKL14Z32VLK4 MKL14Z64VFM4 MKL14Z64VFT4 MKL14Z64VLH4 MKL14Z64VLK4 MKL15Z128CAD4 MKL15Z128VFM4 MKL15Z128VFT4 MKL15Z128VLH4 MKL15Z128VLK4 MKL15Z32VFM4 MKL15Z32VFT4 MKL15Z32VLH4 MKL15Z32VLK4 MKL15Z64VFM4 MKL15Z64VFT4 MKL15Z64VLH4 MKL15Z64VLK4 MKL24Z32VFM4 MKL24Z32VFT4 MKL24Z32VLH4 MKL24Z32VLK4 MKL24Z64VFM4 MKL24Z64VFT4 MKL24Z64VLH4 MKL24Z64VLK4 MKL25Z128VFM4 MKL25Z128VFT4 MKL25Z128VLH4 MKL25Z128VLK4 MKL25Z32VFM4 MKL25Z32VFT4 MKL25Z32VLH4 MKL25Z32VLK4 MKL25Z64VFM4 MKL25Z64VFT4 MKL25Z64VLH4 MKL25Z64VLK4   MKW21D256VHA5 MKW21D512VHA5 MKW22D512VHA5 MKW24D512VHA5   In December, the SDK 2.0 R4 devices will be supported by the Clocks Tool: MKV10Z16VFM7 MKV10Z16VLC7 MKV10Z16VLF7 MKV10Z32VFM7 MKV10Z32VLC7 MKV10Z32VLF7 MKV10Z128VFM7 MKV10Z128VLC7 MKV10Z128VLF7   MKV10Z128VLH7   MKV10Z64VFM7 MKV10Z64VLC7 MKV10Z64VLF7   MKV10Z64VLH7 MKV11Z128VFM7 MKV11Z128VLC7 MKV11Z128VLF7   MKV11Z128VLH7   MKV11Z64VFM7 MKV11Z64VLC7 MKV11Z64VLF7   MKV11Z64VLH7   MKV30F128VFM10 MKV30F128VLF10 MKV30F128VLH10 MKV30F64VFM10 MKV30F64VLF10 MKV30F64VLH10 MKV46F256VLL16 MKV46F256VLH16 MKV46F128VLL16 MKV46F128VLH16 MKV44F256VLL16 MKV44F256VLH16 MKV44F128VLL16 MKV44F128VLH16 MKV44F64VLH16 MKV42F256VLL16 MKV42F256VLH16 MKV42F128VLL16 MKV42F128VLH16 MKV42F64VLH16 MKV44F128VLF16 MKV44F64VLF16 MKV42F128VLF16 MKV42F64VLF16 MKV58F1M0VMD24 MKV58F512VMD24 MKV58F1M0VLQ24 MKV58F512VLQ24 MKV58F1M0VLL24 MKV58F512VLL24 MKV56F1M0VMD24 MKV56F512VMD24 MKV56F1M0VLQ24 MKV56F512VLQ24 MKV56F1M0VLL24 MKV56F512VLL24 MKV31F128VLH10 MKV31F128VLL10 MKV31F256VLH12 MKV31F256VLL12 MKV31F512VLH12 MKV31F512VLL12   We hope you will find this new release useful.   Thanks for designing with NXP!
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We are pleased to announce that MCUXpresso Config Tools v16.0 are now available. Downloads It’s a part of MCUXpresso IDE https://www.nxp.com/mcuxpresso/ide/download In order to use it with other toolchains, download the installer for all platforms, please login to our download site via:  https://www.nxp.com/mcuxpresso/config Please refer to MCUXpresso Config Tools documentation for installation and quick start guides. For online version, login into MCUXpresso site: MCUXpresso WEB Release Notes Full details on the release (features, known issues...) The product is based on Eclipse 2023-12 - A new command-line argument ( -UpdateCode) has been added. It performs the same action as the Update Code button in the user interface. It must be used with -HeadlessTool. - The command-line argument -CreateFromProject is improved, it no longer requires the -HeadlessTool argument and opens the toolchain project in the UI. - The command-line arguments -CreateFromProject and -ImportProject are improved. They no longer allow setting the toolchain project file path (for example, *.cbuild-gen-idx.yml, *.uvprojx, *.ewp, CMakeLists.txt) directly. TEE – The query for pins labels and routed signals is updated to work on the new NPI. – Global tool options now support enum, boolean, and string with the ability to define the regex validator. – Access templates are now greyed out when the global ones are used. – The legacy source names option is disabled when ROM output is selected. – MPU tabs are now sorted by top domain index and then alphabetically. – The correct representation of TRDC domains is implemented by removing mix domains. – Peripheral areas are now correctly stored within the correct tab. – The side-channel attack warning is added to the RAM security settings. – The Trigger tab for configuration of the ITRC register RW fields is added. PLU – Minor bug fixes Peripherals – Support for unique identification of configuration components is finished. – Support for settings with indentation, but no label content is added. Pins – Simultaneous routing detection (routing of one signal may result in multiple signals being routed based on the same register settings) is added. In that case, such signals are offered to be added into the configuration. – Support of internal pins that are not available on the package is added. Clocks – Creation of the clock model has been accelerated. Open-CMSIS generator – The open-CMSIS solution is supported as a new toolchain. – The generation of the .cgen.yml file is supported. – The generation of new source files inside the project output folder is supported. – The location of the MEX file inside the project output folder is supported.
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We are pleased to announce that MCUXpresso Config Tools v15.1 are now available. Downloads It’s a part of MCUXpresso IDE https://www.nxp.com/mcuxpresso/ide/download In order to use it with other toolchains, download the installer for all platforms, please login to our download site via:  https://www.nxp.com/mcuxpresso/config Please refer to MCUXpresso Config Tools documentation for installation and quick start guides. For online version, login into MCUXpresso site: MCUXpresso WEB Release Notes Full details on the release (features, known issues...) Config Tools v15.1 • On MacOS aarch64, the missing Overview is fixed. • TEE – Pin tables now only contain items for specific configuration (mask/security/interrupts).   Community MCUXpresso Config Tools      
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We are pleased to announce that MCUXpresso Config Tools v15.0 are now available. Downloads It’s a part of MCUXpresso IDE https://www.nxp.com/mcuxpresso/ide/download In order to use it with other toolchains, download the installer for all platforms, please login to our download site via:  https://www.nxp.com/mcuxpresso/config Please refer to MCUXpresso Config Tools documentation for installation and quick start guides. For online version, login into MCUXpresso site: MCUXpresso WEB Release Notes Full details on the release (features, known issues...) Config Tools v15.0 • The product is based on Eclipse 2023-06. • Support for SDK 2.15 in the Project cloner and Detect toolchain project is added. TEE – Setting a security level for a special three-state model is improved. – Validation for the uniqueness of DID, match and mask input for XRDC2 is added. – Default global access templates are now created if needed by checkers and missing within MEX. PLU – An error is now reported when a Verilog code contains a signal that was not declared. – A capability to select one input for some logic gates for which it does not make sense is removed. – A button to erase the whole diagram is added. – Support to keep intermediate files generated by an external program for debugging purposes is added. – The behavior of selecting the LUT type Custom to keep the previous logic table and added buttons to set it to zeros or ones is changed. – The status bar to the schematic view is added. Peripherals – A bug with the documentation view in a version integrated to the MCUXpresso IDE is fixed. – The mechanism that handles opening views that were opened in the previous session to work with identification of the configuration instead of its location on disk is updated. – A new optional experimental loading mechanism for components is prepared. This mechanism will be used by default in the next release. Pins – Validation to ensure that elements can be configured by the selected core is added.– Rows are sorted in the Peripheral Signals routing dialog. – The connected pins column in External User Signals always shows the pin's full name. – The missing scroll bar in the External User Signals view is fixed.   Clocks – Support for multicore code generation is added. – Global configuration elements now support tree structure and can be categorized. – Fractional PLL now supports a custom range and negative numerator. – Scrolling in the clock diagram by pressing the mouse wheel (drag and drop) is supported.   DCD – An issue with the code generation that stopped working after drag and drop of a group is fixed.   MCUXpresso IDE integration – Support for multiple MEX files within one project (toolbar Project combo + autoload MEX on IDE startup) is improved.   Community MCUXpresso Config Tools  
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We are pleased to announce that MCUXpresso Config Tools v14.0 are now available. Downloads It’s a part of MCUXpresso IDE https://www.nxp.com/mcuxpresso/ide/download In order to use it with other toolchains, download the installer for all platforms, please login to our download site via:  https://www.nxp.com/mcuxpresso/config Please refer to MCUXpresso Config Tools documentation for installation and quick start guides. For online version, login into MCUXpresso site: MCUXpresso WEB Release Notes Full details on the release (features, known issues...) Config Tools v14.0 The product is based on Eclipse 2022-12 Open JDK 17 is updated. Batch processing on command line is supported. Support for SDK 2.14 in Project cloner and Detect toolchain project is added. Link to a toolchain project on a location different than .mex file is added. The command for discarding changes and reloading .mex (MCUXpresso IDE) is added. Quick fix for errors allows setting the "Called by the default initialization function" flag when it would fix an error. Search functionality to Code Preview is added. TEE MCXN-947 combination of AHBSC with TRDC (MBC) is supported. Export TEE registers via wizard or command line is available. Boot ROM hiding feature is supported. Tier mode for TRDC is supported. Domain ambivalence for RDC masters is added. Master-specific memory alias Validation for A28 bit of MPU region address is added. Memory map filters are aligned with Arm terminology. Status bar is united with other tools. PLU Tools used for Verilog synthesis and model optimization are replaced. Linux, Mac, and Apple silicon platforms are supported. Newer versions of Verilog standard are supported. Creation of flip-flop circuits outside Direct mode is supported. Support for special comment that contains mapping information is added. Support for Verilog code resynthesis is added in the new command-line option. Buttons in Schematic view are reordered to groups of related buttons on each row. Information from Verilog synthesis and model optimization tools is added to the error dialog. Peripherals Migration of Peripherals tool components to the latest supported version on current MCU in command line is supported. User information on the dependency of the tool on another tool disabled in the configuration is improved. Migration report generation is supported. The generated report may contain instructions on how to handle incompatible changes between versions of the configured SDK component. Opening links to websites in the Documentation view in an external browser is supported. Pins Labels defined for Expansion header pins can be set as identifiers of the routed pin. Expansion headers can be locked for editing. Expansion headers and boards are added to the HTML and CSV reports. Columns from Routing Details can be added to the External User Signals view. New External User Signals can be created for all routed pins that are missing in the signals table. Clocks Support for the same frequencies settings from different source for internal clocks is added. Community MCUXpresso Config Tools
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We are pleased to announce that MCUXpresso Config Tools v13.1 are now available. Downloads It’s a part of MCUXpresso IDE https://www.nxp.com/mcuxpresso/ide/download In order to use it with other toolchains, download the installer for all platforms, please login to our download site via:  https://www.nxp.com/mcuxpresso/config Please refer to MCUXpresso Config Tools documentation for installation and quick start guides. For online version, login into MCUXpresso site: MCUXpresso WEB Release Notes Config Tools v13.1 Pins tool Fix incomplete routing of deinit functions Update of data for Config Tools v13 and v13.1 General Update of MC56F80xxx support to the latest processor data Fix of missing MIMXRT1170-EVKB board configuration Pins tool Bug fix of incorrect labels of PMOD expansion header in Pins tool Peripherals tool Register init. components Bug fix of PLU Register init. component on LPC550x/S0x processors Bug fix of Peripherals tool FlexIO RIC SDK init. components Support of fcb Peripherals tool component for RT104x and RT116x processors Memory validation tool Update of DDR tool data for i.MX8M and i.MX93 processors Update of Memory validation tool data for Layerscape and i.MX RT processors Community MCUXpresso Config Tools  
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We are pleased to announce that MCUXpresso Config Tools v13 are now available.
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We are pleased to announce that MCUXpresso Config Tools v12.1 are now available. Downloads It’s a part of MCUXpresso IDE https://www.nxp.com/mcuxpresso/ide/download In order to use it with other toolchains, download the installer for all platforms, please login to our download site via:  https://www.nxp.com/mcuxpresso/config Please refer to MCUXpresso Config Tools documentation for installation and quick start guides. For online version, login into MCUXpresso site: MCUXpresso WEB Revision History 12.1 PLU tool Integrated into the Mcuxpresso Config tools Reworked to cooperate with Peripherals tool PLU register init component Pins tool Deinit function now sets also the routing and direction to it's default state. It also tries to route the original peripheral signal to it's default pin Support of RT1041xxxB/RT1042xxxxB   Community MCUXpresso Config Tools   TIP: Check new Expansion Boards in MCUXpresso Config Tools training id:mcuxpresso-config
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We are pleased to announce that MCUXpresso Config Tools v12.1 are now available. Downloads It’s a part of MCUXpresso IDE https://www.nxp.com/mcuxpresso/ide/download In order to use it with other toolchains, download the installer for all platforms, please login to our download site via:  https://www.nxp.com/mcuxpresso/config Please refer to MCUXpresso Config Tools documentation for installation and quick start guides. For online version, login into MCUXpresso site: MCUXpresso WEB Revision History 12.1 PLU tool Integrated into the Mcuxpresso Config tools Reworked to cooperate with Peripherals tool PLU register init component Pins tool Deinit function now sets also the routing and direction to it's default state. It also tries to route the original peripheral signal to it's default pin Support of RT1041xxxB/RT1042xxxxB   Community MCUXpresso Config Tools id:mcuxpresso-config
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This article was written for MCUXpresso Config tools v12 and older. Newer MCUXpresso Config tools can map Arduino expansion boards into compatible expansion headers automatically, without the need for any virtual adapter and even with possibility to utilize all the spare pins!   This tutorial shows how to apply and use the appropriate Arduino virtual adapter file (virtual adapters are attached) to utilize Arduino compatibility across different expansion headers. Benefit Virtual adapter board files allow users of the Pins tool from the MCUXpresso Config tools suite to use the expansion board file intended for a standard Arduino expansion header with other NXP expansion headers that are compatible with the Arduino standard but not mechanically identical (for example, they use two rows of pins).   Arduino-compatible expansion headers Freedom Header (Kinetis FRDM boards) LPCXpresso V3 (LPC boards) LPCXpresso V3 Mirrored Normally, such expansion headers are treated as different in the Pins tool, but the virtual adapter file transforms the current board header into the standard Arduino header so the user can apply the expansion boards referencing the standard Arduino header. For details on the expansion board, see Creating expansion board definition file for Arduino Multifunction shield.   Step 1: Open the Expansion Header view   Open the Expansion Header view if it is not open. In the standalone MCUXpresso Config tools, select the command Views > Expansion header  In the MCUXpresso IDE, select the command Window > Show view > Expansion Header    Step 2: Apply the Arduino virtual adapter file   The application of the virtual adapter file is the same as the application of the expansion board definition file. Use the attached virtual adapter files. Press the “Apply expansion board” button Locate the virtual adapter file and confirm Select if you want to create the functional group (recommended) Choose which names you would like to use in your source code Apply the expansion board   Step 3: Switch to the newly created header   Choose the Arduino adapter header option and select the newly created “Arduino adapter” header. Using the “+” button, select and apply an expansion board intended for the standard single-row Arduino header, and it will be connected to appropriate pins automatically.    
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  The Expansion headers feature in MCUXpresso Config Tools simplifies the usage of the Pins tool in several ways. It is easier to find appropriate pins on the board and configure them for usage in a user application. The pins can also be automatically routed by applying the expansion board file. This document describes how to add or modify the expansion headers if you are designing or using your own PCB board leveraging standard expansion headers such as those compatible with Arduino.  1. Introduction   1.1 Expansion header   An expansion header is a collection of expansion connectors placed on the development board. The pins from the connectors lead out the processor pins outside and can be identified by a label on the board. There can be multiple expansion headers on a single board.   Figure 1. Example of three expansion headers on- LPC55S69-EVK board  1.2 Expansion board   An expansion board is a circuit board that can be applied to the Expansion header, extending features of the development board. Expansion boards (sometimes called Shields) can contain special additional components such as wireless modules, sensors, and so on. The connected pins may have different names on the expansion board.    If an expansion header is defined in the configuration, then the pins tool can provide instant routing of the processor signals appropriate for the expansion board applied to this header.   Figure 2. Expansion board example - Tester click[https://www.mikroe.com/tester-click]  1.3 Expansion Headers in Pins tool  The Expansion Header view can be found in the Pins tool. The view shows the header connectors and pins in graphical form, with the layout corresponding to the layout of the real board. Figure 3. Expansion Header view  The Expansion Header view can simplify work with the pins connected to an expansion header. By moving the cursor on a connector pin, you can see the details on the pin's connection and routing. You can also route processor pins signals by left-clicking on the connector pin or by right-clicking to invoke the context menu.  The default new configurations created by MCUXpresso config tools for common evaluation boards already contain pre-populated expansion header(s) matching the expansion headers on the board that can be used out-of-box.  2. Adding Custom Expansion header   When the expansion header is not present in the configuration, or you would like to add an additional expansion header.  Open or create the configuration where you would like to add an expansion header in the Pins tool. Open the Expansion Header view if it is not open. In the standalone MCUXpresso Config tools, select the command Views > Expansion header  In the MCUXpressso IDE, select command Window > Show view > Expansion Header  Click the Add button in the Expansion Header view toolbar.      Figure 4. expansion header Add button  The Expansion Header dialog appears Set the header name, type, and connector names to match your hardware design.        Figure 5.  Add New Expansion Header dialog           NOTE: The number of connectors and arrangement is determined by the header type.      Figure 6. Example of the header types (orange: Lpc-style arduino; red: Pmod; green: Micro Bus) The values can be changed in the future in Edit Header   The created header initially contains only the disconnected pin that must be defined before it can be used in the configuration. For more information, see subchapter Connecting pins.  Note: The customized headers and their connections are saved to the configuration MEX file and in the YAML block within the generated source files, so they are not lost when you distribute the configuration to someone else.   Figure 7. Custom header in the source code   2.1 Connecting pins  The newly created custom expansion header does not contain any connected pins.    There are two ways to connect or disconnect a pin:   Dialog in the Expansion Header view Click the Connect command in the context menu of the connector pin.     Figure 8. Connect command in the context menu The Connector Pin dialog is shown   Figure 9. Connect dialog for the 3-d pin on connector “mA”, set name “mPin” and connected to processor pin on coordinates 26  You can set the name (for example, the label of the pin on the header); otherwise, the connector pin coordinates will be used instead.  If the pin is connected to the processor, check the checkbox connected with the processor pin. In this case, check the connected pin checkbox from the list. If the connector pin is used but is not connected to the processor, you can select external signal types, which will be used for validating features of the matching signals when the expansion board is applied to the header. You can also disconnect the pin by unchecking all the checked items.  It is also possible to connect Connector pins via the Pins view, see below.   3. Connections in the Pins view   The connections of each expansion header/board are also shown as a separate column in the Pins view.    The fields at processor pin rows that are filled contain a reference to the connector, the pin number and may contain a label specific for the expansion header. For example, P19[4] (A1) connects the processor pin to connector P19, pin number 4, and the label on the expansion header is A1.     Figure 10. Expansion headers/boards in the Pins view   Steps to connect connector pins in this view:  Find the cell, where the row is the processor pin you would like to connect, and the column is the expansion header to connect to.  The connection is made by setting cell value in the connector pin coordinates format “connector name”[“number of the pin”]. If you want to add an optional name, you append the name in parentheses.  Note: The external signal types of the connector pin cannot be set here.  The value is checked for the correct format, which  is described within the tooltip shown for the cell    Figure 11. Validation tooltip with advice for the header "My custom header"  Disconnecting can be done by deleting the cell value    3.1. Applying/Removing expansion board   If you have an expansion board definition file, you can apply it to the selected expansion header. After the application, the pins tool suggests routing for all used signals and it is possible to see the usage and corresponding board signals for the expansion board.   The expansion board is distributed as a simple .xml file. The type of expansion header must match the expansion header definition, other headers cannot be used. For details on the expansion board definition file, see the following article: Creating expansion board definition file for Arduino Multifunction shield To apply an expansion board, use the following steps:  In the expansion header view, select the plus button in the right part of the Expansion Header view toolbar.  Figure 12. Expansion board add button    You can also use the path Main menu Pins > Apply expansion board, where you can choose the expansion header.      Figure 13. Apply MikroE Tester click board for a micro bus header type  After clicking OK, the Expansion Board Routing dialog appears   Figure 14. Expansion board routing open after applying the expansion board  In the dialog box, you can choose which pins function group the routing will be applied to. The routing dialog contains routing tables, where processor pins are pre-autorouted based on the limitations of the expansion board. The routing is validated in real time and can be changed by clicking a cell in the Route column.   You can also decide if and what pin name will be used for the generation of the defined constants in the code for referencing from the application.    Figure 15. Generated #define for board MIKROE and pins AN, CS  The same dialog appears after clicking the edit expansion board in the Expansion header view, but the option to create a new functional group will not be enabled.  Figure 16 Expansion board edit button   NOTE: Removing expansion board does not remove configured routing. It only changes the identifier defines if they are derived from the board.   Figure 17. Source code change after removing  the expansion board      
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1. Introduction  This tutorial contains the following goals: 1) How to use the main features of the eDMA component 2.4.0 (periodic trigger, peripheral request, linking, scatter-gather) in the Peripherals Configuration Tool. 2) How to set up periodic ADC autonomous (without CPU) queued measurement controlled by DMA. 2. Prerequisites  The application is developed in MCUXpresso IDE 11.5.0 which can be downloaded from https://www.nxp.com/mcuxpresso/ide website. It integrates MCUXpresso Config Tools Version 11 that is used for application design and configuration. The FRDM-K66F - Freedom Development Platform for Kinetis K66 SDK  version 2.11.0 can be downloaded from the https://mcuxpresso.nxp.com/ website or using the MCUXpresso IDE. 3. Application description  3.1. Description  The main goal of this application is to show the configuration of the DMA peripheral which can be used for the ADC channel to be measured and for collecting the results into the resulting output array. It demonstrates an approach for periodic measurement of multiple ADC channels without CPU intervention. It can be used on any MCU with a simple ADC peripheral (without a possibility to queue measured channels). 3.2. Application details  The application starts with the initialization of pins, clocks, and peripherals configured by the MCUXpresso Config Tool. After the initial state is printed to the console, it starts the PIT (periodic interrupt timer). The PIT channel named Trigger causes periodic transfer on the DMA channel named ADC, which configures the ADC peripheral’s channel to be measured. When the timer counting is completed, the ADC measures the analog signal of the DAC peripheral that has been already initialized. The interrupt routine of the PIT Trigger channel includes the actual DAC data reading sequence that will be printed at the end of the console. After the end of the measurement loop, there is the ADC peripheral’s DMA request which initiates the DMA channel named OUTPUT to read the measured ADC data. The DMA channel OUTPUT links the DMA channel named DAC, which increases the buffer read index of the DAC peripheral and generates the next analog signal to be measured by the ADC. The sample number corresponds to the number of major loops of the DMA channel OUTPUT. The major count completion interrupt of the DMA channel OUTPUT stops the measurement trigger (PIT) and enables the DMA request of the DMA channel named PROCESS. The DMA channel PROCESS processes the whole dataset by sorting it into individual data buffers using the scatter-gather function. The major count completion interrupt of the DMA channel PROCESS sets the flag for printing the results and starts the delay timer (PIT second channel named Delay) that delays individual measurements. The post-delay interrupt routine stops the PIT Delay channel and restarts the PIT Trigger channel, which initiates the whole cycle again. Figure 1. Application diagram  4. MCUXpresso Config Tool configuration  The project includes the initial configuration of the following peripherals by the Peripherals Tool: DAC (Digital to Analog Converter) ADC (Analog to Digital Converter) PIT (Periodic Interrupt Timer) eDMA (Enhanced Direct Memory Access) 4.1. DAC peripheral  The DAC peripheral is used for creating simulated data to be measured by the ADC. DAC peripheral setup: Mode – Buffered DAC reference voltage – DACREF_2 – the same voltage reference as for ADC, so that both peripherals are in the same voltage ranges. Enable DAC – true Enable DAC buffer - true Trigger mode – Software trigger (configured by DMA write to register C0, corresponds to the dac_trigger[] configuration) Work mode – Swing mode (demonstration choice) Data buffer values – 10 demonstrations of values from 100 to 1000 with step 100 Buffer read index - 0 The DAC buffer works in swing mode, so it moves the buffer read index from the first item to the last, then back to the first, and so on. After the one loop is measured by the ADC nearly the same values are printed out to the console log, due to the same voltage reference selected in both the DAC and the ADC. The DAC interrupt is not used. Figure 2. DAC Configuration  4.2. ADC peripheral  The ADC peripheral is used for measuring an analog signal (in this case, generated by the DAC peripheral) and converting it into a digital signal. ADC peripheral setup: Reference voltage source – VrefH/VrefL Input clock source – Bus clock divided by 2. Asynchronous clock output – false Divide input clock source – by 8 (to achieve better accuracy) Sample resolution mode – Single-end 12-bit (the same as DAC resolution) Perform auto-calibration – true (to achieve better accuracy) Use hardware trigger – false DMA requests – true The ADC channel selection is configured by the DMA. The adc_trigger[] array includes configurations of the SC1A register, which selects and triggers the ADC channel measurement. The clock frequency for the ADC measurement is set to 3.75 MHz. The conversion time is calculated in the following way: Conversion time = SFC adder + AverageNum * (BCT + LST adder + HSC adder) Where: SFC adder (Single or First Continuous time adder): 5 ADCK + 5 bus clock cycles AverageNum (Average Number factor): 8 BCT (Base Conversion Time: for 12-bit single-ended): 20 ADCK LST adder (Long Sample Time adder): 0 ADCK HSC adder (High-Speed Conversion time adder): 0 ADCK ADCK (ADC clock cycle period): (16/60000000) s The resulting conversion time is calculated as follows:  Conversion time = (5 ADCK + 5 bus clock cycles) + 8 * (20 ADCK + 0 ADCK + 0 ADCK) = 165 * 16/60000000 + 5/60000000 = 44.083 us Figure 3. ADC configuration  4.3. PIT peripheral  The PIT peripheral is used for setting time delays. PIT peripheral setup: Run PIT in debug mode – true (application is demonstrated in debug mode) Clock source frequency – 60 MHz PIT Channel 0 is configured to set the delay between each ADC measurement. It periodically triggers a DMA transfer of DMA channel 0 which writes to the ADC register SC1A. Setup PIT channel 0: Channel ID – Trigger (optional identifier) Channel number – 0 (corresponds to the DMA channel number) Channel period – 60 us (the period must be higher than the calculated ADC conversion time 44.083 us and DAC value stabilization) Interrupt – true Interrupt request – Enabled in the initialization Figure 4. PIT configuration channel 0 named Trigger PIT Channel 1 is configured to set a delay for printing results. It starts at the end of the measurement loop. PIT channel 1 setup: Channel ID – Delay (optional identifier) Channel number – 1 Channel period – 10 s (period of the whole measurement loop) Interrupt – true Interrupt request – Enabled in the initialization Figure 5. DMA channel OUTPUT TCD configuration 4.4. eDMA peripheral  The eDMA peripheral component initializes the DMA and DMAMUX (DMA request multiplexer) peripherals. The DMA controller enables moving data from one memory-mapped location to another without CPU involvement. Note: The error interrupt vector and channel error event for all DMA channels are enabled. It can improve the debugging process. The ISR is defined in the DMA_ERROR handler. eDMA peripheral setup: Priority arbitration mode – Round-robin (no specific channel priorities were set because channels are not used simultaneously) Debug mode enable – true (application is demonstrated in debug mode) Figure 6. General eDMA configuration overview The application example uses 4 DMA channels for control: ADC (always-on DMA request triggered by PIT) DAC (disabled DMA request) OUTPUT (ADC peripheral DMA request) PROCESS (always-on DMA request) All used DMA channels are configured as Non-transactional (TCD structures) channel API mode, which allows you to configure all TCD (Transfer Control Descriptor) registers. 4.4.1. Channel ADC The eDMA channel ADC (Figure 7) is used for setting and triggering the ADC channel to measure the analog signal generated by the DAC peripheral. It demonstrates the use-case of a triggered always-on DMA request when the selected DMA channel (0) is triggered by the corresponding PIT channel (0). The peripheral request is enabled; therefore, the channel operates immediately after the PIT trigger timer starts and completes counting. eDMA channel ADC setup: Channel API mode - Non-transactional (TCD structures) Channel ID – ADC (optional channel prefix name) eDMA channel number – 0 eDMA request – AlwaysOn (any always-on request number) Periodic trigger enable – true (requires initialization of PIT channel 0) Reset channel – true Peripheral request enable – true Figure 7. DMA channel ADC configuration The Transfer Control Descriptor for the DMA channel ADC (Figure 😎 is configured as memory-to-peripheral transfer, which configures the ADC peripheral for measurement. eDMA channel ADC TCD named ADC_trigger setup: TCD ID – ADC_trigger Source address configuration Data size [Byte] – 4 (one minor loop transfers 4 bytes, which corresponds with the destination register size) Address expression – &adc_trigger[0] (contains 2 configurations of the ADC0::SC1A register, for demonstration purposes both selected the same ADC channel 23 (0x17) interconnected with the DAC output. The configurations can be different) External definition – extern uint32_t adc_trigger[]; Offset expression – sizeof(adc_trigger[0]) (SOFF = 4 bytes) Modulo – Disable modulo Destination address configuration Data size [Byte] – 4 (one minor loop transfers 4 bytes, which corresponds to the destination register size) Address expression – ((uint32_t)(&ADC0_PERIPHERAL->SC1[0])) or (uint32_t)ADC0_PERIPHERAL (it is the first register of the peripheral ADC) Offset expression – 0 (DOFF = 0 bytes, destination address is always the same – ADC0::SC1A) Modulo – Disable modulo Minor loop configuration Minor loop transfer [Byte] – 4 Minor loop offset – Disabled Minor loop link enable – false Bandwidth control – No eDMA engine stalls Major loop configuration Major loop count – 2 (MAJOR_LOOP_COUNT – 2 ADC configurations) Source last address adjustment – -8 (SLAST = (-1) * SOFF * MAJOR_LOOP_COUNT) Destination last address adjustment – 0 (DLAST = (-1) * DOFF * MAJOR_LOOP_COUNT) Major loop link enable – false Auto stop request – false (channel operation is triggered by the hardware – PIT trigger) Scatter-gather configuration Scatter-gather enable – false Constant TCDs - true Initialize TCD - ADC_trigger Figure 8. DMA channel ADC TCD configuration 4.4.2. Channel DAC The DMA channel DAC (Figure 9) is used for setting and triggering the DAC peripheral to generate an analog signal for the ADC measurement. It demonstrates the DMA channel (1) configuration without using a DMA request. A channel without a DMA request can be enabled with a software trigger or with channel linking functionality. In this case, the DMA channel DAC is linked from the DMA channel OUTPUT.  Figure 9. DMA channel DAC configuration eDMA channel DAC setup: Channel API mode - Non-transactional (TCD structures) Channel ID – DAC (optional channel prefix name) eDMA channel number – 1 eDMA request – DMAMUX disable (without DMA request) Periodic trigger enable – false Reset channel – true Peripheral request enable – false The TCD for the DMA channel DAC (Figure 10) is configured as a memory-to-peripheral transfer, which configures the DAC peripheral for generating the next analog signal. eDMA channel DAC TCD named DAC_trigger setup: TCD ID – DAC_trigger Source address configuration Data size [Byte] – 1 (one minor loop transfers 1 byte, which corresponds to the destination register size) Address expression – &dac_trigger[0] (contains the configuration of the DAC0::C0 register (0xF0) that triggers DAC by software) External definition – extern uint8_t dac_trigger[]; Offset expression – size of(dac_trigger[0]) (SOFF = 1 bytes) Modulo – Disable modulo Destination address configuration Data size [Byte] – 1 (one minor loop transfers 1 byte which corresponds with the destination register size) Address expression – ((uint32_t)(&DAC0_PERIPHERAL->C0)) Offset expression – 0 (DOFF = 0 bytes, the destination address is always the same – DAC0::C0) Modulo – Disable modulo Minor loop configuration Minor loop transfer [Byte] – 1 Minor loop offset – Disabled Minor loop link enable – false Bandwidth control – No eDMA engine stalls Major loop configuration Major loop count – 2 (MAJOR_LOOP_COUNT – 2 ADC configurations) Source last address adjustment – -1 (SLAST = (-1) * SOFF * MAJOR_LOOP_COUNT) Destination last address adjustment - 0 (DLAST = (-1) * DOFF * MAJOR_LOOP_COUNT) Major loop link enable – false Auto stop request – false (DMA request disabled) Scatter-gather configuration Scatter-gather enable – false Constant TCDs - true Initialize TCD - DAC_trigger Note: Instead of the DAC peripheral the DMA channel can send or receive settings to/from any other peripherals that trigger the ADC measurement (for example, a communication peripheral - UART). Figure 10.  DMA channel DAC TCD configuration 4.4.3. Channel OUTPUT The DMA channel OUTPUT (Figure 11) is used for reading the ADC peripheral results and storing them in memory. It demonstrates the DMA channel (2) configuration using the DMA peripheral request (ADC). The peripheral request is enabled; therefore, the channel operates immediately after the ADC measurement is done. eDMA channel OUTPUT setup: Channel API mode - Non-transactional (TCD structures) Channel ID – OUTPUT (optional channel prefix name) eDMA channel – 2 eDMA request – ADC0 Enable periodic trigger – false Enable channel reset - true Enable peripheral request – true Asynchronous peripheral request – true Figure 11. DMA channel OUTPUT configuration The TCD for the DMA channel OUTPUT (Figure 12) is configured as a peripheral-to-memory transfer which reads the measured values by the ADC peripheral. eDMA channel OUTPUT TCD named ADC_RESULTS setup: TCD ID – ADC_RESULTS Source address configuration Data size [Byte] – 4 (one minor loop transfers 4 bytes which corresponds to the destination register size) Address expression – (uint32_t)(&ADC0_PERIPHERAL->R[0]) (reads results from ADC0::RA register) Offset expression – 0 (SOFF = 0 bytes, the source address is always the same) Modulo – Disable modulo Destination address configuration Data size [Byte] – 4 (one minor loop transfers 1 byte which corresponds to the destination register size) Address expression – &adc_results[0] External definition – extern uint32_t adc_results[]; Offset expression – sizeof(adc_results[0]) (DOFF = 4 bytes) Modulo – Disable modulo Minor loop configuration Minor loop transfer [Byte] – 4 Minor loop offset – Disabled Minor loop link enable – true Linked minor loop channel – 1(DAC) (every minor loop eDMA channel DAC is linked which triggers the DAC and increases the buffer index that changes the DAC output value) Bandwidth control – No eDMA engine stalls Major loop configuration Major loop count – 20 (MAJOR_LOOP_COUNT – 20 measured samples) Source last address adjustment – -0 (SLAST = (-1) * SOFF * MAJOR_LOOP_COUNT) Destination last address adjustment - -80 (DLAST = (-1) * DOFF * MAJOR_LOOP_COUNT) Major loop link enable – true Linked major loop channel – 1(DAC) (last minor loop increases the DAC buffer index for the next measurement cycle) Auto stop request – false Scatter-gather configuration Enable scatter-gather – false Interrupt configuration Interrupt sources – Major count completion (After the measurement cycle, the interrupt DMA_OUTPUT is invoked. The ISR clears the status flags of the DMA channel OUTPUT channel, stops the PIT trigger timer, and enables the peripheral request of the DMA channel PROCESS. This way, it initiates the next operation.) Constant TCDs - true Initialize TCD – ADC_RESULTS - Enable channel interrupt – true - Interrupt request – Enabled in initialization - Enable custom handler name - true - Interrupt handler name – DMA_OUTPUT Figure 12. DMA channel OUTPUT TCD configuration 4.4.4. Channel PROCESS The DMA channel PROCESS (Figure 13) is used for processing the results and storing them in memory. It demonstrates the DMA channel (3) configuration using a DMA always-on request. The peripheral request is disabled; therefore, the channel operates after the request is enabled by the software. In the example application, the DMA request is enabled in the interrupt routine of the DMA channel OUTPUT which is invoked after all major loops transfers are completed (measurement finished). After this DMA transfer, there are two arrays of results, one for each ADC configuration, see configuration array adc_trigger[]. eDMA channel PROCESS setup: Channel API mode - Non-transactional (TCD structures) Channel ID – PROCESS (optional channel prefix name) eDMA channel – 3 eDMA request – AlwaysOn (any always-on request number) Periodic trigger enable – false Reset channel – true Peripheral request enable – false Figure 13. DMA channel PROCESS configuration The DMA channel PROCESS contains pre-configured TCDs as memory-to-memory transfers that process the measured data using scatter-gather functionality. In the example application, the data from one source data-array adc_results[] is scattered into two destination data-arrays, data0[], and data1[]. The DMA channel ADC contains two ADC configurations to be measured. The values measured by the first ADC channel configuration are stored into the data0, and after that, the second ADC channel configuration data into the data1. eDMA channel TCD Data0 setup: TCD ID – Data0 Source address configuration Data size [Byte] – 4 (sample size) Address expression – &adc_results[0] (first sample) Offset expression – 2*sizeof(adc_results[0]) (SOFF = 8 bytes, read every second sample) Modulo – Disable modulo Destination address configuration Data size [Byte] – 4 Address expression – &data0[0] External definition – extern uint32_t data0[]; Offset expression – sizeof(data0[0]) (DOFF = 4 bytes) Modulo – Disable modulo Minor loop configuration Minor loop transfer [Byte] – 4 Minor loop offset – Disabled Minor loop link enable – false Bandwidth control – No eDMA engine stalls Major loop configuration Major loop counts – 10 (MAJOR_LOOP_COUNT – 10 samples) Source last address adjustment – -80 (SLAST = (-1) * SOFF * MAJOR_LOOP_COUNT) Destination last address adjustment – Disabled due to scatter-gather mode Major loop link enable – false Auto stop request – false (always-on request still enabled) Scatter-gather configuration Enable scatter-gather – true Scatter-gather TCD address – Data1 Setup eDMA channel TCD Data1: TCD ID – Data1 Source address configuration Data size [Byte] – 4 (sample size) Address expression – &adc_results[1] (second sample) Offset expression – 2*sizeof(adc_results[0]) (SOFF = 8 bytes, read every second sample) Modulo – Disable modulo Destination address configuration Data size [Byte] – 4 Address expression – &data1[0] External definition – extern uint32_t data1[]; Offset expression – sizeof(data1[0]) (DOFF = 4 bytes) Modulo – Disable modulo Minor loop configuration Minor loop transfer [Byte] – 4 Minor loop offset – Disabled Minor loop link enable – false Bandwidth control – No eDMA engine stalls Major loop configuration Major loop counts – 10 (MAJOR_LOOP_COUNT – 10 samples) Source last address adjustment – -80 (SLAST = (-1) * SOFF * MAJOR_LOOP_COUNT) Destination last address adjustment – Disabled due to scatter-gather mode Major loop link enable – false Auto stop request – true  (stops always-on request) Scatter-gather configuration Enable scatter-gather – true Scatter-gather TCD address – Data0 Interrupt configuration Interrupt sources – Major count completion (After the last major loop of the TCD Data1, the interrupt DMA_PROCESS is invoked. The ISR clears the status flags of the DMA channel PROCESS channel, sets the print flag, and starts the PIT delay timer. The results are printed in the console.) Constant TCDs - true Initialize TCD – Data0 Enable channel interrupt – true - Interrupt request – Enabled in initialization - Enable custom handler name - true - Interrupt handler name – DMA_DATA_PROCESSED Figure 14. DMA channel PROCESS TCD configuration Data0 Figure 15. DMA channel PROCESS TCD configuration Data1 5. Application design  Global variables and definitions: Definitions: • SAMPLE_COUNT - number of the measured values from one measurement loop – one swing through DAC buffer (10 values) to top and back => 2 * 10 • DATA_COUNT - number of the data in each separated output array • ADC_CONFIGURATIONS - number of values (channel settings) for ADC0_SC1A register • DAC_TRIGGER_CONFIGURATIONS - number of values (SW trigger) for DAC0_C0 register Main global variables: • dac_output - Result buffer with DAC output, the array of DAC values filled from the actual pointed buffer index – used for printing purposes/* Result buffer with ADC measurement output - interleaved channels measured data, one by one */ AT_NONCACHEABLE_SECTION_INIT(uint32_t adc_results[SAMPLE_COUNT]) = {0}; /* Process data buffers – output separated measured data from the two selected ADC channels into these two arrays */ AT_NONCACHEABLE_SECTION_INIT(uint32_t data0[DATA_COUNT]) = {0}; AT_NONCACHEABLE_SECTION_INIT(uint32_t data1[DATA_COUNT]) = {0}; /* ADC channel selection: twice channel 23 configuration – 0x17; here you can specify your own channels numbers when you transform the tutorial to real application */ AT_NONCACHEABLE_SECTION_INIT(uint32_t adc_trigger[ADC_CONFIGURATIONS]) = {0x17, 0x17}; /* Set DAC software trigger configuration – 0xF0 */ AT_NONCACHEABLE_SECTION_INIT(uint8_t dac_trigger[DAC_TRIGGER_CONFIGURATIONS]) = {0xF0}; Functions and interrupt handler's description: int main(void) { /* Initialization of MCU (pins, clocks and peripherals) */ . . . /* Start the DMA trigger */ PIT_StartTimer(PIT_PERIPHERAL, PIT_TRIGGER); /* Inside infinite loop */ if(printFlag){ printBuffers(); } } /* PIT0_IRQn interrupt handler */ void PIT_TRIGGER_IRQHANDLER(void) { /* After each ADC trigger */ /* Fill dac_output array by the actual value */ } /* PIT1_IRQn interrupt handler */ void PIT_DELAY_IRQHANDLER(void) { /* At the end of the measurement loop after printing out */ /* Stop delay timer */ PIT_StopTimer(PIT_PERIPHERAL, PIT_DELAY); /* Start triggering in the next measurement loop */ PIT_StartTimer(PIT_PERIPHERAL, PIT_TRIGGER); } /* DMA2_DMA18_IRQn interrupt handler */ void DMA_OUTPUT(void) { /* After all measurement results in actual loop is transferred by DMA to adc_results[] */ /* Stop DMA trigger */ PIT_StopTimer(PIT_PERIPHERAL, PIT_TRIGGER); /* Enable data process DMA channel request */ EDMA_EnableChannelRequest(DMA_DMA_BASEADDR, DMA_PROCESS_DMA_CHANNEL); } /* DMA3_DMA19_IRQn interrupt handler */ void DMA_DATA_PROCESSED(void) { /* After finishing separation DMA transfers from adc_results[] to the data0[] and data1[] */ /* Start delay next measurement and results printing */ PIT_StartTimer(PIT_PERIPHERAL, PIT_DELAY); } /* DMA_Error_IRQn interrupt handler */ void DMA_ERROR(void) { /* Just for sure */ } void printBuffers() { /* Printed out the DAC values with ADC measured values for comparison */ } 6. Conclusion The tutorial shows: 1) How to use the main abilities of the DMA component 2.4.0 (periodic trigger, peripheral request, linking, scatter-gather). 2) How to set up periodic ADC autonomous (without CPU) queued measurement controlled by DMA.        
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If you are using LPCSxx microcontrollers and the TEE tool for configuration of resources isolation, you may encounter a tool warning or the chip’s behaviour differs from the expectations. This article may help you in configuring the Private Peripheral Bus (PPB) area properly. The 0xE000_0000 – 0xFFFF_FFFF area has specific behaviour in the TrustZone. The area’s security can be configured in the SAU, however, multiple regions are either exempt from security checking, or are fixed as Secure. Especially: 0xE000_0000 - 0xE000_2FFF – exempt from security violation checks 0xE000_E000 - 0xE000_EFFF – exempt from security violation checks 0xE002_E000 - 0xE002_EFFF – exempt from security violation checks 0xE004_0000 - 0xE004_1FFF – exempt from security violation checks 0xE00F_F000 - 0xE00F_FFFF – exempt from security violation checks 0xE000_0000 - 0xEFFF_FFFF – exempt from security violation checks for instruction fetch 0xF000_0000 – 0xFFFF_FFFF – fixed as Secure Therefore if you configure any address range mentioned above as a Non-Secure region in the SAU, the TEE tool generates a warning.
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