i.MX Processors Knowledge Base

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i.MX Processors Knowledge Base

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The Linux L4.9.88_2.0.0 Rocko, i.MX7ULP Linux/SDK2.4 RFP(GA) release files are now available. Linux on IMX_SW web page, Overview -> BSP Updates and Releases ->Linux L4.9.88_2.0.0 SDK on https://mcuxpresso.nxp.com/ web page.   Files available: Linux:  # Name Description 1 imx-yocto-L4.9.88_2.0.0.tar.gz L4.9.88_2.0.0 for Linux BSP Documentation. Includes Release Notes, User Guide. 2 L4.9.88_2.0.0_images_MX6QPDLSOLOX.tar.gz i.MX 6QuadPlus, i.MX 6Quad, i.MX 6DualPlus, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo, i.MX 6Solox Linux Binary Demo Files 3 L4.9.88_2.0.0_images_MX6SLEVK.tar.gz i.MX 6Sololite EVK Linux Binary Demo Files 4 L4.9.88_2.0.0_images_MX6UL7D.tar.gz i.MX 6UltraLite EVK, 7Dual SABRESD, 6ULL EVK Linux Binary Demo Files 5 L4.9.88_2.0.0_images_MX6SLLEVK.tar.gz i.MX 6SLL EVK Linux Binary Demo Files 6 L4.9.88_2.0.0_images_MX8MQ.tar.gz i.MX 8MQuad EVK Linux Binary Demo files 7 L4.9.88_images_MX7ULPEVK.tar.gz i.MX 7ULP EVK Linux Binary Demo Files  8 L4.9.88_2.0.0-ga_mfg-tools.tar.gz Manufacturing Toolkit for Linux L4.9.88_2.0.0 iMX6,7 BSP 9 L4.9.88_2.0.0_mfg-tool_MX8MQ.tar.gz Manufacturing Toolkit for Linux L4.9.88_2.0.0 i.MX8MQ BSP 10 imx-aacpcodec-4.3.5.tar.gz Linux AAC Plus Codec for L4.9.88_2.0.0   SDK:   On https://mcuxpresso.nxp.com/, click the Select Development Board to customize the SDK based on your configuration then download the SDK package.    Target board: i.MX 6QuadPlus SABRE-SD Board and Platform i.MX 6QuadPlus SABRE-AI Board i.MX 6Quad SABRE-SD Board and Platform i.MX 6DualLite SABRE-SD Board i.MX 6Quad SABRE-AI Board i.MX 6DualLite SABRE-AI Board i.MX 6SoloLite EVK Board i.MX 6SoloX SABRE-SD Board i.MX 6SoloX SABRE-AI Board i.MX 7Dual SABRE-SD Board i.MX 6UltraLite EVK Board i.MX 6ULL EVK Board i.MX 6SLL EVK Board i.MX 7ULP EVK Board i.MX 8MQ EVK Board   What’s New/Features: Please consult the Release Notes.   Known issues For known issues and more details please consult the Release Notes.   More information on changes of Yocto, see: README: https://source.codeaurora.org/external/imx/imx-manifest/tree/README?h=imx-linux-rocko ChangeLog: https://source.codeaurora.org/external/imx/imx-manifest/tree/ChangeLog?h=imx-linux-rocko
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Before reading: only a personal works and sharing, not any form of "release". I didn't find any confidential information from the packages. So, I'm publishing it here. This is only for testing purpose. Do NOT use it for building a product. Use it at your own risk!! Yocto is flexible and powerful, and also, big and slow (when building). Sometimes we only need to build uboot or kernel or some piece of testing code. It's really a waste of time to build-up the whole Yocto environment which may cost over 50GB disk space and over 3 hours of building. I've made some scripts and sum them up to form a toolset for building uboot, kernel and some testing code out of Yocto environment. It's only a simple container and expect to use with uboot and kernel source code from formal Freescale release and a SDK built from Yocto project. GitHub source repo:       https://github.com/gopise/gopbuild What’s made off (a full package, not only the container): 1.    Some scripts and configurations files. 2.    SDK built from Yocto. 3.    Uboot/kernel from specific version. 4.    A hello-world to demonstrate how to build app in this environment. 5.    A slimmed rootfs binary from specific BSP pre-built as base. Will customize base on the source under “rootfs” folder. Only a placeholder in the container-only version. How to use it: Several common used board configurations have been included in the script: 6qsabresd/6qsabreai/6qpsabreai. You can add more into the “gopbuild” script easily. The “sabresd” has been set as default.      If you want to build all for sabresd (First of all, de-compress the package): cd <de-compressed-folder> source envsetup [It will prompt for selecting board configuration to be built. Choose one by input corresponding number or click <ENTER> for default board.] gmk ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍      If you want to build specific module for default board, such as uboot: gmk uboot ‍‍‍‍‍‍‍‍‍      Build kernel for sabreai board instead of default device: gmk kernel sabreai ‍‍‍‍‍‍‍‍‍      Clean everything? gmk all clean ‍‍‍‍‍‍‍‍‍ After a successfully full build, you will get everything under “output” folder, including a log folder contains full build log:      “u-boot.imx/zImage/rootfs.tar.bz2/*.dtb”, can be used with MFG or uuu.      “fsl-image.sdcard”, can be burn into SD card directly. "Ready-for-building" Package: The "gopbuild" itself is a "container-only" package which doesn't contain any source or SDK. I've also made some packages based on latest BSP release for i.MX6/i.MX7/i.MX8. These packages are "ready-for-build" package which you can de-compress and build it directly. -------------------------------------------------------------------------------------------------- URL:https://pan.baidu.com/s/1Xlh1OBGsTRXez_NQw-Rjxg Password: gdc9 -------------------------------------------------------------------------------------------------- Note: 1. To build for i.MX8 (8QM/8MQ/8QXP), you need L4.14.* or above. 2. To build for i.MX8, please download the SCFW from i.MX software page       i.MX Software and Development Tools | NXP      After download, decompress corresponding package for specific chip and put it under "/platform/scfw/". Take i.MX8QXP for example:             /platform/scfw/scfw_export_mx8qx/ All material (uboot/kernel/test code and SDK) are from official Yocto release. Thanks!
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When you do long test (days or weeks) test on i.MX board and your test fails, you often wants to know what has happen with a JTAG probe. The problem is when you have 50 boards running in parallel, you don't have the budget to have 50 JTAG debug probe. If you do a "hot plug" of your JTAG probe, you have roughly one chance out 2 to reset your board... so you'll have to wait another couple of hour to resee the problem. Anyway to have a reliable JTAG plug with no reset, it is really simple... cut the RESET line on your cable! then you'll still be able to "attach" to your i.MX. On the MEK board, with a 10-pin JTAG connector, you have the cut the cable line 10 of the ribbon cable: On the cable, cut the reset line like this: With my Lauterbach JTAG  probe, when I do a "hot plug" I never have a reset of my i.MX. BR Vincent
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Hello everyone, this document will explain on how to use the UUU (Universal Update Utility) tool to flash Linux to an i.MX device (i.MX 8MM).   Requirements:   MX 8M Mini EVK UUU tool documentation, available here Linux Binary Demo Files - i.MX 8MMini EVK UUU 1.2.135 binary Serial console emulator (tera term or putty)   UUU auto script For this example is used the L4.14.98_2.0.0_ga demo image for the i.MX 8MM, inside the demo image we will find the auto script, which by default flash the eMMC of the board, the structure of the script is as following   /***********************************************************************************/ uuu_version 1.2.39   # This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ SDP: boot -f imx-boot-imx8mmevk-sd.bin-flash_evk   # This command will be run when ROM support stream mode # i.MX8QXP, i.MX8QM SDPS: boot -f imx-boot-imx8mmevk-sd.bin-flash_evk   # These commands will be run when use SPL and will be skipped if no spl # SDPU will be deprecated. please use SDPV instead of SDPU # { SDPU: delay 1000 SDPU: write -f imx-boot-imx8mmevk-sd.bin-flash_evk -offset 0x57c00 SDPU: jump # }   # These commands will be run when use SPL and will be skipped if no spl # if (SPL support SDPV) # { SDPV: delay 1000 SDPV: write -f imx-boot-imx8mmevk-sd.bin-flash_evk -skipspl SDPV: jump # }   FB: ucmd setenv fastboot_dev mmc FB: ucmd setenv mmcdev ${emmc_dev} FB: ucmd mmc dev ${emmc_dev} FB: flash -raw2sparse all fsl-image-validation-imx-imx8mmevk.sdcard FB: flash bootloader imx-boot-imx8mmevk-sd.bin-flash_evk FB: ucmd if env exists emmc_ack; then ; else setenv emmc_ack 0; fi; FB: ucmd mmc partconf ${emmc_dev} ${emmc_ack} 1 0 FB: done /***********************************************************************************/    In short, when the board goes into serial downloader mode UUU downloads the bootloader to internal RAM, once done and uboot is running, through fastboot utility it will flash .sdcard file and uboot to the eMMC on the board.   More information about the protocol UUU use please refer to the UUU documentation (UUU.pdf) section 5 Supported protocol.   Running the tool In order to run the tool the binary of uuu needs to be downloaded, the binary files can be downloaded from the link above, uuu.exe is for Windows and uuu is for Linux. Once downloaded it can be placed inside the same file as the demo image, this so it is easy to run and cleaner on the shell commands.   Windows In windows OS the tool should be run using the Windows PowerShell in administrator mode, once open we will run the next commands: > .\uuu.exe uuu.auto   Linux >$ sudo ./uuu uuu.auto   The tool will start running and should be waiting for any i.MX device to be detected by host pc   Preparing the board For the board to be flashed it is needed to be in download mode, the switch configuration (i.MX 8MM EVK) is as following: SW1101  -  1010XXXXXX SW1102  -  XXXXXXXXX0   Connect a USB cable from the host pc which will run the tool to the USB OTG/TYPE C port, usually specified as download, on the board.   Connect a USB cable from the host to the OTG-to-UART for console output, usually specified as debug, on the board.   Open terminal emulator program with the following settings: Bits per second - 115200 Data bits - 8 Parity - None Stop bits - 1 Flow control - None   Power on the board, the download will start and the serial prompt will show the progress in uboot, wait until the tool show success.   Finally power off the board and change the switch configuration to boot from the eMMC, power on the board again and it should boot successfully!   Built in scripts One can use the built in scripts using the -b option to burn the bootloader  and the rootfs to the target flash, just type the command accordingly to the target flash device.    SD Write bootloader only: Windows: > .\uuu.exe -b sd <bootloader> Linux: $ sudo ./uuu -b sd <bootloader>   Replace <bootloader> for your .imx/.bin file, example using the i.MX 8MM for Windows and Linux respectively below. > .\uur.exe -b sd imx-boot-imx8mmevk-sd.bin-flash_evk $ sudo ./uuu -b sd imx-boot-imx8mmevk-sd.bin-flash_evk    Write whole Linux image Windows: > .\uuu.exe -b sd_all <bootloader> <rootfs>.sdcard Linux: $ sudo ./uuu -b sd_all <bootloader> <rootfs>.sdcard   Replace <bootloader> and <rootfs> for the name of your .imx/.bin and .sdcard files respectively, example using the i.MX 8MM below. > .\uuu.exe -b sd_all  imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard $ sudo ./uuu -b sd_all  imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard   eMMC Write bootloader only Windows: > .\uuu.exe -b emmc <bootloader> Linux: $ sudo ./uuu -b emmc <bootloader>   Example using i.MX 8MM > .\uuu.exe -b emmc imx-boot-imx8mmevk-sd.bin-flash_evk $ sudo ./uuu -b emmc imx-boot-imx8mmevk-sd.bin-flash_evk   Write whole Linux image Windows: > .\uuu.exe -b emmc_all <bootloader> <rootfs>.sdcard Linux: $ sudo ./uuu -b emmc_all <bootloader> <rootfs>.sdcard   Example using i.MX 8MM > .\uuu.exe -b emmc_all imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard $ sudo ./uuu -b emmc_all imx-boot-imx8mmevk-sd.bin-flash_evk fsl-image-validation-imx-imx8mmevk.sdcard   Hope this will helpful for everyone who is starting to use this flashing tool.
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Instrumenting A Board To instrument a board, the connection between the power supply and the target device needs to be broken, usually via a series resistor that's placed on the board. Sometimes the inductor needs to be lifted if no series resistor was included on the rail by the board's designer. In the ideal case, through-hole connections were also provided on the board for the connection of these off-board sensors. Here are three close-up photos that show several boards that have been instrumented: In all three cases, the sensors stand in place via the two outer current carrying wires. The middle and right used insulated wires where as the one on the left used bare wires. In all three cases, the sensor's + connection needs to go towards the power supply and the - connection goes to the target device. The outer wires here are 24-26 gauge. (The relatively heavy gauge wire is used to keep the series resistance of inserting a smart sensor to a minimum.) The ground connection is the middle hole of the smart sensor. In the left and middle photos, a 30 gauge wire connects to the middle hole ground connection on the  board. In the right photo, the ground wire was more conveniently added to a big cap just below the bottom of edge of the photo. Here are wider angle view photos of two of the boards above: The sensors on the left are free-standing since the current carrying wires are stiff enough to hold them upright. Care must be taken since too much flexing will cause a wire to break. Too much bending can also cause a short to the board (and that's why insulated wires were used on these boards). The board on the right has the sensors laying parallel to the board. They are not affixed to the board, but a wire is wrapped around the bundle of ribbon cables out of view past the right edge of the photo. For boards without the through hole connections, the smart sensors need to be immobilized to keep from pulling the SMT pads off the board. If there is room on the board or sides of connectors or large components, the sensors may be attached down with foam double-sticky tape (see photo below, sensor affixed on top i.MX7ULP): For boards where there are no convenient unpopulated areas or there are too many sensors, some other means needs to be devised to immoblize the smart sensors. In the left photo below, two inductors per sensor have been flipped and the two sensors inserted to instrument the two rails. The solder pads on the inductors would easily be broken off by any movement of the smart sensors, so a cage with clamps to hold the ribbon cables was 3D printed. On the back side, there is room for the aggregator to be zip tied to the bottom plate, so the instrumented board can be moved as a single unit with minimal flexing of the ribbon cables.
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The Linux L4.14.98_1.0.0_GA; and SDK2.5 for 8QM/8QXP Post GA, SDK2.5.1 for 7ULP GA3 release are now available. Linux on IMX_SW web page, Overview -> BSP Updates and Releases -> Linux L4.14.98_2.0.0 SDK on https://mcuxpresso.nxp.com Files available: Linux:  # Name Description 1 imx-yocto-L4.14.98_2.0.0_ga.zip L4.14.98_2.0.0 for Linux BSP Documentation. Includes Release Notes, User Guide. 2 L4.14.98_2.0.0_ga_images_MX6QPDLSOLOX.zip i.MX 6QuadPlus, i.MX 6Quad, i.MX 6DualPlus, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo, i.MX 6Solox Linux Binary Demo Files 3 L4.14.98_2.0.0_ga_images_MX6SLLEVK.zip i.MX 6SLL EVK Linux Binary Demo Files 4 L4.14.98_2.0.0_ga_images_MX6UL7D.zip i.MX 6UltraLite EVK, 7Dual SABRESD, 6ULL EVK Linux Binary Demo Files 5 L4.14.98_2.0.0_ga_images_MX7DSABRESD.zip i.MX 7Dual SABRESD Linux Binary Demo Files  6 L4.14.98_2.0.0_ga_images_MX7ULPEVK.zip i.MX 7ULP EVK Linux Binary Demo Files  7 L4.14.98_2.0.0_ga_images_MX8MMEVK.zip i.MX 8MMini EVK Linux Binary Demo Files  8 L4.14.98_2.0.0_ga_images_MX8MQEVK.zip i.MX 8MQuad EVK Linux Binary Demo files 9 L4.14.98_2.0.0_ga_images_MX8QMMEK.zip i.MX 8QMax MEK Linux Binary Demo files 10 L4.14.98_2.0.0_ga_images_MX8QXPMEK.zip i.MX 8QXPlus MEK Linux Binary Demo files 11 imx-scfw-porting-kit-1.2.tar.gz System Controller Firmware (SCFW) porting kit of L4.14.98_2.0.0 12 imx-aacpcodec-4.4.5.tar.gz Linux AAC Plus Codec v4.4.5 13 VivanteVTK-v6.2.4.p4.1.7.8.tgz Vivante Tool Kit v6.2.4.p4.1.7.8   SDK: On https://mcuxpresso.nxp.com/, click the Select Development Board, EVK-MCIMX7ULP//MEK-MIMX8QM/MEK-MIMX-8QX to customize the SDK based on your configuration then download the SDK package.  Target board: MX 8 Series MX 8QuadXPlus MEK Board MX 8QuadMax MEK Board MX 8M Quad EVK Board MX 8M Mini EVK Board MX 7 Series MX 7Dual SABRE-SD Board MX 7ULP EVK Board MX 6 Series MX 6QuadPlus SABRE-SD and SABRE-AI Boards MX 6Quad SABRE-SD and SABRE-AI Boards MX 6DualLite SDP SABRE-SD and SABRE-AI Boards MX 6SoloX SABRE-SD and SABRE-AI Boards MX 6UltraLite EVK Board MX 6ULL EVK Board MX 6ULZ EVK Board MX 6SLL EVK Board What’s New/Features: Please consult the Release Notes.   Known issues For known issues and more details please consult the Release Notes.   More information on changes of Yocto, see: README: https://source.codeaurora.org/external/imx/imx-manifest/tree/README?h=imx-linux-sumo ChangeLog: https://source.codeaurora.org/external/imx/imx-manifest/tree/ChangeLog?h=imx-linux-sumo#
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This document is about to build an image by Yocto , and it will disable a function that normal user can’t use command line of “ su ”.
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The purpose of this document is to provide a guide on how to export new symbols using the Bazel Android server instead of the build_abi.sh script. For a better reference how to build Android i.MX image please look at the next chapter 3 Building the Android Platform for i.MX in the Android User's Guide 1. Compile full AOSP or only kernel Build full AOSP: $ source build/envsetup.sh $ lunch evk_8mp-eng $ ./imx-make.sh -j8  Only build the kernel: $ ./imx-make.sh kernel -j8 2. Generic Kernel Image GKI Development Download GKI outside of android_build (MY_ANDROID). # Make sure MY_ANDROID is set to the android_build folder. $ export MY_ANDROID=`pwd` # mkdir gki && cd gki (Make sure folder gki is not inside of ${MY_ANDROID}) $ repo init -u https://android.googlesource.com/kernel/manifest -b common-android14-6.1 $ repo sync $ cd common 3. Export New Symbols Switch the kernel in this common folder from AOSP to its device, and apply the patches required for your project. In this case Android $ cd common $ git remote add device https://github.com/nxp-imx/linux-imx.git $ git remote update $ git fetch device --tags $ git checkout android-14.0.0_1.2.0 $ cd .. $ ln -s ${MY_ANDROID}/vendor/nxp-opensource/verisilicon_sw_isp_vvcam verisilicon_sw_isp_vvcam $ ln -s ${MY_ANDROID}/vendor/nxp-opensource/nxp-mwifiex nxp-mwifiex $ BUILD_FOR_GKI=yes BUILD_CONFIG=common/build.config.imx $ EXT_MODULES_MAKEFILE="verisilicon_sw_isp_vvcam/vvcam/v4l2/Kbuild" $ EXT_MODULES="nxp-mwifiex/mxm_wifiex/wlan_src" Note: Be sure that your Symbolic Link is pointing to the correct folder Open the Makefile in the following path ../gki/nxp-mwifiex/mxm_wifiex/wlan_src/ and erase some ifreq lines that will generate a No such file or directory error. #Automatically determine Android version from build information to streamline diff --git a/mxm_wifiex/wlan_src/Makefile b/mxm_wifiex/wlan_src/Makefile index 3ec5308..7b6ca47 100644 --- a/mxm_wifiex/wlan_src/Makefile +++ b/mxm_wifiex/wlan_src/Makefile @@ -139,20 +139,7 @@ CONFIG_ANDROID_KERNEL=y ifeq ($(ANDROID_PRODUCT_OUT),1) ccflags-y += -DANDROID_SDK_VERSION=$(ANDROID_SDK_VERSION) else -include $(ANDROID_BUILD_TOP)/build/make/core/build_id.mk -ifeq ($(shell echo "$(BUILD_ID)" | cut -c1),R) - ccflags-y += -DANDROID_SDK_VERSION=30 -else ifeq ($(shell echo "$(BUILD_ID)" | cut -c1),S) - ccflags-y += -DANDROID_SDK_VERSION=31 -else ifeq ($(shell echo "$(BUILD_ID)" | cut -c1),T) - ccflags-y += -DANDROID_SDK_VERSION=33 -else ifeq ($(shell echo "$(BUILD_ID)" | cut -c1),U) - ccflags-y += -DANDROID_SDK_VERSION=34 -else - # Default optimization or actions - ANDROID_SDK_VERSION := 0 - ccflags-y += -DANDROID_SDK_VERSION -endif +ccflags-y += -DANDROID_SDK_VERSION=34 endif endif endif -- Then you could update the symbol list by typing the following command. $ tools/bazel run //common:imx_abi_update_symbol_list After the build process is successful, you should get an output like the image below. Build GKI locally. $ tools/bazel run //common:kernel_aarch64_dist  You could follow the next chapters to update the GKI image to your boot image.
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  For some applications, we need to reduce the CPU Frequency, but if you are not familiar with our BSP or our devices probably you need some help to do some configurations.   In this post, I will share the configuration to set up lower frequencies (100MHz, 200MHz, 400Mhz, 600MHz, 800MHz, and 1000MHz) on iMX8MP, iMX8MN, and iMX8MM.   Note: Works on Kernel 6.1.xx (not tested on oldest BSP)   1- We have to modify the PLL driver to set the proper parameters to lower frequencies. The file to modify is "clk-pll14xx.c" adding the following lines:   https://github.com/nxp-imx/linux-imx/blob/770c5fe2c1d1529fae21b7043911cd50c6cf087e/drivers/clk/imx/clk-pll14xx.c#L57   static const struct imx_pll14xx_rate_table imx_pll1416x_tbl[] = { PLL_1416X_RATE(1800000000U, 225, 3, 0), PLL_1416X_RATE(1600000000U, 200, 3, 0), PLL_1416X_RATE(1500000000U, 375, 3, 1), PLL_1416X_RATE(1400000000U, 350, 3, 1), PLL_1416X_RATE(1200000000U, 300, 3, 1), PLL_1416X_RATE(1000000000U, 250, 3, 1), PLL_1416X_RATE(800000000U, 200, 3, 1), PLL_1416X_RATE(750000000U, 250, 2, 2), PLL_1416X_RATE(700000000U, 350, 3, 2), PLL_1416X_RATE(600000000U, 300, 3, 2), + PLL_1416X_RATE(400000000U, 200, 3, 2), + PLL_1416X_RATE(200000000U, 200, 3, 3), + PLL_1416X_RATE(100000000U, 200, 3, 4), };   2- Once the pll driver has been modified, only we have to add the values on the opp-table according to the device that you will use.   2.1- For iMX 8MP:   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mp.dtsi         a53_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x8a0>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>;   2.2 For iMX8MM:   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mm.dtsi     a53_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xe>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>;   2.3- For iMX8MN:   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mn.dtsi   compatible = "operating-points-v2"; opp-shared; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0xb00>, <0x7>; + clock-latency-ns = <150000>; + opp-suspend; + }; + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <850000>;   After that, you should note the changes under Linux.   These commands return information about the system and the current settings.   • The kernel is pre-configured to support only certain frequencies. The list of frequencies currently supported can be obtained from: cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies   • To get the available scaling governors: cat /sys/devices/system/cpu/*/cpufreq/scaling_available_governors   • To check the current CPU frequency: cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_cur_freq   The frequency is displayed depending on the governor set.   • To check the maximum frequency: cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_max_freq   • To check the minimum frequency: cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_min_freq   These commands set a constant CPU frequency:   • Use the maximum frequency: echo performance > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor   • Use the current frequency to be the constant frequency: echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor   • The following two commands set the scaling governor to a specified frequency, if that frequency is supported.   If the frequency is not supported, the closest supported frequency is used:   echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor echo <frequency> > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed    
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Platform: Demo images, i.MX8MPlus EVK   Some customer need test ffs gadget function on i.MX8MPlus EVK. Here is demo for ffs test, please connect EVK and Ubuntu PC before test.   Test script: #!/bin/sh # Setup the device (configfs) modprobe libcomposite mkdir -p config mount none config -t configfs cd config/usb_gadget/ mkdir g1 cd g1 echo 0x1fc9 >idVendor echo 0x0146 >idProduct mkdir strings/0x409 echo 12345 >strings/0x409/serialnumber echo "Signal 11" >strings/0x409/manufacturer echo "Test" >strings/0x409/product mkdir configs/c.1 mkdir configs/c.1/strings/0x409 echo "Config1" >configs/c.1/strings/0x409/configuration # Setup functionfs mkdir functions/ffs.usb0 ln -s functions/ffs.usb0 configs/c.1 cd ../../../ mkdir -p ffs mount usb0 ffs -t functionfs cd ffs ffs-test 64 & # from the Linux kernel, with mods! sleep 3 cd .. # Enable the USB device echo 38100000.usb > config/usb_gadget/g1/UDC   EVK log root@imx8mpevk:~# ./test2.sh [ 17.859597] file system registered ffs-test: dbg: ep0: writing descriptors (in v2 format) ffs-test: dbg: ep0: writing strings ffs-test: dbg: ep1: starting ffs-test: dbg: ep2: starting ffs-test: dbg: ep1: starts ffs-test: dbg: ep0: starts ffs-test: dbg: ep2: starts Event BIND Event ENABLE Ubuntu PC log: lzm@lzm-GL552VW:~$ lsusb -D /dev/bus/usb/001/008 Device: ID 1fc9:0146 NXP Semiconductors Test Device Descriptor: bLength 18 bDescriptorType 1 bcdUSB 2.10 bDeviceClass 0 bDeviceSubClass 0 bDeviceProtocol 0 bMaxPacketSize0 64 idVendor 0x1fc9 NXP Semiconductors idProduct 0x0146 bcdDevice 6.01 iManufacturer 1 Signal 11 iProduct 2 Test iSerial 3 12345 bNumConfigurations 1 Configuration Descriptor: bLength 9 bDescriptorType 2 wTotalLength 0x0020 bNumInterfaces 1 bConfigurationValue 1 iConfiguration 4 Config1 bmAttributes 0x80 (Bus Powered) MaxPower 2mA Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber 0 bAlternateSetting 0 bNumEndpoints 2 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass 0 bInterfaceProtocol 0 iInterface 5 Source/Sink Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x81 EP 1 IN bmAttributes 2 Transfer Type Bulk Synch Type None Usage Type Data wMaxPacketSize 0x0200 1x 512 bytes bInterval 0 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x01 EP 1 OUT bmAttributes 2 Transfer Type Bulk Synch Type None Usage Type Data wMaxPacketSize 0x0200 1x 512 bytes bInterval 1 Binary Object Store Descriptor: bLength 5 bDescriptorType 15 wTotalLength 0x0016 bNumDeviceCaps 2 USB 2.0 Extension Device Capability: bLength 7 bDescriptorType 16 bDevCapabilityType 2 bmAttributes 0x0000010e BESL Link Power Management (LPM) Supported BESL value 256 us SuperSpeed USB Device Capability: bLength 10 bDescriptorType 16 bDevCapabilityType 3 bmAttributes 0x00 wSpeedsSupported 0x000f Device can operate at Low Speed (1Mbps) Device can operate at Full Speed (12Mbps) Device can operate at High Speed (480Mbps) Device can operate at SuperSpeed (5Gbps) bFunctionalitySupport 1 Lowest fully-functional device speed is Full Speed (12Mbps) bU1DevExitLat 0 micro seconds bU2DevExitLat 0 micro seconds Device Status: 0x0001 Self Powered  
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How to use UART4 on iMX8M from Linux User Space   The UART4 on iMX8MM-EVK and iMX8MN-EVK are thinking of debugging the M core which is not usable on Linux user space by default on pre-compiled images.   To use the UART4 on Linux user space you have to do the next modifications on the device tree and atf to assign that peripheral to Linux User Space     https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c     iMX8MN-EVK   imx8mn_bl31_setup.c   https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c   /* Master domain assignment */ RDC_MDAn(RDC_MDA_M7, DID1), /* peripherals domain permission */ - RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W), + RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), RDC_PDAPn(RDC_PDAP_RDC, D0R | D0W | D1R),       Device tree configurations for iMX8MN-EVK   iMX8MN-EVK.dtsi   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi   &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clk IMX8MN_CLK_UART3>; assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; uart-has-rtscts; status = "okay"; }; + &uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + assigned-clocks = <&clk IMX8MN_CLK_UART4>; + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; + status = "okay"; + }; ********************** pinctrl_uart3: uart3grp { fsl,pins = < MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140 MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140 MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140 MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140 >; }; + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 + MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 + >; + };   iMX8MM-EVK   https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c   imx8mm_bl31_setup.c   /* Master domain assignment */ RDC_MDAn(RDC_MDA_M7, DID1), /* peripherals domain permission */ - RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W), + RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), RDC_PDAPn(RDC_PDAP_RDC, D0R | D0W | D1R),   Device tree configurations for iMX8MM-EVK   iMX8MM-EVK.dtsi   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi   &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clk IMX8MM_CLK_UART3>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; uart-has-rtscts; status = "okay"; }; + &uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + assigned-clocks = <&clk IMX8MM_CLK_UART4>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; + status = "okay"; + }; ********************** pinctrl_uart3: uart3grp { fsl,pins = < MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140 MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140 MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140 MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140 >; }; + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 + MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 + >; + };   iMX8MP-EVK   https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c   imx8mp_bl31_setup.c   RDC_MDAn(RDC_MDA_M7, DID1), RDC_MDAn(RDC_MDA_LCDIF, DID2), RDC_MDAn(RDC_MDA_LCDIF2, DID2), RDC_MDAn(RDC_MDA_HDMI_TX, DID2), /* peripherals domain permission */ + RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), RDC_PDAPn(RDC_PDAP_WDOG1, D0R | D0W), RDC_PDAPn(RDC_PDAP_RDC, D0R | D0W | D1R),   Device tree configurations for iMX8MP-EVK   iMX8MP-EVK.dts   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mp-evk.dts   &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clk IMX8MP_CLK_UART3>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; fsl,uart-has-rtscts; status = "okay"; }; + &uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + assigned-clocks = <&clk IMX8MP_CLK_UART4>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; + status = "okay"; + }; ************************************ pinctrl_uart3: uart3grp { fsl,pins = < MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140 MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140 MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140 MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140 >; }; + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140 + MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140 + >; + };     After compiling the image with the changes previously shown, we obtained this result:      
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test ov5640 with 480p, raw10 via ISP on imx8mp
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this article write down the steps when help customer bring dual camera under single mipi csi with NXP switch NX3DV642, just for a reference, connect OV5640 + os08a20 with mipi csi0 via ISP, as default, mipi csi0 just has one port with one camera, this document improve how to enable os08a20 with second port under mipi csi0, refer to the document and patch as attachment, for how to enable ov5640 with ISP, pls refer to my another document
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Platform i.MX8MPlus EVK, Android 13 Background Customer find we have enabled all configs about pstore and ramoops, but they can't get ramoops log in /sys/fs/pstore node on Android 13. Solution The default reboot will reset all hardware including the DDR control, so this will result in the loss of the log stored in RAM. We have include such codes in ATF, the default code will use imx_wdog_restart(true) to reset all hardware. void __dead2 imx_system_reset(void) { #ifdef IMX_WDOG_B_RESET imx_wdog_restart(true); #else imx_wdog_restart(false); #endif }   To avoid DDR reset, we should comment  IMX_WDOG_B_RESET in vendor/nxp-opensource/arm-trusted-firmware/plat/imx/imx8m/imx8mp/include/platform_def.h   Result evk_8mp:/sys/fs/pstore # ls console-ramoops-0 dmesg-ramoops-0 pmsg-ramoops-0  
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Installing the new release (Ubuntu 22.04) was detected some NXP boards as iMX8MNEVK, iMX8MM-EVK, iMX8MP-EVK and iMX8ULP-EVK had an issue with the WIFI module that basically it does not initialize at boot. Remember, the supported WIFI modules in Ubuntu 22.04 in the EVKs are the following:       • NXP 88W8987       • NXP 88W9098       • NXP 88W8997       • NXP IW416       • NXP 88W8801       • NXP IW612 To initialize the WIFI module of NXP EVKs in Ubuntu 22.04 you can set the following command in console:   sudo modprobe moal mod_para=nxp/wifi_mod_para.conf   That command find the correct driver for our WIFI module and then initialize it, but this only works when Ubuntu is working and if you reset the EVK you need to set the command again.   The definitive solution is create a custom startup script as a service:   Step 1: Go to etc/systemd/system   cd etc/systemd/system   Step 2: In this directory create a new file with the name of your preference but the extension must be .service. You can do it with nano or vim: sudo nano or sudo vim   The file must contain: [Unit] Description=”Wifi Start” [Service] ExecStart=sudo modprobe moal mod_para=nxp/wifi_mod_para.conf [Install] WantedBy=multi-user.target   Now save the file, in my case the name was wifi_start.service.   Step 3: Now we need to enable the script in the startup/boot sequence following the command: sudo systemctl enable wifi_start.service   Remember in wifi_start.service is the name as you saved your file.   Finally, each time you boot your board, the WIFI module will initialize automatically.   Boards tested: iMX8MN (With WIFI module NXP 88W8987) iMX8MM (With WIFI module NXP 88W8987) iMX8MP (With WIFI module NXP 88W8997) iMX8ULP (With WIFI module NXP IW416)  
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In the i.MX 8M Plus LPDDR4 EVK board there are two Type-C port design. For the port0 is used to power supply no usb function, for the port1 used for USB function but without PD function. But in customer’s design, customer only use one USB design on their board, how to make the one USB work with the PD and USB function, we need to make the hardware design and software modify. This article only give method to realized it and have tested and realized the port1 PD function. 1 Introduction of the USB interface on i.MX8MP         There are two USB 3.0 TypeC controllers with integrated PHY interface on the i.MX8MP: Backward compatibility with USB 2.0 Spread spectrum clock support   The USB on the i.MX8MP supports USB3.0 and is compatible with USB2.0 downward. We can see that the upper layer is the universal layer for USB 2.0 and USB 3.0 operations. This is a common interface, buffer management block, list processor, used to schedule and control the status register (CSR) function: USB 2.0 physical layer and MAC layer USB 3.0 physical layer, link layer and MAC layer   Features of USB 3.0: USB compliant version 3.0 (xHCI compatible) Supports operation as a stand-alone USB host controller USB dual role operation, configurable as host or device Ultra high speed (5Gbit/s), high speed (480Mbit/s), full speed (12Mbit/s) and low speed (1.5Mbit/s) operation. Support independent single port USB operation Support for four programmable bidirectional USB endpoints Support system memory interface with 40 bit addressing capability   2 Design of USB on Development Board         The i.MX 8M Plus processor includes two USB 2.0/3.0 controllers and two integrated USB PHYs. USB supports both running as an independent USB host controller and dual role USB operation, and can be configured as a host or device. Therefore, the design of these two functions is implemented on the development board of i.MX8MP.   We can see that on the development board, one USB1 is used for the USB Type-C port and the other USB2 is used for the USB 3.0 host port. USB Type-C port 0 (J5) is only used for power supply. It does not support USB data transfer. It is the only power port, so the system must always be powered.   On the CPU side of the schematic diagram, we can also see that USB1 is the port for USB Type-C, and USB2 is the host for USB3.0.    USB1 is designed as USB Type-C:   USB2 USB3.0 Host design:   Power design of the USB Type-C port:   3 Only one USB interface is used in the design (compatible with both USB PD function and USB dual roles function)         Two USB Type-C ports are used on our development board. One is used to power the board separately, and the other is used as the function of USB Type-C. However, due to the limited design cost and chip layout and space on the board, some customers will use a USB interface to realize the dual role function of power supply and USB. How to achieve this? USB Device(Download mode):     USB Host mode(power+device Need the hub support PD function):     The specific implementation and design are as follows: 3.1 Hardware realize PTN5110 To realize the USB Type-C support power supply function, PTN5110 (USB PD TCPC PHY IC) chip is required to realize Type-C data logic and power control and management. The selection of PTN5110 is critical and important.   PTN5110 is a single port USB PD (power supply) PHY IC that conforms to TCPC. It integrates Type-C configuration channel (CC) interface and USB PD physical layer functions into Type-C port manager (TCPM) that handles PD policy management. It complies with USB PD, Type-C and TCPC specifications.   The IC is mainly aimed at applications in system platforms (such as laptops, desktops, Chromebooks, tablets, flip notebooks, etc.). Other application cases may be feasible, depending on the application architecture, such as docking stations, displays, accessories, cable adapters, smartphones, etc.   It can support various Type-C applications: Sink, Source, Sink with accessory support or DRP. It executes Type-C CC simulation part (i.e. Rd/Rp/Ra detection, Rd/Rp indication) and PD Tx/Rx PHY and protocol state machine. PTN5110 supports TCPM in the system implementation of the following PD roles.   PTN5110 integrates VCONN load switch, programmable current limit, reverse leakage current blocking and over temperature protection (OTP). It is equipped with two enable control outputs to control the load switch/FET in the VBUS pull and/or sink path. It can also perform VBUS voltage monitoring/measurement, VBUS forced discharge and discharge discharge.   PTN5110 provides the main IO related functions for the main processor/TCPM, so that Type-C/PD interfaces can be easily controlled and managed through the TCPC interface.   PTN5110 supports a wide range of power input voltages, providing platform integrators with great flexibility. PTN5110 can run on VBUS to support specific system use cases that require no power operation.https://www.nxp.com/products/interfaces/usb-interfaces/usb-type-c/usb-pd-phy-and-cc-logic/usb-pd-tcpc-phy-ic:PTN5110   The design only use the USB1:   Here, it is required to weld R53 or R54. You can refer to this design completely. 2 Software modify Modify the BPS of the software: Take the newest released Linux 5.15.32_2.0.0​ as example: In the u-boot /board/freescale/imx8mp_evk/imx8mp_evk.c     It can be seen that the PD function of the port is turned off, so if you want to use USB1 for power supply, remove the following commands and turn on the PD function of USB1. “-   .disable_pd = true,” Use the above action to enable Port1 PD function. Kernel section modify: Kernel section modify towards to PTN5110. Type-C Configure channel (CC) interface: root/drivers/usb/typec/tcpm/tcpci.c @@ -524,6 +524,7 @@ static int tcpci_vbus_force_discharge(struct tcpc_dev *tcpc, bool enable)  static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)  {        struct tcpci *tcpci = tcpc_to_tcpci(tcpc); +      unsigned int reg;        int ret;          if (tcpci->data->set_vbus) { @@ -533,16 +534,20 @@ static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)                         return ret < 0 ? ret : 0;        }   +      ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, &reg); +      if (ret < 0) +              return ret; +        /* Disable both source and sink first before enabling anything */   -       if (!source) { +      if (!source && (reg & TCPC_POWER_STATUS_SOURCING_VBUS)) {                 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,                                     TCPC_CMD_DISABLE_SRC_VBUS);                 if (ret < 0)                         return ret;        }   -       if (!sink) { +      if (!sink && (reg & TCPC_POWER_STATUS_SINKING_VBUS)) {                 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,                                     TCPC_CMD_DISABLE_SINK_VBUS);                 if (ret < 0)   Type-C port manager managed by PD (TCPM): root/drivers/usb/typec/tcpm /tcpm.c @@ -340,6 +340,7 @@ struct tcpm_port {         */        bool vbus_vsafe0v;   +      bool vbus_keep;        bool vbus_never_low;        bool vbus_source;        bool vbus_charge; @@ -3662,7 +3663,8 @@ static void tcpm_reset_port(struct tcpm_port *port)        port->rx_msgid = -1;          port->tcpc->set_pd_rx(port->tcpc, false); -       tcpm_init_vbus(port);     /* also disables charging */ +      if (!port->vbus_keep) +              tcpm_init_vbus(port);  /* also disables charging */        tcpm_init_vconn(port);        tcpm_set_current_limit(port, 0, 0);        tcpm_set_polarity(port, TYPEC_POLARITY_CC1); @@ -5834,6 +5836,9 @@ static void tcpm_init(struct tcpm_port *port)          port->tcpc->init(port->tcpc);   +      port->vbus_present = port->tcpc->get_vbus(port->tcpc); +      if (port->vbus_present) +              port->vbus_keep = true;        tcpm_reset_port(port);          /* @@ -5872,7 +5877,10 @@ static void tcpm_init(struct tcpm_port *port)         * Some adapters need a clean slate at startup, and won't recover         * otherwise. So do not try to be fancy and force a clean disconnect.         */ -       tcpm_set_state(port, PORT_RESET, 0); +      if (!port->vbus_keep) +              tcpm_set_state(port, PORT_RESET, 0); + +      port->vbus_keep = false;  }    static int tcpm_port_type_set(struct typec_port *p, enum typec_port_type type) Note: The software just needs to modify these two parts. You also need to mention to the proper the I2C port use, if not proper the driver of the PTN5110 can not driver. 4 Test         In our i. MX8MP EVK development board show that R53 and R54 in the USB1 part of our development board are in DNP status, so VBUS_ IN is disconnected and no power comes in. Here, connect R53 or R54 with solder, so that VBUS_ IN, the power comes in again. After the power is connected. The board can be powered through USB1. 4.1 Download images to the emmc on the Board: Power from the USB1, set the boot mode to serial download mode, then go to download images finished. 4.2 Boot up the board from the EMMC Change the boot mode to boot up from EMMC,the board boot up, the log file is as following show:   It will stop at the TCPC for the section of PTN5110 driver. By default, the PD function of port1 in the u-boot is turned off, so if you want to use USB1 for power supply, remove the following commands and turn on the PD function of USB1. “-   .disable_pd = true,” After the PD function is turned on, the board can be started normally, but the whole part running to the kernel will be powered down, so the kernel part of PTN5110 still needs to be modified. After the patch modification of the above kernel part, the board can run normally.         I also did the same experiment on the i.MX8MM EVK development board. The same phenomenon occurs when the kernel starts. Therefore, similar modifications to the above i. MX8MP can work normally. Summary: In one word i.MX8MP and i.MX8M series can realize the role of using a USB for power supply and USB Dual. The hardware design refers to our development board, and we must use the logic chip PTN5110. For software, refer to the above code modification.  
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BSP: L5.15.5_1.0.0   Platform: i.MX8MPlus EVK   1. Parameter preparation For more parameter calculation, please refer to: https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/iMX-8M- Mini-Register-Programming-Aid-DRAM-PLL-setting/ta-p/111209  For 1866MHz LPDDR4, we need a DRAM PLL size of 933MHz. The PLL dividing parameters are: m=622,p=16,s=0, k=0.   2. Calibration and stress test with DDR Tool 2.1 Creating a test script for 1866MHz Here we copy the script from another file (e.g. 2000MHz) and modify the contents of the script.   2.2 Modify the script to adapt to 1866MHz 2.3 Download the test script After selecting the ddr script we created, click on the download button   2.4 Calibrating the stress test Set the core clock of the chip's cpu to 1.2GHz, then click the Calibration button to calibrate, then click Gen Code to generate the lpddr4_timing.c file. Set the start frequency to 1866MHz for the stress test.   2.5 Modify lpddr4_timing.c We need to modify the generated lpddr4_timing.c file to change the maximum speed to 3732MTS.   3. SPL patch After getting the correct lpddr4_timing.c file, the SPL code also needs to be modified to add support for the 933MHz DRAM PLL. diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index e39f238fdf...5622a6334e 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -55,6 +55,7 @@ static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(650000000U, 325, 3, 2, 0), PLL_1443X_RATE(600000000U, 300, 3, 2, 0), PLL_1443X_RATE(594000000U, 99, 1, 2, 0), + PLL_1443X_RATE(933000000U, 622, 16, 0, 0), PLL_1443X_RATE(400000000U, 400, 3, 3, 0), PLL_1443X_RATE(2660000U, 266, 3, 3, 0), PLL_1443X_RATE(167000000U, 334, 3, 4, 0), diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c index 326b92d784..ebd005bc2b 100644 --- a/drivers/ddr/imx/imx8m/ddrphy_utils.c +++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c @@ -117,6 +117,10 @@ void ddrphy_init_set_dfi_clk(unsigned int drate) dram_pll_init(MHZ(1000)); dram_disable_bypass(); break; + case 3732: + dram_pll_init(MHZ(933)); + dram_disable_bypass(); + break; case 3200: dram_pll_init(MHZ(800)); dram_disable_bypass();   4. Test results   Reference blog. DDR Tool: https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/1104467  RPA: https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8MPlus-m865S-DDR-Register-Programming-Aids-RPA/ta-p/1235352 
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 This article instruct customer how to develop on i.MX8MP NPU and how to debug performance. 
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In some cases, i.MX board connect to different module. It has very tiny changes, such as just one gpio different driver strength. We can build an entire new software to handle this requirement. Here we introduce another way, using u-boot to modify the device tree(dtb) at runtime.   Here is u-boot fdt command for  How to use gpio-hog demo https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-use-gpio-hog-demo/ta-p/1317709   run loadfdt fdt addr ${fdt_addr_r} fdt print /soc/bus/pinctrl/uart3grp fdt rm /soc/bus/pinctrl/uart3grp fdt print serial2 fdt set serial2 status disabled fdt print serial2 fdt print gpio4 fdt resize fdt mknode gpio4 gpio_hog_demo fdt set gpio4/gpio_hog_demo gpio-hog fdt set gpio4/gpio_hog_demo gpios <7 0> fdt set gpio4/gpio_hog_demo output-high fdt print gpio4 run mmcargs run loadimage booti ${loadaddr} - ${fdt_addr_r} root@imx8mmevk:~# cat /sys/kernel/debug/gpio gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio: gpio-5 ( |PCIe DIS ) out hi gpio-13 ( |ir-receiver ) in hi IRQ ACTIVE LOW gpio-15 ( |cd ) in hi IRQ ACTIVE LOW gpiochip1: GPIOs 32-63, parent: platform/30210000.gpio, 30210000.gpio: gpio-38 ( |? ) out hi gpio-42 ( |reset ) out lo ACTIVE LOW gpio-51 ( |regulator-usdhc2 ) out lo gpiochip2: GPIOs 64-95, parent: platform/30220000.gpio, 30220000.gpio: gpio-80 ( |status ) out hi gpiochip3: GPIOs 96-127, parent: platform/30230000.gpio, 30230000.gpio: gpio-117 ( |PCIe reset ) out hi gpiochip4: GPIOs 128-159, parent: platform/30240000.gpio, 30240000.gpio: gpio-135 ( |gpio_hog_demo ) out hi gpio-141 ( |spi1 CS0 ) out hi ACTIVE LOW gpio-149 ( |wlf,mute ) out hi ACTIVE LOW root@imx8mmevk:~# [ 33.758914] VSD_3V3: disabling dtc_utils-v1.6.1-win-x86_64.zip by msys2   
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  Some customers are using sgtl5000 in android. So i generate this patch of sgtl5000 in Android11(i.MX8QM)
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