Overview QorIQ® P2020 UTM/Security Appliance Solution enables OEMs to develop a range of security applications including UTM appliances, IPS/IDS appliances, content security appliances, secure routers, VPN routers, secured switches and business gateways. The QorIQ P2020-based UTM appliance enables ODMs and customers to develop a production-ready, BOM optimized, certified, off-the-shelf UTM appliance solution. It allows our customers to leverage high-performance multicore QorIQ silicon and VortiQa® software optimized for multicore for UTM security appliances. Features NXP’s high-performance QorIQ ®  P2020 processor in 45 nm SOI technology VortiQa ®  software for enterprise equipment optimized for multicore processors Integrated security engine: protocol support includes SNOW, ARC4, 3DES, AES, RSA/ECC, RNG, single-pass SSL/TLS, Kasumi Cost-optimized bill of materials by hardware ODMs FCC, UL and CE certified—ready to ship Complete appliance portfolio from low to high end Block Diagram Board Design Resources

Overview The QorIQ® P1025 Data Concentrator reference design will instantly discover and connect with multiple smart energy meters. Featuring an Advanced Metering Infrastructure (AMI), the data concentrator enables bi-directional real-time monitoring and control The data concentrator also enables real-time metering and monitoring on multiple meters and transfers real-time information back to the utility server via a 3G uplink Features High-performance QorIQ ®  P1025 processor with up to 1300 DMIPS available to implement complex usage cases Discovers and interfaces to smart metering devices; implements device machine message specification (DLMS) protocol to standardize communications Broadcast capability to the utility server using a 3G uplink card and Power Line Communications (future development) Board Design Resources

Overview The NXP® P1020 multi-service Business Gateway (MSBG) solution integrates VortiQa® Secure SMB Software with D2 Technologies vPort VoIP software to provide a production-ready solution in a single product. Designed to quickly and cost-effectively create a range of MSBG applications including unified threat management (UTM) appliances, secured routers, VoIP gateway, VPN routers and secured switches Designed to deliver outstanding performance-to-price ratios and dramatically shorten development cycles, the solution tightly integrates optimized low-level software and production-ready boards with NXP's VortiQa application software and multicore PowerQUICC® and QorIQ® processors Features P1020 in 45nm SOI operating at 533-800MHz dual-core e500 processor with 256KB L2 cache with ECC 256MB to 512MB DDR3 SDRAM 4 FXS ports 1 FXO port 1 GbE RGMII port 1 GbE SGMII port 1 GbE port connected to RGMII 5-port switch 2 mini-USB 2.0 ports 1 mini-PCI Express connector 1 PCI Express VortiQa ®  software with Stateful Packet Inspection Firewall and NAT - performance optimized IPsec Virtual Private Network (VPN) with Quality of Service (QoS) and Traffic Management (TM) D2 Technologies optimized voice G.711-Alaw G.711-MuLaw G.729AB G.726 Voice Compression G.168 Echo Cancellation Advanced telephony Full Distributed Unicast Conferencing Call forwarding Call Waiting/ Caller ID Block Diagram Board Design Resources

Overview With over 35 million installed nodes, PROFIBUS is the world’s most successful communication technology used in industrial automation. Its growth and expansion is aided by the addition of PROFIBUS functionality to PowerQUICC® and QorIQ® communications processors. Integration of PROFIBUS Layer 2 creates a single-chip solution with a direct connection to a RS485 transceiver, eliminating cost and board space associated with an external PROFIBUS ASIC NXP® offers PROFIBUS Layer 2 firmware for PowerQUICC and QorIQ processors with a QUICC Engine® controller, eliminating the need for a costly PROFIBUS ASIC and leaving the processor core almost entirely free for processing Features PROFIBUS Reference Platform supports PROFIBUS Slave certified by ComDec, a PROFIBUS certification lab hosted by Siemens AG PROFIBUS Master Eliminates costly PROFIBUS FPGA or ASIC by running PROFIBUS Layer 2 (FDL) on QUICC Engine ®  controller hardware integrated inside the MPU Protocol and customer control application can run simultaneously on one chip Commercial PROFIBUS slave stack available from Technologie Management Gruppe (TMG) Evaluate using Tower ®  System modules (TWR-P1025-KIT) QorIQ ®  P1, T1 and LS1 processors can also provide simultaneous support for Industrial Ethernet protocols like PROFINET, EtherCAT and EtherNet/IP ™ PowerQUICCC MPC8309 processor delivers an impressive 835 DMIPS core performance for less than 1.6 watts Block Diagram Get Started Getting Started With NXP PROFIBUS for PowerQUICC and QorIQ NXP offers PROFIBUS Layer 2 firmware for PowerQUICC and QorIQ processors with a QUICC Engine controller. The PROFIBUS software supports both Master and Slave modes of operation and can be evaluated on the P1025 processor. Instructions for accessing the hardware evaluation platform and the software are given below. PROFIBUS for PowerQUICC and QorIQ can be evaluated using TWR-P1025-KIT To build/install/load the PROFIBUS software you will need CodeWarrior for Power Architecture V10.3 The PROFIBUS Slave package includes the following: CodeWarrior for Power Architecture V10.3 project archive containing: QUICC Engine PROFIBUS microcode (binary) PROFIBUS Layer 2 driver example (source code) PROFIBUS Layer 7 stack (binary provided by TMG) A sample application (source code) The /Docs folder of the project contains: Readme file Release Notes PROFIBUS Microcode User Manual NXP PROFIBUS Slave Layer 2 API description Sample test logs Software Getting Started Guide Hardware Getting Started Guide Design Resources

Overview The NXP® 800 MHz MPC8377E PowerQUICC® II Pro processor built on Power Architecture® technology features integrated hardware acceleration for wireless security, MiniPCI or MiniPCI Express®-based interfaces for 802.11N radio modules, dual-band concurrent operation, Gigabit Ethernet (GbE) LAN and WAN interfaces, USB 2.0 host/device interface and IEEE® 802.3af PoE-compliant solution for dual-concurrent MIMO operation. Features 800 MHz MPC8377E PowerQUICC ®  II Pro processor built on Power Architecture technology Integrated hardware acceleration for wireless security MiniPCI or MiniPCI Express based interfaces for 802.11N radio modules Dual-band concurrent operation with 3 x 3 MIMO (GbE) LAN and WAN interfaces USB 2.0 host/device interface IEEE ®  802.3af PoE-compliant solution for dual-concurrent MIMO operation Block Diagram Board Design Resources

Overview The QorIQ® communications processors include single-, dual-, quad- and multicore processor architectures with integrated support for communications protocols such as EtherCAT. The new programmable logic controller (PLC) reference platform is equipped to ease development of industrial control systems PLC reference platform implements the KPA (koenig-pa GmbH) EtherCAT Master protocol with ISaGRAF Firmware and QNX Neutrino® RTOS on the high-performance QorIQ P1025 processor Supported by powerful development tools from all four companies, including the KPA EtherCAT Studio, ISaGRAF 6 Workbench, QNX Momentics® Tool Suite, and CodeWarrior® Development Suit Features Integrated ISaGRAF Firmware, KPA EtherCAT Master stack and QNX Neutrino RTOS on the QorIQ ®  P1 Tower ®  module EtherCAT master protocol and customer control application run simultaneously on a single QorIQ P1025 processor to deliver one millisecond EtherCAT master cycle time QorIQ P1 processors can also provide simultaneous support for complex applications, as well as additional industrial protocols like PROFINET, PROFIBUS and EtherNet/IP ™ Powerful development tools include the KPA EtherCAT Studio, ISaGRAF 6 Workbench, QNX Momentics Tool Suite, and CodeWarrior ®  Development Suite ISaGRAF 6 Workbench and Firmware kernel can fully support all IEC 61499 and IEC 61131-3 standard PLC programming languages Software and hardware developed on TWR-P1025 can be easily deployed on a range of QorIQ P1 processors, including the P1012, P1021, P1016 and P1025 processors QorIQ P1 processor family offers pin-compatible single-core variants for cost reduction, and dual-core variants which scale up to 3,700 million instructions per second (MIPS) for more complex control algorithms. Customers may distribute processing functions across two cores, or isolate real-time control functions on one core while running maintenance and communications functions on the other core. Commercial EtherCAT Master stack available from KPA Commercial Neutrino RTOS available from QNX Block Diagram Platform Requirements One TWR-P1025 QorIQ Tower Module Target slaves required to run the demo: Beckhoff EK1100 EtherCAT coupler Beckhoff EL1004 4-channel digital input terminal 24 V DC, 3 ms Beckhoff EL2004 4-channel digital output terminal 24 V DC, 0.5 A Beckhoff EL9011 end cap An image of the complete PLC Reference Platform run-time software. Download the PLC Reference Platform evaluation software. ISaGRAF 6 Workbench for offline tools Utility Software (Windows) TeraTerm for RS232 communications USB to UART driver for console port TFTP Server to load images to TWR-P1025 Design Resources

Overview This reference design describes the design of a 3-phase BLDC (Brushless DC) motor drive, which supports the NXP® 56F80X and 56F83XX Digital Signal Controllers (DSCs). The speed-closed loop BLDC drive using an encoder sensor is implemented The system is targeted for applications in both industrial and appliance fields (e.g. washing machines, compressors, air conditioning units, pumps or simple industrial drives required high reliability and efficiency) Features Voltage control of BLDC motor using Encoder sensor Targeted for 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on 3-phase Motor Board Control technique incorporates: Voltage BLDC motor control with speed-closed loop Current feedback loop Both directions of rotation Motoring mode Minimal speed 500 RPM Maximal speed 1000 RPM (limited by power supply) Manual interface (Start/Stop switch, Up/Down push button control, LED indication) FreeMASTER software control interface (motor start/stop, speed set-up) FreeMASTER software monitor Block Diagram Board Design Resources

Overview This reference design describes the design of a 3-phase BLDC (Brushless DC) motor drive, which supports the NXP® 56F80X and 56F83XX Digital Signal Controllers (DSCs). The speed-closed loop BLDC drive using a Hall sensor is implemented The system is targeted for applications in both industrial and appliance fields (e.g. washing machines, compressors, air conditioning units, pumps or simple industrial drives required high reliability and efficiency) Features Voltage control of BLDC motor using Hall sensor Targeted for 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on 3-phase Motor Board Control technique incorporates: Voltage BLDC motor control with speed-closed loop Current feedback loop Both directions of rotation Motoring mode Minimal speed 500 RPM Maximal speed 1000 RPM (limited by power supply) Manual interface (Start/Stop switch, Up/Down push button control, LED indication) FreeMASTER software control interface (motor start/stop, speed set-up) FreeMASTER software monitor Block Diagram Board Design Resources

Block Diagram The NXP® P2020-MSC8156 AdvancedMC™ (AMC) reference design is a multi-standard baseband development platform for the next generation of wireless standards such as LTE, WiMAX, WCDMA and TD-SCDMA. This AMC platform integrates the QorIQ® P2020 processor with its MSC8156 DSP A P2020 and MSC8156 mezzanine card provide the system building blocks to enable rapid prototyping systems Ideal for developing solutions for the next generation of wireless standards Features Key P2020-MSC8156 AMC Reference Design Features: Single width, full height AMC form factor QorIQ ®  P2020 processor Dual e500v2 cores at 1.2 GHz 1 GB of DDR2 (SOCDIMM) TCP/IP acceleration eSDHC USB MSC8156 DSP Six SC3850 cores, built on StarCore ®  technology, at 1 GHz each Multi Accelerator Platform Engine for Baseband (MAPLE-B) Programmable Turbo and Viterbi decoder Two banks of 512 MB 64-bit DDR3-800 Block Diagram Board Design Resources

Overview This reference design describes a 3-phase brushless DC motor (BLDC) drive that uses the NXP® MC56F8006 Digital Signal Controller (DSC) for dedicated motor control devices. Closed-loop speed/current-controlled BLDC drive, with no need for position or speed sensors. Low-voltage power stages used by the application are designed for 24 VDC line voltage. A reference manual provides a detailed description of the application, including hardware and software design. Hardware schematics, PCB Gerber files and full software listings are also provided. Ideal for applications such as compressors, dishwasher pump drives, washing machines, fans and industrial motor control. Features Sensorless control of BLDC Control technique incorporates: Speed closed-loop control with automatic current limitation Rotation in both directions Start from any motor position with rotor alignment 4-quadrant operation Multisampling method of back-EMF Wide speed range FreeMaster control interface Fault protection for overcurrent, overvoltage, overload and start-up fail Block Diagram Board Design Resources

Overview This reference design is for a sensorless permanent magnet (PM) motor drive single-chip solution based on the NXP® DSC56F80XX digital signal controller (DSC). An electronically controlled three phase PM motor provides a unique feature set with the higher efficiency and power density This application presents a motor control technique of PM motor without a need to use a rotor position transducer This technique particularly targets horizontal axis (H-axis) washing machine with belt drive in fractional horsepower range A designer reference manual provides a detailed description of the application, including the design of the hardware and the software Features Designed to fit into consumer and industrial applications MC56F80XX digital signal controller 3-phase AC/BLDC High Voltage Power Stage Board 1-phase line input 110/230VAC 50/60Hz Apliance PM motor Initial rotor position detection Full torque at motor start-up Field weakening Application based on C-callable library functions (GFLIB, GDFLIB, MCLIB, ACLIB) Current control loop Speed control loop with Field weakening Flash: ~ 6KB, RAM ~ 1.5KB FreeMASTER based control pages Block Diagram Board Design Resources

Overview This reference design showcases how the NXP® MC56F84789 digital signal controller (DSC) operates two motors and interleaved PFC in a single MCU. Sensorless algorithms eliminate expensive position sensors The compressor and fan employ 3-phase Permanent Magnet Synchronous Motors (PMSMs), which provide a quieter, more efficient, flexible and reliable operation Implemented with a back EMF observer, based on NXP Embedded Software Motor Control Libraries and specifically tailored for air conditioning fans and compressors The demo also provides the communication to a Kinetis® K70 MCU touch graphic LCD for added HMI experience Features Sensorless control of two PMSMs using Back-EMF observer Interleaved PFC control Power stage with processor daughter card Supply voltage 90 - 240 V AC, 40-70 Hz Compressor control 1200 - 4500 RPM Fan control 500 - 2000 RPM Rotor alignment method used Over-current protection and over-voltage protection Hot and cold side temperature control RS232 communication with remote graphic-touch LCD control Block Diagram Design Resources

Overview This reference design describes a 3-phase sensorless brushless DC (BLDC) motor control with back-EMF (electromotive force) zero-crossing detection, supporting the NXP® 56F80X and 56F83XX Digital Signal Controllers (DSCs) for motor control applications. It can also be applied to Our 56F81XX DSCs The system is designed as a motor drive system for three-phase BLDC motors and is targeted for applications in both industrial and appliance fields (e.g. compressors, air conditioning units, pumps or simple industrial drives) The reference design incorporates both hardware and software parts of the system including hardware schematics Features BLDC sensorless motor 115 or 230V AC Supply Targeted for 56F80X, 56F83XX, and 56F81XX Digital Signal Controllers Running on 3-phase BLDC Motor EVM at 12V, 3-Phase BLDC Low-Voltage Power Stage Speed control loop Motor mode in both direction of rotation Manual interface (RUN/STOP switch, UP/DOWN push buttons control, LED indication) Overvoltage, undervoltage, overcurrent and overheating fault protection Hardware autodetection FreeMASTER control interface (speed set-up) FreeMASTER software remote monitor Block Diagram Board Design Resources

Overview This reference design is based on 32-bit DSC MC56F84789, to demo a simple servo motor control solution. This reference design jump-starts your ability to leverage the NXP® DSCs' advanced feature sets via complete software, tools and hardware platform. Can be expended to dual servo motors control on single chip. Speed regulation: < 0.05% (from 0% to 100% load under nominal speed) with encoder and 32-bit speed control algorithm. Speed ratio: 1 : 2000 with position and speed closed loop control – intelligent PID, the minimal operational speed is up to 0.5RPM. Only low cost Quadrature Encoder (1000 lines) is required, HALL sensors removed. System dynamic response: 90Hz for speed closed loop, and 30Hz for position closed loop – PID regulator. Speed acceleration/deceleration: from 1 to 10,000ms (configurable). Brake function: regenerative braking, stop in one revolution. Bidirectional operation: forward and reverse with speed and torque limitation. Faults protection such as abnormal speed, over-/under-voltage, over-current etc. FreeMASTER software control interface and monitor. Features MC56F84789 Simple Servo Motor Control MAPS-56F84000 EVK Board MAPS-MC-LV3PH Motor Control Power Stage Block Diagram Board Design Resources

Overview The Camera reference design is developed using the Kinetis KL28Z through the standalone peripheral module FlexIO. The Kinetis KL28Z board is powered by an Arm® Cortex®-M0, providing up to 96 MHz CPU performance besides supporting ultra-low power. Kinetis KL28Z's FlexIO module is used to emulate camera interface and capture the image data. A TFT LCD module with SPI interface is used to display the real-time images. DMA is used to copy the image data from FlexIO to SRAM. DAM or polling method is used to copy the image data from SRAM to SPI TX FIFO, having up to 15fps sample rate. Features Features the Kinetis KL2828Z512 Board, enabling the interaction between a camera module by FlexIO, a highly configurable module capable of emulating a wide range of different communication protocols. The important feature of this peripheral is that it enables the user to build their own peripheral directly in the MCU. Combined and powered by NXP technology, these key elements make possible to capture video from the Camera and display it live in the LCD Panel. Developed using Kinetis Software Development Kit (SDK), comprehensive software support for Kinetis MCUs and drivers for each MCU peripheral, middleware, real-time OS and example applications designed to simplify and accelerate application development on Kinetis MCUs. Block Diagram Board Design Resources

Overview The FlexRay Brake-By-Wire reference design shows FlexRay capabilities such as high communication speed and channel fault detection. It uses the NXP® MC9S12XDP512 MCU for the pedal node and MC56F8346 DSC for the brake/wheel node; FlexRay connectivity of both nodes is based on the MFR4200 FlexRay communication controller The braking caliper is controlled by PMSM using Vector Control technique while the spinning wheel representing a real tire is powered by a BLDC motor The boards of the 2 engines are interconnected by a CAN bus Uses FlexRay baud rate of 10Mb/s per channel but both channels carry the same data, which enables demonstration of the FlexRay channel fault detection feature Features PMSM using Vector Control technique FlexRay communication speed 10Mb/s per channel Dual channel connection Channel fault detection Re-connection feature FreeMASTER tool based control pages Block Diagram Board Design Resources

Overview The NXP® home health hub (HHH) reference platform is designed to speed and ease development for telehealth applications using seamless connectivity and data aggregation for remote access and improved healthcare management. Multiple connectivity options to obtain data from commercially available wired and wireless healthcare devices such as blood pressure monitors, pulse oximeters, weight scales, blood glucose monitors, etc. Provides connectivity to take action with collected data by sharing it through a remote device with a display such as a tablet, PC or smartphone or through the Cloud Delivers a real-time connection to caregivers for comfort and safety to the person being monitored Features Automatic reporting of vital sign measurements Cloud connectivity and secure integration into medical vaults Pervasive mobile device access Daily activity alarms, security alarms and passive monitoring of safety sensors for early detection of injury or security risks Anytime consultation with monitoring center, medical staff, family and friends Anytime and intuitive access to trusted health resources Compelling user interface for a remote display Block Diagram Board Videos Design Resources

Overview This reference design demonstrates the configuration of two nodes which include the NXP® 56F8300 Digital Signal Controllers (DSCs) with the FlexRay MFR4200 modules. These nodes communicate together on (over) two channels This application demonstrates a transmission in the static and dynamic part of the cycle, receive buffer and receive FIFO configuration It operates in the interrupt-driven mode and also in the poll-driven mode Features Utilizes MC56F8300 EVBs and FlexRay daughter cards Utilizes in-house developed FlexRay low-level driver Redundant data transmission on two channels Deterministic as well as dynamic data transmission Data rates at 10 Mbits/sec per channel Visual feedback of communication between two FlexRay controllers via FreeMASTER software Block Diagram Board Design Resources

Overview The NXP® Healthcare Analog Front End reference platform is a complete set of portable medical solutions that enable designers with rapid development tools. Provides ready-to-develop hardware and software that facilitates the design of medical assets such as vital signs monitors, glucose meters and digital stethoscopes, among other portable and healthcare professional devices Based on the Kinetis® K53 high-performance, low-cost, low-power MCU Embeds a complete analog measurement engine including Opamps, TRIAMPS, ADCs, DACs and analog comparators among other modules, reducing costs and PCB sizes Features Developed using the Kinetis ®  K53 MCU, featuring an Arm ®  Cortex ® -M4 core Kinetis K53 MCU also provides low-power operation, DSP capabilities, USB and graphic interface support and a complete analog measurement engine Includes six healthcare-specific analog front ends with reusable software and hardware NXP ®  provides a full set of software tools (CodeWarrior ® , USBSTACK, MQX™ RTOS) NXP product longevity program offers up to 15-year availability for selected products Block Diagram Board Video Design Resources

Overview The NXP® Home Energy Manager (HEM) reference platform features an i.MX283 application processor, MC13224V ZigBee® module, 9S08QE32 MCU and MC34726 DC/DC buck. The reference platform is aimed at jumpstarting customer developments around the HAN (Home Area Network). Comprises a control board based on the low-power, yet powerful i.MX283 running connectivity interfaces to the: Smart meter Home automation system Broadband IP network User interface Micro-grid generation unit In order to accommodate a fast-paced changing connectivity landscape, the control board features extension connectors ready for: Powerline modems GPRS/3G data modem U-SNAP connectivity peripherals Mass storage cards Features Low-power Based on the latest low-power NXP ®  Arm9™ i.MX283  processor including integrated power management and supporting advanced voltage and frequency scaling techniques for optimized power consumption Running Our low-power ZigBee radio 1.5W max at full operating speed Low-cost Unique integration on the i.MX283 eliminates external components, enables 4-layer PCB Complete solution available Source code Hardware schematics Gerbers Bill of materials Complimentary software available through 3rd party partners Linux based frameworks Windows Embedded Compact 7 based framework Java-based framework Remote In-Home Display software Block Diagram Design Resources