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Varification of EMC Compliance for MYD-Y6ULX-CHMI The MYD-Y6ULX-CHMI Display Panel is an ultra-low cost Human Machine Interface (HMI) solution based on 528MHz NXPi.MX6UL/6ULL ARM Cortext-A7 processor. It is a Linux-ready device with ported QT, can be used in various applications including POS, Intelligent access control and more others. The panel provides a well-designed hardware with various peripherals and rich software resources to help users accelerate their time to the market. The MYD-Y6ULX-CHMI consists of an MYD-Y6ULX-HMI Development Board and a 7-inch capacitive LCD mounting on its top. The LCD offers 800x480 pixels display resolution. The MYD-Y6ULX-HMI Development Board provides peripherals and interfaces including RS232, RS485, Ethernet, USB Host/Device, LCD, Camera, TF card slot and etc. Considering wireless communication and dial-up functions, MYIR offers an optional IO board MYB-Y6ULX-HMI-4GEXP for the MYD-Y6ULX-CHMI Display Panel. The IO Board features on board AP6212 module for WiFi/Bluetooth and a Mini-PCIe interface for USB based 4G LTE module. Moreover, the IO Board has extended one more Ethernet interface and Audio in/out ports to further enhance the functionality of the panel, thus making a complete solution for HMI applications. The MYD-Y6ULX-CHMI has passed the verification of EMC Compliance.           MYD-Y6ULX-CHMI Display Panel                            MYD-Y6ULX-CHMI Display Panel + MYB-Y6ULX-HMI-4GEXP The MYD-Y6ULX-CHMI Display Panel is an ultra-low cost Human Machine Interface (HMI) solution based on 528MHz NXPi.MX6UL/6ULL ARM Cortext-A7 processor. It is a Linux-ready device with ported QT, can be used in various applications including POS, Intelligent access control and more others. The panel provides a well-designed hardware with various peripherals and rich software resources to help users accelerate their time to the market. The MYD-Y6ULX-CHMI consists of an MYD-Y6ULX-HMI Development Board and a 7-inch capacitive LCD mounting on its top. The LCD offers 800x480 pixels display resolution. The MYD-Y6ULX-HMI Development Board provides peripherals and interfaces including RS232, RS485, Ethernet, USB Host/Device, LCD, Camera, TF card slot and etc. Considering wireless communication and dial-up functions, MYIR offers an optional IO board MYB-Y6ULX-HMI-4GEXP for the MYD-Y6ULX-CHMI Display Panel. The IO Board features on board AP6212 module for WiFi/Bluetooth and a Mini-PCIe interface for USB based 4G LTE module. Moreover, the IO Board has extended one more Ethernet interface and Audio in/out ports to further enhance the functionality of the panel, thus making a complete solution for HMI applications. The MYD-Y6ULX-CHMI has passed the verification of EMC Compliance.           MYD-Y6ULX-CHMI Display Panel                            MYD-Y6ULX-CHMI Display Panel + MYB-Y6ULX-HMI-4GEXP
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NFC 基本功能及更多! <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本次会议将向参与者简要介绍 NFC 是什么、哪些产品属于产品组合的一部分以及如何在多个垂直领域的不同用例中使用它们。它还引导参与者快速了解可用于原型设计的开发套件和 SW 资源。简而言之,这是您开始使用 NFC 的最佳速成课程。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本次会议将向参与者简要介绍 NFC 是什么、哪些产品属于产品组合的一部分以及如何在多个垂直领域的不同用例中使用它们。它还引导参与者快速了解可用于原型设计的开发套件和 SW 资源。简而言之,这是您开始使用 NFC 的最佳速成课程。 接口和连接 传感器
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车身电子:实践研讨会:使用 MagniV 进行边缘节点开发 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本次会议将讨论 S12 MagniV 混合信号 MCU 如何帮助客户设计更紧凑、更具成本效益的电子控制单元。S12 MagniV 设备基于成熟的 S12 技术构建,可实现整个产品组合的软件和工具兼容性。S12 MagniV 产品组合将数字可编程性和高精度模拟完美结合,并配有一系列可扩展内存选项,从而简化了汽车设计。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本次会议将讨论 S12 MagniV 混合信号 MCU 如何帮助客户设计更紧凑、更具成本效益的电子控制单元。S12 MagniV 设备基于成熟的 S12 技术构建,可实现整个产品组合的软件和工具兼容性。S12 MagniV 产品组合将数字可编程性和高精度模拟完美结合,并配有一系列可扩展内存选项,从而简化了汽车设计。
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10bits_Milestone_5_Bonus_Activities <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> -管理者は、メールとパスワードの認証方法に基づいて、リモートまたはローカルでアプリケーションにアクセスして構成できます。 -リモート接続(Webサーバーまたは電話)を介して実行できます ボーナスアクティビティ: -管理者は、LCDを使用してリクエストを追加、編集、または削除できます。 -インデックスページには、リクエストの数、「利用可能な時間の確認」機能を通じて予約できる利用可能な時間、および管理プラットフォームで見つけることができるログが表示されます。 -これらの統計は、ローカル(LCD)またはリモート(Webまたは電話)で利用できます (マイビデオで視聴)
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Dropbox 入门.pdf <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 概述
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NXP MCU 和 MPU 语音和音频解决方案,面向 AI-IoT 市场 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本次会议将介绍恩智浦针对物联网市场的完整语音和音频解决方案。其中包括语音通话、AI语音识别和音乐播放的解决方案。NXP 在其 MCU 和 MPU 产品上提供了完整且优化的音频框架,为物联网开发人员提供了现成且易于使用的语音和音频功能。在AI音箱、家电设备、语音控制节点等应用领域。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本次会议将介绍恩智浦针对物联网市场的完整语音和音频解决方案。其中包括语音通话、AI语音识别和音乐播放的解决方案。NXP 在其 MCU 和 MPU 产品上提供了完整且优化的音频框架,为物联网开发人员提供了现成且易于使用的语音和音频功能。在AI音箱、家电设备、语音控制节点等应用领域。
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中国Automotive_Connects汽车电源管理解决方案 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 汽车架构的演变和混合动力化程度的提高要求电源管理也随之演变,以适应应用和环境的变化。在本次会议期间,您将了解市场动态的概况。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 汽车架构的演变和混合动力化程度的提高要求电源管理也随之演变,以适应应用和环境的变化。在本次会议期间,您将了解市场动态的概况。
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KL25Z和传感器融合 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 全部, 附件是根据 Andrew Hartnett 的帖子而编写的。它包含用于 KL25Z 上的 9 轴传感器融合 V7.00 的裸机 IAR 项目。您需要为 KL25Z 构建 KSDK 以包含 ISSDK 选项。然后将此文件解压缩到您的 SDK_2.0_FRDM-KL25Z/boards 中目录。示例项目位于 SDK_2.0_FRDM-KL25Z/boards/frdmkl25z_virtual_shield/issdk_examples/algorithms/sensorfusion/baremetal_sensor_fusion/iar。 其中还包含一个 freertos_sensor_fusion 项目。暂时忽略这一点。它可以编译和链接,但需要比 KL25Z 提供的更多的 RAM。我正在寻找降低 RAM 要求的方法。 此致, Mike <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 全部, 附件是根据 Andrew Hartnett 的帖子而编写的。它包含用于 KL25Z 上的 9 轴传感器融合 V7.00 的裸机 IAR 项目。您需要为 KL25Z 构建 KSDK 以包含 ISSDK 选项。然后将此文件解压缩到您的 SDK_2.0_FRDM-KL25Z/boards 中目录。示例项目位于 SDK_2.0_FRDM-KL25Z/boards/frdmkl25z_virtual_shield/issdk_examples/algorithms/sensorfusion/baremetal_sensor_fusion/iar。 其中还包含一个 freertos_sensor_fusion 项目。暂时忽略这一点。它可以编译和链接,但需要比 KL25Z 提供的更多的 RAM。我正在寻找降低 RAM 要求的方法。 此致, Mike 传感器融合 回复:KL25Z和传感器融合 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 全部, 我能够启动并运行 FreeRTOS 版本。以下是您需要了解的内容: 根据裸机说明仅针对 1 种算法进行编译 FreeRTOSConfig.h 中的“#define configMINIMAL_STACK_SIZE ((unsigned short)256)” 替换 FreeRTOS heap_4.c使用 heap_3.c(FreeRTOS 有几种内存分配选项) 将 MKL25Z128xxx4_flash.lcf 中的 __size_heap__ 的值从 0x400 更改为 0x1000。 尽情享受! Mike
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AUT-N1783 安全 CAN 网络实践研讨会 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 现代汽车已经超越了简单的交通工具,成为一种连接平台。随着汽车与世界其他地方的互联,平衡性能和成本的挑战带来了满足安全性的新要求。本课程将回顾 CAN 通信的安全影响。该课程将通过安全的 CAN 通信指导如何实际连接两个 MPC5748G 设备的 CAN 网络。利用 MPC5748G HSM 上的 SHE 固件。CAN 消息在传输前进行签名,并在接收端使用 CMAC 和 AES-128 进行验证。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 现代汽车已经超越了简单的交通工具,成为一种连接平台。随着汽车与世界其他地方的互联,平衡性能和成本的挑战带来了满足安全性的新要求。本课程将回顾 CAN 通信的安全影响。该课程将通过安全的 CAN 通信指导如何实际连接两个 MPC5748G 设备的 CAN 网络。利用 MPC5748G HSM 上的 SHE 固件。CAN 消息在传输前进行签名,并在接收端使用 CMAC 和 AES-128 进行验证。 安全互联汽车和自动化汽车
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Kinetis MCU 上的电源管理:LLS 和 VLLS 模式 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 大家好, 设备的功耗以及嵌入式系统设计的影响是当今的常见话题。Kinetis MCU 提供不同的电源模式以满足用户的需求。在这些低功耗模式中,我们可以找到最低的功耗模式:低泄漏停止模式(LLS)和超低泄漏停止模式(VLLS)。 附件对这些模式进行了简要介绍/说明,并列出了配置 MCU 在任何这些模式下运行所需的步骤。这是 FRDM-KL26Z 的裸板项目,但同样的原理也适用于其他 Kinetis 系列。另外,还附上了两个 KDS v3.2 项目以供参考。 我希望您觉得它们有用! 此致, 艾萨克 Kinetis L系列MCU
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MPC5644A审查CW210示例 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 警告1:请谨慎使用审查功能,因为不当使用可能导致设备无法使用!使用前请仔细阅读所有说明!   警告 2:CodeWarrior 2.10 中包含的 ICDPPCNEXUS 调试器版本无法在包括 MPC5644A 在内的某些设备上启用调试。解决方法是使用 Codewarrior 10.6 或使用 PKGPPCNEXUS 调试器 - 可以从P&E Microcomputer Systems下载   警告 3:如果使用 TRACE32 调试器(Lauterbach),则需要更新 TRACE32 软件。TRACE32 版本 02/2015 和 09/2016..02/2018 可能无法访问受审查的设备。劳特巴赫开发工具   该示例由两部分组成,文档描述了如何使用 PeMicro 或 Lauterbach 调试器通过 JTAG 访问受审查的设备:   1)MPC5644A-Censor_device-CW210: ******************************************************************************** * 详细说明: * 示例代码重新编程影子闪存的内容以启用审查。 * eSCI_A 终端窗口中的通知确认操作成功 *(19200-8-无奇偶校验-1停止位-无流量控制)。 * 开机重启后,设备将通过私人密码进行审查 * 0xFEED_FACE_CAFE_BEEF。随后可以通过启用 * 审查设备的调试如附件 pdf 文档中所述。暗影闪光 * 重新编程代码必须从内部 RAM 执行。 * ----------------------------------------------------------------------------------------------   2)MPC5644A-Uncensor_设备-CW210: ******************************************************************************** * 详细说明: * 假设设备受到示例 MPC5644A-Censor_device-CW210 的审查 * 首先需要启用被审查设备的调试,如 * 附加 pdf 文档。编程密码为 0xFEED_FACE_CAFE_BEEF。 *MPC5644A_run_from_ram.cmm脚本通过命令执行 * 系统选项键码 0xFEEDFACECAFEBEEF。 * 然后运行此代码以解除对设备的审查。操作成功确认 * eSCI_A 终端窗口中的通知(19200-8-无奇偶校验-1 停止位-无流量 * 控制)。上电复位后,设备不受审查,后续访问 * 将无需密码。必须执行影子闪存重新编程代码 * 来自内部 RAM。 * ---------------------------------------------------------------------------------------------- <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 警告1:请谨慎使用审查功能,因为不当使用可能导致设备无法使用!使用前请仔细阅读所有说明!   警告 2:CodeWarrior 2.10 中包含的 ICDPPCNEXUS 调试器版本无法在包括 MPC5644A 在内的某些设备上启用调试。解决方法是使用 Codewarrior 10.6 或使用 PKGPPCNEXUS 调试器 - 可以从P&E Microcomputer Systems下载   警告 3:如果使用 TRACE32 调试器(Lauterbach),则需要更新 TRACE32 软件。TRACE32 版本 02/2015 和 09/2016..02/2018 可能无法访问受审查的设备。劳特巴赫开发工具   该示例由两部分组成,文档描述了如何使用 PeMicro 或 Lauterbach 调试器通过 JTAG 访问受审查的设备:   1)MPC5644A-Censor_device-CW210: ******************************************************************************** * 详细说明: * 示例代码重新编程影子闪存的内容以启用审查。 * eSCI_A 终端窗口中的通知确认操作成功 *(19200-8-无奇偶校验-1停止位-无流量控制)。 * 开机重启后,设备将通过私人密码进行审查 * 0xFEED_FACE_CAFE_BEEF。随后可以通过启用 * 审查设备的调试如附件 pdf 文档中所述。暗影闪光 * 重新编程代码必须从内部 RAM 执行。 * ----------------------------------------------------------------------------------------------   2)MPC5644A-Uncensor_设备-CW210: ******************************************************************************** * 详细说明: * 假设设备受到示例 MPC5644A-Censor_device-CW210 的审查 * 首先需要启用被审查设备的调试,如 * 附加 pdf 文档。编程密码为 0xFEED_FACE_CAFE_BEEF。 *MPC5644A_run_from_ram.cmm脚本通过命令执行 * 系统选项键码 0xFEEDFACECAFEBEEF。 * 然后运行此代码以解除对设备的审查。操作成功确认 * eSCI_A 终端窗口中的通知(19200-8-无奇偶校验-1 停止位-无流量 * 控制)。上电复位后,设备不受审查,后续访问 * 将无需密码。必须执行影子闪存重新编程代码 * 来自内部 RAM。 * ---------------------------------------------------------------------------------------------- 概述
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加密的QuadSPI映像实现 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 加密的QuadSPI映像实现 Kinetis 系列 MCU 包括系统安全和闪存保护功能,可用于保护代码和数据免遭未经授权的访问或修改。本应用说明讨论了使用 KBOOT 加密启动以及使用 FRDM-K82 板的实验。 FRDM-K82板 Freedom开发平台 Kinetis K系列MCU
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HMB-N1826 为物联网应用设计高性能电源转换器 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本课程将深入介绍降压调节器的性能及其可靠性方面。降压调节器是应用最广泛的拓扑结构。一旦计算出系统功率需求,确定正确的电源管理芯片对于项目的成功至关重要。会议参与者应该能够识别和审查关键的 DC-DC 转换器规格,并根据他们的需要选择最佳的电源解决方案。讨论了计算/选择降压调节器周围的无源元件和分立元件以创建稳健的设计。最后,分享了确保热稳定性和环路稳定性的关键参数的测量。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本课程将深入介绍降压调节器的性能及其可靠性方面。降压调节器是应用最广泛的拓扑结构。一旦计算出系统功率需求,确定正确的电源管理芯片对于项目的成功至关重要。会议参与者应该能够识别和审查关键的 DC-DC 转换器规格,并根据他们的需要选择最佳的电源解决方案。讨论了计算/选择降压调节器周围的无源元件和分立元件以创建稳健的设计。最后,分享了确保热稳定性和环路稳定性的关键参数的测量。 智能家居和智能建筑
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KSDK GPIO驱动程序,带处理器专家 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 该视频展示了如何使用 Processor Expert 在 Kinetis Design Studio 中配置带有组件fsl_gpio 的KSDK GPIO 外设驱动程序。 这些步骤展示了如何在读取 FRDM-K64F 的 SW2 按钮输入时使红色和蓝色 LED 闪烁。该过程可复制到任何 KSDK 支持的主板以及 PE 驱动程序套件。享受! (在 “我的视频” 中查看) 概述 回复:KSDK GPIO驱动程序与处理器专家 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 对于初级程序员来说,这是非常棒的视频,您能制作更多类似的视频吗?拜托。 并且,在视频中,您没有配置 pin_init:Pinsettings,因为您用一个 gsl_gpio 配置每个引脚,但是,如果您在 init:Pinsettings 中配置 gpio,会发生什么情况?如何以这种方式制作 hello world 程序?并且,(在程序中)fsl_gpio 和 fsl_gpio_hal 有什么区别? 谢谢 卡洛斯·E.
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AMF-ACC-T1659 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 除了故障安全系统架构之外,容错能力在高度自动化的汽车中也变得越来越重要。本次会议讨论了容错系统架构的理论基础,并展示了如何使用飞思卡尔微控制器构建这些架构,特别是在高级驾驶辅助系统 (ADAS) 领域。利用飞思卡尔汽车产品组合中内置的关键功能安全概念,可以实现高效、可扩展的解决方案,涵盖从故障安全系统到容错和故障运行架构的范围。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 除了故障安全系统架构之外,容错能力在高度自动化的汽车中也变得越来越重要。本次会议讨论了容错系统架构的理论基础,并展示了如何使用飞思卡尔微控制器构建这些架构,特别是在高级驾驶辅助系统 (ADAS) 领域。利用飞思卡尔汽车产品组合中内置的关键功能安全概念,可以实现高效、可扩展的解决方案,涵盖从故障安全系统到容错和故障运行架构的范围。
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电源管理仿真和验证工具 - eFast <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 演示所有者David Lopez 该演示概述了我们的电源管理模拟和验证工具。我们的工具将帮助您加速符合 ISO 26262 标准的电源管理验证。 通过此演示,您将了解 NXP 如何开发创新验证工具来涵盖多种用例,并加速符合 ISO26262 的产品验证。开发该工具所使用的主要设备是 MC33908,具有 DC/DC 和最高功能安全级别的系统基本芯片。此外,该工具还涵盖 MCU 和 SBC 附件的验证。该工具包含一个通过收集不同汽车 OEM“非 ISO”脉冲而创建的数据库,执行速度很快。   特性 暂态仿真工具平台 加速符合 ISO 26262 标准的电源管理验证 全球 OEM 用例数据库 特色恩智浦产品 模拟和电源管理|恩智浦 汽车电子 工业控制
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如何使用 KDS 和 KSDK 将 RTCS 添加到处理器专家项目 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 大家好, 根据如何:使用来自 macl 和 dereksnell 的 Kinetis Design Studio IDE 中的处理器专家为 KSDK 项目创建 MQX RTOS, 您可以在附件文档中找到使用 KSDK1.2 和处理器专家将 RTCS 包含到 KDS3.0 项目以及最终项目的步骤。 感谢RBORB提供此流程的初稿。 有关使用 MQX 而不使用 Processor Expert 创建新 KSDK 项目的信息,请参阅以下文档。 如何:在 KDS 中为 KSDK 项目创建新的 MQX RTOS 如果您正在寻找一份简单的文档来开始使用 KSDK,请参阅以下文档。 编写我的第一个KSDK1.2KDS3.0 中的应用 - Hello World 和使用 GPIO 中断切换 LED 此致, 卡洛斯 回复:如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 我按照这个出色的教程,在基于 MK66FX1M0VLQ18 的定制硬件上开始了我的项目。 所有 KSDK 固件包(HAL 库、DRV 驱动程序和中间件)都与评估目标 FRDM-xxx 和 TWR-xxx 上提供的示例很好地集成在一起。但是(就像当我开始使用 CodeWarrior 10.1 和 MQX 3.7 处理 Kinetis CPU 时一样),移植在不同于评估板的目标上运行的 Kinetis 示例项目非常困难。此外,很难从用户位置的 KSDK 文件夹树导出自己的 Kinetis 项目。 MQX 4.0 附带 BSPCloningWizard 工具,这正是我一直想在我的定制硬件上启动新项目的工具。不幸的是,KSDK 还没有这样的工具。 所以,我认为从今天开始用 KDS 3.0.0 启动一个新的 Kinetis 项目+ PEx + KSDK 1.3.0 是定制硬件的最佳方式。Processor Expert 生成应用程序所需的 HAL、驱动程序和 MQX RTOS 的所有代码。并且该项目是在自定义文件夹中创建的,没有任何指向 KSDK 文件夹树的链接。精彩的! 如果我的项目需要处理 TCP/IP 堆栈和/或文件系统,通过本教程我可以将 RTCS 和/或 MFS 库添加到我的项目中。不幸的是,如何在我的定制硬件上移植和构建 RTCS 和 MFS 项目? 也许,Erich Styger 可以帮助我们...... 我在http://mcuoneclipse.com/2015/10/28/tutorial-lwip-with-the-freertos-and-the-freescale-frdm-k64f-board/上找到了他的教程,他用KDS+PEx+KSDK创建了一个项目,将lwIP源文件夹添加到他的项目中,并调整编译器设置的包含路径。 将 RTCS 和 MFS 源文件夹添加到项目中是解决在自定义硬件上移植和构建 RTCS 和 MFS 库的正确方法吗? 回复:如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 因为我有一块 FRDM-K64F 板,就像例子中描述的那样,所以这对我来说很有用。但我不清楚如何将这个过程转移到不同的目标板。如果有人没有 FRDM-K64F、TWR-K60D100M、TWR-K64F120M 或 TWR-K65F180M(四个具有导入路径的目标),那该怎么办?我的真正目标是使用 MK64FN1M0VLQ12,它与 FRDM-K64F相似,但肯定不匹配。 那么,在按照 PowerPoint 文件中的说明进行操作之前,如何为不同的硬件目标设置 RTCS 项目? 谢谢! 回复:如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 非常好的例子! 非常非常有用 - 10X。 我有时会观察到一个奇怪的现象: 即使 ETH 电缆断开,ETH phy led 仍指示链接(绿色 led)。 这可以避免 ETE 传递数据包。 仅在使用调试器时才观察到这一点' 所以我推测 PHY init 可能是原因。 我该怎么办? 回复:如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 嗨,罗杰, 您可以在此处找到向当前 MQX-KSDK 和 PEx 项目添加 MFS 和 Shell 支持所需的步骤。如何为新的 MQX RTOS for KSDK 和 PEx 项目添加 MFS 和 Shell 支持 我希望这能对你有帮助, 顺祝商祺! 艾萨克 回复:如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 嗨,罗杰, 是的,但是队列中还有许多其他项目,我们无法确定何时可以创建该文档。 带来不便敬请谅解。 卡洛斯 回复:如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 你好,卡洛斯 您有机会和您的团队交谈吗? 此致敬礼 罗杰 回复:如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 谢谢罗杰, 听起来不错,我会和我的团队讨论一下。 此致, 卡洛斯 回复:如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 你好,卡洛斯 该指南非常有帮助。 如果能有一个用于通过 SDCARD 添加 MFS 的功能就好了? 此致敬礼 罗杰 回复:如何使用KDS和KSDK将RTCS添加到处理器专家项目中 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 嗨,罗杰, 您需要构建第一个 RTCS 库。对于 FRDM-K64,您可以在这里找到: C:\Freescale\KSDK_1.2.0\中间件\tcpip\rtcs\build\kds\rtcs_frdmk64f 我忘了在指南中提到这个要求。我会更新它。 此致, 卡洛斯
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RT600 MCUXpresso JLINK debug QSPI flash RT600 MCUXpresso JLINK debug QSPI flash 1 Introduction     MIMXRT600-EVK is the NXP official board, which onboard flash is the external octal flash, the octal flash is connected to the RT685 flexSPI portB. In practical usage, the customer board may use other flash types, eg QSPI flash, and connect to the FlexSPI A port. Recently, nxp published one RT600 customer flash application note: https://www.nxp.com/docs/en/application-note/AN13386.pdf This document mainly gives the CMSIS DAP related flash algorithm usage, which modifies the option data to generate the new flash algo for the different flash types. Some customer’s own board may use the RT600 QSPI flash+MCUXPresso+JLINK to debug the application code. Recently, one of the customers find on his own customer board, when they use debugger JLINK associated with the MCUXPresso download code to the RT600 QSPI flash, they meet download issues, but when using the CMSIS DAP as a debugger and the related QSPI cfx file, they can download OK. So this document mainly gives the experience of how to use the RT600, MCUXpresso IDE, and JLINK to download and debug the code which is located in the external QSPI flash. 2 JLINK driver prepare and test   MCUXpresso IDE use the JLINK download, it will call the JLINK driver related script and the flash algorithm, but to RT600, the JLINK driver will use the RT600 EVK flexSPI port B octal flash in default, so, if the customer board changes to other flexSPI port and to QSPI flash, they need to provide the related QSPI flash algorithm and script file, otherwise, even they can find the ARM CM33 core, the download will be still failed. If customers want to use the MCUXpresso IDE and the JLINK, they need to make sure the JLINK driver attached tool can do the external flash operation, eg, erase, read, write successfully at first. Now, give the JLINK driver related tool how to add the RT600 QSPI flash driver and script file. 2.1 JLINK driver install   Download the Segger JLINK driver from the following link: https://www.segger.com/downloads/jlink/JLink_Windows_V754b_x86_64.exe This document will use the jlink v7.54b to test, other version is similar. Install the driver, the default driver install path is: C:\Program Files\SEGGER 2.2 Universal flashloader RT-UFL    RT-UFL v1.0 is a universal flashloader, which uses one .FLM file for all i.MXRT chips, and the different external flash, it is mainly used for the Segger JLINK debugger. RT-UFL v1.0 downoad link: https://github.com/JayHeng/RT-UFL/archive/refs/tags/v1.0.zip    Now, to the RT600 QSPI, give the related flash algo file patch.    Copy the following path file: \RT-UFL-1.0\algo\SEGGER\JLink_Vxxx To the JLINK install path: \SEGGER\JLink Then copy the content in file: RT-UFL-master\test\SEGGER\JLink_Vxxx\Devices\NXP\iMXRT6xx\archive2\evkmimxrt685.JLinkScript To replace the content in: C:\Program Files\SEGGER\JLink\Devices\NXP\iMXRT_UFL\iMXRT6xx_CortexM33.JLinkScript Otherwise, the MCUXpresso IDE debug reset button function will not work. So, need to add the JLINKScript code for ResetTarget, which will reset the external flash. pic1 The RT-UFL provide 3 types download flash algo: MIMXRT600_UFL_L0, MIMXRT600_UFL_L1, MIMXRT600_UFL_L2. Pic 2 _L0 used for the QSPI Flash and Octal Flash(page size 256 Bytes, sector size 4KB), _L1/2 used for the hyper flash(Page size 512 Bytes,Sector size 4KB/64KB). The JLINKDevices.xml content also can get the detail information. Different name will call different .FLM, the .FLM is the flash algorithm file, the source code can be found in RT-UFL v1.0, it will use different option0 option1 to configure the different external memory when the memory chip can support SFDP. 2.3 JLINK commander test Please note, the device need to select as MIMXRT600_UFL_L0 when using the QSPI flash. Pic 3                                         pic 4 Pic 5 We can find, the JLINK command can realize the external QSPI flash read, erase function. 2.4 Jflash Test Operation steps: Target->connect->production programming Pic 6 We can find, the Jflash also can realize the RT600 external QSPI flash erase and program. Please note, not all the JLINK can support JFLASH, this document is using Segger JLINK plus. 3 MCUXpresso configuration and test MCUXpresso: v11.4.0 SDK_2_10_0_EVK-MIMXRT685 MCUXPresso IDE import the SDK project, eg. Helloworld or led_output. 3.1 QSPI FCB configuration    FCB is located from the flash offset address 0X08000400, which is used for the FlexSPI Nor boot configuration, the detailed content of the FCB can be found from the RT600 user manual Table 997. FlexSPI flash configuration block. Different external Flash, the configuration is different, if need to use the QSPI flash, the FCB should use the QSPI related configuration and its own LUT table.    Modify SDK project flash_config folder flash_config.c and flash_config.h, LUT contains fast read, status read, write enable, sector erase, block erase, page program, erase the whole chip. If the external QSPI flash command is different, the LUT command should be modified by following the flash datasheet mentioned related command. const flexspi_nor_config_t flexspi_config = { .memConfig = { .tag = FLASH_CONFIG_BLOCK_TAG, .version = FLASH_CONFIG_BLOCK_VERSION, .readSampleClksrc=kFlexSPIReadSampleClk_LoopbackInternally, .csHoldTime = 3, .csSetupTime = 3, .columnAddressWidth = 0, .deviceModeCfgEnable = 0, .deviceModeType = 0, .waitTimeCfgCommands = 0, .deviceModeSeq = {.seqNum = 0, .seqId = 0,}, .deviceModeArg = 0, .configCmdEnable = 0, .configModeType = {0}, .configCmdSeqs = {0}, .configCmdArgs = {0}, .controllerMiscOption = (0), .deviceType = 1, .sflashPadType = kSerialFlash_4Pads, .serialClkFreq = kFlexSpiSerialClk_133MHz, .lutCustomSeqEnable = 0, .sflashA1Size = BOARD_FLASH_SIZE, .sflashA2Size = 0, .sflashB1Size = 0, .sflashB2Size = 0, .csPadSettingOverride = 0, .sclkPadSettingOverride = 0, .dataPadSettingOverride = 0, .dqsPadSettingOverride = 0, .timeoutInMs = 0, .commandInterval = 0, .busyOffset = 0, .busyBitPolarity = 0, .lookupTable = { #if 0 [0] = 0x08180403, [1] = 0x00002404, [4] = 0x24040405, [12] = 0x00000604, [20] = 0x081804D8, [36] = 0x08180402, [37] = 0x00002080, [44] = 0x00000460, #endif // Fast Read [4*0+0] = FLEXSPI_LUT_SEQ(CMD_SDR , FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), [4*0+1] = FLEXSPI_LUT_SEQ(MODE4_SDR, FLEXSPI_4PAD, 0x00, DUMMY_SDR , FLEXSPI_4PAD, 0x09), [4*0+2] = FLEXSPI_LUT_SEQ(READ_SDR , FLEXSPI_4PAD, 0x04, STOP_EXE , FLEXSPI_1PAD, 0x00), //read status [4*1+0] = FLEXSPI_LUT_SEQ(CMD_SDR , FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04), //write Enable [4*3+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP_EXE, FLEXSPI_1PAD, 0), // Sector Erase byte LUTs [4*5+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18), // Block Erase 64Kbyte LUTs [4*8+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8, RADDR_SDR, FLEXSPI_1PAD, 0x18), //Page Program - single mode [4*9+0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18), [4*9+1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04, STOP_EXE, FLEXSPI_1PAD, 0x0), //Erase whole chip [4*11+0]= FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP_EXE, FLEXSPI_1PAD, 0), }, }, .pageSize = 0x100, .sectorSize = 0x1000, .ipcmdSerialClkFreq = 1, .isUniformBlockSize = 0, .blockSize = 0x10000, }; This code has been tested on the RT685+ QSPI flash MT25QL128ABA1ESE, the code boot is working. 3.2 Debug configuration Configure the JLINK options in the MCUXpresso IDE as the JLINK driver: JLinkGDBServerCL.exe Windows->preferences Pic 7 Press debug, generate .launch file. Pic 8 Run->Debug configurations           Pic 9 Choose the device as MIMXRT600_UFL_L0, if the SWD wire is long and not stable, also can define the speed as the fixed low frequency. 3.3 Download and debug test Before download, need to check the RT685 ISP mode configuration, as this document is using the 4 wire QSPI and connect to the FlexSPI A port, so the ISP boot mode should be FlexSPI boot from Port A: ISP2 PIO1_17 low, ISP1 PIO1_16 high, ISP0 PIO1_15 high Click debug button, we can see the code enter the debug mode, and enter the main function, the code address is located in the flexSPI remap address. Pic 10 Click run, we can find the RT685 pin P0_26 is toggling, and the UART interface also can printf information. The application code is working. 4 External SPI flash operation checking To the customer designed board, normally we will use the JLINK command to check whether it can find the ARM core or not at first, make sure the RT chip can work, then will check the external flash operation or not. 4.1 SDK IAP flash code test We can use the SDK related code to test the external flash operation or not at first, the SDK code path is: SDK_2_10_0_EVK-MIMXRT685\boards\evkmimxrt685\driver_examples\iap\iap_flash Then, check the external flash, and modify the code’s related option0, option1 to match the external flash. About the option 0 and option1 definition, we can find it from the RT600 user manual Table 1004.Option0 definition and Table 1005.Option1 definition Pic 11 Pic 12 To the external QSPI flash which is connected to the FLexSPI portA, we can modify the option to the following code:     option.option0.U = 0xC0000001;//EXAMPLE_NOR_FLASH;     option.option1.U = 0x00000000;//EXAMPLE_NOR_FLASH_OPTION1; Then burn the IAP_flash project to the RT685 internal RAM, debug to run it. Pic 13 We can find, the external QSPI flash initialization, erase, read and write all works, and the memory also can find the correct data. 4.2 MCUBootUtility test   Chip enter the ISP mode, then use the MCUBootUtility tool to connect the RT685 and QSPI flash, to do the application code program and read test. ISP mode:ISP2:high, ISP1: high ISP0 low Configure FlexSPI NOR Device Configuration as QSPI, we can use the template: ISSI_IS25LPxxxA_IS25WPxxxA. Pic 14 Click connect to ROM button, check whether it can recognize the external flash: Pic 15 After connection, we can use the tool attached RT685 image to download: NXP-MCUBootUtility-3.3.1\apps\NXP_MIMXRT685-EVK_Rev.E\led_blinky_0x08001000_fdcb.srec Pic 16 We can find, the connection, erase, program and read are all work, it also indicates the RT685+external QSPI flash is working. Then can go to debug it with IDE and debugger. i.MXRT 600
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i.MX6UL/ULL/ULZ DRAM Register Programming Aids Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response.   This is the detailed programming aid for the registers associated with DRAM initialization (DDR3 and LPDDR2) of the MX6UL/ULL/ULZ (consolidated RPA). The last work sheet tab in the tool formats the register settings for use with the ARM DS5/RealView debugger. It can be manually converted by the user to a DCD file format used by uboot or other bootloaders (note the removal of debugger specific commands in this tab). The programming aids were developed for internal NXP validation and development boards. This tool serves as an aid to assist with programming the DDR interface of the MX6UL/ULL/ULZ and is based on the DDR initialization scripts developed by the R&D team and no guarantees are made by this tool. The following are some general notes regarding this tool: Refer to the "How To Use" tab in the tool as a starting point to use this tool. Note that in the "DStream .ds file" tab there are DS5 debugger specific commands that should be commented out or removed when using the DRAM initialization for non-debugger specific applications (like when porting to bootloaders). This tool may be updated on an as-needed basis for bug fixes or future improvements.  There is no schedule for aforementioned maintenance.   i.MX6 All i.MX6UL
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Exporting YOLO Models for NXP i.MX Platforms In this post, we will review the YOLO model export process for three popular NXP families: i.MX8MP, i.MX93, and i.MX95. These processors are increasingly used in edge AI applications such as smart vision, industrial automation, robotics, and intelligent HMI systems. Although they all support machine learning deployment, the export path, supported runtimes, and hardware acceleration options may differ depending on the device. The purpose of this guide is to provide a clearer starting point for developers who want to take a trained YOLO model and prepare it for execution on these i.MX platforms. Whether your workflow targets CPU, NPU. YOLO Model Export Workflow for i.MX Processors 1) Install Ultralytics Install or upgrade the Ultralytics package from PyPI: pip install -U ultralytics 2) Export the YOLO Model (TFLite INT8) Export your trained YOLO model to TensorFlow Lite (TFLite) format with INT8 quantization: yolo export model= .pt format=tflite int8=True Notes: The model must be exported in TFLite format and quantized to INT8. At this stage: The model can run on CPU for: i.MX8MP i.MX93 i.MX95 On i.MX8MP, this TFLite model can also be deployed to the NPU using the appropriate delegate. 3) i.MX93  Compile for Ethos-U NPU (Vela) For i.MX93, an additional compilation step is required to use the Ethos-U NPU. Run the Vela compiler to convert the TFLite model into an optimized format: vela .tflite --output-dir Notes: This step generates a model optimized for the Ethos-U NPU. The resulting output files are required for deployment using the NPU delegate on the i.MX93 platform. Please ensure that the model complies with the Ethos-U operator constraints, as only supported operations can be accelerated by the NPU. This command can be executed directly on the i.MX93 target, or alternatively by using the eIQ Toolkit (please refer to the eIQ Converter documentation for more details). 4)  i.MX95 Convert Model Using Neutron SDK For i.MX95, the model must be converted using the Neutron Converter, depending on the BSP version installed on your board. .\neutron-converter.exe ` --input " .tflite" ` --target imx95 ` --output " .tflite" ` --optimization-level OOpt Notes: The Neutron toolchain prepares the model for i.MX95 NPU acceleration. Supported formats and flags may vary depending on the Neutron SDK version. Always verify compatibility with your BSP release. You can check the compatibility details of the Neutron SDK in the "docs" folder of your downloaded Neutron SDK package. 5) Benchmark the Model After exporting and converting the model, you can validate performance using benchmarking tools. Typical options include: TFLite benchmark tool (CPU / delegate): benchmark_model --graph= .tflite --num_threads=X 6) Results iMX8MP CPU root@imx8mpevk:~# /usr/bin/tensorflow-lite-2.19.0/examples/benchmark_model --graph=yolov8n_full_integer_quant.tflite --mum_threads=4 INFO: STARTING! WARN: Unconsumed cmdline flags: --mum_threads=4 INFO: Log parameter values verbosely: [0] INFO: Graph: [yolov8n_full_integer_quant.tflite] INFO: Signature to run: [] INFO: Loaded model yolov8n_full_integer_quant.tflite INFO: Created TensorFlow Lite XNNPACK delegate for CPU. INFO: The input model file size (MB): 3.42652 INFO: Initialized session in 86.368ms. INFO: Running benchmark for at least 1 iterations and at least 0.5 seconds but terminate if exceeding 150 seconds. INFO: count=1 curr=1029584 p5=1029584 median=1029584 p95=1029584 INFO: Running benchmark for at least 50 iterations and at least 1 seconds but terminate if exceeding 150 seconds. INFO: count=50 first=986237 curr=985536 min=983921 max=993982 avg=985863 std=1497 p5=984152 median=985947 p95=986715 INFO: Inference timings in us: Init: 86368, First inference: 1029584, Warmup (avg): 1.02958e+06, Inference (avg): 985863 INFO: Note: as the benchmark tool itself affects memory footprint, the following is only APPROXIMATE to the actual memory footprint of the model at runtime. Take the information at your discretion. INFO: Memory footprint delta from the start of the tool (MB): init=11.207 overall=40.918 root@imx8mpevk:~# NPU root@imx8mpevk:~# /usr/bin/tensorflow-lite-2.19.0/examples/benchmark_model --graph=yolov8n_full_integer_quant.tflite --num_threads=4 --external_delegate_path=/usr/lib/libvx_delegate.so INFO: STARTING! INFO: Log parameter values verbosely: [0] INFO: Num threads: [4] INFO: Graph: [yolov8n_full_integer_quant.tflite] INFO: Signature to run: [] INFO: #threads used for CPU inference: [4] INFO: #threads used for CPU inference: [4] INFO: External delegate path: [/usr/lib/libvx_delegate.so] INFO: Loaded model yolov8n_full_integer_quant.tflite INFO: Vx delegate: allowed_cache_mode set to 0. INFO: Vx delegate: device num set to 0. INFO: Vx delegate: allowed_builtin_code set to 0. INFO: Vx delegate: error_during_init set to 0. INFO: Vx delegate: error_during_prepare set to 0. INFO: Vx delegate: error_during_invoke set to 0. INFO: EXTERNAL delegate created. INFO: Explicitly applied EXTERNAL delegate, and the model graph will be completely executed by the delegate. INFO: The input model file size (MB): 3.42652 INFO: Initialized session in 39.515ms. INFO: Running benchmark for at least 1 iterations and at least 0.5 seconds but terminate if exceeding 150 seconds. INFO: count=1 curr=16831746 p5=16831746 median=16831746 p95=16831746 INFO: Running benchmark for at least 50 iterations and at least 1 seconds but terminate if exceeding 150 seconds. INFO: count=50 first=67167 curr=67190 min=67048 max=67366 avg=67187 std=64 p5=67094 median=67184 p95=67295 INFO: Inference timings in us: Init: 39515, First inference: 16831746, Warmup (avg): 1.68317e+07, Inference (avg): 67187 INFO: Note: as the benchmark tool itself affects memory footprint, the following is only APPROXIMATE to the actual memory footprint of the model at runtime. Take the information at your discretion. INFO: Memory footprint delta from the start of the tool (MB): init=9.47266 overall=224.398 root@imx8mpevk:~# iMX93 CPU root@imx93evk:~# /usr/bin/tensorflow-lite-2.19.0/examples/benchmark_model --graph=yolov8n_full_integer_quant.tflite --num_threads=2 INFO: STARTING! INFO: Log parameter values verbosely: [0] INFO: Num threads: [2] INFO: Graph: [yolov8n_full_integer_quant.tflite] INFO: Signature to run: [] INFO: #threads used for CPU inference: [2] INFO: #threads used for CPU inference: [2] INFO: Loaded model yolov8n_full_integer_quant.tflite INFO: Created TensorFlow Lite XNNPACK delegate for CPU. INFO: The input model file size (MB): 3.42652 INFO: Initialized session in 57.963ms. INFO: Running benchmark for at least 1 iterations and at least 0.5 seconds but terminate if exceeding 150 seconds. INFO: count=3 first=247896 curr=198973 min=198973 max=247896 avg=215381 std=22991 p5=198973 median=199275 p95=247896 INFO: Running benchmark for at least 50 iterations and at least 1 seconds but terminate if exceeding 150 seconds. INFO: count=50 first=199533 curr=198880 min=197719 max=205262 avg=199032 std=1005 p5=198344 median=198886 p95=199961 INFO: Inference timings in us: Init: 57963, First inference: 247896, Warmup (avg): 215381, Inference (avg): 199032 INFO: Note: as the benchmark tool itself affects memory footprint, the following is only APPROXIMATE to the actual memory footprint of the model at runtime. Take the information at your discretion. INFO: Memory footprint delta from the start of the tool (MB): init=11.2539 overall=40.9961 root@imx93evk:~# NPU root@imx93evk:~# /usr/bin/tensorflow-lite-2.19.0/examples/benchmark_model --graph=yolov8n_full_integer_quant_vela.tflite --num_threads=2 --external_delegate_path=/usr/lib/libethosu_delegate.so INFO: STARTING! INFO: Log parameter values verbosely: [0] INFO: Num threads: [2] INFO: Graph: [yolov8n_full_integer_quant_vela.tflite] INFO: Signature to run: [] INFO: #threads used for CPU inference: [2] INFO: #threads used for CPU inference: [2] INFO: External delegate path: [/usr/lib/libethosu_delegate.so] INFO: Loaded model yolov8n_full_integer_quant_vela.tflite INFO: Ethosu delegate: device_name set to /dev/ethosu0. INFO: Ethosu delegate: cache_file_path set to . INFO: Ethosu delegate: timeout set to 60000000000. INFO: Ethosu delegate: enable_cycle_counter set to 0. INFO: Ethosu delegate: enable_profiling set to 0. INFO: Ethosu delegate: profiling_buffer_size set to 2048. INFO: Ethosu delegate: pmu_event0 set to 0. INFO: Ethosu delegate: pmu_event1 set to 0. INFO: Ethosu delegate: pmu_event2 set to 0. INFO: Ethosu delegate: pmu_event3 set to 0. INFO: EXTERNAL delegate created. INFO: EthosuDelegate: 8 nodes delegated out of 15 nodes with 8 partitions. INFO: Explicitly applied EXTERNAL delegate, and the model graph will be partially executed by the delegate w/ 8 delegate kernels. INFO: Created TensorFlow Lite XNNPACK delegate for CPU. INFO: The input model file size (MB): 2.9511 INFO: Initialized session in 638.148ms. INFO: Running benchmark for at least 1 iterations and at least 0.5 seconds but terminate if exceeding 150 seconds. INFO: count=7 first=87215 curr=81264 min=81079 max=87215 avg=82056.4 std=2107 p5=81079 median=81187 p95=87215 INFO: Running benchmark for at least 50 iterations and at least 1 seconds but terminate if exceeding 150 seconds. INFO: count=50 first=81497 curr=81232 min=80887 max=81783 avg=81153.1 std=178 p5=80921 median=81148 p95=81497 INFO: Inference timings in us: Init: 638148, First inference: 87215, Warmup (avg): 82056.4, Inference (avg): 81153.1 INFO: Note: as the benchmark tool itself affects memory footprint, the following is only APPROXIMATE to the actual memory footprint of the model at runtime. Take the information at your discretion. INFO: Memory footprint delta from the start of the tool (MB): init=7.36328 overall=8.73828 root@imx93evk:~# iMX95 CPU root@imx95evk:~# /usr/bin/tensorflow-lite-2.19.0/examples/benchmark_model --graph=yolov8n_full_integer_quant.tflite --num_threads=6 INFO: STARTING! INFO: Log parameter values verbosely: [0] INFO: Num threads: [6] INFO: Graph: [yolov8n_full_integer_quant.tflite] INFO: Signature to run: [] INFO: #threads used for CPU inference: [6] INFO: #threads used for CPU inference: [6] INFO: Loaded model yolov8n_full_integer_quant.tflite INFO: Created TensorFlow Lite XNNPACK delegate for CPU. INFO: The input model file size (MB): 3.42652 INFO: Initialized session in 35.268ms. INFO: Running benchmark for at least 1 iterations and at least 0.5 seconds but terminate if exceeding 150 seconds. INFO: count=7 first=115073 curr=74468 min=74170 max=115073 avg=80310.4 std=14192 p5=74170 median=74581 p95=115073 INFO: Running benchmark for at least 50 iterations and at least 1 seconds but terminate if exceeding 150 seconds. INFO: count=50 first=74143 curr=74135 min=73657 max=76392 avg=74346.9 std=447 p5=73829 median=74307 p95=75020 INFO: Inference timings in us: Init: 35268, First inference: 115073, Warmup (avg): 80310.4, Inference (avg): 74346.9 INFO: Note: as the benchmark tool itself affects memory footprint, the following is only APPROXIMATE to the actual memory footprint of the model at runtime. Take the information at your discretion. INFO: Memory footprint delta from the start of the tool (MB): init=11.5195 overall=40.8867 root@imx95evk:~# NPU: root@imx95evk:~# /usr/bin/tensorflow-lite-2.19.0/examples/benchmark_model --graph=yolov8n_full_integer_quant_neutron.tflite --num_threads=6 --external_delegate_path=/usr/lib/libneutron_delegate.so INFO: STARTING! INFO: Log parameter values verbosely: [0] INFO: Num threads: [6] INFO: Graph: [yolov8n_full_integer_quant_neutron.tflite] INFO: Signature to run: [] INFO: #threads used for CPU inference: [6] INFO: #threads used for CPU inference: [6] INFO: External delegate path: [/usr/lib/libneutron_delegate.so] INFO: Loaded model yolov8n_full_integer_quant_neutron.tflite INFO: EXTERNAL delegate created. INFO: NeutronDelegate delegate: 1 nodes delegated out of 33 nodes with 1 partitions. INFO: Neutron delegate version: v1.0.0-7399a58e, zerocp enabled. INFO: Explicitly applied EXTERNAL delegate, and the model graph will be partially executed by the delegate w/ 1 delegate kernels. INFO: Created TensorFlow Lite XNNPACK delegate for CPU. INFO: The input model file size (MB): 3.20989 INFO: Initialized session in 12.756ms. INFO: Running benchmark for at least 1 iterations and at least 0.5 seconds but terminate if exceeding 150 seconds. INFO: count=17 first=31509 curr=27588 min=27555 max=31509 avg=29101.2 std=1166 p5=27555 median=29071 p95=31509 INFO: Running benchmark for at least 50 iterations and at least 1 seconds but terminate if exceeding 150 seconds. INFO: count=50 first=28068 curr=29081 min=26573 max=31340 avg=29104.1 std=1204 p5=27306 median=29141 p95=31171 INFO: Inference timings in us: Init: 12756, First inference: 31509, Warmup (avg): 29101.2, Inference (avg): 29104.1 INFO: Note: as the benchmark tool itself affects memory footprint, the following is only APPROXIMATE to the actual memory footprint of the model at runtime. Take the information at your discretion. INFO: Memory footprint delta from the start of the tool (MB): init=6.98438 overall=12.2344 root@imx95evk:~ Disclaimer: Ultralytics YOLO models have not been officially validated/supported by NXP. Therefore, compatibility with i.MX processors and their corresponding NPUs cannot be guaranteed. Some models or configurations may not work as expected depending on operator support and hardware limitations.
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