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PUF set key operation fails (PUF_SetUserKey), even after a correct enroll and start Hi all, I'm writing a Secure Boot for a client, who chose to use the PUF (Physically Unclonable Function) hardware to encrypt some custom user keys. The board I'm using is a NXP i.MX RT1172 (MIMXRT1172AVM8A), and I'm debugging using the MCUXpresso IDE (v11.9.1 [Build 2170] [2024-04-19]) and a Segger J-Link to connect with the hardware. I burned the PUF_ENABLE bit fuse using the MCUXpresso Secure Provisioning Tool so that the PUF operations are enabled. In my custom Boot program, I call PUF_Init,  then PUF_Enroll (it will be done just the first time, at the production end of line, when its PUF Activation Code is not yet stored on the flash memory), PUF_Deinit + PUF_Init (to "restart" the PUF after the enroll), and finally PUF_Start. All the above calls return with a success status. At this point (with the PUF initialized and started), I'd like to save a customer key (that will be passed to the Boot program only during the production end-of-line process): I call PUF_SetUserKey, but this call fails. I followed the call into the PUF driver function, and I saw that it failed because the SET KEY operation is not allowed: /* check if SET KEY is allowed */ if (0x0u == (base->ALLOW & PUF_ALLOW_ALLOWSETKEY_MASK)) { return kStatus_Fail; } Why is that? Should I do something else before calling the PUF_SetUserKey function? Thank you very much in advance for any help you will provide (even document references or links where to find more information). Best regards Re: PUF set key operation fails (PUF_SetUserKey), even after a correct enroll and start I realized that because of a stupid problem a file was not saved and in the end, the function PUF_BlockSetKey() was called BEFORE the PUF_SetUserKey instead of being called AFTER it. I solved the problem of course by requiring PUF_BlockSetKey() to be called after the PUF_SetUserKey. I'm keeping this post for future reference if anyone finds a similar problem. Note: two functions block the ENROLL operation and SET KEY operation respectively (PUF_BlockEnroll() and PUF_BlockSetKey()), so please be sure to call those only after the PUF main operations.
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How to build - Mcuxpresso command line build with build option I want use command line buld  1. windows  2. Ubuntu linux.  3. using build option; such as option [PREDEFINE_OPT 1], check below   Please explain the usage in case the sample project: (frdmkw38_ble_shell_freertos) Board Design Re: How to build - Mcuxpresso command line build with build option Hello, Hope you are doing well. I would recommend these posts: MCUXpresso IDE v11.8.1 - How to command line build project? - NXP Community mcuxpresso-ide command line and building with the .cproject file settings - NXP Community Command line build - NXP Community Hope this helps! Regards, Ricardo
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s32k3 how to recover flash? Hi NXP,     i'm working on boot application for updating app program.  when boot program pflash meet some error and trigger a swt reset mcu, then checking plash is partial unaccessible.  as pic below, 1. is this a flash ecc error case? 2. in that situation, jlink cant program the flash,   could you give some advice how to recover the plash to normal state? Re: s32k3 how to recover flash? Hi @victory, The flash must be read first. I would maybe focus on why the flashing gets stuck and why the MCU has to be reset by the WDOG. The flash block that is being programmed must not be accessed by any master on the bus. This might requires disabling interrupts or placing the flash driver into SRAM. Regards, Daniel Re: s32k3 how to recover flash? i am using s32k312 is there any method to detect the error without read the target flash region to get if that area has a ecc error and unaccessible? Re: s32k3 how to recover flash? Hi @victory, Can you specify the S32K3xx part number? If the MCU is reset while the flash operation is in progress, the content of the flash cannot be defined, and ECC error should be expected. If there is an uncorrectable ECC error detected during a read operation, the MCRS[ERR] flag is set. The detection can be suppressed: Regards, Daniel 回复: s32k3 how to recover flash? Append: is it possible to disable flash ecc function?
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NHS3152 Passive Measurement Hi everyone I have an NHS3152 on a custom PCB. The PCB is very simple, with an SWD connector for my MCU-Link Pro and some traces to a connector to attach to a screen-printed antenna. For power stability, there are 2x 100nF capacitors in parallel for both pin 3 & pin 7 (4 capacitors total). I am having an issue regarding the resistive measurements. I have two channels for resistive measurements (channel0 = pins 0,1; channel1 = pins 4,5;). When I perform a resistive measurement when the board is running passively (no power from the debugger), my NFC scanner (Adafruit PN532 shield for Arduino Uno) does not receive any data. However, it does receive the correct data from the measurements when the NHS3152 is receiving power from my debugger. If I disable the sections of the code relating to taking resistive measurements, I can successfully read the NFC contents, so I suspect the ADC is consuming too much power? Any help on this is greatly appreciated. IDE: MCUXpresso v24.9.25 SDK: release_mra2_12_6_nhs3152 Output from scanner on unsuccessful read (running in passive mode): ================================================= Tag Found and Activated! Preparing to read data. UID Length: 7 bytes UID Value: 0x04 0x8E 0xE6 0x00 0xA8 0x00 0x10 ---------------------------------------- Reading data from pages 8-12 Failed to read page 8 ================================================= Tag lost or communication failed. Resetting... ================================================= Output from scanner when NHS3152 is powered via debugger: ================================================= Tag Found and Activated! Preparing to read data. UID Length: 7 bytes UID Value: 0x04 0x8E 0xE6 0x00 0xA8 0x00 0x10 ---------------------------------------- Reading data from pages 8-12 Page 08: 6E 52 31 3A nR1: Page 09: 34 2C 52 32 4,R2 Page 10: 3A 2D 31 FE :-1 Page 11: 86 56 4D 3D VM= Page 12: 84 28 57 0C (W. Data read successfully. Tag is still present. ---------------------------------------- NHS3152  main.c: /* * James Harold, 2025, Scion * * This program measures resistance on two separate analog channels * and writes the results to an NFC tag for wireless reading. * */ // 1. Library Imports #include "board.h" #include "ndeft2t/ndeft2t.h" #include #include "pmu_nss.h" #include "gpio_nss.h" #include #include #include // 2. Defines #define CHANNEL_0 0 // Capacitive & resistive channel #define CHANNEL_1 1 // Resistive channel #define NUM_CHANNELS 2 // Number of total measurement channels // 3. Global Variables // Buffers for NDEF message creation (for NFC) static uint8_t g_ndeft2tInstanceBuffer[NDEFT2T_INSTANCE_SIZE] __attribute__((aligned (4))); static uint8_t g_nfcMessageBuffer[NFC_SHARED_MEM_BYTE_SIZE] __attribute__((aligned (4))); // Array to store the results for each measurement channel volatile int32_t measuredResistance[NUM_CHANNELS] = {0, 0}; // 4. NFC Callbacks (Required by the library, but unused) void NDEFT2T_FieldStatus_Cb(bool status) { (void)status; } void NDEFT2T_MsgAvailable_Cb(void) { /* Unused */ } // 5. Function Prototypes void SetupPowerStabilisation(void); void SetupResistiveMeasurement(int channel); int32_t PerformAndCalculateResistance(int channel); void WriteMeasurementsToNFC(int32_t res1, int32_t res2); void WriteHelloMessageToNFC(void); // 6. Main Code int main(void) { // Step 1: Perform minimal board and power setup Board_Init(); SetupPowerStabilisation(); // Must be performed early for energy harvesting from NFC tag // --- Enable Clocks and Power for peripherals that will be used --- Chip_Clock_Peripheral_EnableClock(CLOCK_PERIPHERAL_ADCDAC | CLOCK_PERIPHERAL_I2D); Chip_SysCon_Peripheral_EnablePower(SYSCON_PERIPHERAL_POWER_ADCDAC | SYSCON_PERIPHERAL_POWER_I2D); // A small delay for power and clocks to stabilise Chip_Clock_System_BusyWait_us(100); // --- Resistance Measurement Initialisation --- // Initialise the peripherals and configure the analog pins Chip_ADCDAC_Init(NSS_ADCDAC0); Chip_I2D_Init(NSS_I2D); // Configure analog pins for Channel 0 (ANA0_0, ANA0_1) Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_ANA0_0, IOCON_FUNC_1); Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_ANA0_1, IOCON_FUNC_1); // Configure analog pins for Channel 1 (ANA0_4, ANA0_5) Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_ANA0_4, IOCON_FUNC_1); Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_ANA0_5, IOCON_FUNC_1); // Set the ADC to a narrow voltage range (1.0V) Chip_ADCDAC_SetInputRangeADC(NSS_ADCDAC0, ADCDAC_INPUTRANGE_NARROW); // Step 2: Initialise NFC communication Chip_NFC_Init(NSS_NFC); NDEFT2T_Init(); // Step 3: Perform resistive measurements SetupResistiveMeasurement(CHANNEL_0); measuredResistance[CHANNEL_0] = PerformAndCalculateResistance(CHANNEL_0); SetupResistiveMeasurement(CHANNEL_1); measuredResistance[CHANNEL_1] = PerformAndCalculateResistance(CHANNEL_1); // Step 4: Write measurements to the NFC tag WriteMeasurementsToNFC(measuredResistance[CHANNEL_0], measuredResistance[CHANNEL_1]); //WriteHelloMessageToNFC(); // --- Power down peripherals after use to save energy --- Chip_SysCon_Peripheral_DisablePower(SYSCON_PERIPHERAL_POWER_ADCDAC | SYSCON_PERIPHERAL_POWER_I2D); Chip_Clock_Peripheral_DisableClock(CLOCK_PERIPHERAL_ADCDAC | CLOCK_PERIPHERAL_I2D); // Step 5: Wait for NFC peripheral interrupt while(1) { __WFI(); } return 0; // Should never be reached } // 7. Function Declarations /** * @brief Configures hardware for a resistive measurement on a specific channel. * @param channel : The measurement channel to set up (CHANNEL_0 or CHANNEL_1) * @return Nothing */ void SetupResistiveMeasurement(int channel) { ADCDAC_IO_T dac_pin; I2D_INPUT_T i2d_pin; if (channel == CHANNEL_1) { dac_pin = ADCDAC_IO_ANA0_4; i2d_pin = I2D_INPUT_ANA0_5; } else { dac_pin = ADCDAC_IO_ANA0_0; i2d_pin = I2D_INPUT_ANA0_1; } Chip_ADCDAC_SetMuxDAC(NSS_ADCDAC0, dac_pin); Chip_ADCDAC_WriteOutputDAC(NSS_ADCDAC0, 0xFFF); // Changed from 0xFFF to 0x800 to lower DAC output voltage Chip_I2D_SetMuxInput(NSS_I2D, i2d_pin); if (channel == CHANNEL_0) { Chip_I2D_Setup(NSS_I2D, I2D_SINGLE_SHOT, I2D_SCALER_GAIN_100_1, I2D_CONVERTER_GAIN_LOW, 10); // Changed I2D conversion period from 100 to 10 (power save) } else { Chip_I2D_Setup(NSS_I2D, I2D_SINGLE_SHOT, I2D_SCALER_GAIN_100_1, I2D_CONVERTER_GAIN_LOW, 10); // Changed I2D conversion period from 100 to 10 (power save) } // Wait a moment for the voltage and current to stabilise. Chip_Clock_System_BusyWait_ms(1); } /** * @brief Initialises GPIOs to enable the capacitor bank for power stability. * @return Nothing * @note This is the most critical initialisation for passive operation. */ void SetupPowerStabilisation(void) { Chip_IOCON_Init(NSS_IOCON); Chip_GPIO_Init(NSS_GPIO); // --- Phase 1: PRECHARGE --- // Configure pins as INPUTS with internal pull-up resistors enabled. // This allows the external caps to charge slowly without causing a voltage drop. Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_PIO0_3, IOCON_FUNC_0 | IOCON_RMODE_PULLUP); // Configure pin 3 as GPIO and enable pull-up Chip_GPIO_SetPinDIRInput(NSS_GPIO, 0, 3); // Configure pin 3 as input Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_PIO0_7, IOCON_FUNC_0 | IOCON_RMODE_PULLUP); // Configure pin 7 as GPIO and enable pull-up Chip_GPIO_SetPinDIRInput(NSS_GPIO, 0, 7); // Configure pin 7 as input // Wait for a short time to allow the capacitors to charge. Chip_Clock_System_BusyWait_ms(60); // Approx. 60ms for 4 time constants (each pin has 200nF attached) // --- Phase 2: ENGAGE --- // Now that the caps are charged, we can safely connect them to the power rail // by setting the pins to OUTPUT and driving them HIGH. Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_PIO0_3, IOCON_FUNC_0 | IOCON_RMODE_INACT); // Configure pin 3 as GPIO and disable pull-up Chip_GPIO_SetPinDIROutput(NSS_GPIO, 0, 3); // Configure pin 3 as output Chip_GPIO_SetPinOutHigh(NSS_GPIO, 0, 3); // Connect pin 3 to VDD rail by setting it high Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_PIO0_7, IOCON_FUNC_0 | IOCON_RMODE_INACT); // Configure pin 7 as GPIO and disable pull-up Chip_GPIO_SetPinDIROutput(NSS_GPIO, 0, 7); // Configure pin 7 as output Chip_GPIO_SetPinOutHigh(NSS_GPIO, 0, 7); // Connect pin 7 to VDD rail by setting it high } /** * @brief Creates an NDEF message with the two resistance values and writes it to memory. * @param res1 : The raw resistance value from the first channel. * @param res2 : The raw resistance value from the second channel. * @return Nothing */ void WriteMeasurementsToNFC(int32_t res1, int32_t res2) { char payloadText[64]; NDEFT2T_CREATE_RECORD_INFO_T createRecordInfo; uint8_t locale[] = "en"; snprintf(payloadText, sizeof(payloadText), "R1:%ld,R2:%ld", res1, res2); NDEFT2T_CreateMessage(g_ndeft2tInstanceBuffer, g_nfcMessageBuffer, NFC_SHARED_MEM_BYTE_SIZE, true); createRecordInfo.shortRecord = 1; createRecordInfo.pString = locale; if (NDEFT2T_CreateTextRecord(g_ndeft2tInstanceBuffer, &createRecordInfo)) { if (NDEFT2T_WriteRecordPayload(g_ndeft2tInstanceBuffer, (uint8_t*)payloadText, strlen(payloadText))) { NDEFT2T_CommitRecord(g_ndeft2tInstanceBuffer); } } NDEFT2T_CommitMessage(g_ndeft2tInstanceBuffer); } /** * @brief Creates a simple NDEF text message "hello" and writes it to NFC memory. * @return Nothing */ void WriteHelloMessageToNFC(void) { char payloadText[] = "bananas"; NDEFT2T_CREATE_RECORD_INFO_T createRecordInfo; uint8_t locale[] = "en"; // 1. Start creating a new NDEF message in our buffer. NDEFT2T_CreateMessage(g_ndeft2tInstanceBuffer, g_nfcMessageBuffer, NFC_SHARED_MEM_BYTE_SIZE, true /* isFirstMessage */); // 2. Prepare information for a new NDEF Text Record. createRecordInfo.shortRecord = 1; createRecordInfo.pString = locale; // 3. Create the Text Record structure within the message. if (NDEFT2T_CreateTextRecord(g_ndeft2tInstanceBuffer, &createRecordInfo)) { // 4. Write the actual "hello" string into the record's payload. if (NDEFT2T_WriteRecordPayload(g_ndeft2tInstanceBuffer, (uint8_t*)payloadText, strlen(payloadText))) { // 5. Finalise this specific record. NDEFT2T_CommitRecord(g_ndeft2tInstanceBuffer); } } // 6. Finalize the entire message, making it available to the NFC hardware. NDEFT2T_CommitMessage(g_ndeft2tInstanceBuffer); } /** * @brief Performs ADC and I2D conversions and calculates the resistance for a specific channel. * @param channel : The measurement channel to measure (CHANNEL_0 or CHANNEL_1) * @return A raw, scaled resistance value, or -1 if an error occurs (e.g., open circuit). * @note Uses low-power __WFE() to wait for conversions, essential for passive mode. */ int32_t PerformAndCalculateResistance(int channel) { int32_t v_drive, v_sense, i2d_val, adc_diff, resistance_result; ADCDAC_IO_T drive_pin_adc, sense_pin_adc; /* * NOTE: Peripheral clocks and power are assumed to be enabled in main(). * If this function were called from multiple places, you might enable/disable * them here instead. For this application, enabling in main() is more efficient. */ if (channel == CHANNEL_1) { drive_pin_adc = ADCDAC_IO_ANA0_4; sense_pin_adc = ADCDAC_IO_ANA0_5; } else { drive_pin_adc = ADCDAC_IO_ANA0_0; sense_pin_adc = ADCDAC_IO_ANA0_1; } // --- V_DRIVE ADC Measurement --- Chip_ADCDAC_SetMuxADC(NSS_ADCDAC0, drive_pin_adc); Chip_ADCDAC_StartADC(NSS_ADCDAC0); // NEW, LOW-POWER WAY: Sleep until the ADC conversion is done. while (!(Chip_ADCDAC_ReadStatus(NSS_ADCDAC0) & ADCDAC_STATUS_ADC_DONE)) { { /* wait */ } } v_drive = Chip_ADCDAC_GetValueADC(NSS_ADCDAC0); // --- V_SENSE ADC Measurement --- Chip_ADCDAC_SetMuxADC(NSS_ADCDAC0, sense_pin_adc); Chip_ADCDAC_StartADC(NSS_ADCDAC0); // Sleep until the ADC conversion is done. while (!(Chip_ADCDAC_ReadStatus(NSS_ADCDAC0) & ADCDAC_STATUS_ADC_DONE)) { { /* wait */ } } v_sense = Chip_ADCDAC_GetValueADC(NSS_ADCDAC0); // --- I2D Measurement --- Chip_I2D_Start(NSS_I2D); // Sleep until the I2D conversion is done. while (!(Chip_I2D_ReadStatus(NSS_I2D) & I2D_STATUS_CONVERSION_DONE)) { { /* wait */ } // Wait For Event - wakes up on ADC_DONE event --> Replaced __WFE() with busy waits {} } i2d_val = Chip_I2D_GetValue(NSS_I2D); /* * NOTE: Peripherals are left powered on for the next measurement. * They will be powered down at the end of main(). */ // --- Calculation --- adc_diff = v_drive - v_sense; if (adc_diff < 1) { adc_diff = 1; } if (i2d_val > 0) { resistance_result = ((uint32_t)adc_diff * 10000) / i2d_val; } else { resistance_result = -1; // Indicates open circuit or error } return resistance_result; } ntag2xx_read.ino: /**************************************************************************/ /*!     @file     readntag_continuous_power_and_data.ino     @author   KTOWN (Adafruit Industries) / Modified for continuous power and data read     @license  BSD (see license.txt)     This version keeps a passive NFC tag continuously powered, and on each     loop, it reads and displays the data from a specific range of pages (8-13).     It resets when the tag is removed. */ /**************************************************************************/ #include #include #include // If using the breakout with SPI, define the pins for SPI communication. #define PN532_SCK  (SCK) #define PN532_MISO (MISO) #define PN532_MOSI (MOSI) #define PN532_SS   (10) // Or whatever SPI CS pin you're using // If using the breakout or shield with I2C, define the pins for I2C // and comment out the SPI definitions. #define PN532_IRQ   (2) #define PN532_RESET (3) // Use this line for I2C Adafruit_PN532 nfc(PN532_IRQ, PN532_RESET); // Or use this line for SPI // Adafruit_PN532 nfc(PN532_SCK, PN532_MISO, PN532_MOSI, PN532_SS); // Global state variables to track if a tag is currently selected bool tagIsPresent = false; uint8_t uid[] = { 0, 0, 0, 0, 0, 0, 0 }; uint8_t uidLength; int pageStart = 8; int pageEnd = 12; void setup(void) {   Serial.begin(115200);   while (!Serial) delay(10); // For Leonardo/Micro/Zero   nfc.begin();   uint32_t versiondata = nfc.getFirmwareVersion();   if (!versiondata) {     Serial.print("Didn't find PN53x board");     while (1); // halt   }   Serial.print("Found chip PN5"); Serial.print((versiondata >> 24) & 0xFF, HEX);   Serial.print(", Firmware ver. "); Serial.print((versiondata >> 16) & 0xFF, DEC);   Serial.print('.'); Serial.println((versiondata >> 8) & 0xFF, DEC);   // Configure the board to listen for ISO14443A cards   nfc.SAMConfig();   Serial.println("Waiting for an ISO14443A Card to power and read..."); } void loop(void) {   // === STATE 1: NO TAG IS SELECTED ===   // If we don't have a tag, try to find one.   if (!tagIsPresent) {     Serial.print("."); // Print a dot to show we are waiting     // Wait for a card to enter the field. This also provides power.     bool success = nfc.readPassiveTargetID(PN532_MIFARE_ISO14443A, uid, &uidLength, 500);     if (success) {       tagIsPresent = true;       Serial.println("\n=================================================");       Serial.println("Tag Found and Activated! Preparing to read data.");       Serial.print("  UID Length: "); Serial.print(uidLength, DEC); Serial.println(" bytes");       Serial.print("  UID Value: ");       nfc.PrintHex(uid, uidLength);             // OPTIONAL DELAY: If your tag is a sensor that needs time to       // perform a measurement after power-up, add a delay here.       // 200ms is a good starting point for many sensor tags.       delay(200);     }     // If it fails or times out, the loop will just restart and try again.     return;   }   // === STATE 2: TAG IS SELECTED AND POWERED ===   // If we have a tag, attempt to read the data from pages 8 to 13.   if (tagIsPresent) {     Serial.println("----------------------------------------");     Serial.print("Reading data from pages ");     Serial.print(pageStart);     Serial.print("-");     Serial.print(pageEnd);     Serial.println();         bool all_reads_succeeded = true;         for (int page = pageStart; page <= pageEnd; page++) {       uint8_t page_data[4]; // NTAG pages are 4 bytes long             // Attempt to read the current page       if (nfc.ntag2xx_ReadPage(page, page_data)) {         // Success! Print the data.         Serial.print("  Page ");         if (page < 10) Serial.print("0"); // for nice alignment         Serial.print(page);         Serial.print(": ");         // nfc.PrintHexChar is a great helper function that prints hex and ASCII         nfc.PrintHexChar(page_data, 4);       } else {         // FAILED TO READ! This is our signal that the tag has been removed.         Serial.print("  Failed to read page "); Serial.println(page);         all_reads_succeeded = false;         break; // Exit the for loop immediately       }     }     if (all_reads_succeeded) {       Serial.println("Data read successfully. Tag is still present.");     } else {       // If any read failed, we reset the system state.       Serial.println("\n=================================================");       Serial.println("Tag lost or communication failed. Resetting...");       Serial.println("=================================================");       tagIsPresent = false; // Reset the state       nfc.SAMConfig(); // Re-configure the reader to listen for a new tag     }         // Wait a bit before the next read cycle.     delay(2000);   } } Re: NHS3152 Passive Measurement FYI. NHS3152 power only from NFC field and load Capacitor - NXP Community Re: NHS3152 Passive Measurement Hi Jimmy, thank you for replying. Do you think adding more capacitance to the capacitor bank could possibly enable ADC operation in passive mode? If so, what would be a safe amount of total capacitance to have to perform these operations. Re: NHS3152 Passive Measurement when the board running passively, the power may not stable enough for the ADC operation.
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S32G3: RTD MemMap セクション違反 (LLCE の場合) こんにちは、 「 [S32G3/Valeo] RTD MemMap セクション違反 - NXP コミュニティ」の提案に従い、LLCE の xxx_MemMap レビュー用のチケットを以下のように作成します (完全なドキュメントを添付します)。 GHS でコンパイルした後、以下のパラメータ/関数が適切なメモリ領域に含まれていないかどうかを確認してください。 ================================================================= (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_AFcfg.c: Llce_Eth2Can_EnabledFormats => BSSSセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ pLlce_Can_AfBuffer => rodataセクションであるCAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIEDのデータ (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_MAIN_SOC_PBcfg.c: // VariantPostBuildが有効になっています (MAIN_SOC) Llce_Rx_Filters_List_MAIN_SOC => rodataセクションであるCAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIEDのデータ Llce_RxAf_Filters_List_MAIN_SOC => rodataセクションのCAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIEDのデータ Llce_Rx_Filters_Ctrl0_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_Rx_Filters_Ctrl2_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_Rx_Filters_Ctrl4_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_Rx_Filters_Ctrl9_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_Rx_Filters_Ctrl15_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_RxAf_Filters_Ctrl0_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_RxAf_Filters_Ctrl5_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_RxAf_Filters_Ctrl9_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_RxAf_Filters_Ctrl15_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_Llce: llce_minihif => 静的グローバル変数が Can_43_LLCE_MemMap.h に含まれていません u8Length => 静的ローカル変数は Can_43_LLCE_MemMap.h に含まれていません stringBuf => 静的ローカル変数は Can_43_LLCE_MemMap.h に含まれていません ***************************************************************************************************************************************************************** 回答: この質問は、NXPコミュニティのタグ「LLCE」を介してLLCEチームに提起してください。 ***************************************************************************************************************************************************************** LLCE Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 修正が予定されているかどうかご存知ですか?もしSOなら、いつですか? Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 あなたの質問に関して、Valeo からの非常に遅いフィードバック: 1. 「Llce_Eth2Can_EnabledFormats => bssセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ」とおっしゃった場合、 Llce_Eth2Can_EnabledFormats は、たとえば .mcal_bss_no_cacheable にあるべきだと言っていますが、実際には .bss セクションに配置されていますか? この変数は4の値で初期化されていますが、変数は.dataではなく.bssセクション内にあります。セクションSO、変数はたとえば .mcal_data_x にある必要があります。 2.グローバル静的変数llce_minihif を適切な MemMap セクションに含めます。u8Length/ stringBuf は関数の静的変数であり、SWS_MemMap_00023 に従って関数の本体内に MemMap を追加できないため、MemMap の制御下にありません。MemMap セクションでそれらを制御する必要がある場合は、AUTOSAR の推奨事項に従うことができます。 「関数の静的変数の特別なメモリ マッピングを強制するには、この変数をファイルの静的スコープに移動する必要があります。」 この変数はCan_43_LLCE_TS_T40D11M10I10R0で修正されたようです。 3. Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ については、正しいセクションに配置しましたか? 下の画像を見ると、(static、static const) がありますが、それらはすべて .mcal_cont_cfg という同じセクションに配置されています。これは rodata であり、このファイルは生成されるSO、どのセクションに配置するかは私の責任ではありません。 以前のやり取りでは、新しいソフトウェア バージョンがないため、次のリリースではソフトウェア アップデートは行われないと予想されていました。それはまだCASEなのでしょうか? Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、コングさん。 弊社側からの回答をお客様にまとめましたが、今のところそれ以上のフィードバックはありません。 あなたが提起した LLCE に関する質問に対するさらなるフィードバックをお願いするために、お問い合わせに個別のメールを送信しました。 お客様からの返信があればここで更新します。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、リチャード。 更新情報をありがとうございます! S32GのCDは2025年3月にリリース予定で、2025年5月にもリリース予定です。それ以降のリリース予定はありません。SO、このトピックに関する情報を収集し、これらの実装を2025年5月のリリースに組み込む予定です。 最初の回答の質問に対するフィードバックをお願いします。 1. 彼らの言っていることは正しく理解していますか?例えば、 「Llce_Eth2Can_EnabledFormats => BSSSセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ」と書いてある場合、 Llce_Eth2Can_EnabledFormats は、たとえば .mcal_bss_no_cacheable にあるべきだと言われていますが、実際には .bss セクションに配置されていますか? 2.グローバル静的変数llce_minihif を適切な MemMap セクションに含めます。u8Length/ stringBuf は関数の静的変数であり、SWS_MemMap_00023 に従って関数の本体内に MemMap を追加できないため、MemMap の制御下にありません。MemMapセクションで制御する必要がある場合は、AUTOSARの推奨事項に従うことができます。 「関数の静的変数に特別なメモリマッピングを強制するには、この変数をファイルの静的スコープに移動する必要があります。」これは強い要求であるとCANご確認いただけますか? 3.Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ については、お客様がこれを間違ったセクションに配置されていると考える理由を確認しましたか? Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 修正の期待に関する元のチケットの更新によると、お客様は 6 月までにコードをフリーズする予定です。 多くのコンポーネントが関係しており、パッチが必要なため、6月までにそれらをまとめるのは難しいでしょう。 SO、お客様からさらに指示がない限り、現在の想定/リソースに従って計画を立ててください。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、コングさん。 更新が遅くなり申し訳ございませんが、元のチケットでわかるように、お客様からのフィードバックはまったくありません。 私はこれを再度推進しますが、現状の評価に応じて計画を立てることがCANそうです。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、リチャード。 このトピックに関して何か最新情報はありますか? S32G の 3 月の CD にできるだけ早く実装する必要があります。 よろしくお願いいたします。 コング Re: S32G3: RTD MemMap Sections Violations (For LLCE) 2. はい、これらの詳細を記録するためにチケットAF-4950を作成しました。チケットの詳細を確定するために、上記の質問の確認を待っています。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 更新情報をありがとうございます。 1.Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ については、なぜお客様がこれを間違ったセクションに配置されていると考えるのかをさらに確認します。 2. 残りの部分については、適切なセクションが含まれるように修正するとおっしゃっていましたが、修正するためのチケットや計画は用意されていて、お客様と共有できますか? 3. 元のチケット「 [S32G3/Valeo] RTD MemMap セクション違反 - NXPコミュニティ」に記載されているように、FAE はこの問題の修正に関するお客様の期待について確認しており、追加情報が入りましたらここで更新します。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 まず、レポートを理解する必要があります。「Llce_Eth2Can_EnabledFormats => bssセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ」と書かれている場合、 Llce_Eth2Can_EnabledFormatsは例えば.mcal_bss_no_cacheable、しかし、実際には.bssに配置されますセクション? 上記の前提となる理解に従うと、フィードバックは次のようになります。 NXP は次のことを行います。 • グローバル静的変数 llce_minihif を適切な MemMap セクションに含めます。u8Length/ stringBuf は関数の静的変数であり、SWS_MemMap_00023 に従って関数の本体内に MemMap を追加できないため、MemMap の制御下にありません。MemMap セクションでそれらを制御する必要がある場合は、AUTOSAR の推奨事項に従うことができます。「関数の静的変数の特別なメモリ マッピングを強制するには、この変数をファイルの静的スコープに移動する必要があります。」これは強い要求であることをCAN確認できますか? • グローバル静的変数定義llce_minihifを適切なMemMapセクションに含める • Llce_Eth2Can_EnabledFormats の宣言を対応する MemMap セクションに含めます。これがおそらく置き忘れの原因です。 • pLlce_Can_AfBuffer の宣言を対応する MemMap セクションに含め、現在の MemMap セクションが適切かどうかを再確認します。 • Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ はすでに対応する MemMap セクションに配置されているため、変数の配置ミスの原因を特定するには追加の分析が必要です。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 アップデートはありますか? よろしくお願いいたします。 リチャード・チャン。
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Even when connected to a PC, the USB is not recognized. The USB is not recognized. The SoC is iMX8Mini(MIMX8MM6CVTKZAA). Please tell me the cause by referring to the device tree settings below. &usbotg2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg2>; power-active-high; disable-over-current; dr_mode = "peripheral"; status = "okay"; phy_type = "utmi"; phys = <&usbphynop2_alt>; phy-names = "usb"; port { typea_hs: endpoint { remote-endpoint = <&typea_con_hs>; }; }; }; &soc { usbphynop2_alt: usbphynop@381f0040 { compatible = "usb-nop-xceiv"; reg = <0x381f0040 0x40>; #phy-cells = <0>; status = "okay"; }; }; Re: Even when connected to a PC, the USB is not recognized. Thank you very much. I used it as a reference and resolved the issue. Re: Even when connected to a PC, the USB is not recognized. Hello, Could you please share the USB schematic connection of your design? Best regards.
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询问 S32DS_PPC_eqADC 演示 你好,团队 我想了解一下使用 S32DS PA 2.1 的 MPC5777C eQADC 演示? 我试着用 DS 的例子,它在 ADC 转换触发信号期间显示 " DEVASSERT "。 因此,我希望通过 S32DS PA 寻找 MPC5777C eQADC 项目的工作示例。 谢谢! S32DS Re: Asking S32DS_PPC_eqADC demo 嗨,丹 我使用了下面的描述,其中显示了一些措辞。 谢谢。 Re: Asking S32DS_PPC_eqADC demo 你好,@Luke_Chun、 你使用的是哪个 MPC5777C 代码包版本?您查看过示例自述文件中的详细信息吗? 顺祝商祺! 丹
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Pin configuration for Watch Dog timer MIMXRT1042XJM5B Dear team, We are using MIMXRT1042XJM5B in our upcoming project, we are looking for pinout of Watch Dog Timer, where it can be configured, kindly let us know Looking forward to hear from you, Regards, Bhavesh Re: Pin configuration for Watch Dog timer MIMXRT1042XJM5B Hi @bhaveshtirex , Thank you so much for your interest in our products and for using our community. Regarding "We are using MIMXRT1042XJM5B in our upcoming project, we are looking for pinout of Watch Dog Timer, where it can be configured", In IMXRT1040RM, there are some description about WDOG External Signals. As for how to configure the pin, you can use Pins  Tool in MCUXPresso IDE Wish it helps you. If you still have question about it, please kindly let me know. Wish you a nice day! Best Regards MayLiu
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S32ZE_EB_ACP_M33_McalExt_TS_TxDxM1I0R0_RTD_2.0.0_P04 cannot be opened Hi expert,  I am following GreenVIP 1.3.0 to download S32ZE_EB_ACP_M33_McalExt_TS_TxDxM1I0R0_RTD_2.0.0_P04. It shows like below. I've tried several times but failed to open it.  Could you please kindly help?   GREEN_VIP Re: S32ZE_EB_ACP_M33_McalExt_TS_TxDxM1I0R0_RTD_2.0.0_P04 cannot be opened Hello @Catherine, Input from Ghennadi  Buleev: "In order to successfully unzip the folder the user must use - 7z - WinRAR or any other types of archivers. In this case everything will work." Best regards, Radu
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RDDRONE-MBS772 SMBusアドレスが見つかりません こんにちは、チーム 私は最初に、J18 ヘッダーを使用して SMBus 経由で RDDRONE-BMS772 と通信しようとしました。 ESP32 と RDDRONE-BMS 772 ボードを SMBUS ヘッダー経由で接続し、SDA、SCL、GND を接続しています。 私は以下のコードを使用しており、I2C ディスプレイでコードをテストし、以下のコードでスレーブ アドレスを見つけることができました。 CLI を使用して「bms set smbus-enable 1」コマンドで SMBus を有効にし、bms get smbus-enable を使用して検証しました。 UAVCAN をテストしたところ、正常に動作し、PixHawk を使用してデータを取得できました。 #include #define SDA_PIN 6 #define SCL_PIN 7 void setup() { Serial.begin(115200); Serial.println("\nI2C Scanner starting..."); Wire.begin(SDA_PIN, SCL_PIN, 100000); // SDA, SCL, 100kHz Serial.println("\nI2C Scanner starting..."); } void loop() { byte error, address; int count = 0; for (address = 1; address < 127; address++) { Wire.beginTransmission(address); error = Wire.endTransmission(); if (error == 0) { Serial.print("I2C device found at 0x"); Serial.println(address, HEX); count++; } } if (count == 0) { Serial.println("No I2C devices found."); } delay(2000); } 何が間違っているのか教えてください。私の意図は、SMBus を使用して電圧、電流などのデータを取得することです。 Re: RDDRONE-MBS772 SMBus Address not found こんにちは、 @abhishekBLDさん、 Arduino をこの HW 構成で動作させるには、 https://github.com/PowerCartel/PackProbe/tree/masterからこの SMBus PackProbe.ino ファイルをダウンロードし、次の変更を加えることができます。 Arduino Uno のデジタルピン 7 と 8 を使用できるようにするには、SCL_PIN を 0 に変更します。 deviceAddressを11に変更します。 次に、コンソール ブリッジの代わりにシリアル モニターで動作するようにしてみましょう。 コンソール/ブリッジをシリアルに変換するには、次の手順に従ってください: https://github.com/PowerCartel/PackProbe/blob/master/PackProbe/PackProbe.ino#L74-L77 これは、前述の HW で動作するはずです。 これが役に立つことを願います! 敬具 シス Re: RDDRONE-MBS772 SMBus Address not found こんにちは、 @abhishekBLDさん、 RDDRONE-BMS772 の BMS6.0 でも SMBus が動作していることがわかります。 私はmain · NXPHoverGames/RDDRONE-BMS772 · GitHub の RDDRONE-BMS772/Binary で nuttx.bin をプログラムしました。 しかし、バージョン 6.0 にはバグがあり、バージョン 7.2 では修正されていることに気付きました。 セル電圧はmV表記の完全な整数電圧(4000mVまたは3000mV)のみを表示しており、これは私のRDDRONE-BMS772の実際のセル電圧(例:4123mV または 3978mV)。 RDDRONE-BMS772用のBMS7.2を入手するには、以下の手順に従って.binをビルドして作成します。ただし、RDDRONE-BMS772 用に設定するだけです。 フォローしてください: GitHub - NXPHoverGames/MR-BMS771 。 バイナリを設定して作成する手順 ( GitHub - NXPHoverGames/MR-BMS771 ) では、必ず RDDRONE-BMS772 用に設定してください。次に例を示します。 tools/configure.sh -e rddrone-bms772:bms But if you did not get any messages via SMBus, I doubt that this will fix that problem. Meaning that it is either a HW issue or a SW issue.  In the attached picture you can see the pinning that I use. Unfortunately I'm not allowed to share the code that I'm using on the Arduino. Maybe I will still find a way to share an example or a link.  For the BMS code, you should have the same code as I tested with.   Pinout of the SMBus connection between RDDRONE-BMS772 and an Arduino Uno board:    I hope this information and picture helps debugging the problem!   Kind regards,   Cis Re: RDDRONE-MBS772 SMBus Address not found こんにちは@cisvmierlo 、 私は最新の github リポジトリhttps://github.com/NXPHoverGames/RDDRONE-BMS772/tree/main?tab=readme-ov-fileからクローンした BMS バージョン 6.0 を使用しています。 上記のリポジトリから SMBUS 通信をテストしていただけますか? 私は RDDRONE-BMS772 を使用しているため、提供されたリンク (BMS771) ではなく上記のリンクを使用しています。7S-14S には BMS771 が使用されているようですが、両方に同じファームウェアが使用されているかどうか確認できますか? bms smbus-enable 1 を設定する bms保存 以前にも上記の 2 つのコマンドを実行しており、bms get-all を実行するとそれが確認できます。 また、導通もチェックしましたが、すべて正常です。 調査して解決策を提案してください。 Re: RDDRONE-MBS772 SMBus Address not found こんにちは、 @abhishekBLDさん、 モバイルロボット向け小型オールインワンBMS「RDDRONE-BMS772」にご興味をお持ちいただきありがとうございます。 この問題に遭遇してしまったことをお詫び申し上げます。 RDDRONE-BMS772 で使用している SW バージョンは何ですか? BMS のバージョンは、CLI で SW を起動したとき、または「reboot」(コマンド) を発行したときに確認CANます。 現在、最新バージョン (7.2) は、MR-BMS771 の git リポジトリにあります: https://github.com/NXPHoverGames/MR-BMS771 、このSWは、正しく設定されていればRDDRONE-BMS772でも使用できます。 私は次の RDDRONE-BMS SW バージョンで Arduino Uno を使用して SMBus をテストしました。 BMSバージョン: BMS7.2-11.0-RDDRONE-BMS772。 SDA ポート Dpin7 と SCL ポート Dpin8。 正しい SMBus コネクタ J18 を使用しており、コマンド「bms set smbus-enable 1」で SMBus を正しく有効にしていることがわかります。 「bms save」コマンドでパラメータも保存しましたか?そうしないと、電源の再投入またはリセットにより、SMBus 有効化パラメータが 0 にリセットされる可能性があります。 実際の設定は分かりませんが、配線を短くして、I2C速度をI2C低速モード(例えばボード間通信に I2C を使用する場合、クロック周波数は最大 25kHz になります。 BMS のバージョン番号を共有していただければ、それを使って SMBus もテストCANます。 敬具、 シス
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S32ZE_EB_ACP_M33_McalExt_TS_TxDxM1I0R0_RTD_2.0.0_P04 无法打开 你好,专家、 我正在使用 GreenVIP 1.3.0 下载 S32ZE_EB_ACP_M33_McalExt_TS_TxDxM1I0R0_RTD_2.0.0_P04。显示如下我试了好几次都打不开。 能否请您帮帮忙?   GREEN_VIP Re: S32ZE_EB_ACP_M33_McalExt_TS_TxDxM1I0R0_RTD_2.0.0_P04 cannot be opened 你好@Catherine, 来自 Ghennadi Buleev 的输入: " 为了成功解压文件夹,用户必须使用 - 7z - WinRAR 或任何其他类型的压缩器。 在这种情况下,一切正常。" 最崇高的敬意, Radu
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RDDRONE-MBS772 SMBus Address not found Hi Team, I have been first trying to communicate to RDDRONE-BMS772 via SMBus using J18 header. I am connecting ESP32 and RDDRONE-BMS 772 board via the SMBUS header, I am connecting SDA, SCL and GND. I am using the below code, I have tested the code with a I2C display and I am able to find the slave address with the below code. I have enabled the SMBus using the CLI using "bms set smbus-enable 1" command and verified using bms get smbus-enable. I have tested UAVCAN it works fine and I am able to fetch the data using PixHawk. #include #define SDA_PIN 6 #define SCL_PIN 7 void setup() { Serial.begin(115200); Serial.println("\nI2C Scanner starting..."); Wire.begin(SDA_PIN, SCL_PIN, 100000); // SDA, SCL, 100kHz Serial.println("\nI2C Scanner starting..."); } void loop() { byte error, address; int count = 0; for (address = 1; address < 127; address++) { Wire.beginTransmission(address); error = Wire.endTransmission(); if (error == 0) { Serial.print("I2C device found at 0x"); Serial.println(address, HEX); count++; } } if (count == 0) { Serial.println("No I2C devices found."); } delay(2000); } Please suggest me what I could be doing wrong? my intention is to fetch the data like Voltage, Current, etc. using SMBus. Re: RDDRONE-MBS772 SMBus Address not found Hi @abhishekBLD , To make the Arduino work with this HW configuration, you could download this SMBus PackProbe.ino file at https://github.com/PowerCartel/PackProbe/tree/master and you could do the following changes: Change SCL_PIN to 0 to be able to use Digital pin 7 and 8 of the Arduino Uno. Change deviceAddress to 11.  And then make it work with the serial monitor instead of the console bridge: Follow instructions to convert the console/bridge to serial: https://github.com/PowerCartel/PackProbe/blob/master/PackProbe/PackProbe.ino#L74-L77  This should work with the mentioned HW. I hope this helps!  Kind regards, Cis Re: RDDRONE-MBS772 SMBus Address not found Hi @abhishekBLD , I can see that SMBus is also working with BMS6.0 from the RDDRONE-BMS772.  I programmed the nuttx.bin at RDDRONE-BMS772/Binary at main · NXPHoverGames/RDDRONE-BMS772 · GitHub.  However I did notice that there is a bug in version 6.0 that is fixed in version 7.2.  The cell voltage is only showing the full integer voltages in mv notation (4000mV or 3000mV) and this does not correspond to actual cell voltages on my RDDRONE-BMS772 (e.g. 4123mV or 3978mV). To get the BMS7.2 for the RDDRONE-BMS772, you can follow the instruction to build and make the .bin, but just configure it for the RDDRONE-BMS772.  Please follow: GitHub - NXPHoverGames/MR-BMS771.  When you are at the step to configure and make the binary (GitHub - NXPHoverGames/MR-BMS771), make sure to configure for the RDDRONE-BMS772, for example:  tools/configure.sh -e rddrone-bms772:bms But if you did not get any messages via SMBus, I doubt that this will fix that problem. Meaning that it is either a HW issue or a SW issue.  In the attached picture you can see the pinning that I use. Unfortunately I'm not allowed to share the code that I'm using on the Arduino. Maybe I will still find a way to share an example or a link.  For the BMS code, you should have the same code as I tested with.   Pinout of the SMBus connection between RDDRONE-BMS772 and an Arduino Uno board:    I hope this information and picture helps debugging the problem!   Kind regards,   Cis Re: RDDRONE-MBS772 SMBus Address not found Hi @cisvmierlo, I am using BMS version 6.0 which I have cloned from the latest github repo https://github.com/NXPHoverGames/RDDRONE-BMS772/tree/main?tab=readme-ov-file  can you please test SMBUS communication from the above given repo? I am using RDDRONE-BMS772, that's why I am using above link instead of what you provided (BMS771). can you confirm if both has the same firmware, because as I can see BMS771 is used for 7S-14S? bms set smbus-enable 1 bms save I have done above two commands earlier as well and I could see it when I do bms get-all. Also I have check continuity and everything is fine. Please look into it and suggest solutions. Re: RDDRONE-MBS772 SMBus Address not found Hi @abhishekBLD , Thank you for your interest in the RDDRONE-BMS772 small all-in-one BMS for mobile robotics! I'm sorry that you've run into this issue.  Which SW version are you using on the RDDRONE-BMS772?  You can see the BMS version when the SW is started on the CLI or when issuing a "reboot" (command). Currently the latest version (7.2) can be found at the git repository of the MR-BMS771: https://github.com/NXPHoverGames/MR-BMS771, this SW can be used by the RDDRONE-BMS772 as well when configured correctly I've just tested SMBus with an Arduino Uno on the following RDDRONE-BMS SW version: BMS version: BMS7.2-11.0-RDDRONE-BMS772.  SDA port Dpin7 and SCL port Dpin8.  I can see that you are using the correct SMBus connector J18 and correctly enabling SMBus with the command "bms set smbus-enable 1".  Did you also save the parameters with the "bms save" command? otherwise a repower or reset could reset the smbus-enable parameter to 0. I cannot see your actual setup, but I would advise to keep the wires short and maybe lowering the I2C speed to the I2C slow mode ( e.g. 25kHz) when using I2C for board to board communication.  If you can share your BMS version number, I can test the SMBus on that as well.  Kind regards,  Cis
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IMXRT1176 OTFAD 通过 SWD 读取时解密闪存 您好, 我目前正在使用 OTFAD 加密存储在 IMXRt1176 外部闪存中的代码。 我已经进行了两次测试,一次是我用烧在熔丝中的KEK进行加密,另一次是我用不同的密钥进行加密。 在第一次测试中,软件运行符合预期,而在第二次测试中,软件不运行也符合预期。 当我使用 MCUXpresso 中的内存浏览器读取外部闪存时,我发现当我使用不正确的密钥加密图像时,闪存内容看起来是加密的,但当我使用正确的密钥时,闪存内容看起来与未加密的图像一模一样。 我的理论是,我从 CPU 的地址空间读取闪存,而 OTFAD 正在运行,因此它在我读取闪存内容时进行解密。如果 OTFAD 使用了不正确的密钥,那么内容就无法正确解密,从而导致与原始图像不匹配。 以上说法正确吗? 如果是的话,我在使用 PEMicro Cyclone 编程器验证时遇到了一个问题,我想应该与此有关。当我对新设备进行编程时,验证通过。当我重新编程时,它没有通过。我认为在第二轮中,OTFAD 已经加载了密钥,并在 Cyclone 回读时解密了图像。如果已解密,则验证失败,因为它与加密图像不匹配。 我知道程序是正确的,因为我可以运行软件,它也会报告更新的版本号。 Re: IMXRT1176 OTFAD Decrypting Flash when reading over SWD 你好@rnicolls、 是的,这是 OTFAD 的预期结果。 祝您愉快, Kan ------------------------------------------------------------------------------- 注: - 如果本帖回答了您的问题,请点击"标记正确" 按钮。谢谢! - 我们会在最后一次发帖后的 7 周内跟踪主题,之后的回复将被忽略 如果您以后有相关问题,请另开新主题,并参考已关闭的主题。 ------------------------------------------------------------------------------- Re: IMXRT1176 OTFAD Decrypting Flash when reading over SWD 嗨,Kan、 是的,我总是在编程前清除,但问题依然存在。我还尝试执行大规模擦除,然后进行 RESET,然后进行编程和验证,但这会导致编程步骤失败。 您能否确认,由于 OTFAD 正在运行,通过 SWD 读取闪存将显示未加密的数据? Best、 罗里 Re: IMXRT1176 OTFAD Decrypting Flash when reading over SWD 你好@rnicolls、 谢谢你的澄清!也许你是对的,需要使用"PEMicro" 进行检查,也许它可以直接读取闪存内容进行验证。 顺便问一下,在重新编程之前,您是否尝试过大规模擦除?有什么不同吗? 祝您愉快, Kan ------------------------------------------------------------------------------- 注: - 如果本帖回答了您的问题,请点击"标记正确" 按钮。谢谢! - 我们会在最后一次发帖后的 7 周内跟踪主题,之后的回复将被忽略 如果您以后有相关问题,请另开新主题,并参考已关闭的主题。 ------------------------------------------------------------------------------- Re: IMXRT1176 OTFAD Decrypting Flash when reading over SWD 嗨,Kan、 我正在使用 PEMicro Cyclone FX 进行编程和验证。 Re: IMXRT1176 OTFAD Decrypting Flash when reading over SWD 你好@rnicolls、 请问您使用哪种工具对闪存进行编程和验证?通过高效密码学标准(SEC)工具还是其他工具?请予以澄清。 祝您愉快, Kan ------------------------------------------------------------------------------- 注: - 如果本帖回答了您的问题,请点击"标记正确" 按钮。谢谢! - 我们会在最后一次发帖后的 7 周内跟踪主题,之后的回复将被忽略 如果您以后有相关问题,请另开新主题,并参考已关闭的主题。 -------------------------------------------------------------------------------
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I2C Fast Mode Rise/Fall Time Lower Limit The I2C standard (UM10204) specifies a lower limit for the rise/fall time in fast mode. Is this specified to manage undershoot and prevent EMS? If these are not issues, is it not necessary to adhere to the lower limit? ※This is the opinion of another manufacturer that handles I2C. Re: I2C Fast Mode Rise/Fall Time Lower Limit Hi Tomas, Thank you for your quick response. This is very helpful. However, if that's the case, why is there no minimum limit on rise time in Fast-mode Plus, even though it is even faster? Re: I2C Fast Mode Rise/Fall Time Lower Limit Hi Keitaro, The lower limit is defined not only to manage electromagnetic susceptibility and undershoot, but also to ensure robust signal integrity and interoperability across I²C-compliant devices. Here are the key reasons for this specification: - Signal Integrity: Excessively fast transitions can cause reflections, ringing, and timing violations, especially in systems with longer traces or higher capacitance. The lower limit helps maintain stable communication. - EMS and Undershoot: Fast edges increase high-frequency emissions and can lead to undershoot due to inductive effects. The timing limits help mitigate these risks. - Device Compatibility: The I²C bus is designed for multi-device, multi-vendor environments. Adhering to timing specifications ensures reliable operation across all compliant devices. While it may be technically feasible to operate outside the lower limit in controlled environments where EMS and undershoot are not concerns, doing so would mean deviating from the I²C standard. This could compromise compatibility and long-term reliability. In summary, even if EMS and undershoot are not immediate issues, I recommend adhering to the specified timing limits to maintain compliance and ensure consistent performance. BRs, Tomas
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Flexcomm1 I2C 配置 嗨,团队、 我一直在尝试使用 Flexcomm1 配置 I2C。我无法在主服务器和从机之间建立连接。我正在尝试通过更改执行相同的示例代码。以下是为从 FC4 转移到 FC1 而对示例代码(SDK_2_11_1_EVK MIMXRT685\ boards\ evkmimxrt685\ driver_examples\ i2c\ polling_b2b\ master)所做的更改的快照。 #define gdy112x_i2c_base I2C1 #define i2c1_master_clock_frequency CLOCK_GetFlexCommClkFreq(1U) #define gdy112x_i2c_baudrate (100000U) /* GDY112X 地址(7 位) */ #define GDY112X_7BIT_I2C_ADDR (0x3A)   int main(void) {   /* 将 Flexcomm1 初始化为 I2C */ i2c_master_config_t 主配置; I2C_MasterGetDefaultConfig(&masterConfig);   /* 更改默认波特率配置 */ 主配置.波特率_Bps= gdy112x_i2c_baudrate; /* 初始化 I2C 主外设 */ I2C_MasterInit(gdy112x_i2c_base, &主配置, i2c1_master_clock_frequency);   /*该函数用于从主站向从站/从主站向从站写入和读取数据/* void GDY1121_MinimalI2CTest(void) { status_t 状态; uint8_t reg = WHO_AM_I_REG; uint8_t whoami = 0; PRINTF("开始最小 I2C 测试...\r\n"); // 1) 发送寄存器地址(写) 状态 = I2C_MasterStart(gdy112x_i2c_base, GDY112X_7BIT_I2C_ADDR, kI2C_Write); 如果(status != kStatus_Success) { PRINTF("启动(写入)失败,status=%d\态", status); 返回;    } 状态 = I2C_MasterWriteBlocking(gdy112x_i2c_base, &reg, 1, kI2C_TransferNoStopFlag); 如果(status != kStatus_Success) { PRINTF("写注册地址失败,status=%d\状态", status); I2C_MasterStop(gdy112x_i2c_base); 返回; }   //2) 重启并读取 1 字节 状态 = I2C_MasterRepeatedStart(gdy112x_i2c_base, GDY112X_7BIT_I2C_ADDR, kI2C_Read); 如果(status != kStatus_Success) { PRINTF("重复启动(读取)失败,status=%d\r\n", status); I2C_MasterStop(gdy112x_i2c_base); 返回;    } 状态 = I2C_MasterReadBlocking(gdy112x_i2c_base, &读取, 1, kI2C_TransferDefaultFlag); 如果(status != kStatus_Success) { PRINTF("读取 WHO_AM_I 失败,status=%d\(......)。", status); I2C_MasterStop(gdy112x_i2c_base); 返回;    } // 3) 停止 I2C_MasterStop(gdy112x_i2c_base); PRINTF("WHO_AM_I 读取成功:0x%02X\读取成功", whoami); }   /* pin_mux.c/* void BOARD_InitPins(void) { /* PIO0_8 :FC1_I2C_SCL */ const uint32_t port0_pin8_config =(/* 引脚配置为 FC1_TXD_SCL_MISO_WS*/ iopctl_pio_func1 | /* 启用上拉/下拉功能 */ iopctl_pio_pupd_en | /* 启用上拉功能 */ iopctl_pio_pullup_en | /* 启用输入缓冲区功能 */ iopctl_pio_inbuf_en | /* 正常模式 */ iopctl_pio_slew_rate_normal | /* 正常驱动 */ iopctl_pio_fulldrive_di | /* 模拟多路复用器已禁用 */ iopctl_pio_anamux_di | /* 伪输出漏极已禁用 */ iopctl_pio_psedrain_di | /* 输入函数未反转 */ iopctl_pio_inv_di); IOPCTL_PinMuxSet(IOPCTL, 0U, 8U, 端口 0_pin8_config);   /* PIO0_9 :FC1_I2C_SDA */ const uint32_t port0_pin9_config =(/* 引脚配置为 FC1_RXD_SDA_MOSI_DATA */ iopctl_pio_func1 | /* 启用上拉/下拉功能 */ iopctl_pio_pupd_en | /* 启用上拉功能 */ iopctl_pio_pullup_en | /* 启用输入缓冲区功能 */ iopctl_pio_inbuf_en | /* 正常模式 */ iopctl_pio_slew_rate_normal | /* 正常驱动 */ iopctl_pio_fulldrive_di | /* 模拟多路复用器已禁用 */ iopctl_pio_anamux_di | /* 伪输出漏极已禁用 */ iopctl_pio_psedrain_di | /* 输入函数未反转 */ iopctl_pio_inv_di); IOPCTL_PinMuxSet(IOPCTL, 0U, 9U, 端口 0_pin9_config); }   运行后,系统在函数 I2C_MasterTransferBlocking()函数中挂起。请指示 Re: Flexcomm1 I2C configuration 你好@Pablo_Ramos,此问题已在票据中解决 案例: 00737268. 谢谢! Re: Flexcomm1 I2C configuration 嗨,纳兹明、 您能帮我解决以下问题吗? I2C 引脚有输出吗?如果有,能否分享一个片段? I2C_MasterTransferBlocking 在哪种情况下会挂起? 如果不做任何改动就使用该示例,是否可行? 顺祝商祺! 巴勃罗
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i.MX 93 Maximum Design Current for VDD_SOC What is the maximum current the VDD_SOC rail should be designed for? There is conflicting information at different places. The Hardware Design Guide (Rev. 2.3) and the datasheet (Rev. 6.1) both state a current of 2700 mA.  On the other hand, in the reference schematics (SCH-51943 PDF: SPF-51943), a table on page 10 states a required current of 1500 mA. The PMIC itself is configured in dual-phase mode, which could deliver up to 6A.  What is the correct maximum VDD_SOC current the PMIC needs to be designed for? The PF9453 seems to be an option for powering the i.MX 93. This PMIC features only single-phase mode for the VDD_SOC with up to 2700 mA output current. Are there any limitations to using the PF9453 PMIC instead of the PCA9451 for powering the VDD_SOC rail? Can the i.MX 93 run with full performance and temperature range with the PF9453?  We know that the PF9453 does not support the extra buck converter for the VDDQ_DDR rail, and therefore, only LPDDR4 is supported. Are there any other known drawbacks to using the PF9453 instead of PCA9451? Re: i.MX 93 Maximum Design Current for VDD_SOC Hello, Is the PCA9451 older than the PF9453? Yes, that is correct. What is the reason you still see most i.MX 93 designs are equipped with the PCA9451, and not the PF9453? Because PCA9451 was designed for i.MX93 and was released at the same time. PF9453 is focused for for Industrial, IoT, smart appliance, and portable applications where size and efficiency are critical. Best regards. Re: i.MX 93 Maximum Design Current for VDD_SOC Hi @JorgeCas  Thank you for the quick response. Is the PCA9451 older than the PF9453? In other words, what is the reason you still see most i.MX 93 designs are equipped with the PCA9451, and not the PF9453? Re: i.MX 93 Maximum Design Current for VDD_SOC Hello, What is the maximum current the VDD_SOC rail should be designed for? The maximum current of VDD_SOC in i.MX93 is 2700 mA. On the other hand, in the reference schematics (SCH-51943 PDF: SPF-51943), a table on page 10 states a required current of 1500 mA. The PMIC itself is configured in dual-phase mode, which could deliver up to 6A.  This table shows the max output current of BUCK1/BUCK3 in dual-phase configuration (4000 mA), this is the output current from PMIC that is connected to VDD_SOC power rail of i.MX93. What is the correct maximum VDD_SOC current the PMIC needs to be designed for? It is 2700 mA, the dual phase configuration of BUCK1/BUCK3 in PCA9450 is enough to provide the current for this power rail since is able to provide up to 4000mA. Are there any limitations to using the PF9453 PMIC instead of the PCA9451 for powering the VDD_SOC rail? There are no limitations when using PF9453 instead of PCA9451 for powering the VDD_SOC rail. The only limitation that I can see is use LPDDR4x, it will be more difficult since you do not have an additional BUCK regulator to provide 0.6V of VDDQ, you may need to add an additional regulator, this issue does not occur in PCA9451. Can the i.MX 93 run with full performance and temperature range with the PF9453? Yes, you can. Are there any other known drawbacks to using the PF9453 instead of PCA9451? No, there are no any other known drawbacks to using the PF9453 instead of PCA9451. Best regards.
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SJA1110 CBS configuration Hi,  I am using SJA110 - EVM board to test credit based shaping parameters. I have  CBS parameters as below IdleSlope = 50Mbps SendSlope=-50Mbps Lo_credit = -750 Hi_Credit = 73 How can set these values in CBS registers (Explanation given in user manual is not clear to me) I dont get expected results with Hi_credit = 73 and lo_credit = 750. Note: by setting default which is 0x3FFFFFFF I observe correct bandwidth at switch output which is 50Mbps
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LMT101ENMFWD-ACD LCD 10.1'' HDMI with i.MX 8M Plus EVK Board Hi,  i am using LMT101ENMFWD-ACD LCD 10.1" with the i.MX 8M Plus EVK Board through HDMI connection.  i have flashed the i.MX 8M Plus EVK with LF_v6.12.34-2.1.0_images_IMX8MPEVK.zip image When the board boots up, the default resolution causes the content on the display to be squished. i tried to update the weston.ini file but no impact happens.  could you please tell me step by step how to update the resolution? thanks Eslam Graphics & Display i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: LMT101ENMFWD-ACD LCD 10.1'' HDMI with i.MX 8M Plus EVK Board Hello, You may refer to the following community document if you are using HDMI port it is pretty straight forward: https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-change-the-HDMI-pixel-clock-and-change-the-panel/ta-p/2131344 Hope this helps, Best regards/Saludos, Aldo.
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iMX95 Arm Mali-G310 GPUベンチマーク 皆さんこんにちは 何か見逃しているのかもしれませんが、Linux Arm 用のバージョンがないのに、なぜ NXP は GFXBench と Antutu からの GPU ベンチマークの結果を表示しているのでしょうか? ドキュメントE1R05_Prior_NXP_2024.pdfを参照しています 私の理解では、Arm Mali-G310 は、Arm アーキテクチャでのみ利用可能な設計であるSO、これら 2 つは一致しません。 誰か説明してもらえますか? ありがとう、 デビッド Re: iMX95 Arm Mali-G310 GPU benchmarking こんにちは@Cerviik GFXBench は Linux 用です。 AntutuはAndroid専用です。 よろしくお願いします。 ダニエル
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how to write data flash (S32K328) I want to store some boot information in the dataflash area when designing the boot. Is there any related routine documentation that can be used as a reference? Currently, I have used AI to generate some operation methods (registers, c40uip), but none of them have been successful, and I don't know how to find the cause。 Re: how to write data flash (S32K328) Thank you, but I encountered a problem when using C40_SP for flash operations: the boot is at core0 0x00400000, and when I perform a write operation on the address of core0 (0x00440000), it enters a hard fault. I confirm that the boot area code is only before 0x00440000 and there is no out of bounds issue, but operating on core1 area (0x00600000) with the same code is not a problem. What is the reason for this. My rewrote code is as follow /************ erase code******************/ if (C40_IP_STATUS_SECTOR_PROTECTED == C40_Ip_GetLock(sector_number)) { printf("RAM: Sector %d is protected, clearing lock\r\n", sector_number); C40_Ip_ClearLock(sector_number, 0); } C40_Ip_MainInterfaceSectorErase(sector_number, 0);do { t_ReturnValue = C40_Ip_MainInterfaceSectorEraseStatus(); } while (C40_IP_STATUS_BUSY == t_ReturnValue); /************ write code******************/ C40_Ip_MainInterfaceWrite(addr, length, data, 0); do { t_ReturnValue = C40_Ip_MainInterfaceWriteStatus(); } while (C40_IP_STATUS_BUSY == t_ReturnValue); Re: how to write data flash (S32K328) There are RTD drivers, specifically Mem_43_INFLS (RTD 6.0.0): https://www.nxp.com/design/design-center/software/automotive-software-and-tools/real-time-drivers-rtd:AUTOMOTIVE-RTD Pay attention to example  C40_Ip_Example_S32K358 /** * @brief Main function of the example * @details Initializes IP C40 driver and erase, write, read internal flash memory */
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