How to connect an IO pin via XBAR to ADC_ENV to trigger ADC conversions? I'm using a iMXRT1011 MCU and I need so synchronize ADC conversions to an external source.  I want to connect a sample clock to some IO pin and make the ADC start conversions on that sample clock. I did read somewhere that one would need to connect the IO via the XBAR to the ADC_ETC module. But I see no XBAR inputs that connect to IO pins. So is it possible? i.MXRT 101x Re: How to connect an IO pin via XBAR to ADC_ENV to trigger ADC conversions? Hi @simmania, I presume you read about this on an RT1050 or RT1060 related post, since these devices do have IOMUX_XBAR_INxx signals. The RT1010, on the other hand, does not have an IOMUX_XBAR_IN signal, so it is not possible for the RT1010. BR, Edwin. 

[Security] Get UID when load keys Dear NXPs: IC:S32K146 sample:csec_keyconfig_s32k146 in SDK S32DS Phenomenon: /* Extracts the UID. */ bool getUID(uint8_t *uid) When I use this function, I step into the inside of the function and when calling When stat = CSEC_DRV_GetID(challenge, uid, &sreg, mac);, the returned mac values are all 0, but the uid is correct. Since the mac values are all 0, execute the statement stat = CSEC_DRV_VerifyMAC(CSEC_RAM_KEY, verif, 256U, mac , 128U, &verifStatus, 1U);, the verifStatus value is false. question: Although the return value of bool getUID(uint8_t *uid) is false, it does not affect subsequent load key processing, but I would like to know why the CSEC_DRV_GetID(challenge, uid, &sreg, mac) interface, mac is all 0? Re: [Security] Get UID when load keys Hi @Gideon  I guess that this is the problem: Regards, Lukas

I2Cの IMXRT 1170では、CM7ポーリング方式のi2cサンプルコードを使用して、たとえば、J26ポートに特定のCfg SDL、SDAピンを使用してボードを直接フラッシュすることで検証を試みます。退勤信号を受信していません。 J 10 や J 09 などのピンを変更します。これらは、例の i2c コードでは cfg です。コンパイル後もクロック信号を取得できません。 今、IMXRT 1160で確認したところ、i2cサンプルコードからクロック信号SCLを取得しますが、データSDAから信号は取得しません

如何标记要从内部 Ram 执行的功能？ 你好， 出于性能原因，我需要一些功能（例如中断例程）从内部存储器执行。 当我编译时，似乎还没有使用 Ram 来编写代码。所以我想我必须以某种方式告诉链接器哪些功能需要从 Ram 执行。 我怎样才能做到这一点？我正在使用 MCUXpresso 和 MIMXRT1010-EVK。 我确实在论坛上搜索过这个。并且有关于它的主题，但我很难过滤出正确的信息。 我希望有人能帮助我。 回复：如何标记要从内部 Ram 执行的功能？ 非常感谢，这很有效。 我想读那篇文章。但该链接指向一个中国论坛。不幸的是我看不懂中文。

I2C In the IMXRT 1170, we attempt to verify using i2c example code for the CM7 polling method by flashing the board directly, for instance, but with specific Cfg SDL, SDA pins on the J26 port. not receiving the clock-out signal. I alter the pins, such as J 10 and J 09, which are cfg in the example i2c code. We are still unable to obtain a clock signal after compilation. Now , I checked with IMXRT 1160, we get Clock Signal SCL from i2c Example code, but not get signal from data SDA Re: I2C Hi @sabesh , Thanks for your interest in NXP MMXRT series! If your question is solved, please tell me to close this case, and Accept as Solution. thanks. Wish you a nice day! BR mayliu Re: I2C Hi @sabesh , Thank you so much for your interest in our products and for using our community. If you use MIMXRT1170-EVKB board, you can use LPI2C1_SCL J26-12 and LPI2C1_SDA J26-10. Please pay attention that  In the hardware circuit, SCL and SDA must be connected to pull-up resistors, Software SCL and SDA need set as open drain mode and Software Input On Enabled . Please refer to the next Fig. In I2C communication, there are one master and multiple slaves. The master I2C device generates the clock signal. So I suggest you import a SDK demo about I2C master, For example "evkbmimxrt1170_lpi2c_edma_b2b_transfer_master_cm7". If you want I2C communication run okay, Please connect a I2C slave board. So I suggest you use two board, one is as I2C master, one is as I2C slave. Wish it helps you. If you still have question about it, please kindly let me know. Best Regards mayliu

The image generated by the provisioning tool does not match, I did not see "FCFB ########################################################################################################## 生成构建脚本： build_image_lnx.sh 生成构建脚本： build_image_win.bat 生成构建脚本： build_image_mac.sh 正在执行脚本C:\Users\Administrator\secure_provisioning00\build_image_win.bat ###脚本： 构建镜像: C:\Users\Administrator\secure_provisioning00\build_image_win.bat Build HAB image nxpimage hab export -c "C:\Users\Administrator\secure_provisioning00\bd_files\imx_application_gen_win.bd"  -o "D:\RT1052_Example Code\Example\1.led_test\hello_world_boot.bin"  "C:\Users\Administrator\secure_provisioning00\source_images\hello_world.srec" Success. (HAB container: D:\RT1052_Example Code\Example\1.led_test\hello_world_boot.bin created.) nxpimage succeeded ### Build flashloader as unsigned bootable image ### nxpimage hab export -c "C:\Users\Administrator\secure_provisioning00\bd_files\unsigned_MIMXRT1050_flashloader_win.bd"  -o "C:\Users\Administrator\secure_provisioning00\bootable_images\unsigned_MIMXRT1050_flashloader.bin"  "C:\nxp\MCUX_Provi_v10\bin\_internal\data\targets\MIMXRT1050\flashloader.srec" Success. (HAB container: C:\Users\Administrator\secure_provisioning00\bootable_images\unsigned_MIMXRT1050_flashloader.bin created.) nxpimage succeeded ###脚本“构建镜像”的结果： 成功（返回代码= [0]成功） 操作的状态： 成功: 构建镜像 Re: The image generated by the provisioning tool does not match, I did not see "FCFB Indeed, this issue has been resolved. thank you. Re: The image generated by the provisioning tool does not match, I did not see "FCFB Hi, in your screenshot I can see the file name has "SDRAM" in it, but also in the screenshot the DCD is not configured, it might be the root cause why the application does not run. Regards, Libor Re: The image generated by the provisioning tool does not match, I did not see "FCFB Hi, may be the training video can help you. There should be all steps captured: Secure Boot on the i.MX RT10xx Crossover MCUs | NXP Semiconductors If you cannot find any information in the user guide, please let us know what information is missing. It is not possible to provide help without information: - what you want to do - what the problem is. Re: The image generated by the provisioning tool does not match, I did not see "FCFB Can't I run the LED program even after writing it in PROVISION TOOL? The image construction is incorrect. I can run it using KEIL's original image. Is it not possible to follow the official manual step by step? The documentation for this tool is not detailed enough. I can't use it. Re: The image generated by the provisioning tool does not match, I did not see "FCFB Hi, MCUXpresso Secure Provisioning tool does not generate the image with FCB, the FCB is written to flash as extra step. The FCB can be specified either as simplified or full configuration. Kindly review generated write script for details.

MPC5748G FCCU fault details Hello team, Can you please explain the details(especially error condition) of MPC5748G FCCU faults below? 1. NCF[18] / MEMU_0 / System RAM error overflow (all or'ed) 2. NCF[20] / MEMU_0 / Peripheral RAM uncorrectable ECC error (what's the Peripheral RAM?) 3. NCF[25] / PRAM_0 / System PRAM Controller_0 ahb alarm 4. NCF[41] / DMC PRAM1 / DMC PRAM1 FCCU ALARM 5. NCF[43] : PRAM_0 / System PRAM Controller_0 RAM alarm There are two DMC PRAMx FCCU alarm faults - PRAM1 and PRAM2. Why isn't the DMC PRAM0 FCCU alarm fault?  Best regards, James Re: MPC5748G FCCU fault details Hello Peter, Thank you for your answer and please close this. Best regards, James Re: MPC5748G FCCU fault details Hello, 1. NCF[18] / MEMU_0 / System RAM error overflow (all or'ed) 2. NCF[20] / MEMU_0 / Peripheral RAM uncorrectable ECC error (what's the Peripheral RAM?) For example CAN buffers. 3. NCF[25] / PRAM_0 / System PRAM Controller_0 ahb alarm It signals that there was and uncorrectable RAM error on masters AHB. 4. NCF[41] / DMC PRAM1 / DMC PRAM1 FCCU ALARM Alarm signal from DSMC to FCCU 5. NCF[43] : PRAM_0 / System PRAM Controller_0 RAM alarm There are two DMC PRAMx FCCU alarm faults - PRAM1 and PRAM2. Why isn't the DMC PRAM0 FCCU alarm fault? Hmm, hard to answer. I expect it corresponds to 0 and 1. But this would be question for documentation/ application team. You can rise a ticket at NXP.com or get in touch with application engineer. Best regards, Peter

找到Pflash的Demo工程 你好，我想用S32K311开发Bootloader，涉及到PFlash的擦除、写入、以及bank切换。有了S32DS配置工具，有相关的Demo工程吗？你能和我分享吗？谢谢。

Find the Demo project of Pflash Hello, I want to use S32K311 to develop Bootloader, which involves PFlash erasing, writing, and bank switching. With the S32DS configuration tool, do you have related Demo projects? Can you share them with me？Thanks. Re: Find the Demo project of Pflash hello @CcW18, There are C40_IP and FLS MCAL RTD examples in S32DS IDE. Unfortunately, there are no examples specifically for S32K311. But still, you can refer to the examples and configure the drivers in your project accordingly. Regards, Daniel

Does i.MX RT1180 support IEEE802.1QCR? Does i.MX RT1180 support IEEE802.1QCR? I did not find any 802.1QCR for TSN on i.MX RT1180. So I want to double check. Thanks. Re: Does i.MX RT1180 support IEEE802.1QCR? Hi @Sally_Jay  i.MX RT1180 does not support IEEE802.1QCR. Hope this will help you. BR Hang

Register MC EDAC with Linux EDAC subsystem I have an S32G-VNP-EVB3 board running Linux using the NXP provided BSP 40. I have enabled the EDAC system in the Linux kernel to montior sbes and dbes however I do not see it in the filesystem. Makes me wonder if EDAC is actually enabled on this board? The amount of available memory seems to indicate that it is; though I could not find the memory node in the device tree to double check. Any way for me to be sure? Expect to see edac information here, /sys/devices/system/edac/mc # ls power subsystem uevent  System memory, /sys/devices/system/edac/mc # cat /proc/meminfo MemTotal: 3500312 kB MemFree: 3442776 kB MemAvailable: 3442020 kB Buffers: 1724 kB Cached: 9168 kB SwapCached: 0 kB Active: 7532 kB Inactive: 3924 kB Active(anon): 64 kB Inactive(anon): 640 kB Active(file): 7468 kB Inactive(file): 3284 kB Unevictable: 0 kB Mlocked: 0 kB SwapTotal: 0 kB SwapFree: 0 kB Dirty: 24 kB Writeback: 0 kB AnonPages: 724 kB Mapped: 2116 kB Shmem: 60 kB KReclaimable: 25168 kB Slab: 33908 kB SReclaimable: 25168 kB SUnreclaim: 8740 kB KernelStack: 1376 kB PageTables: 192 kB NFS_Unstable: 0 kB Bounce: 0 kB WritebackTmp: 0 kB CommitLimit: 1750156 kB Committed_AS: 2520 kB VmallocTotal: 259653632 kB VmallocUsed: 1872 kB VmallocChunk: 0 kB Percpu: 656 kB CmaTotal: 262144 kB CmaFree: 260576 kB HugePages_Total: 0 HugePages_Free: 0 HugePages_Rsvd: 0 HugePages_Surp: 0 Hugepagesize: 2048 kB Hugetlb: 0 kB Re: Register MC EDAC with Linux EDAC subsystem Hello, @minersrevolt From BSP perspective, it does not support EDAC at DDR level. Sorry for your inconvenience.   Best Regards Chenyin   Re: Register MC EDAC with Linux EDAC subsystem Is it because this board used inline dram which means the scrubber is obfuscating the results from the MC so the ARMs just dont have access to this information?

Why does the linker try including a noneexistend crt0 object? Here the part of the log file which shows that the linker tries incoroprating a nonexistent crt0.o object: Building target: DiagnosticsTest_CM7.elf Invoking: Standard S32DS C Linker arm-none-eabi-gcc -o "DiagnosticsTest_CM7.elf" "@DiagnosticsTest_CM7.args" c:/nxp/s32ds.3.5/s32ds/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/../lib/gcc/arm-none-eabi/9.2.0/../../../../arm-none-eabi/bin/real-ld.exe: cannot find crt0.o: No such file or directory c:/nxp/s32ds.3.5/s32ds/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/../lib/gcc/arm-none-eabi/9.2.0/../../../../arm-none-eabi/bin/real-ld.exe: cannot find -lc collect2.exe: error: ld returned 1 exit status make: *** [makefile:76: DiagnosticsTest_CM7.elf] Error 1 "make -j12 TOOLCHAIN=linaro" terminated with exit code 2. Build might be incomplete. Please guide me to the S32DS tool option which obviously needs to be adjusted. BTW I also do not see where the option -lc gets set in the tool Re: Why does the linker try including a noneexistend crt0 object? Hi @markusregner, I haven't really tested the project, but I've just imported and built it. Is this the "S32Gx based S32G-VNP-EVBx diagnostics package version 0.8.7" package? By "It was already not compiling any longer", do you mean in the newer versions of S32DS? Is this a new error or has this been known by the SW team since Nov?  The release notes for this package say it is supported by S32DS3.4:  --Complete suite builds out of box with S32Design Studio v3.4 After importing this project, and right clicking for "Properties", go into "C/C++ Build > Tool Chain Editor". The current toolchain for the project should show up.  Just to confirm, after downloading and importing the project, when going into properties, is the NXP GCC 9.2 toolchain selected?  Best regards, Julián Re: Why does the linker try including a noneexistend crt0 object? BTW, Around November 2023 I discussed with members of the NXP SW team the future of this Diagnostic code. At that time it was already not compiling any longer. And the NXP team knew. So I wonder how you got it compiling now. Anyway... I think the question is how can I chose now the right compiler in my S32DS to make it compile again? Re: Why does the linker try including a noneexistend crt0 object? Hi Julian, Yes, this is a migration of an older project which I used for demonstrating certain functionalities to colleagues and customers. Hence, yes likely it was built with a different GCC at that time. I tried the workaround described in the link which you sent. It made things even worse. It lead to 135 errors.  Well to my best knowledge I imported the project just as normal. So how can I fix it? BTW, I also wonder why a different GCC compiler lead to a failure message about crt0.o?  Existence and Absence of such file should matter of the project and not matter of the compiler version.  Best regards, -Markus Re: Why does the linker try including a noneexistend crt0 object? Hi @markusregner, Could you share some information from your project?  Are you building the diagnostic tests for S32G-VNP-EVBx Diagnostics? Also, I see on the path that gcc 9.2 is being used, but when importing the EVBx Diagnostics project on my side, I can build them correctly using the default gcc (6.3): Finished building: ../src/s32g_test_all.c Building target: DiagnosticsTest_CM7.elf Invoking: Standard S32DS C Linker arm-none-eabi-gcc -o "DiagnosticsTest_CM7.elf" "@DiagnosticsTest_CM7.args" Finished building target: DiagnosticsTest_CM7.elf Invoking: Standard S32DS Create Flash Image arm-none-eabi-objcopy -O binary DiagnosticsTest_CM7.elf "DiagnosticsTest_CM7.bin" Invoking: Standard S32DS Print Size arm-none-eabi-size --format=berkeley DiagnosticsTest_CM7.elf text data bss dec hex filename 158264 481664 247728 887656 d8b68 DiagnosticsTest_CM7.elf Finished building: DiagnosticsTest_CM7.siz Finished building: DiagnosticsTest_CM7.bin 13:12:32 Build Finished. 0 errors, 151 warnings. (took 22s.434ms) Did you port the example? Are you using another package? This issue may be caused by different GCC versions. Also, take a look at this community post with a similar issue, it was resolved by copying some configuration from the GCC path: Facing Issue with Make file S32K144 [crt0.o : No such Directory] - NXP Community Best regards, Julián

GD3162 gate driver SC fault Hi NXP, What could be the reason that INTB is going to 2.5V from 5V in the case of a short circuit fault ? Can there be any causes in SW? Any possibility ? Re: GD3162 gate driver SC fault Hello Could you please let me know the result? Additionally, would you be able to test the INTB connected directly to the microcontroller? Re: GD3162 gate driver SC fault And also, INTB before connecting to micro is externally given a pull-up to 5V through a 10K resistor Re: GD3162 gate driver SC fault Hi, FYI, in our project, all the INTB pins are connected to one pin of the micro so that if any one of the gate drivers (6 gate (RH, YH, BH and RL, YL, BL) for 3 phase motor) encounters a fault, the PWM is cut off for all. In the attached image you can see that ISENSE pin of the R-L gate driver is supposed to detect phase over current cut off through SC fault and ISEN of Y-L gate driver is supposed to detect DC over current cut off through SC fault. In our case whenever ISEN of YL detects DC bus over current cut off, in that case INTB is going to 2.5V and when phase over current cut off occurs, then INTB is further transitioning from 2.5 to 0. I've noted your point to disconnect INTB from micro and check the signal again. Re: GD3162 gate driver SC fault Hello, Is the INTB pin directly connected to the microcontroller? Please note that the INTB pin has an internal passive pull-up to VDD, and INTB reports faults with an active low signal (logic 0 indicates a fault). According to the datasheet, the INTB pin should indeed be connected directly to the microcontroller. Could you confirm whether, when disconnecting the microcontroller from the INTB pin, the voltage remains at 2.5V in the event of a fault?

TCDx Register is cleared out when using TCD Pool in RT1062 with SDK I'm using SDK 2.16.100 and rt1062 MCU. I encountered a problem when using DMA I setup a tcd pool, and submit transfer with 2 or 3 configs to DMA channel 1, and when the edma callback is called , I found the TCD1 is all cleared to 0. When I only submit only one config, and after the edma callback is called, the TCD1 is remained. Following is my code snippets: Define global tcd pool __attribute__((section(".bss.$SRAM_OC"))) edma_tcd_t __ALIGNED(4) g_tcd_pool[DMA_TCD_POOL_COUNT]; In my DMA setup Code: EDMA_CreateHandle(&g_XY2_100_Feedback_EDMA_Handle, XY2_100_DMA, XY2_100_FEEDBACK_DMA_CH); EDMA_SetCallback(&g_XY2_100_Feedback_EDMA_Handle, EDMA_Feedback_Callback, base); EDMA_InstallTCDMemory(&g_XY2_100_Feedback_EDMA_Handle, g_tcd_pool, DMA_TCD_POOL_COUNT); Next, there is for-loop to setup transfer config base->remaining_dma_buffer_count = TRANSFER_SIZE; for (int i = 0; i < 2 && base->remaining_dma_buffer_count > 0; i ++) { const uint32_t transfer_cnt = MIN(DMA_MAX_COUNT, base->remaining_dma_buffer_count); const uint32_t offset = TRANSFER_SIZE - base->remaining_dma_buffer_count; const uint32_t pointer = (uint32_t)(base->buffer_info.fb_pointer) + offset + (offset / DMA_MAX_COUNT); EDMA_PrepareTransfer(&transfer_config, (void *)shifter_buffer, sizeof(xy2_100_feedback_data_t), pointer, // plus 1 for memory address align assertion sizeof(xy2_100_feedback_data_t), sizeof(xy2_100_feedback_data_t), transfer_cnt * sizeof(xy2_100_feedback_data_t), kEDMA_PeripheralToMemory); // transferConfig.srcOffset = sizeof(buf_info->pointer[0].x) + sizeof(buf_info->pointer[0].y); base->remaining_dma_buffer_count -= transfer_cnt; EDMA_SubmitTransfer(&g_XY2_100_Feedback_EDMA_Handle, &transfer_config); } EDMA_StartTransfer(&g_XY2_100_Feedback_EDMA_Handle); Break at EDMA_StartTransfer , got following memory values:           My Global TCD Pool Then continue and break inside EDMA_HandleIRQ:     Now TCD1 is cleared Then, sga in the following code will get zero: uint32_t sga = (uint32_t)handle->base->TCD[handle->channel].DLAST_SGA; Re: TCDx Register is cleared out when using TCD Pool in RT1062 with SDK Thanks, I used the definition from example, it worked then. Re: TCDx Register is cleared out when using TCD Pool in RT1062 with SDK Thanks. I indeed used 32-byte boundary before, and now I changed back to it, the g_tcd_pool address is 0x20280f60, but the TCD1 is still 0 when the EDMA_HandleIRQ is called ( and also I called EDMA_ResetChannel)   Re: TCDx Register is cleared out when using TCD Pool in RT1062 with SDK Hi @sprhawk , Thank you so much for your interest in our products and for using our community.. Please check the following code. 1:  Please refer to SDK Demo "evkbmimxrt1060_edma_scatter_gather" __attribute__((section(".bss.$SRAM_OC"))) edma_tcd_t __ALIGNED(4) g_tcd_pool[DMA_TCD_POOL_COUNT]; 2: I suggest you add function EDMA_ResetChannel, just as SDK demo do. Please check above. Wish it helps you. If you still have question about it, please kindly let me know. Wish you a nice day! Best Regards MayLiu

ARMバージョン用S32デザインスタジオ:2.2 ARM用S32デザインスタジオ 版本：2.2 为什么相同的代码，编译出来的十六进制文件不一样 Re:ARMバージョン用S32デザインスタジオ:2.2 具体的な理由が見つかりました、SDKパッケージは不均一なファイルサイズをもたらす無用な定義を追加しました、あなたの答えをありがとう

56F83600マイクロコントローラの未使用ピンの終端 アプリケーションでMC56F83689を使用しています。私たちの設計では多くのピンは使用されていません。 データシートに記載されているように、より信頼性の高い動作を得るために、それらを適切な電圧レベルに結び付けたいと考えています。 このデバイスの未使用のピンごとにデフォルトの推奨事項はありますか? 未使用のGPIOをすべて直接グランドに接続できますか? VDD_USBはVDDに、VSS_USBはVSSに覚えているのですが、USBを使用しない場合はUSB_DP&USB_DM n.c.が推奨されますよね? CLKINで外部クロックを使用している場合、GPIOC1/XTALはどうなりますか?GPIOとして設定し、グランドに接続すべきか。 未使用のピンの完全なリストが添付されています

slow memcpy HI i tried this code https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors/173737/1/v4lcap.c unfortunately the call to memcpy from buffers[buf.index].start[0] is very slow about 10 ms with an image size 640*480 i thing it is due to the VB2_MEMORY_MMAP mode i tried with V4L2_MEMORY_DMABUF but ioctl failed Is the slow memcpy due to the memory mode ? Is there a working exemple with V4L2_MEMORY_DMABUF and V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE ? Greeting Olivier Re: slow memcpy Hi  i use this code to use DMA instead of MMAP https://github.com/emfend/dmabuf-v4l2-demo I also verified that this patch is applied https://github.com/torvalds/linux/commit/de27891f675ed1e46e8821d2e05e036e5f97586b It works, memcpy time is less than 1 ms Olivier

where to find S32S info Hello, In the link below https://www.nxp.com/docs/en/white-paper/GREENBOX2WPA4.pdf it shows "S32S" but from the list of "S32 Automotive Platform Processing Products" in below page https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform:S32 I cannot find any link or word about S32S. Do we have a chip named S32S or it is just a collection of S32 family, i.e a plural of S32?? Thanks Re: where to find S32S info Hi, What we are referring to is that links available under nxp.com related to S32S will redirect to S32Z, similar to the one shown below (which was the S32S product page under NXP): https://www.nxp.com/S32S Please, let us know. Re: where to find S32S info Hello, Thanks for the finding. However can you specify which one can redirect to S32Z/E? For example, I cannot see below "S32S" is same as "all S32S links do redirect to the S32Z/E products...." Thanks Re: where to find S32S info Hi, We can confirm that, under the documentation you have provided and manual searching from our side, all S32S links do redirect to the S32Z/E products. Please, let us know. Re: where to find S32S info Can you help confirm "S32S2 microcontrollers are redirected to the S32Z or E family products" So I can further know who I should contact. Re: where to find S32S info Hi, Seems to be that all information regarding S32S2 microcontrollers are redirected to the S32Z/E family products. For more information on regards of the latter, help us contacting your local NXP FAE/DFAE/representative, since at this moment all documentation is under control of distribution. Please, let us know.

Changing the channel on the Dio block does not change the generated code. I am using the s32k3xx_dio_s32ct example have found that if you change the Channel i any of the Dio blocks that the generated code continues to use the original channel. I tried deleting and re-adding a Dio block and connecting to a different channel sometimes works, but not always. Re: Changing the channel on the Dio block does not change the generated code. Hello @Automan , On every release, we update the list of limitations and known issues. This list can be found inside the readme.txt file located in the root of the Toolbox. Regards, Robert V Re: Changing the channel on the Dio block does not change the generated code. Hi Robert, Is there a list somewhere that shows the current issues and workarounds for the MBDT version 1.6.0? Re: Changing the channel on the Dio block does not change the generated code. Hello @Automan , The behavior you are describing is happening because changing the Channel/Pin inside the Dio mask is not causing Simulink to regenerate the code. We are looking into ways to improve this specific scenario and make it as hassle-free as possible. For now, the best course of action in your specific use case, and to always get consistent results, would be to delete the "modelName_ert_rtw" folder and the "modelName.slxc" file before building the model. Doing so will trigger the code generation and update the executable based on the current state of the model. This should not be needed if the model is changed in a more significant way, like adding blocks, changing signals and/or connections, etc.  Regards, Robert V

S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hi, We built a few customized S32G3 boards. On two of these boards, when I tried to flash eMMC, I saw that the algorithm was loaded, but at the end, I got an 'Algorithm initialization is failed' error. A screenshot is attached. This eMMC failure occurred on both boards. I also tried flashing QSPI. One board had the same algorithm initialization failure as eMMC, while the other successfully loaded the algorithm. However, I couldn't retrieve the flash ID or upload a file to the device afterward due to a communication timeout. The S32G3 chips on these boards should be fine—I was able to use the S32 probe to load an ELF file into memory and run the routine. The rest of the boards have no issues. We checked the hardware and found no visible damage. We also used a Dediprog to program a known working QSPI image onto these two boards, but there was no console output. Could you please advise what might be causing this issue? Thanks, XD Re: S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hi @chenyin_h , Thank you for the information. It’s very helpful, and I appreciate your support. Thanks, XD Re: S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hello, @XD  For the possible reasons of the issues shown from your test, there are some useful information from the "troubleshooting chapter" of S32 flash tool user guide, as attached: BR Chenyin Re: S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hello, @XD  Thanks for your reply. I have checked the error prints of S32 flash tool shown from your logs, but there seems no valid information from the document in hand, I am checking with internal team for further information, I will reply you later if any findings have. Sorry for your inconvenience. BR Chenyin Re: S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hi @chenyin_h , Thank you for your reply. Unfortunately, we don’t have Lauterbach available at the moment. Additionally, we have another external device connected to UART1, so we need to explore alternative ways to capture the output. We will focus on investigating potential hardware damage. Thank you for your suggestions. Regarding the S32 Flash Tool, could you provide more details on why it loads the algorithm successfully but fails during initialization? Are there any error codes or logs available? What could potentially cause this issue? Thanks, XD Re: S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hello, @XD  Thanks for you reply. I am not able to say that it is impossible for the issue you mentioned, but it is with low possibility that 2 of 7 silicon are damaged from our experience. Flash tool is not a debugger, would you mind trying flashing the images with Lauterbach?   Not sure if the UART1 is available on your custom board, if yes, I also suggest building the UART RTD examples with UART1, and then load it to the SRAM via debugger to check if there are any prints or signals from the tx pin. BR Chenyin  Re: S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hi @chenyin_h , Two out of seven boards have this issue. We tried several approaches: Using the S32 Flash Tool to flash eMMC and QSPI failed because the tool reported an initialization failure. Flashing a working image to QSPI using Dediprog and booting from there, but unfortunately, there was no UART output. We measured the TX signal on the S32G UART and found no activity from the chip. Additionally, the power supply current was lower than on working boards, suggesting that the chip might be stuck. However, we could see an echo when typing in Minicom. Loading an ELF file into memory using the S32 probe appeared to work fine—we were able to run example code. I believe the UART (connector and cable) on the board is functioning correctly. Could this issue be caused by damage to the chip, such as ESD or a soldering defect? Thanks, XD Re: S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hi, @XD  Thanks for your reply. Likely hardware issue, may I know what is the percentage of devices with issues? since other boards with same design works fine with the flash tools. Not sure if the two boards could boot from other methods like SD, if yes, may I know if the two boards could be operated correctly with UART, eMMC and QSPI via BSP or RTD? BR Chenyin Re: S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hi @chenyin_h , Thank you for your reply. The eMMC and QSPI are exactly the same as on the RDB3, and the flash tool version is 2.1.7. Only these two boards have the issue—all other boards are working fine. Thanks, XD Re: S32 flash tools upload eMMC or QSPI algorithm to S32G3 failed Hello, @XD Thanks for the post. Since the issue existed on your custom board, may I know if the eMMC/QSPI models are different from the ones that on RDB3? which version flash tools used? BR Chenyin