unable to use simulink s32 configuration in S32 Design Studio (S32DS) due to version mismatch Hi, I have a Simulink project which I'm trying to debug in S32DS. The code builds, runs, and I can debug, but I'm not able to view (or edit) the configuration in S32DS. I get the attached error. Do I need to install an additional addon version or how can I resolve this? Re: unable to use simulink s32 configuration in S32 Design Studio (S32DS) due to version mismatch Hi, @Deskwork4130 , The newly added S32K3 Toolbox version 1.5.0 is compatible with: - S32 Configuration Tools version 2024.R1.7 - S32 Design Studio version 3.5 Please try this setup with the most recent toolbox version and let us know if you still have issues with Design Studio integration. Hope this helps, Dragos Re: unable to use simulink s32 configuration in S32 Design Studio (S32DS) due to version mismatch the release notes of 1.5 refer to configuration tools version v2021.R1.7. release notes for 1.4 has v2021.R1.6. so this seems like a very minor change. what version of S32DS is compatible with this version of config tools? as a side note for anyone looking in the flexnet SW center v1.5 is not in the same place as the previous versions. it is in the generic MBDT not the S32K3 specific one for some reason. Re: unable to use simulink s32 configuration in S32 Design Studio (S32DS) due to version mismatch Hi, @Deskwork4130 , We just published the MBDT for S32K3 Toolbox version 1.5.0. Installing this version and running the debug again is what I advise.  Let us know if your problem persists. Best regards, Dragos

The K344 uses polling to capture PWM duty cycles (emphasis: no interruptions) I want to use 344MCU to capture a way of PWM duty cycle, it seems that only with interrupts + SAIC mode to achieve duty cycle capture, but I can not use interrupts. I figured out if I could configure two pins, one pin to capture the pulse width (IPWM mode) , the other pin to capture the pulse frequency (IPM mode) , then connect the two pins together and then connect the PWM waveform to be captured, ah, with the pulse width and pulse frequency to get the duty cycle. What I don't understand is that if I connect the two pins of the MCU together, will the two pins interfere with each other while capturing the PWM signal? Re: The K344 uses polling to capture PWM duty cycles (emphasis: no interruptions) Sorry, I just noticed the message now. Here is the program provided by technical support, but it should still be the interrupt capture PWM duty cycle method. The actual implementation using polling can be seen in my solution below, which has been verified. Re: The K344 uses polling to capture PWM duty cycles (emphasis: no interruptions) I tested the example, found that the PWM cycle and duty cycle can be obtained under interruption conditions. Afterwards, I regenerated the code and removed the interrupt enable and interrupt interface. In non interrupt situations, both the cycle and duty cycle were returned as 0. In addition, I use IPWM and IPM to capture a PWM signal (two pins). IPWM obtains a high level, IPM obtains a cycle, and the duty cycle can be obtained without any interruption.I think this is the only way to obtain the PWM duty cycle without any interruption. Here is my approach: 1.Pin settings: 2.Emios_Mcl_Ip: 3.Emios_Icu: 4.demo init ipwm and ipm: 5.demo get duty: Re: The K344 uses polling to capture PWM duty cycles (emphasis: no interruptions) Hi Have you already referred to S32K344_Example_Emios_Icu_IPWM_measurement_DS34_RTD_100_v2?  If you want to use polling method instead of interrupt method, please poll the status via Emios_Icu_Ip_GetInputState before calling Emios_Icu_Ip_GetDutyCycleValues. Since I don't know the S32K3 RTD version you are using, I sent you the S32K344_Example_Emios_Icu_IPWM_measurement_S32DS35_RTD400.zip through private message. It is recommended to modify it to the polling mode based on project. Sorry, I haven't had time to test the polling method for you because I have been dealing with a lot of cases recently. If you still can't implement it after the modification, please let me know. Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------

Yocto NXP GA release and meta-freescale mismatch Hi, I am working on upgrading Linux for an old HW platform using i.MX6UL. I am trying to freeze a version/tag/commit for the Yocto meta-imx and meta-freescale. But I found version mismatch when I refer to GA release when bitbake firmware-imx. I have put all the detailed steps and logs in README in this repo. scarthgap-6.6.23-2.0.0  scarthgap-6.6.36-2.1.0  Please follow these two branches to re-produce the problem described in the "Known issue" section: scarthgap-6.6.23-2.0.0 known-issue  scarthgap-6.6.36-2.1.0 known-issue  Please help to look at this issue. Thanks in advance! BR/Chencheng i.MX6UL Yocto Project Re: Yocto NXP GA release and meta-freescale mismatch Hi Chavira, I bumped all the meta layers to use imx GA 6.6.52 2.2.0 release. And this particular issue is gone. BR/Chencheng Re: Yocto NXP GA release and meta-freescale mismatch Hi @securemetersczhang! Thank you for contacting NXP Support! Unfortunately we can't do nothing since is not an official repo. Please download the source code from the official NXP repository. Best Regards! Chavira

s32k144 MCALプロジェクトでウォッチドッグモジュールをデバッグする際にWdg_Wdog0_Isr()割り込みを入力できない問題について 皆さん、こんにちは。S32K144ウォッチドッグモジュールをデバッグしている際、MCUをリセットする前にWdg_Wdog0_Isr()割り込みを入力するのが適切です。しかし、デバッグプロセス中に、MCUをリセットする前にWdg_Wdog0_Isr()割り込みを入力していませんでした。以下は私のS32DSプロジェクトとEB設定です。問題箇所を特定していただけますか？ご協力ありがとうございます！ Re: s32k144 MCALプロジェクトでウォッチドッグモジュールをデバッグするときにWdg_Wdog0_Isr()割り込みを入力できない問題 わかりました。ご回答ありがとうございます。感謝します。 Re: s32k144 MCALプロジェクトでウォッチドッグモジュールをデバッグするときにWdg_Wdog0_Isr()割り込みを入力できない問題 こんにちは。ご回答ありがとうございます。ウォッチドッグモジュールに関する私の理解は少し偏っているかもしれません。私の理解では、Wdg_SetTriggerCondition()関数で設定されたタイムアウト期間内にウォッチドッグにフィードが供給されない場合、つまりWdg_SetTriggerCondition()が再度呼び出された場合、ウォッチドッグ割り込みがトリガーされ、その後割り込みが生成されます。その後、インターネット上のブログ（図に示すように）で、割り込みモードでは、ウォッチドッグに最初のフィードが間に合わないとウォッチドッグ割り込みが生成され、2回連続してウォッチドッグフィードがタイムアウトした後にのみMCUがリセットされると書かれていました。どちらが正しいのか教えていただけますか？ Re: s32k144 MCALプロジェクトでウォッチドッグモジュールをデバッグするときにWdg_Wdog0_Isr()割り込みを入力できない問題 こんにちは！以前のモジュールはすべてこのバージョンに基づいて構成されており、残っているモジュールは1つか2つだけです。今後S32K3シリーズのチップを使用するときは、最新のMCALバージョンに切り替える予定です。現状では、プログラムの電源投入後、一定時間ごとにライトが1回点滅します（非常に速く点滅します）。ただし、下図のように、ウォッチドッグ通知機能に遅延機能を追加しましたが、それでもライトは非常に速く点滅します。（この遅延機能をメイン関数でテストしたところ、このライトの点滅速度よりも明らかに遅いです）。原因は何でしょうか？ Re: s32k144 MCALプロジェクトでウォッチドッグモジュールをデバッグするときにWdg_Wdog0_Isr()割り込みを入力できない問題 こんにちは。プログラムを数回実行し、実行状態にしたところ、割り込みでプログラムが常に停止してしまうことがわかりました。通知に点滅ライトのコードを追加すると、ライトが常に点灯していることがわかりました。S32DSの一時停止ボタンをクリックすると、プログラムは下図の位置で停止し、ライトが消灯します。原因の分析を手伝っていただけますか？設定の問題でしょうか？ Re: s32k144 MCALプロジェクトでウォッチドッグモジュールをデバッグするときにWdg_Wdog0_Isr()割り込みを入力できない問題 こんにちは。ご指摘のとおり、Wdgの割り込み通知機能にライトオン動作を追加したところ、ライトオン現象を確認できるようになりました。上記の通り、EB設定で「Wdg Runs In Debug Mode」オプションを無効にしても、S32DSでデバッグ中にWDOGのCNTレジスタの値が増加することがあります。設定に何か問題があるのでしょうか？ Re: 关于s32k144 MCAL项目中调试看门狗模块进不了Wdg_Wdog0_Isr()中断的问题 Hi @夏超  通常、遅延やコードをコールバック関数内に直接配置することは、パフォーマンスと応答性に影響を与える可能性があるため、お勧めしません。ただし、次のような実装を試みることもできます。 #define NUM_OF_NOTIFICATIONS 10U #define TIMEOUT_WDG 5000U uint8 count = 0U; int main(void) { ... Wdg_SetTriggerCondition(TIMEOUT_WDG); hile (count < NUM_OF_NOTIFICATIONS) { /* Set the Trigger Condition after the Wdg notification is called */ if (NotificationCount == 1U) { Wdg_SetTriggerCondition(TIMEOUT_WDG); Dio_WriteChannel(DioConf_DioChannel_RGBLED0_BLUE, STD_HIGH); delay(TIMEOUT_WDG / 5); Dio_WriteChannel(DioConf_DioChannel_RGBLED0_BLUE, STD_LOW); count++; u8NotificationCount = 0; } if (count == 9) { Wdg_SetTriggerCondition(TIMEOUT_WDG); Dio_WriteChannel(DioConf_DioChannel_RGBLED0_GREEN, STD_HIGH); } } ... } このコード例では、各通知の受信後にトリガー条件を設定し、それに応じて LED ステータスを更新します。遅延(TIMEOUT_WDG / 5)は、短い遅延を作成するために使用されますが、理想的には、コールバック関数内の問題を回避するために、これをノンブロッキング方式で処理する必要があります。 Re: 关于s32k144 MCAL项目中调试看门狗模块进不了Wdg_Wdog0_Isr()中断的问题 Hi @夏超  デバッグ セッション中で、ウォッチドッグをデバッグ モードで実行できるようにしない場合、WDG カウンタはインクリメントされません。その結果、タイムアウト値に到達せず、したがって割り込みはトリガーされません。 実行時に割り込みがトリガーされるかどうかを監視するには、割り込みが発生するたびにLEDを点滅させるなどの簡単な方法を使用できます。これにより、割り込みが正しく実行されていることを視覚的に確認できます。 Re: 关于s32k144 MCAL项目中调试看门狗模块进不了Wdg_Wdog0_Isr()中断的问题 Hi @夏超  ウォッチドッグをデバッグ モードで実行できるようにすることで、デバッグ セッション中に WDG カウンターがカウントを続行できます。これは、割り込み関数が正しく呼び出されていることを検証するのに役立ちます。ただし、WDG が有効になると、そのカウンタは増加し続けます。ブレークポイントにヒットするか、[ステップ オーバー] オプションを使用すると、WDG カウンターがオーバーフローし、リセット要求がトリガーされます。 BR, VaneB Re: 关于s32k144 MCAL项目中调试看门狗模块进不了Wdg_Wdog0_Isr()中断的问题 谢谢您的回复！但当我失能Wdg Runs In Debug Mode这个选项，Wdg_Wdog0_Isr()还是不能进入，能否进一步帮我分析下原因，谢谢您了! Re: 关于s32k144 MCAL项目中调试看门狗模块进不了Wdg_Wdog0_Isr()中断的问题 Hi @夏超  申し訳ございませんが、画像は添付されていないようです。再送していただけませんか?さらに、古いソフトウェアバージョンを使用していることに気づきました。最新バージョンをテストして、問題が解決しないかどうかを確認するのを手伝ってもらえますか? 最新のソフトウェアリリースは、 Real-Time Drivers for S32K1 → Automotive SW - S32K1_S32M24x - Real-Time Drivers for Cortex-M からダウンロードできます。

Running LIN Demo and Free master together possible? I want to use the LIN demo example and use it to demonstrate on Freemaster, I just got to know that both things use the same LPUART peripheral that inst 2. what to do? Re: Running LIN Demo and Free master together possible? Hi, Thank you so much for your interest in our products and for using our community. For your previous tickets, I assume that you are using S32K144EVB. If not please tell me. In S32K144EVB, LIN Phy is connected to LPUART2, while OpenSDA is connected to LPUART1, the last one is commonly used to connect to FreeMASTER thought the Micro USB connector. On the other hand, you can customize SW to connect FreeMASTER to any LPUART instance or even CAN. Additionally, you can customize your HW to connect LIN Phy to any LPUART instance. Hope it helps you. Have a nice day!

How many pins FLEXIO_SPI needs? Hi NXP Team, I'm looking for a configuration of SPI on a S32K358 board using FLEXIO module. I was wondering if it needs 4 pins with the FLEXIO feature or less. Thanks, Simon Re: How many pins FLEXIO_SPI needs? Hi, Thank you so much for your interest in our products and for using our community. You need 4 pines, please refer to Lpspi_Flexio_Ip_Transfer_S32K358 project example. Hope it helps you. Have a nice day!

rpmsg examples not working on SDK_24_12_00_EVK-MIMX8MP Hi guys. There seems to be a problem with the 2 multicore examples with version 24.12 or the IMX8MP SDK. Both the pingpong and the echo don't work. When I first try to build them, VSCode complains about missing the include file "freertos_tasks_c_additions.h" in task.c. If you change FreeRTOSConfig.h line 66 to #define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H 0 (basically, remove the include in task.c), then it compiles, but when you try to run the .elf from the Linux side, all you get is "echo: write error: Invalid argument" and nothing works. Eventually you get stuff like kernel panics.   It was driving me crazy trying to fix it (the basic hello world examples I compiled worked just fine, and the pre-compiled .elf in the Yocto build worked just fine), so I tried going back to SDK version 2.16 and low and behold, everything worked on the first try.   So, yeah, there's very likely something wrong with these 2 examples (maybe others too) in SDK_24_12_00_EVK-MIMX8MP.   Just wanted to let you know, you might wanna fix this. Re: rpmsg examples not working on SDK_24_12_00_EVK-MIMX8MP Hello, Have reported this issue. Best Regards, Zhiming

Obtaining shortest FMPLL timing possible, with MPC5634M Have a fairly small Development Application (<3kB), Safety Critical.  Currently running on a TRK-MPC5634M Demo Board. Requirement is for the Function start to execute, as close to MCU Power-up, as is possible.  Wanting to shorten the time FMPLL takes to complete, to an absolute minimum. The FMPLL Coding, is based upon the helpful "AN11960.pdf" Document. A stepped approach was employed, safely affording some overshoot of the initial 64MHz Clock, before stepping to the maximum 80MHz Frequency for the MPC5634M Device. This final Frequency could likely be lowered (say to 64MHz), if the FMPLL could be accelerated.  With a lower initial Clock (say 40MHz, or even 32MHz). It would appear that the "FMPLL.ESYNCR1.B.EMFD" setting might affect how aggressively the FMPLL is able to lock, in terms of time taken. Here's the complete FMPLL Implementation: // Disable clock monitoring flags (loss of Lock, Clock Reset & lock IRQ) FMPLL.ESYNCR2.R = 0x00000000; // Disable PLL. Clock Mode bypass of 8MHz Crystal Reference. FMPLL.ESYNCR1.B.CLKCFG = 0x01; // Configuration set to Enhanced Mode. FMPLL.ESYNCR1.B.EMODE = 0x1; // Setup ERFD PLL Ramping Step to minimum value of zero (divide by 2) FMPLL.ESYNCR2.B.ERFD = 0x0; // Setup EPREDIV Enhanced Divider to 4 (divides 320MHz VCO by 5) to // target initial 64MHz Clock.  FMPLL could safely overshoot this (some). FMPLL.ESYNCR1.B.EPREDIV = 0x04; // Enhanced multiplication factor-divider. Divides by 40, here. // Not sufficiently explained how this works.... FMPLL.ESYNCR1.B.EMFD = 0x28; // Set Clock Mode to Bypass, Crystal Ref. and PLL on. FMPLL.ESYNCR1.B.CLKCFG = 0x03; // Wait for intermediate 64MHz Frequency to lock. N.B. The LOCK bit is b28. while (FMPLL.SYNSR.B.LOCK == 0) {} // Update EPREDIV Enhanced PRE-DIVider to 3 (divide 320 MHz VCO by 4). // // Selects the final target Frequency at nominal MPC5634M 80Mhz maximum. FMPLL.ESYNCR1.B.EPREDIV = 0x03; // Configure Clock as normal with Crystal Reference FMPLL on, to complete. FMPLL.ESYNCR1.B.CLKCFG = 0x07; Re: Obtaining shortest FMPLL timing possible, with MPC5634M Thanks for that Information. I had hoped that the POR period might have been extended on the TRK-MPC5634M Board.  Was using one to measure Timings on a 'Scope shortly after entry into main() (immediately after initializing GPIO Ports and asserting outputs captured via P5 eMIOS Pins), and again after a two Stage PLL to 80MHz, completed. It is for a Control Application, driving and monitoring custom Electronics. Not likely to be a problem, for Automotive use! Re: Obtaining shortest FMPLL timing possible, with MPC5634M Hi @andydcoles, Unfortunately that is not possible, you cannot modify the POR timing it is required to follow the default POR sequence in order to have a successful boot. Regards Re: Obtaining shortest FMPLL timing possible, with MPC5634M Hi SebastianG PLL doesn't appear to be that slow, compared to typical MCU PoR. The reason I ask, is for a Control Application that needs to start, ASAP. We'd likely get more mileage out of shortening PoR duration, to the lowest recommended value. Best Regards Andrew Re: Obtaining shortest FMPLL timing possible, with MPC5634M Hi @andydcoles, Could you please share with me a log with the results of your implementation? Regards Re: Obtaining shortest FMPLL timing possible, with MPC5634M Hello @andydcoles, I'm working on your question, When I have any update I will let you know Regards

How to add u-boot-fw-utils tools into LLPDUG based on LX2160ARDB_REV2 Hi, We need fw_printenv and fw_setenv tools on LX2160ARDB, LLPDUG version we are using 5.15.71, but I cannot find the u-boot-fw-utils bb file Do you have any suggestions? BR, Jack Ho   Re: How to add u-boot-fw-utils tools into LLPDUG based on LX2160ARDB_REV2 Please add "libubootenv" in variable IMAGE_INSTALL in meta-nxp-desktop/recipes-fsl/images/ls-image-main.bb, then run "bitbake ls-image-main".

Accessing specific PWM channel in Linux Hi, I am trying to access a specific channel, channel 5 of the PWM1 output from flex_timer_1 on the S32G274. I am not sure what values to use on the command line or settings in the dts file in order to obtain an output? In my dts file, I have the following: myboard.dts   &pwm1 {     pinctrl-names = "default";     pinctrl-0 = <&pwm1_out_pins>;     status = "okay"; };   &pinctrl {      pwm1_out_pins: pwm1_out_pins {           pwm1_out_grp {               pinmux = ;               output-low;               output-enable;               slew-rate = ;   // Is this needed?          };     }; };   Then, when I run the following commands on the Linux command line:   echo 1 > /sys/class/pwm/pwmchip0/export echo 10000000 > /sys/class/pwm/pwmchip0/pwm1/period echo 5000000 > /sys/class/pwm/pwmchip0/pwm1/duty_cycle echo 'normal' > /sys/class/pwm/pwmchip0/pwm1/polarity echo 1 > /sys/class/pwm/pwmchip0/pwm1/enable   I don't receive any errors, but I do not see an output on PF_00, pin for PWM1, channel 5. I'm not sure if the /sys/class/pwm/pwmchip0/export file controls the output channel? I did try    echo 4 > /sys/class/pwm/pwmchip0/export   but received an error.   Is there something I need to add in the dts file in order to access channel 5 of flex_timer_1 for PWM1? Or is there a command I need to execute on the command line to provide the PWM output?   Thanks for any assistance.   Re: Accessing specific PWM channel in Linux I found the problem. It was the wrong channel assignment. Note, for channel PWM5, use: echo 5 > /sys/class/pwm/pwmchipio/export. I was using channel 4 since the PWM starts with one apparently and not with zero. If in your kernel driver, the setting would be pwm_device = pwm_request( , ). So, for example, to obtain channel 5 with PWM0 enabled, it would be: struct pwm_device *my_pwm_device; my_pwm_device = pwm_request(5, pwmchip0); Thanks for the help. Re: Accessing specific PWM channel in Linux Thank you for the assistance so far. After reviewing the examples and delving into the links, I saw that I am doing pretty much the same thing as the example for imx8mmn-nitrogen8mm.dtsi example. I did notice that if I do the following command, "echo 4 > /sys/class/pwm/pwmchip0/export," I do see "/sys/class/pwm/pwmchip0/pwm4."  But I am still not sure how to set the channel in the dts file?  Also, with pin 80 set for PWM5 output through the dts file pinmux, I still do not see any PWM on the output pin either.  Do I have to create a "PWM5" entry in the dts file for channel 5 of the PWM? If so, would I have to clone parameters from PWM1 in the s32cc.dtsi file? Is there an example of this? I could not find anything is my extensive search online. Thanks again. Re: Accessing specific PWM channel in Linux Hi @Tony-FM-Eng,  Thank you very much for your response. Based on your reply and your steps described on your question, Linux can interface correctly PWM driver. However, it seems that you are missing a Kernel configuration to properly set up the PWM. I couldn't find any specific manual for the S32G to enable PWM but please have a look to the following community thread of i.MX8MM Solved: Q: What is the preocedure to Enable PWM on imx8mm-evk? - NXP Community. Please check and tell me if you have any questions or comments. Re: Accessing specific PWM channel in Linux Thanks for the reply. Here are the following outputs to the commds: # ls /sys/class/pwm pwmchip0 # ls /sys/class/pwm/pwmchip0 device export npwm power pwm1 subsystem uevent unexport # ls /sys/class/pwm/pwmchip0/pwm1 capture duty_cycle enable period polarity power uevent Let me know if you require any additional information. Re: Accessing specific PWM channel in Linux Hi @Tony-FM-Eng,  Thank you for contacting NXP Support. It seems that the configurations are correct. Could you please share the output of the following commands? ls /sys/class/pwm/ ls /sys/class/pwm/pwmchip0/ ls /sys/class/pwm/pwmchip0/pwm1 Please try it and send me the outputs. Have a great day!

如何获取此材料的 ESD 性能信息？BAP64-02 我已经在 NXP 网站上搜索了有关该组件的所有文档。好像没有找到相应的描述。您能帮我找到这些信息吗？ 射频 回复：如何获取此材料的 ESD 性能信息？BAP64-02 由于我们不会公开分享此类数据，因此我们通过电子邮件回答了这个问题。

About fuses when using the i.MX RT1021 SEC tool. I am trying to write to an i.MX RT1021 using the SEC tool. When I execute the write, the following dialog appears. It says "BURN FUSES", but I would like to leave the fuses as they were when shipped. I used the SEC tool to read the OTP configuration of the board I clicked OK on in the dialog and a brand new board, and compared them, but there were no differences. Where can I check the "user OTP configuration" in the dialog? Also, is it possible to use the SEC tool if the fuses are as they were when shipped? Best regards i.MXRT 102x Re: About fuses when using the i.MX RT1021 SEC tool. The content of my question has changed, so I have posted the following as a new question. Please post the answer there. https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Writing-to-the-QSPI-Flash-of-i-MX-RT1021-using-write-image-win/m-p/2083229#M34066  Best regards Re: About fuses when using the i.MX RT1021 SEC tool. In this thread, I have asked a question about not being able to write using write_image_win.bat, but this has not yet been resolved. I would like to summarize the current situation. - When writing to a brand new board using a bat file, the process that should say "Erase memory before writing image" is displayed as "failed." - Boards that have already been written to using the SEC tool can be written to using the bat file. The following are the questions I would like to ask. 1. Why can't I write to a brand new board using a bat file? 2. Is there anything I need to do to write to a brand new board using a bat file? 3. Is there a difference between a board that has already been written to using the SEC tool and a brand new board? Please answer. Best regards Re: About fuses when using the i.MX RT1021 SEC tool. Regarding the issue I am asking about, I have confirmed the same thing with a brand new i.MX RT1062 custom board. I am unable to write to QSPI Flash using write_image_win.bat even on the i.MX RT1062 board. Boards that have already been written to with the SEC tool can be written to using write_image_win.bat in the same way as the i.MX RT1021. I believe the i.MX RT1062 is in the same situation as the i.MX RT1021. Please tell me the steps to write to a brand new board using write_image_win.bat. Best regards Re: About fuses when using the i.MX RT1021 SEC tool. Thank you for your reply. I followed the procedure you provided to check the board that I was unable to write to in the previous post, and I was able to write to it. After that, I was able to write to this board by double-clicking write_image_win.bat. I prepared another new board and tried writing to it using write_image_win.bat using the following procedure, but it failed. 1. Start CMD directly from Windows 2. Move to the workspace folder 3. Run write_image_win.bat I will upload the log of the above procedure below. ### Parse input arguments ### ### Check presence of FlashLoader ### FlashLoader is not running yet, download and run it ### Check communication with target bootloader ### sdphost -u 0x1FC9,0x0130 -j -- error-status { "command": "error-status", "response": [ 4042322160 ], "status": { "description": "1450735702 (0x56787856) Hab Is Disabled (Unlocked)", "value": 1450735702 } } sdphost succeeded, HAB disabled ### Write FlashLoader ### sdphost -u 0x1FC9,0x0130 -j -- write-file 0x20209000 "C:\Users\suzuki_y\Desktop\TEMP\NX_temp\NX-RT1021\NX-RT1021_\bootable_images\unsigned_MIMXRT1020_flashloader.bin" Status (HAB mode) = 1450735702 (0x56787856) Hab Is Disabled (Unlocked). Response status = 2290649224 (0x88888888) Write File Success. sdphost succeeded, HAB disabled ### Start FlashLoader ### sdphost -u 0x1FC9,0x0130 -j -- jump-address 0x20209000 Status (HAB mode) = 1450735702 (0x56787856) Hab Is Disabled (Unlocked). sdphost succeeded, HAB disabled ### Waiting FlashLoader to be initialized for 3 seconds ### ### Timeout wait value can be adjusted from Preferences ### ### Check presence of FlashLoader ### blhost -t 2000 -u 0x15A2,0x0073 -j -- get-property 1 0 { "command": "get-property", "response": [ 1258424320 ], "status": { "description": "0 (0x0) Success.", "value": 0 } } blhost succeeded ### Configure FlexSPI NOR using FCB on address 0x2000 ### blhost -t 5000 -u 0x15A2,0x0073 -j -- write-memory 0x2000 "C:\Users\suzuki_y\Desktop\TEMP\NX_temp\NX-RT1021\NX-RT1021_\source_images\nx_rt1021_Inspection.fcb_parsed.bin" { "command": "write-memory", "response": [ 512 ], "status": { "description": "0 (0x0) Success.", "value": 0 } } blhost succeeded blhost -t 5000 -u 0x15A2,0x0073 -j -- configure-memory 9 0x2000 { "command": "configure-memory", "response": [], "status": { "description": "0 (0x0) Success.", "value": 0 } } blhost succeeded ### Erase memory before writing image ### blhost -t 50638 -u 0x15A2,0x0073 -j -- flash-erase-region 0x60000000 63876 0 { "command": "flash-erase-region", "response": [], "status": { "description": "20106 (0x4e8a) FlexSPINOR: Command Failure.", "value": 20106 } } blhost failed It seems that once you write to it with the SEC tool, you will be able to write to it with write_image_win.bat, but you cannot write to a board that you have never written to before. Do you have any idea what this difference is? Also, is there any difference between double-clicking write_image_win.bat and running it from CMD? Best regards Re: About fuses when using the i.MX RT1021 SEC tool. Hi @takagi_y  Thank you for your reply, I am glad to know that your first problem was solved.  I understand that with the same  board, you can use the SEC tool to write but, then after executing manually the write_win.bat, it fails and stops. The write button is only a trigger button to call the write_win.bat.  I recommend you to follow the below to troubleshoot steps, to see where the write_image_win.bat stops. 1 Open the connection with target.  2 Test connection. It should be OK. 3 Open the CMD. The tool automatically opens the CMD on the current workspace.  4 Type the write_image_win.bat 5 Check the output on the CMD.  This way is easier to determine where it write_win.bat stops. Would you share the log? Btw, If you have not changed any HW setting on the board, you only need to ensure that the RT1020 is on serial downloader before calling the write_win.bat. I hope this helps, Diego Re: About fuses when using the i.MX RT1021 SEC tool. I just posted that the problem was solved, but a new problem has arisen. I am now able to write to a brand new board using the SEC tool, but when I try to write using write_image_win.bat in the workspace folder, the process stops midway (around @echo ### Erase memory before writing image ###). If I have already been able to write to a board using the SEC tool, I can also write to it using write_image_win.bat. Is there anything I should do before using write_image_win.bat to write to a brand new board? Best regards Re: About fuses when using the i.MX RT1021 SEC tool. Thank you for your reply. I created a different workspace as suggested and wrote to a new board, and no warnings were issued and I was able to write normally. Thank you for letting me know how to solve the problem. Best regards Re: About fuses when using the i.MX RT1021 SEC tool. Hi @takagi_y  Thank you for your reply!  You should not worry about  0x460 BOOT_CFG1 [1], by default (brand new MCU and new SEC tool workspace) it should be zero, I updated my picture on my previous comment for your reference, to let you compare easier. This fuse is burned (set to  1) by the tool if you select closed HAB life cycle and Authenticated  HAB boot mode. If you have open HAB life cycle and Unsigned boot mode  the tool will put this fuse to 0. I hope this explains the preset value on blue. I do not think this could be affecting you. Btw, if you want to have whole available description of the fuses, please refer to the i.MX RT1020 Security Reference Manual and the  Restricted Data Package for MCUXpresso Secure Provisioning Tool v10, they are available under NDA.  I noticed that you migth have set whole 0x470 BOOT_CFG2 to zero , which is ok, probably the tool understands this as your custom User OTP configuration. Please create another workspace and see if the warning persists.  Anyway, I did not found any problems with your fuse settings, I think you should be able to keep developing on Unsigned boot mode. Have you seen any problems? If you do, please let me know.  Diego Re: About fuses when using the i.MX RT1021 SEC tool. I was checking the User Guide and noticed something that bothered me, so I would like to ask an additional question. The following is written on page 39 of the "MCUXpresso Secure Provisioning Tool User Guide v.10". "The hexadecimal value required by SEC or by the user. Values ​​preset by SEC are highlighted in blue and can be modified only in Advanced mode." The BOOT_CFG1 in the screenshot of the OTP configuration I uploaded the other day is displayed in blue. When I checked the bit display of BOOT_CFG1, the display of Restricted in bit1 was blue. I looked at page 1100 of the "i.MX RT1020 Processor Reference Manual" to check the contents of the settings, but bit0 of 0x460 was Reserved and could not be confirmed. Is it possible that this setting is affecting this? Best regards Re: About fuses when using the i.MX RT1021 SEC tool. Thank you for your reply. Below is the image of the OTP configuration of the brand new board. The version of the SEC tool is version 10.0[b241106], and the OS is Windows 10 Pro. Best regards Re: About fuses when using the i.MX RT1021 SEC tool. Hi @takagi_y  The only place to check the "user OTP configuration" is on the below window. This is a picture from the RT1020-EVK at my desk. I think we have not manually programmed fuses before to it.  The warning you see tipically suggest that your OTP config contains a fuse value changed, but your description says you are not doing this. Could you show a picture of your OTP settings? Here is an example of the Warning window, but because HAB is enabled.  You could still use the SEC tool if the fuses are as they were when shipped. However,  lets review your OTP config to double check 🙂 Could you also let me know your SEC tool version and OS? Best regards,  Diego

IMXRT117X: OTFAD and Secure JTAG forces into bootrom Hi!  After following along to application note AN13133, we can confirm that:  1) Secure JTAG works: We can log into the IMXRT117X using the secure jlink script to unlock and debug with an application. 2) OTFAD Debugging works: We also have found we can debug with an OTFAD encrypted app not locked down with Secure JTAG.  However, we have found that we cannot use Secure JTAG and OTFAD simultaneously. When we use the same jlink script to unlock on an OTFAD encrypted application, the device jumps into the boot rom.  Why would OTFAD and Secure JTAG not work together? Thanks Re: IMXRT117X: OTFAD and Secure JTAG forces into bootrom Hi @eforzano  Thank you for your patience, I have checked this internally, with another expert colleague on this, see the below feedback. Actually, RT1170 forbids to debug security codes when HAB closed plus code protection via OTFAD or IEE. And each security engine implement itself process mechanism when receiving debug signal, in other word,  When JTAG attempts to access encrypted resources, the related engine will prevent exposure of encrypted resources. In your customer case, enabling secure debug must require to do HAB closing on RT1170, so the case's problem is as designer expected. We suggest customer to only enable common codes in-field debugging, secure codes debugging must be finished in-development not in-field. We hope this could help you! do not hesitate to let me know any further questions you could have.  Diego Re: IMXRT117X: OTFAD and Secure JTAG forces into bootrom Thank you for your response! Let me know if you need anything. Were you able to reproduce the issue? Re: IMXRT117X: OTFAD and Secure JTAG forces into bootrom Hi @eforzano  I just want to maintain you updated,  I am sorry for the delayed response.  For now, I am currently investigating the issue, please allow me to return back to you with feedback as soon as possible for me! If I need more information I will let you know.  Diego. Re: IMXRT117X: OTFAD and Secure JTAG forces into bootrom Hi Diego!  It is the whole image - region 1. The region start is: 0x30002000 The region length is: = 0x1FC000 Let me know if you have any more questions.  Re: IMXRT117X: OTFAD and Secure JTAG forces into bootrom Hi @eforzano  Thank you for your interest and for reporting the issue you found during your development. Lets look into it.   Would you be able to let me know details about the OTFAD configuration that you made? Is it whole image ? if not, what is the OTFAD Region start and Region length and  your application's start and end adress. Below some context of this question, using the MCUXpresso Secure Provisioning v10's OTFAD Configuration menu.  Best regards,  Diego

S32K344-基于中断的PWM生成 要求是，想要生成两个 PWM 信号，并且一个 PWM 信号应该在上升沿开始生成另一个信号并在下降沿停止。为了实现这一点，是否有任何可用的库或支持文档？

i.MX93 EVKボードのメモリマップの詳細が見つかりません こんにちは 私は一緒に働いていますiMX93EVKボードですが、ボードのメモリマップの詳細を見つけることができませんでした。( ここで記憶とそのサイズへの参照を見つけることができましたが、実際の住所を見つけることができませんでした)。 Cortex-M33でいくつかのベアメタルアプリケーションを構築しようとしていますが、メモリの可用性に基づいてリンカスクリプトをカスタマイズする必要があります。 だから、誰かが私にメモリマップとCortex-M33を介してアクセス可能なメモリを教えてもらえますか (例:Cortex-M33は前述の2 GB DDRメモリにアクセスできますか、それともCortex-A55専用ですか? Re: i.MX93 EVK ボードのメモリ マップの詳細が見つかりません @Harvey021、迅速な対応に感謝します。 私はimx93evk sdk_2_16 を使用しています(どのように生成したかはわかりませんが、次の投稿で生成手順を提供します)。 私は、 "PRINTF()"関数がフロート値を印刷できないことを確認しました(テキストコンテンツを印刷するだけで、フロート値の代わりに空白のままになります) この クエリでは、プロジェクトの生成中にいくつかのマクロを有効にする必要があると読みましたが、プロジェクトはすでに生成されているため、再生成できませんでした(追跡されていない変更が多数あり、再度再構築すると失われます) それで、私がこれを達成できるように、ソースコードで変更できる方法はありますか。( PRINT_FLOAT_ENABLEマクロを有効にしようとしましたが、まだ機能していません) これが構成です、私は現在持っています: PRINT_FLOAT_ENABLE = 1 SDK_DEBUG_CONSOLE = 1 感謝！

NHS3100消費電力ワークシート 誰かが私が電力消費の.xlsxを見つけることができる場所を知っていますかSDKに含まれていたNHS31xxのワークシート? Re:消費電力ワークシートNHS3100 ありがとうダニエル、私はそれを見逃したに違いありません。

Win 和 Linux 上的 MCUXpresso 女士们，先生们， 由于某些原因，我必须在两台不同的电脑上开发自己的 FW。一次是在 Windows 计算机上，其他时间是在另一台装有 Linux Mint 的计算机上。 重新安装系统不是一个选择。 我可以设法在两台机器上安装最新的 MCUXpresso。它们的工作方式类似，但并不完全相同。 当我将整个工作目录从 Win 机器复制到 Linux 机器时，MCUXpresso 无法打开已在 Windows 上创建的项目。所有文件都在那里。 此外，当我尝试在 Mint 上创建新项目时，我无法针对具体的微控制器执行此操作，唯一的选择是选择开发板。我只想选择一个微控制器 - 在 Windows 上这不是问题 - 因为我有自己的控制器硬件。 将现有项目从 Win 复制到 Linux 以及反之亦然的正确方法是什么？

电流测量 您好，我们如何使用 RD33771CDSTEVB 和 BATT14C 模拟器测量电池组的电流。我们应该在哪里连接分流电阻以及在 BATT 14c 模拟器的哪个通道中进行电流测量。请澄清一下。 回复：电流测量 谢谢。该主板的电流感应有限制吗？例如，它可以支持 48V、200Ah 的电池组 回复：电流测量 你好 因此，对于您想要的两个功能，我认为您可以参考 EVB -RD33771-48VEVM。 RD33771-48VEVM 参考设计 | 恩智浦半导体  回复：电流测量 我们将其与 MPC5775B-EVB 一起使用，作为 MPC5775B 和 MC33771 高压 BMS 评估系统的一部分。MPC57775B-EVB仅支持TPL。是否有任何其他 MC33771C 板同时启用了 TPL 和电流感应。我相信 FRDM33771CSPEVB仅支持 SPI。

FRDM iMX93 原理图存在吗？ 我最近购买了一台 FRDM iMX93。 但是，我在文档中找不到 FRDM iMX93 的原理图。 您能告诉我示意图在哪里或者是否可以获得一个吗？ 谢谢！ FRDM 培训 HW-开源 回复：FRDM iMX93 原理图存在吗？ 太感谢了。

i.MX6DL Silicon Revision 1.4 Changes Hello all, there is a document describing the changes from silicon revision 1.1 to 1.2 and 1.3 (EB804), but oviously, this hasn't been recreated/updated for 1.4. Is there any resource summarizing the changes in revision 1.4 compared to 1.3? This would make handling the discontinuation of 1.3 a lot easier. Regards  Martin Re: i.MX6DL Silicon Revision 1.4 Changes Hello @mahi  A similar question answered as below. From TO1.3 to TO1.4, no impact to software, there are other small improvement in ROM, such as SDP, USB, HAB and so on, all of them are transparent to customer. Regards Harvey