code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Thank you so much!! Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Did any error messages pop up during the compilation process? If no error messages appear, there should be no problem. But if errors still appear, you'd better confirm with Jorge again, license-related issues, he is an expert and can give you more professional advice. Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Thank you very much for your reply. I can now compile the code and build the target normally. Is there any hidden danger of compilation or license compliance in the compiled files? Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Hi Jimmy Xu, 很抱歉你的问题还没有被解决。License支持哪一个版本，standard 还是 professional， 这取决于你购买时的选择。 Professional的功能是最全的，Standard功能会少一些。 老实说，CodeWarrior license 不是我的专业领域。我看到你还有一个private ticket， 已经有license team的support在跟进了。 希望 license team 的同事能够顺利解决你的问题，如有任何新的情况，请及时告知我们。 BRs， Celeste Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Without starting the server, lincese shows two lines of error (network problem, I can't post the picture), combined with the previous results: the lower line is activated. Does the license only support the standard edition MCU 10.5 version, but not the professional edition MCU 10.5? Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Hello JimmyXu, 我找到了下面的链接：Floating License -Environment Variables. - NXP Community 里面提到环境变量的设置，我不确定它是否与你遇到的问题有关，你可以试一下。 除此之外，你还可以尝试一下移除license，然后重新导入并重启codeWarrior，看看是否有效果。 BRs, Celeste Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 使用code warrior floating license，在官网生成license.dat后，在服务器上运行lmtools，服务正常启动。 client 使用和server相同的license.dat ，启动code warrior后报错 如何解决？ Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Hello Jimmy, 我认为局域网是可以的，你可以尝试下。 BRs, Celeste Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Pop-up window when opening code warrior Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? This is the picture

Minimum input voltage for edge capture Hi, In a KV4X, for a digital input, input voltage high is 0.7 x Vdd and input voltage low is 0.35 x Vdd. Which are the minimum and maximum values for edge capture? I have a sinusoidal signal of 200 mV peak in an input pin and I see that it is enough to detect falling/rising edges. Thanks in advance Re: Minimum input voltage for edge capture I have found why edges were being detected with such a low signal. Re: Minimum input voltage for edge capture Hi @zorrotz, Please maintain the edges of the captured signal between 0.7 x Vdd and 0.35 x Vdd in order to ensure a proper edge detection of the signal. Re: Minimum input voltage for edge capture I have forgotten to say that Vdd = 3.3 V

找到Pflash的Demo工程 你好，我想用S32K311开发Bootloader，涉及到PFlash的擦除、写入、以及bank切换。有了S32DS配置工具，有相关的Demo工程吗？你能和我分享吗？谢谢。

i.MX RT1180はIEEE802.1QCRをサポートしていますか? i.MX RT1180はIEEE802.1QCRをサポートしていますか? i.MX RT1180 で TSN の 802.1QCR は見つかりませんでした。 だから、私は再確認したいと思います。 ありがとうございます。

How to build S32K3xx AutoSAR example project? Hello, I am trying to build an example project from SW32K3_S32M27x_RTD_4.4_4.0.0_P20_D2403. From its readme.txt, the build method to run "make build" from the command line. But there is video a few years ago which shows the way to use S32DS IDE to build AutoSAR example project for MPC574x MCU. https://www.nxp.com/video/introduction-to-nxp-autosar-mcal-software:AUTOSAR-OnDemand-Training-Video Is the way to use S32DS available for S32K3XX MCU? Thanks! Crane Re: How to build S32K3xx AutoSAR example project? I  downloaded the RTD and I didn't know how to find RTD head files. Now I solve the problem. Thank you Re: How to build S32K3xx AutoSAR example project? I am not sure if you have downloaded any RTD files before. For example, if you click the blue "S32K3 Standard Software Package" in the section 2.3 at this link https://www.nxp.com/document/guide/getting-started-with-the-s32k3x4evb-t172-evaluation-board-for-automotive-general-purpose:GS-S32K3X4EVB-T172?section=get-software, it will guide you to a page where you can find links to different versions of "Real Time Driver". This is for the MCU I have used before. There should be the similar page for the MCU you are using that you can find. Then you can look for the version of RTD that fit for your project on those pages. If you are asking for the specific version of RTD I used before, I don't remember any more. Hope it helps! Crane Re: How to build S32K3xx AutoSAR example project? Hello cranes, How to get RTD files， in my project I don't have the files so that I can't complie my project. Re: How to build S32K3xx AutoSAR example project? Hi, The issues is addressed and the project is built successfully by using command line. Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, It is from an example project. An example project, including EB config, from NXP's RTD, not a project I created myself.  Do you know who might know this? Or should I raise another question about this? Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, I do not have knowledge on your EB config, nor generated code. The package is defined in Resource plugin. Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, I found that the MCU model "S32K344" is not defined. This causes some symbols are not recognized. But this is supposed to be defined in the code generated from EB Tresos, right? I couldn't find why it is not defined in the S32K344 example project. Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, I personally always used GHS for code generated from EB Tresos. I will test it following days with S32DS and let you know if there are any special constraints. Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, Yes, that's correct. But if we look at the errors occur from the beginning as first a few in the below screenshot, which come from the files generated by EB Tresos and RTD, they are not relevant to this file. And actually adding check_example.h indeed doesn't remove any of these errors. Attached is the new build log file. At the end of the log file, there is "error: 'VV_RESULT_ADDRESS' undeclared". This macro 'VV_RESULT_ADDRESS' is in the Makefile in the example project folder. Do we need to add this file to the project generated in S32DS? If so, where to add? I already tried and it didn't work to add it in the project root folder as in the example project. Obviously it doesn't work to just copy the folders of include and src from the example project to the newly generated project in S32DS. There are many things missing, not just check_example.h. So, what is the correct way to build an example AutoSAR project from S32K3xx RTD? Just feel so weird that there is example projects in RTD but there are no guidelines about how to build the example project. What is missing here? Thanks! Crane  Re: How to build S32K3xx AutoSAR example project? Hello, I still see the same issue. You do not have all header files in the project: Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, Yes, it removed the previous errors, but still miss things as in the attached log. This project file structure is as below now: The RTD folder is copied from the non-AutoSAR example project for the same module. It seems that there possibly should be something else inside for AutoSAR project.  Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, As in any other compiler, you simply add paths for your header locations in include options: Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, Yes, I see that. But the issue is, I searched through the folder of the example project and files generated by EB Tresos, there are no such files. They are the files from RTD. Obviously, the example project needs the header files from RTD. Here is the file structure of an empty project created in S32DS. No RTD there, which is understandable. It can be built and run.  Here is the file structure of the example project with the files generated by EB Tresos. (include and src under generate are generated from EB Tresos.) There are no Mcl_Types.h and other header files that are needed. Then my question is, how to include RTD in the project so that the missing header files can be found by the compiler? Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, Your log says you are missing header files. Do you have those header file in your project? Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello, I tried the way you mentioned. I create an empty project in S32DS, then move the folder of include and src in the example project to the empty project. It doesn't work and I got the build log as attached. Do you know who might know how to import the example project from the RTD for S32K3xx? What I am trying is an example project from the MCU's RTD package. There should be a guideline about how to build and test the example project. There is readme.txt in the example project folder, but unfortunately, it doesn't work to follow what's in it as described in my previous post. Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, My question is, is there a way to use S32DS to import an example project for S32K3xx MCU and build it? It doesn't work using the same way shown in the video as the example projects have a different project structure. I do not know if there is automatic import script in S32DS for tresos generated files. But you can always do it by hand. Simply create black project in S32DS and move the C and H files to the project. This way you should be able to compile project. In the past when there was no S32DS I was doing it this way with Windriver or GHS compilers. Best regards, Peter Re: How to build S32K3xx AutoSAR example project? Hello Peter, After 30 minutes of the video, it shows how to import an example project for MPC574x and build the project under S32DS.  My question is, is there a way to use S32DS to import an example project for S32K3xx MCU and build it? It doesn't work using the same way shown in the video as the example projects have a different project structure. In the readme.txt in the example project folder (C:\NXP\SW32K3_RTD_R21-11_3.0.0_P07\eclipse\plugins\Pwm_TS_T40D34M30I0R0\examples\EBT\S32K3XX\Pwm_example_S32K344, the file is attached), it shows how to build the project in Windows command prompt. (I tried but I couldn't make it work as it seems something is still missing). How can I import and build this project under S32DS as what's done in the video for MPC574 project? Thanks! Crane Re: How to build S32K3xx AutoSAR example project? Hello, I am bit confused here. The video shows EB Tresos configuration tool and how to generate project files. Those are later put into S32DS and compiled there.This is a common use case. Is the way to use S32DS available for S32K3XX MCU? I apologize, but I do not understand this question. Could you please specify it closer? Best regards, Peter

S32K118 Watchdog Issue Hi, I have a demo project developed on s32k118evb board with watchdog disabled and it works well but after I download the project to my prototype PCB board the program triggers a watchdog timeout.  Is there anything I missed to disable the watchdog timer? ====== Below is the board initialization code ======    /* Board Initialization */ void Board_Init() { #if 1 DISABLE_INTERRUPTS(); // disable global interrupt WDOG->CNT=0xD928C520;     /* Unlock watchdog */ WDOG->TOVAL=0x0000FFFF;    /* Maximum timeout value */ WDOG->CS = 0x00002100;    /* Disable watchdog */ ENABLE_INTERRUPTS(); // enable global interrupt #endif /* Clock */ CLOCK_DRV_Init(&clockMan1_InitConfig0);   PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);   /*** SPI ***/ LPSPI_DRV_MasterInit(MLX,&mlxState,&mlx_MasterConfig0);   /*** LPIT ***/ LPIT_DRV_Init(INST_LPIT1, &lpit1_InitConfig); LPIT_DRV_InitChannel(INST_LPIT1, CHAN_0, &lpit1_ChnConfig0); INT_SYS_InstallHandler(LPIT0_IRQn, &LPIT_ISR, (isr_t *)0); LPIT_DRV_StartTimerChannels(INST_LPIT1, CHAN_0_MASK);   /*** CAN ***/ /* Initialize can pal instance */ /* !!! PE clock source MUST be peripheral clock !!! */ CAN_Init(&hscan_instance, &hscan_Config0);   /* Set buffer configuration */ CAN_ConfigTxBuff(&hscan_instance, TX_MAILBOX, &TxbuffCfg);   msg.id = HSCAN_ID; msg.cs = 0U; msg.length = 8;   /*** SBC Control ***/ // Set SBC control pin to enter normal mode PINS_DRV_SetPins(STBN_PORT, STBN_PIN); }   Re: S32K118 Watchdog Issue Hi If you are using the S32K1 SDK examples, there is DISABLE_WDOG in system_S32K118.c and system_S32K118.h that can be used to disable the watchdog: /SDK/platform/devices/S32K118/startup/system_S32K118.c But I don't understand why it runs normally on S32K118EVB but errors occur on your prototype PCB board. Have you compared the differences between crystal circuits? Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------

RW612 - PM4 deep sleep intermittently draws high current We are encountering an issue where one of our products, based on an RW612 in a u-blox IRIS-W10 module, is ostensibly entering deep sleep but in reality is drawing ~60 mA and rapidly draining the battery. Here is our function that is entering deep sleep: void PowerManager::EnterPowerDown(uint32_t duration_secs) { auto &board = Board::GetInstance(); debug_.Info(kTopicGeneral, "sleeping for %lu secs (max)", duration_secs); os_self_sleep_ms(500u); auto sleep_ticks = SecsToRtcTicks(duration_secs); PM_SetConstraints(kLowPowerMode, APP_PM_CONSTRAINTS); auto base_priority = os_enter_critical_from_isr(); board.InitPins(); PM_EnablePowerManager(true); PM_EnterLowPower(sleep_ticks); /* Should never get here, PM4 Deep Sleep requires a cold boot. */ PM_EnablePowerManager(false); os_exit_critical_from_isr(base_priority); PM_ReleaseConstraints(kLowPowerMode, APP_PM_CONSTRAINTS); } kLowPowerMode is defined as PM_LP_STATE_PM4, and APP_PM_CONSTRAINTS is 0.  We select our power mode and constraints, enter a critical section, put our GPIO into a known state, enable the Power Management driver, and invoke low power mode.  Our board does wake up when a wake signal occurs on GPIO[24], or when one hour has elapsed, and it does immediately restart, as one would expect after entering PM4 Deep Sleep. Most of the time the system draws <1 mA in this state.  But intermittently, it enters this state and draws ~60 mA for the duration of the sleep cycle, which is a maximum of one hour in our application.  Needless to say, this destroys our battery life between charges.  (The power should be going to <10 uA per the datasheet, but that's a topic for another day.) To avoid complications with starting and stopping the Wi-Fi driver, I've engineered the system such that when we want to go to sleep, I set a flag in NVRAM, reboot the system by calling __NVIC_SystemReset(), and then enter low-power mode, while leaving the Wi-Fi subsystem untouched.  When we wake from sleep, we reboot (because we're coming out of PM4), start Wi-Fi, and upload telemetry to the cloud. Your "power_manager_test" SDK example was written for baremetal; are there additional precautions that one must take when running FreeRTOS to ensure that entering PM4 will genuinely yield a low-power state?  What other conditions could cause a false PM4 state? Dana M. Re: RW612 - PM4 deep sleep intermittently draws high current I believe I’ve found the issue.  Our system performs a reboot immediately prior to engaging low-power mode.  This removes the requirement to implement a graceful shutdown of the Wi-Fi + TCP/IP stack prior to power-down.  (My initial attempts at shutting down the Wi-Fi stack through the Wi-Fi API were unreliable, so I switched to the reboot approach.)  We use a flag in NVRAM to signal the system not to bring up Wi-Fi but instead immediately configure the wakeup pin for the correct polarity and go into power-down.  Our board pulls ~1 mA in deep sleep. I believe the cause of our excessive current draw is that sometimes when we would reset the main CPU (Cortex-M33), the Wi-Fi CPU/radio would be left in an active state, pulling ~56 mA.  Since our sleep/check-in interval is 1 hour, that’s 56 mAh of draw from the battery.  I asked NXP specifically about how the CPUs and radios are reset, and that seemed to confirm that __NVIC_SystemReset() only resets the Cortex-M33, leaving the other processors alone.  This morning, I put two lines of code into our board startup function: /* Ensure that the radios are powered off at startup. Thus, if we go * directly into power-down, this should eliminate the possibility that * the radios are still powered and thus pulling current. */ POWER_PowerOffWlan(); POWER_PowerOffBle(); I rebuilt the application and then ran it for ~40 minutes, using an LED flashlight to wake up the board every time it went to sleep.  I woke the unit up likely about 50 times during the test, and 50/50 it went into low power, i.e. it did not draw excessive current.  Previously, it would take me only a few attempts to get the system into a high-current sleep state.  At this point, I consider the issue solved. In summary… if the Wi-Fi and/or BLE stacks are initialized and running, and the system is reset or watchdogged, it is necessary to call POWER_PowerOffWlan() and/or POWER_PowerOffBle() at startup to ensure that the Wi-Fi and BLE CPUs/radios are powered off.  When starting Wi-Fi using the NXP stack, one of the first steps is powering down and then powering up the Wi-Fi processor, so explicitly powering down the radio at startup does not interfere with a later initialization of the Wi-Fi stack. Dana M. Re: RW612 - PM4 deep sleep intermittently draws high current What SDK version are you using? I generated our project using SDK v2.16.1.  I have SDK 24.12 (2025-01-15) pulled down but I have not yet attempted to apply it to this project, given how MCUXpresso likes to render projects unusable when adding or upgrading components. Are you seen this behavior with the SDK example without modifications? In the very limited testing we did with the SDK example, no, it did not occur. Can we reproduce this behavior with the SDK example? Likely not. What changes need to be done? Add FreeRTOS, Wi-Fi driver, lwIP networking, and an AWS client stack to the example. Are you able to see this behavior in our FRDM? It would take considerable effort to rig up a FRDM board to work the same as our custom board, but it could be done. Dana M. Re: RW612 - PM4 deep sleep intermittently draws high current Hello, Hope you are doing well. What SDK version are you using? Are you seen this behavior with the SDK example without modifications? Can we reproduce this behavior with the SDK example? What changes need to be done? Are you able to see this behavior in our FRDM? Best Regards, Ricardo

How to find the AWR model of the MW6S004NT1? Hello, I am doing a power amplifier design, I need to use the MW6S004N1 model, but I did not find the AWR model on the website. Re: How to find the AWR model of the MW6S004NT1? HI Kostiantyn Okay, you can find the AWR models on our official website. Unfortunately, we do not have the AWR model for the device you want. It is necessary to contact an external page to access the model. I hope this information has helped you, please let me know if you need help with anything else. Have a great day and best of luck.

How to use stdfix.h in my project(s12z series, CW 11.1) Hello all. I'm beginner with nxp s12z and CW 11.1. I want to use "stdfix.h". But there is some problem with include stdfix.h. 1. I cannot found "stdfix.h" file anywhere my directory(C:\Freescale\). 2. I downloaded "stdfix.h" and copied at "C:\Freescale\CW MCU v11.1\MCU\S12lisa_Support\s12lisac\include". And then, I can include "stdfix.h" but I cannot use library function(e. bitsr(), rbits(), ...). I can see the error messaege when I compiled my project "function has no prototype". I included the Search System Path of Access Path of S12Z Compiler,    "${MCUToolsBaseDir}/S12lisa_Support/s12lisac/include"   "${MCUToolsBaseDir}/S12lisa_Support/s12lisac/src"   "${MCUToolsBaseDir}/S12lisa_Support/s12lisac/lib_medium" Libraries of Input of S12Z Linker  "${MCUToolsBaseDir}/S12lisa_Support/s12lisac/lib_medium/ansii.lib"    Please help me to I can include/use "stdfix.h" correctly. Best Regards. Re: Hi, Re: How to use stdfix.h in my project(s12z series, CW 11.1) Thank you. I'll try it. 🙂 Hi, Re: How to use stdfix.h in my project(s12z series, CW 11.1) Hi,  unfortunately stdfix is not supported in CodeWarior. For fixed point arithmetic you can use AMMCLib which is default part of installation. AMMCLib is located in "${MCUToolsBaseDir}/S12lisa_Support/ folder. 

GD3162 gate driver ADC Hi NXP, In our project, We are using AMUXIN for reading DC bus voltage and TSENSE for power device phase temperature. But we are planning to use TSENSE for AMUXIN reading. Is it possible? Will the ADC counts varry from what was read through AMUXIN? Please clarify Re: GD3162 gate driver ADC Hello Akshat The internal configuration and description says that the AMUXIN could be used as GPI with a primary purpose for the ADC, this connection has additional control to the total error variation and other features. The TSENSE includes possible current driver for temp sense network If you use the TSENSE for the AMUXIN it might not cause an electrical error but these changes might affect the correct measurement. If you want more details about these connections please read our official page GD3160: GD3160 Advanced IGBT/SiC Gate Driver - Data Sheet, this document is a secure file, so I cannot share it for this way. I hope this information has helped you, please let me know if you need help with anything else. Have a great day and best of luck.

makefile error in PFE example I'm using the makefile in the PFE example to compile. However, I keep getting an error saying the path is not found. I wonder if this error is caused by my not entering the path correctly in the makefile or if it's a problem with the Tresos_cmd.bat file. This is the version of the file I'm using. Version compatibility seems to be fine. PFE-FW_S32G_1.7.1 PFE-DRV_S32G_M7_MCAL_1.2.0 SW32G_RTD_4.4_4.0.2 C:\EB\tresos\bin\workspace>make generate process_begin: CreateProcess(NULL, cygpath -m C:/EB/tresos/bin/workspace/MasterProject_RDB3, ...) failed. make: Makefile:647: pipe: No such file or directory C:/EB/tresos/bin/tresos_cmd.bat -data C:/EB/tresos/bin/workspace importProject 2>&1 C:/EB/tresos/bin/tresos_cmd.bat: line 1: @echo: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 2: REM: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 4: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 5: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 6: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 7: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 8: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 9: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 10: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 11: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 13: goto: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 15: :NOJAVA: command not found ERROR: java not found: %JAVA% C:/EB/tresos/bin/tresos_cmd.bat: line 17: EXIT: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 19: :NOWINDOWS: command not found ERROR: tresos only runs on Windows2000 and Windows/XP C:/EB/tresos/bin/tresos_cmd.bat: line 21: EXIT: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 23: :START: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 24: REM: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 25: SET: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 26: SET: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 48: unexpected EOF while looking for matching `"' C:/EB/tresos/bin/tresos_cmd.bat: line 54: syntax error: unexpected end of file Makefile:647: recipe for target 'generate' failed make: [generate] Error 2 (ignored) C:/EB/tresos/bin/tresos_cmd.bat -data C:/EB/tresos/bin/workspace autoconfigure MasterProject_RDB3 GenerateAllVariants 2>&1 C:/EB/tresos/bin/tresos_cmd.bat: line 1: @echo: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 2: REM: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 4: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 5: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 6: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 7: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 8: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 9: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 10: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 11: IF: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 13: goto: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 15: :NOJAVA: command not found ERROR: java not found: %JAVA% C:/EB/tresos/bin/tresos_cmd.bat: line 17: EXIT: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 19: :NOWINDOWS: command not found ERROR: tresos only runs on Windows2000 and Windows/XP C:/EB/tresos/bin/tresos_cmd.bat: line 21: EXIT: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 23: :START: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 24: REM: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 25: SET: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 26: SET: command not found C:/EB/tresos/bin/tresos_cmd.bat: line 48: unexpected EOF while looking for matching `"' C:/EB/tresos/bin/tresos_cmd.bat: line 54: syntax error: unexpected end of file Makefile:647: recipe for target 'generate' failed make: *** [generate] Error 2 C:\EB\tresos\bin\workspace> Upload the relevant files, just in case. Re: makefile error in PFE example Hello, @ Youngsoo_do Thanks for the valuable information. Best Regards Chenyin Re: makefile error in PFE example This answer is not a fundamental solution to the problem. The answer to this problem is C:\NXP\S32DS.3.5\S32DS\build_tools\gcc_v9.2\gcc-9.2-arm32-eabi\arm-none-eabi\newlib If you go there, you'll find a folder called newlib. you change this newlib to lib. I spent a few days struggling with this. Re: makefile error in PFE example For this issue, I went to that page, downloaded the Arm GNU Toolchain, and changed the path to GCC_DIR in the makefile, which solved the problem. https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads  (I want it to be helpful to someone who has a similar problem to mine) But I have another problem—it's never-ending. I'll have to create a new case to ask the question. Thank you for your help on this issue. Re: makefile error in PFE example Thank you very much for your response. I tried doing it the way you suggested. However, I got the following error in the "make build" command. The end of the build says that the file "nosys.specs" was not found. Does anyone know of a solution to this problem? $ make buil CC generate_RDB3/src/isa.c CC generate_RDB3/src/Eth_PFE_LLD.c CC generate_RDB3/src/fci.c CC generate_RDB3/src/fci_core_autosar.c CC generate_RDB3/src/Serdes_Ipw_PBCfg.c CC generate_RDB3/src/pfe_bus_err_csr.c CC generate_RDB3/src/Eth_43_PFE_VS_0_PBcfg.c CC generate_RDB3/src/fifo.c CC generate_RDB3/src/pfe_ecc_err_csr.c CC generate_RDB3/src/elf.c CC generate_RDB3/src/Rtc_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_rtable.c CC generate_RDB3/src/Platform_Ipw_Cfg.c CC generate_RDB3/src/fci_rt_db.c CC generate_RDB3/src/pfe_tmu.c CC generate_RDB3/src/pfe_emac_slave.c CC generate_RDB3/src/fci_fp.c CC generate_RDB3/src/fci_mirror.c CC generate_RDB3/src/Platform_Cfg.c CC generate_RDB3/src/pfe_emac_csr.c CC generate_RDB3/src/pfe_phy_if.c CC generate_RDB3/src/pfe_bus_err.c CC generate_RDB3/src/Dma_Ip_VS_0_PBcfg.c CC generate_RDB3/src/libfci_autosar.c CC generate_RDB3/src/fci_qos.c CC generate_RDB3/src/pfe_host_fail_stop_csr.c CC generate_RDB3/src/fci_l2br_domains.c CC generate_RDB3/src/pfe_wdt_csr.c CC generate_RDB3/src/pfe_fw_feature.c CC generate_RDB3/src/OsIf_Cfg.c CC generate_RDB3/src/pfe_hm.c CC generate_RDB3/src/Serdes_Ip_PBCfg.c CC generate_RDB3/src/oal_irq_autosar.c CC generate_RDB3/src/Clock_Ip_Cfg.c CC generate_RDB3/src/Power_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_hif_ring.c CC generate_RDB3/src/oal_time_autosar.c CC generate_RDB3/src/pfe_fw_fail_stop_csr.c CC generate_RDB3/src/pfe_log_if.c CC generate_RDB3/src/IntCtrl_Ip_Cfg.c CC generate_RDB3/src/pfe_emac.c CC generate_RDB3/src/pfe_gpi_csr.c CC generate_RDB3/src/fci_routes.c CC generate_RDB3/src/Gpt_VS_0_PBcfg.c CC generate_RDB3/src/pfe_class.c CC generate_RDB3/src/pfe_bmu.c CC generate_RDB3/src/pfe_minihif_drv.c CC generate_RDB3/src/pfe_hif_nocpy_csr.c CC generate_RDB3/src/pfe_log_if_slave.c CC generate_RDB3/src/Siul2_Port_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_platform_slave.c CC generate_RDB3/src/Port_Cfg.c CC generate_RDB3/src/pfe_l2br_table.c CC generate_RDB3/src/Mcu_VS_0_PBcfg.c CC generate_RDB3/src/pfe_phy_if_slave.c CC generate_RDB3/src/nxp_snprintf.c CC generate_RDB3/src/fci_l2br.c CC generate_RDB3/src/pfe_fw_fail_stop.c CC generate_RDB3/src/Ram_Ip_Cfg.c CC generate_RDB3/src/Mcu_Cfg.c CC generate_RDB3/src/pfe_gpi.c CC generate_RDB3/src/pfe_host_fail_stop.c CC generate_RDB3/src/oal_job_autosar.c CC generate_RDB3/src/pfe_util.c CC generate_RDB3/src/Ftm_Gpt_Ip_VS_0_PBcfg.c CC generate_RDB3/src/fci_connections.c CC generate_RDB3/src/pfe_if_db.c CC generate_RDB3/src/Eth_43_PFE_Cfg.c CC generate_RDB3/src/pfe_bmu_csr.c CC generate_RDB3/src/pfe_fail_stop_csr.c CC generate_RDB3/src/pfe_l2br.c CC generate_RDB3/src/CDD_Mcl_Cfg.c CC generate_RDB3/src/Stm_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_feature_mgr.c CC generate_RDB3/src/pfe_util_csr.c CC generate_RDB3/src/Gpt_Ipw_VS_0_PBcfg.c CC generate_RDB3/src/pfe_hw_feature.c CC generate_RDB3/src/pfe_idex.c CC generate_RDB3/src/pfe_hif_ptp.c CC generate_RDB3/src/fci_fp_db.c CC generate_RDB3/src/Dma_Ip_Cfg.c CC generate_RDB3/src/pfe_hif_csr.c CC generate_RDB3/src/pfe_fail_stop.c CC generate_RDB3/src/pfe_fp.c CC generate_RDB3/src/pfe_mirror.c CC generate_RDB3/src/pfe_platform_master.c CC generate_RDB3/src/oal_mm_autosar.c CC generate_RDB3/src/pfe_parity_csr.c CC generate_RDB3/src/pfe_wdt.c CC generate_RDB3/src/Power_Ip_Cfg.c CC generate_RDB3/src/oal_util_net_autosar.c CC generate_RDB3/src/pfe_hif_chnl.c CC generate_RDB3/src/Serdes_Cfg.c CC generate_RDB3/src/Clock_Ip_VS_0_PBcfg.c CC generate_RDB3/src/fci_interfaces.c CC generate_RDB3/src/pfe_hif.c CC generate_RDB3/src/fci_owner.c CC generate_RDB3/src/fci_fw_features.c CC generate_RDB3/src/Eth_43_PFE_Irq.c CC generate_RDB3/src/pfe_hif_drv.c CC generate_RDB3/src/pfe_class_csr.c CC generate_RDB3/src/Eth_43_PFE.c CC generate_RDB3/src/EthIf_Cbk.c CC generate_RDB3/src/pfe_parity.c CC generate_RDB3/src/CDD_Mcl_VS_0_PBcfg.c CC generate_RDB3/src/Pit_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_hif_nocpy.c CC generate_RDB3/src/fci_hm.c CC generate_RDB3/src/Port_VS_0_PBcfg.c CC generate_RDB3/src/pfe_ecc_err.c CC generate_RDB3/src/oal_util_autosar.c CC generate_RDB3/src/pfe_pe.c CC generate_RDB3/src/pfe_mac_db.c CC generate_RDB3/src/blalloc.c CC generate_RDB3/src/autolibc.c CC generate_RDB3/src/Gpt_Cfg.c CC generate_RDB3/src/fci_timer_owner.c CC generate_RDB3/src/Ram_Ip_VS_0_PBcfg.c CC generate_RDB3/src/pfe_tmu_csr.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/nvic.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/sys_init.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/system.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/m7/startup.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/startup/src/m7/exceptions.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Interrupts.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Timer_System.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Timer_System_Internal_Systick.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Timer.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/BaseNXP_TS_T40D11M40I2R0/src/OsIf_Timer_System_Internal_GenericTimer.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Det_TS_T40D11M40I2R0/src/Det_stub.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Det_TS_T40D11M40I2R0/src/Det.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Dem_TS_T40D11M40I2R0/src/Dem_stub.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Dem_TS_T40D11M40I2R0/src/Dem.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Gpt.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Pit_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Ftm_Gpt_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Stm_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Rtc_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Gpt_TS_T40D11M40I2R0/src/Gpt_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Selector.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Data.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Data2.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Frequency2.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Specific.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_ExtOsc.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Frequency1.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Specific2.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Irq.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Frequency.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_CortexM7.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Mcu_Dem_Wrapper.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Gate.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Ram_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Data1.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_FracDiv.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_DividerTrigger.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_IntOsc.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_CortexA.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Specific1.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_PMC.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_MSCM.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Monitor.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Mcu_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Divider.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_Private.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_MC_ME.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_ProgFreqSwitch.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Clock_Ip_Pll.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_MC_RGM.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Mcu.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Mcu_TS_T40D11M40I2R0/src/Power_Ip_MC_RGM_Irq.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Icu.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Fee.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Ocu.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Pmic.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Fr_43_LLCE.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Pwm.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Uart.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Fls.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Eth.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_I2c.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Port.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_EthTrcv_43_PHY.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Gpt.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Mcu.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Spi.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Can_43_LLCE.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Fr.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Ocotp.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Thermal.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Eth_43_PFE.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_EthSwt_43_SJA11XX.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Eep.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Mcl.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Adc.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Wdg.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Dio.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Qdec.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Serdes.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Rm.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Crypto.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Can.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Lin.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_CanTrcv_tja115x.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Ipcf.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Wdg_43_VR5510.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Rte_TS_T40D11M40I2R0/src/SchM_Crc.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Port_TS_T40D11M40I2R0/src/Siul2_Port_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Port_TS_T40D11M40I2R0/src/Port.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Port_TS_T40D11M40I2R0/src/Port_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/src/System_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/src/IntCtrl_Ip.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/src/Platform_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Platform_TS_T40D11M40I2R0/src/Platform.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/EthSwt_TS_T40D11M40I2R0/src/EthSwt.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/EthTrcv_TS_T40D11M40I2R0/src/EthTrcv.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Serdes_TS_T40D11M40I2R0/src/Serdes_Ip_HwAccess.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Serdes_TS_T40D11M40I2R0/src/Serdes.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Serdes_TS_T40D11M40I2R0/src/Serdes_Ipw.c CC C:/NXP/SW32G_RTD_4.4_4.0.2/eclipse/plugins/Serdes_TS_T40D11M40I2R0/src/Serdes_Ip.c LD output_RDB3/main_RDB3.elf C:/NXP/S32DS.3.5/S32DS/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/bin/arm-none-eabi-gcc.exe --entry=Reset_Handler -Tlinker/linker_maste r_app/autosar_intram.gld --sysroot="C:/NXP/S32DS.3.5/S32DS/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi/arm-none-eabi/newlib" -specs=nano .specs -specs=nosys.specs -nostartfiles -mcpu=cortex-m7 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ggdb3 -Wl,-Map,output_RDB3/main_ RDB3.map -lc -lm -lgcc -mlittle-endian output_RDB3/isa.o output_RDB3/Eth_PFE_LLD.o output_RDB3/fci.o output_RDB3/fci_core_autosar.o output_RDB3/Serdes_Ipw_PBCfg.o output_RDB3/pfe_bus_err_csr.o output_RDB3/Eth_43_PFE_VS_0_PBcfg.o output_RDB3/fifo.o output_RDB3/pfe_ ecc_err_csr.o output_RDB3/elf.o output_RDB3/Rtc_Ip_VS_0_PBcfg.o output_RDB3/pfe_rtable.o output_RDB3/Platform_Ipw_Cfg.o output_RDB3/ fci_rt_db.o output_RDB3/pfe_tmu.o output_RDB3/pfe_emac_slave.o output_RDB3/fci_fp.o output_RDB3/fci_mirror.o output_RDB3/Platform_Cf g.o output_RDB3/pfe_emac_csr.o output_RDB3/pfe_phy_if.o output_RDB3/pfe_bus_err.o output_RDB3/Dma_Ip_VS_0_PBcfg.o output_RDB3/libfci _autosar.o output_RDB3/fci_qos.o output_RDB3/pfe_host_fail_stop_csr.o output_RDB3/fci_l2br_domains.o output_RDB3/pfe_wdt_csr.o outpu t_RDB3/pfe_fw_feature.o output_RDB3/OsIf_Cfg.o output_RDB3/pfe_hm.o output_RDB3/Serdes_Ip_PBCfg.o output_RDB3/oal_irq_autosar.o outp ut_RDB3/Clock_Ip_Cfg.o output_RDB3/Power_Ip_VS_0_PBcfg.o output_RDB3/pfe_hif_ring.o output_RDB3/oal_time_autosar.o output_RDB3/pfe_f w_fail_stop_csr.o output_RDB3/pfe_log_if.o output_RDB3/IntCtrl_Ip_Cfg.o output_RDB3/pfe_emac.o output_RDB3/pfe_gpi_csr.o output_RDB3 /fci_routes.o output_RDB3/Gpt_VS_0_PBcfg.o output_RDB3/pfe_class.o output_RDB3/pfe_bmu.o output_RDB3/pfe_minihif_drv.o output_RDB3/p fe_hif_nocpy_csr.o output_RDB3/pfe_log_if_slave.o output_RDB3/Siul2_Port_Ip_VS_0_PBcfg.o output_RDB3/pfe_platform_slave.o output_RDB 3/Port_Cfg.o output_RDB3/pfe_l2br_table.o output_RDB3/Mcu_VS_0_PBcfg.o output_RDB3/pfe_phy_if_slave.o output_RDB3/nxp_snprintf.o out put_RDB3/fci_l2br.o output_RDB3/pfe_fw_fail_stop.o output_RDB3/Ram_Ip_Cfg.o output_RDB3/Mcu_Cfg.o output_RDB3/pfe_gpi.o output_RDB3/ pfe_host_fail_stop.o output_RDB3/oal_job_autosar.o output_RDB3/pfe_util.o output_RDB3/Ftm_Gpt_Ip_VS_0_PBcfg.o output_RDB3/fci_connec tions.o output_RDB3/pfe_if_db.o output_RDB3/Eth_43_PFE_Cfg.o output_RDB3/pfe_bmu_csr.o output_RDB3/pfe_fail_stop_csr.o output_RDB3/p fe_l2br.o output_RDB3/CDD_Mcl_Cfg.o output_RDB3/Stm_Ip_VS_0_PBcfg.o output_RDB3/pfe_feature_mgr.o output_RDB3/pfe_util_csr.o output_ RDB3/Gpt_Ipw_VS_0_PBcfg.o output_RDB3/pfe_hw_feature.o output_RDB3/pfe_idex.o output_RDB3/pfe_hif_ptp.o output_RDB3/fci_fp_db.o outp ut_RDB3/Dma_Ip_Cfg.o output_RDB3/pfe_hif_csr.o output_RDB3/pfe_fail_stop.o output_RDB3/pfe_fp.o output_RDB3/pfe_mirror.o output_RDB3 /pfe_platform_master.o output_RDB3/oal_mm_autosar.o output_RDB3/pfe_parity_csr.o output_RDB3/pfe_wdt.o output_RDB3/Power_Ip_Cfg.o ou tput_RDB3/oal_util_net_autosar.o output_RDB3/pfe_hif_chnl.o output_RDB3/Serdes_Cfg.o output_RDB3/Clock_Ip_VS_0_PBcfg.o output_RDB3/f ci_interfaces.o output_RDB3/pfe_hif.o output_RDB3/fci_owner.o output_RDB3/fci_fw_features.o output_RDB3/Eth_43_PFE_Irq.o output_RDB3 /pfe_hif_drv.o output_RDB3/pfe_class_csr.o output_RDB3/Eth_43_PFE.o output_RDB3/EthIf_Cbk.o output_RDB3/pfe_parity.o output_RDB3/CDD _Mcl_VS_0_PBcfg.o output_RDB3/Pit_Ip_VS_0_PBcfg.o output_RDB3/pfe_hif_nocpy.o output_RDB3/fci_hm.o output_RDB3/Port_VS_0_PBcfg.o out put_RDB3/pfe_ecc_err.o output_RDB3/oal_util_autosar.o output_RDB3/pfe_pe.o output_RDB3/pfe_mac_db.o output_RDB3/blalloc.o output_RDB 3/autolibc.o output_RDB3/Gpt_Cfg.o output_RDB3/fci_timer_owner.o output_RDB3/Ram_Ip_VS_0_PBcfg.o output_RDB3/pfe_tmu_csr.o output_RD B3/nvic.o output_RDB3/sys_init.o output_RDB3/system.o output_RDB3/startup.o output_RDB3/exceptions.o output_RDB3/OsIf_Interrupts.o o utput_RDB3/OsIf_Timer_System.o output_RDB3/OsIf_Timer_System_Internal_Systick.o output_RDB3/OsIf_Timer.o output_RDB3/OsIf_Timer_Syst em_Internal_GenericTimer.o output_RDB3/Det_stub.o output_RDB3/Det.o output_RDB3/Dem_stub.o output_RDB3/Dem.o output_RDB3/Gpt.o outpu t_RDB3/Pit_Ip.o output_RDB3/Ftm_Gpt_Ip.o output_RDB3/Stm_Ip.o output_RDB3/Rtc_Ip.o output_RDB3/Gpt_Ipw.o output_RDB3/Clock_Ip_Select or.o output_RDB3/Clock_Ip_Data.o output_RDB3/Clock_Ip_Data2.o output_RDB3/Clock_Ip_Frequency2.o output_RDB3/Clock_Ip_Specific.o outp ut_RDB3/Power_Ip.o output_RDB3/Clock_Ip_ExtOsc.o output_RDB3/Clock_Ip.o output_RDB3/Clock_Ip_Frequency1.o output_RDB3/Clock_Ip_Speci fic2.o output_RDB3/Clock_Ip_Irq.o output_RDB3/Clock_Ip_Frequency.o output_RDB3/Power_Ip_CortexM7.o output_RDB3/Mcu_Dem_Wrapper.o out put_RDB3/Clock_Ip_Gate.o output_RDB3/Ram_Ip.o output_RDB3/Clock_Ip_Data1.o output_RDB3/Clock_Ip_FracDiv.o output_RDB3/Clock_Ip_Divid erTrigger.o output_RDB3/Clock_Ip_IntOsc.o output_RDB3/Power_Ip_CortexA.o output_RDB3/Clock_Ip_Specific1.o output_RDB3/Power_Ip_PMC.o output_RDB3/Power_Ip_MSCM.o output_RDB3/Clock_Ip_Monitor.o output_RDB3/Mcu_Ipw.o output_RDB3/Clock_Ip_Divider.o output_RDB3/Power_I p_Private.o output_RDB3/Power_Ip_MC_ME.o output_RDB3/Clock_Ip_ProgFreqSwitch.o output_RDB3/Clock_Ip_Pll.o output_RDB3/Power_Ip_MC_RG M.o output_RDB3/Mcu.o output_RDB3/Power_Ip_MC_RGM_Irq.o output_RDB3/SchM_Icu.o output_RDB3/SchM_Fee.o output_RDB3/SchM_Ocu.o output_ RDB3/SchM_Pmic.o output_RDB3/SchM_Fr_43_LLCE.o output_RDB3/SchM_Pwm.o output_RDB3/SchM_Uart.o output_RDB3/SchM_Fls.o output_RDB3/Sch M_Eth.o output_RDB3/SchM_I2c.o output_RDB3/SchM_Port.o output_RDB3/SchM_EthTrcv_43_PHY.o output_RDB3/SchM_Gpt.o output_RDB3/SchM_Mcu .o output_RDB3/SchM_Spi.o output_RDB3/SchM_Can_43_LLCE.o output_RDB3/SchM_Fr.o output_RDB3/SchM_Ocotp.o output_RDB3/SchM_Thermal.o o utput_RDB3/SchM_Eth_43_PFE.o output_RDB3/SchM_EthSwt_43_SJA11XX.o output_RDB3/SchM_Eep.o output_RDB3/SchM_Mcl.o output_RDB3/SchM_Adc .o output_RDB3/SchM_Wdg.o output_RDB3/SchM_Dio.o output_RDB3/SchM_Qdec.o output_RDB3/SchM_Serdes.o output_RDB3/SchM_Rm.o output_RDB3 /SchM_Crypto.o output_RDB3/SchM_Can.o output_RDB3/SchM_Lin.o output_RDB3/SchM_CanTrcv_tja115x.o output_RDB3/SchM_Ipcf.o output_RDB3/ SchM_Wdg_43_VR5510.o output_RDB3/SchM_Crc.o output_RDB3/Siul2_Port_Ip.o output_RDB3/Port.o output_RDB3/Port_Ipw.o output_RDB3/System _Ip.o output_RDB3/IntCtrl_Ip.o output_RDB3/Platform_Ipw.o output_RDB3/Platform.o output_RDB3/EthSwt.o output_RDB3/EthTrcv.o output_R DB3/Serdes_Ip_HwAccess.o output_RDB3/Serdes.o output_RDB3/Serdes_Ipw.o output_RDB3/Serdes_Ip.o output_RDB3/startup_cm7.o output_RDB3 /Vector_Table.o -o output_RDB3/main_RDB3.elf arm-none-eabi-gcc.exe: fatal error: cannot read spec file 'nosys.specs': No such file or directory compilation terminated. Makefile:627: recipe for target 'output_RDB3/main_RDB3.elf' failed make: *** [output_RDB3/main_RDB3.elf] Error 1 For this issue, I installed the Cygwin program from https://www.cygwin.com/install.html, then generated it using Cygdrive. Re: makefile error in PFE example Hello, @ Youngsoo_do Thanks for the question. Let me summarize the building steps for your reference: Install the following packages SW32G_RTD_4.4_4.0.2, PFE-DRV_S32G_M7_MCAL_1.2.0, PFE-FW_S32G_1.7.1 to your host. Create link file under $EB_PATH/links with the content: path=$SW32G_RTD_4.4_4.0.2_PATH Copy the plugin from PFE DIR: Eth_43…. to the $SW32G_RTD_4.4_4.0.2_PATH/eclipse/plugins Import the project: MasterProject_RDB3 to the EB Generate project code by EB, by default, the code path is shown below: After successfully generation, Copy generate_RDB3/* to $PFE-DRV_S32G_M7_MCAL_1.2.0\example_application Open the project_parameters.mk, At least modify the following part: change the path depending on your installation. GCC_DIR ?= c:/NXP/S32DS.3.5/S32DS/build_tools/gcc_v9.2/gcc-9.2-arm32-eabi #depend on your path TRESOS_DIR ?= C:/EB/tresos    # EB installation path PLUGINS_DIR ?= $RTD_4.0.2_installation_path/eclipse/plugins TRESOS_WORKSPACE_DIR ?= $(TRESOS_DIR)/workspace FW_DIR ?= $pfe_FW_installation_path Build the project by typing “make HW=RDB3” Hope it helps Best Regards Chenyin

GD3162栅极驱动器SC故障 你好，恩智浦， 发生短路故障时，INTB 从 5V 变为 2.5V 的原因可能是什么？SW 中是否存在任何原因？有任何可能性吗？ 回复：GD3162门极驱动器SC故障 你好 你能告诉我结果吗？此外，您能测试直接连接到微控制器的 INTB 吗？ 回复：GD3162门极驱动器SC故障 此外，连接到微型之前的 INTB 通过 10K 电阻从外部上拉至 5V 回复：GD3162门极驱动器SC故障 你好，仅供参考， 在我们的项目中，所有 INTB 引脚都连接到微型的一个引脚，这样如果任何一个栅极驱动器（三相电机的 6 个栅极（RH、YH、BH 和 RL、YL、BL））遇到故障，则所有栅极驱动器的 PWM 都会被切断。 在附图中，您可以看到 RL 栅极驱动器的 ISENSE 引脚应该通过 SC 故障检测相位过流切断，而 YL 栅极驱动器的 ISEN 应该通过 SC 故障检测直流过流切断。 在我们的案例中，每当 YL 的 ISEN 检测到直流总线过流切断时，这种情况下 INTB 就会变为 2.5V，而当发生相过流切断时，INTB 会进一步从 2.5 转变为 0。 我注意到你的观点，将 INTB 与微型断开并再次检查信号。

S32K312 IIC DMA slave mode maximum receiving length can only be 8 bytes Hi all  I am using the DMA function of the IIC slave, but the maximum length that IIC can receive at once is only 8 bytes. Data exceeding 8 bytes cannot be retrieved from the buffer. I have uploaded the project, can you help me identify the problem. Thanks Re: S32K312 IIC DMA slave mode maximum receiving length can only be 8 bytes Thank you for your help. Although there is a problem with this routine, it can be used to compare the errors in my current project. I have identified the cause Re: S32K312 IIC DMA slave mode maximum receiving length can only be 8 bytes Hi @Reyna_pan45  I have observed that the project is based on the application provided in Example S32K312 I2C Transmit & Receive Using DMA DS3.5 RTD300. Just to confirm, if no modifications are made to the project, presents the same behavior? Re: S32K312 IIC DMA slave mode maximum receiving length can only be 8 bytes As you said ：The number of bytes that can be transmitted per transfer is not restricted. The received data length I set is 18 bytes ，Why can't I receive data exceeding 8 bytes？ Re: S32K312 IIC DMA slave mode maximum receiving length can only be 8 bytes Hi @Reyna_pan45  The I2C bus specification defines that each byte transmitted on the SDA line must be 8 bits long. The number of bytes that can be transmitted per transfer is not restricted. While the hardware itself does not impose a limit on the read transfer size, it requires the software to queue multiple read commands for larger transfers. Currently, the driver can receive between 1 and 256 bytes of data, and it can also be configured to discard received data instead of storing it in the receive FIFO. BR, VaneB

S32G IDPS Hello, Please see below pic In green cycle, does that mean PFE is also doing pattern matching for IDPS? Thanks Re: S32G IDPS Hello, @JasonTseng Thanks for the questions. Yes, PFE could offer support to aid DoS attack prevention. Best Regards Chenyin

MC33771C idle state Hi, after power up (no CSB activity, I saw VCOM fixed on it) MC33771C consume 6mA. shouldn't it go to idle state? Thanks! Re: MC33771C idle state Hi Alessandro, please refer to the Figure 8. in the MC33771C full datasheet. The MC33771C can switch to Idle mode only from the INIT mode if the communication is not active. If the MC33771C is not initialized within 60s, then it switches to Idle mode. Please refer to the sections 9.3.2 and 9.3.3. From Normal mode you can send it to Sleep mode by software command. Please refer to section 9.3.4. With Best Regards, Jozef

Error while deploying the example code into S32K344-evk board while checking the Can example for S32K344-Evk board we are facing an issue while deploying into the board from MBDT. the error is, Building 'mrcanhubk344_can_s32ct': "C:\PROGRA~1\MATLAB\R2022b\bin\win64\gmake" -f mrcanhubk344_can_s32ct.mk -j all D:\CAN\Article 4 - MR-CANHUBK344_CAN\mrcanhubk344_can_s32ct_ert_rtw>set PATH=C:\MathWorks\MATLAB_Add_Ons\Toolboxes\NXP_MBDToolbox_S32K3xx\tools\build_tools\gcc_v10.2\gcc-10.2-arm32-eabi\bin;C:\Program Files\MATLAB\R2022b\bin\win64;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Windows\System32\OpenSSH\;C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common;C:\Program Files\NVIDIA Corporation\NVIDIA NvDLISR;C:\Program Files\Microsoft SQL Server\Client SDK\ODBC\110\Tools\Binn\;C:\Program Files (x86)\Microsoft SQL Server\120\Tools\Binn\;C:\Program Files\Microsoft SQL Server\120\Tools\Binn\;C:\Program Files\Microsoft SQL Server\120\DTS\Binn\;C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\;C:\Program Files\MATLAB\R2022b\runtime\win64;C:\Program Files\MATLAB\R2022b\bin;C:\Users\rajan\AppData\Local\Programs\Python\Python312\Scripts\;C:\Users\rajan\AppData\Local\Programs\Python\Python312\;C:\Users\rajan\AppData\Local\Microsoft\WindowsApps;C:\Users\rajan\AppData\Local\Programs\Microsoft VS Code\bin; D:\CAN\Article 4 - MR-CANHUBK344_CAN\mrcanhubk344_can_s32ct_ert_rtw>cd . D:\CAN\Article 4 - MR-CANHUBK344_CAN\mrcanhubk344_can_s32ct_ert_rtw>if "all" == "" ("C:\PROGRA~1\MATLAB\R2022b\bin\win64\gmake" -f mrcanhubk344_can_s32ct.mk -j all ) else ("C:\PROGRA~1\MATLAB\R2022b\bin\win64\gmake" -f mrcanhubk344_can_s32ct.mk -j all ) gmake: *** No rule to make target `D:/CAN/Article', needed by `Adc_Params.o'. Stop. D:\CAN\Article 4 - MR-CANHUBK344_CAN\mrcanhubk344_can_s32ct_ert_rtw>echo The make command returned an error of 2 The make command returned an error of 2 D:\CAN\Article 4 - MR-CANHUBK344_CAN\mrcanhubk344_can_s32ct_ert_rtw>exit /B 1 ### Build procedure for mrcanhubk344_can_s32ct aborted due to an error.    kindly help us to resolve this issue. Re: Error while deploying the example code into S32K344-evk board Thanks @robertv  That's solves the problem. but next we are facing another issue. kindly help us to solve the issue. I have posted in NXP community and listed in this post below, MBDT S32K146 license issue - NXP Community Re: Error while deploying the example code into S32K344-evk board Hello @ESAKKI_MBD ,  From the error you provided, I have a suggestion that might solve your issue. Could you please move the CAN example to a folder that does not contain spaces in the path?  If this does not solve your issue, let me know and I will try to find another solution.  Regards, Robert V

S32K144フラッシュエミュレーションEEPROM関連の問題 こんにちは！ フラッシュメモリを使ってEEPROMをシミュレートする際に問題が発生しました。シミュレートされたEEPROMの最大使用可能容量は、FlexRAM+FlexNVMの68KBでしょうか？また、EEPROMバックアップ領域に保存した後、書き込んだデータにアクセスするにはどうすればよいでしょうか？ポインタを使ってDFlashのベースに直接アクセスしようとしましたが、エラーが発生しました。解決方法をご教示ください。ありがとうございます。 Re: S32K144 フラッシュ EEPROM シミュレーション関連の問題 分かりました。ご協力ありがとうございました。 Re: S32K144 フラッシュ EEPROM シミュレーション関連の問題 つまり、フラッシュメモリを最大限に活用したい場合は、pflash+dflash という形でしか使えません。また、eeprom をシミュレートしたい場合は、pflash+4KB eeprom という形でしか使えないということですね。私の理解は正しいでしょうか？ Re: S32K144 フラッシュ EEPROM シミュレーション関連の問題 flexram 領域は単なる一時バッファであり、flexram に書き込まれたデータは flexnvm 領域に自動的にバックアップされ、flexnvm が保存できる flexram のデータの最大量は 4KB で、超過分は上書きされるという理解でよろしいでしょうか? この場合、スペースを最大限に活用したいのですが、flexnvmの4KBをEEPROMバックアップに使用し、残りの60KBをDFlashに使用してもよいでしょうか？

MS CAN S9KEA128 hi ,  we have a issue in CAN reception where we are using two 32bit filters and the masks for RTR bit  i.e mask register 3 and 7 are set to 0xFF still we are not able to receive the Extended id with RTR bit set.  Kinetis K Series MCUs Re: MS CAN S9KEA128 Hi @Shreyas_Bhat_Karkala, You can take as reference the document Using MSCAN on KE16Z MCU (AN12355) where you can find information regarding the two 32-bit identifier filters and extended data frame with a specific identifier, Also, you can find the KEA128 MSCAN driver from the following link MSCAN driver for Kinetis EA devices

iMX7ULP - Does not return a message to the A7 core when using RPMsg Hi I have tried to get the the "rpmsg_lite_str_echo_rtos" to work - and it works half the way... I have compiled and loaded the example into the CM4 processor. And after booting the EVK, and entered "modprobe imx_rpmsg_tty" at the command line of the A7 processor, I'm greeted with a message in serial terminal for the M4 saying: Nameservice sent, ready for incoming messages... Get Message From Master Side : "hello world!" [len : 12] If I send another message using: "echo test > /dev/ttyRPMSG30" this message is also received by the M4 processor - but I would expect the message to be echoed back to the A7 processor. I have tried "cat /dev/ttyRPMSG30" and also made a little script to read from the virtual port, but in either case nothing is returned. Am I reading the echoed message correct? The following code is from the "main_remote.c" of the example code. memcpy(tx_buf, app_buf, len); /* Echo back received message with nocopy send */ result = rpmsg_lite_send_nocopy(my_rpmsg, my_ept, remote_addr, tx_buf, len); if (result != 0) { assert(false); } /* Release held RPMsg rx buffer */ result = rpmsg_queue_nocopy_free(my_rpmsg, rx_buf); if (result != 0) { assert(false); }  it seems that the function "rpmsg_lite_send_nocopy" should send the message back to the A7 core. The function is returning a "0" which means that it will never get into the two if sentences? I have not tried to follow the the function "rpmsg_lite_send_nocopy" to see which output it can give in which situations... But does a "0" mean the function did not successfully send the message? BTW. why has the "multicore_examples" been removed from the latest SDK (SDK_24_12_00_EVK-MCIMX7ULP). The examples are included in SDK_2_16_000_EVK_MCIMX7ULP. i.MX7ULP Linux Re: iMX7ULP - Does not return a message to the A7 core when using RPMsg Hi @Manuel_Salas  Thanks for the answer. It was the detail about printing of the echo in the kernel debug I was missing - now it is also working for me. And also nice that you are pointing out in the driver code where the message it being printed out, since it might become useful later on, when I'm going to use this for communication between the two processors. best regards Henrik Re: iMX7ULP - Does not return a message to the A7 core when using RPMsg Hello @HenrikZ , I hope you are doing very well. You can see in the Linux driver code the function rpmsg_tty_cb, that the received data will be printed on the Kernel debug:   I tested it by my side and this is my result: CORTEX A side: You can see I sent the text "NXP Semiconductors" to Cortex M, and Cortex M sent back the same message as you can see on the log from rpmsg_tty_cb driver. And this is from Cortex M: Best regards, Salas.

NTAG I2C Pass-through with CLRC663 I am trying to test passthrough mode using NTAG-I2C+ dev kit for Arduino (OM23221ARD) to a CLRC663 reader running the SW297859 SDK, but have been unable to get any data written from the CLRC663 to the NTAG's SRAM buffer in passthrough. I've run the NfcrdlibEx9_NTagI2C example in SW297859 and this confirms that pass through is enabled on the NTAG. I've tried updating this block (see attached) to perform an ISO14443 exchange with the NTAG but the SRAM_I2C_READY of the NS_REG never gets set and if I dump the SRAM I don't see anything written. On the CLRC663 side I get a 0x201 error which looks like a timeout on waiting for a response (which makes sense since I don't currently have the NTAG sending anything back until the SRAM_I2C_READY gets set). Attached is the code change that I made. Can someone please point me the correct direction for performing an ISO14443 exchange with the NTAG? Or is it even possible to perform passthrough exchanges with the CLRC663 running SW297859 SDK since it doesn't support P2P? NFC Frontend Solutions Re: NTAG I2C Pass-through with CLRC663 Hi Fabian, Thanks for your help on this. We got bi-directional communication working with the fast-write commands using the CLRC663 and an Arduino connected to the NTAG. Attached are the code snippets that might save someone else some time in the future. Jeremy Re: NTAG I2C Pass-through with CLRC663 Hello sir, I believe this snippet from the Example may be helpful. Even if the implementation isn't for Pass-through. Unfortunately, as I mentioned we don't have an implementation at this moment as an example to share. My apologies for this. If you could please try using the Mful_fastRead() and the sector select. Which in this case would be sector 0. If you are having issues with the implementation please do not hesitate to share it with us to provide further support. Re: NTAG I2C Pass-through with CLRC663 I don't thing there is any issue with my configuration of the NTAG since I can see it working using the NXP Android reference app when I write to the NTAG then read back over I2C. I believe there is something I am missing on the CLRC663 side of things. I have tried phalMful_FastWrite() without success. Could you provide reference code of using phalMful_FastWrite() that I could use as a starting point? Re: NTAG I2C Pass-through with CLRC663 Hello sir, Unfortunately, we don't have the specific implementation using phpalI14443p4_Exchange() since the implementation in the Ex9_NTagI2C example is using the MIFARE Ultralight API for performing T2T interfacing, we recommend please adopt this practice as well. As recommended in the Datasheet, please use the FastRead command. The MfUl does have this function as: phalMful_FastRead() I'm sure you already have checked SW3647 and SW3648. But in SW3647, NTAG_I2C_Explorer_Demo is shown in CopyInterruptToSRAM() how we recommend copying the data into the SRAM for the CLRC663 to be able to read the passed values. In SW3648, there is a file called Ntag_I2C_Demo which shows the implementation for reading into the SRAM. It is required to check if the SRAM is ready before starting to read the actual memory since it could be blocked from the NFC side. I hope this information may be useful sir. Re: NTAG I2C Pass-through with CLRC663 I can get passthrough working using the NXP sample app for Android (not for iOS) so this implies the NC_REG is set correctly on the NTAG side. What I can't get working is the CLRC663 writing to NTAG via passthrough. void enablePassThroughRFToI2C() { // From NFC SDK // NTAG_SetTransferDir(ntagCoreStateHandle.ntagDriverHandle, RF_TO_I2C); { // ntag.writeRegister(Ntag::NC_REG, NTAG_NC_REG_MASK_PTHRU_ON_OFF, 0); ntag.writeRegister(Ntag::NC_REG, NTAG_NC_REG_MASK_TRANSFER_DIR, RF_TO_I2C); ntag.writeRegister(Ntag::NC_REG, NTAG_NC_REG_MASK_PTHRU_ON_OFF, 0x40); } For the CLRC663, as seen in the previous code snippet, I am prepending the APDU with: uint8_t writeSRAMCmd[] = {0xA6, 0xF0, 0xFF}; // Fast write to Start address of the SRAM block ..but this is not working. Could you provide sample code snippet for CLRC663 writing to the NTAG SRAM buffer? Re: NTAG I2C Pass-through with CLRC663 Hello sir, Thank you for sharing this code snippet. In order to implement the RF -> I2C writing, it is required to first serve the correct direction, and the FD pin in NC_REG. Please share this register configuration to double-check if this is correct. Please keep in mind that this configuration has to be done through I2C. The implementation of the start and end addresses looks good. I believe that the issue is with the register configurations, sir. Could you please check NC_REG values while in session? It is recommended to please implement a CRC when writing to the SRAM directly. Re: NTAG I2C Pass-through with CLRC663 I have tried variations of this with no success. For reference on the NTAG is powered from VCC and I can see data get written to SRAM successfully when using the Android NTAG I2C app so I believe my issue is isolated to what I am doing on the CLRC663. I am using the `./SW297859/Examples/NfcrdlibEx9_NTagI2C` example with the only change to the if block that deals with an NTAG in passthrough: /* check for Pass-through mode */ if ((bDataBuffer[0] & PTHRU_ON_OFF)) { LOG_DEBUG("Writing to NTAG"); uint8_t writeSRAMCmd[] = {0xA6, 0xF0, 0xFF}; // Fast right to Start address of the SRAM block uint8_t dataToWrite[] = {0xDE, 0xAD, 0xBE, 0xEF}; // Example data uint8_t sramWrite[sizeof(writeSRAMCmd) + sizeof(dataToWrite)]; memcpy(sramWrite, writeSRAMCmd, sizeof(writeSRAMCmd)); memcpy(sramWrite + sizeof(writeSRAMCmd), dataToWrite, sizeof(dataToWrite)); status = phpalI14443p4_Exchange(pHal, PH_EXCHANGE_DEFAULT, sramWrite, sizeof(sramWrite), NULL, 0); CHECK_STATUS(status); From the log statement I can see that we attempt to write something, but nothing shows up on the NTAG. I have tried manually appending a CRC as well as writing a full 64 bytes, but have been unable to get anything written. Could you give sample code of how I can write anything to the SRAM buffer? Re: NTAG I2C Pass-through with CLRC663 Hello sir, Yes the CLRC663 does support Ntag I2C passthrough. The issue is that the example from the NFC Reader Library is only, reading specific pages of the NTAG I2C. Once the passthrough is enabled in the NTAGI2C, the CLRC663 needs to read directly to sector 0, page address 0xF0. As mentioned in section 11.3.1 the use of Fast Read commands are recommended. Please keep in mind that both interfaces cannot be accessed at the same time and the status registers need to be implemented in your application using NS_REG. Also, keep in mind that in order to access SRAM is required to power on the device via VCC Unfortunately, we don't have a specific implementation for this in the Library examples. If you could please share your application output and/or implementation. We may be able to provide further help. Re: NTAG I2C Pass-through with CLRC663 Yes, I have looked at AN11579 and can get pass through working between the demo phone app and NTAG but not when using the CLRC663 as the Reader. It would be very helpful if you could tell if the CLRC663 is capable of pass through communications with NTAG I2C Plus to begin with? Re: NTAG I2C Pass-through with CLRC663 Hello, my name is Fabian, I've been assigned to support your case. Thank you for your interest in our products I'm not sure if you have already checked AN11579 is explains the respective configurations and some Block communications schemes for data transfer depending on the requirements of your project. At this point, it is difficult to detect what is wrong with your setup. Please help us by trying to follow the mentioned schemes and let us know if you are still having issues.  Please keep in mind that is very important to configure FD_ON and FD_OFF and get it's status while in session to correctly access the IC through the interfaces. Please let me know if this information is helpful.