Request for Additional Documentation for RD772BJBCANFDEVB, RD-K358BMU and RD33774CNC3EVB Hi NXP Team, We have procured the following NXP evaluation boards: RD772BJBCANFDEVB RD-K358BMU RD33774CNC3EVB Could you please provide access to any additional documentation available for these products, including: Schematics Hardware documentation Datasheets Reference manuals Software architecture documentation Example projects Protected application notes Any additional customer documentation Thank you. RD772BJBCANFDEVB , RD-K358BMU , RD33774CNC3EVB  Re: Request for Additional Documentation for RD772BJBCANFDEVB, RD-K358BMU and RD33774CNC3EVB Hi@sanket_dudhmand e your another case: https://community.nxp.com/t5/S32K/Understanding-Communication-Flow-between-RD772BJBCANFDEVB-RD/td-p/2391116   In fact, your question is related to HVBMS. I have placed the relevant download links below. You can download all the materials, including hardware and application notes, from the corresponding pages.   HVBMS Battery Junction Box Using CAN FD with MC33772C (BJB) https://www.nxp.com/design/design-center/development-boards-and-designs/RD772BJBCANFDEVB?#design-resources S32K358 Battery Management Unit (BMU) for High Voltage Battery Management System (HVBMS) Reference Design Board https://www.nxp.com/design/design-center/development-boards-and-designs/RD-K358BMU?#design-resources HVBMS Centralized Cell Monitoring Unit Using CAN (FD) with MC33774 (CMU) https://www.nxp.com/design/design-center/development-boards-and-designs/RD33774CNC3EVB?#design-resources Automotive Software Package Manager： https://www.nxp.com/design/design-center/development-boards-and-designs/app-autopackagemgr/software-package-manager:AUTO-SW-PACKAGE-MANAGER

v4l2h265enc 是否保留输入帧顺序？ 我们在 i.MX95 上使用 v4l2h265enc 进行实时元数据插入。 由于元数据是在编码器之后按访问单元注入的，因此我们需要知道输出访问单元的发出顺序是否与传入的原始帧的发出顺序不同。 i.MX95 HEVC编码器是否生成B帧？ 如果可以，V4L2 是否有控制选项可以禁用它们？ 能否保证输出访问单元保持与输入顺序一致？ 是否有推荐的低延迟配置？ 我们目前的流程如下： ... ! v4l2h265enc ! h265parse ! custom_sei_injector ! rtph265pay 先感谢您， 真挚地， LM Re: Does v4l2h265enc preserve input frame order? 你好， 1.根据参考手册，i.MX95 H.265/HEVC 编码仅生成 I/P 图像，不生成 B 帧。 2. 无需禁用它们。 3. 由于编码器只生成输入/输出图像，而不编码 B 帧，因此无需考虑重排序问题。 4. 低延迟调优应该侧重于实际的 V4L2 控制、DMA 缓冲区 I/O 和下游缓冲，而不是禁用 B 帧，您可以参考这篇文章： https://community.nxp.com/t5/i-MX-Graphics/i-MX95-VPU-H265-latency-and-performance-v4l2h265enc-v4l2h265dec/mp/2302467 顺祝商祺！ 

How to evaluate NPU tflite model on large dataset on MIMRT700 board? My question is as my tittle. I have tflite model, I converted to NPU tflite model. I checked that predictions from tflite model and NPU tflite model are different in some cases (not much). So I want to run evaluation NPU tflite model on the large dataset. Currently, I follow the sample tflm_cifar10_cm33_core0 to run inference NPU tflite model on  MIMRT700 and it works. But in this sample, we fixed image_data.h for static image (I do not use camera). I want to modify this sample for my new case "run evaluation NPU tflite model on the large dataset." I intend to use SD cards to save image and load it when inference as image_data.h. But I do not know where I can start I saw that MIMRT700 has 3 micro USB port: debug, eUSB and USB-OTG If you have any recommedation and suggestions, please share with me. If I manually run each image (build + flash), it will take much time. Re: How to evaluate NPU tflite model on large dataset on MIMRT700 board? @EdwinHz  Thank you for supporting me. The method with SD card is good. I am not good at hardware, so as my teamate's suggestion. How about this method that I mentioned above? Currently I follow step by steps to run inference with the sample tflm_cifar10_cm33_core0: - Copy image_data.h to sample - Click Build button - Click debug button, and click continue button to run inference. I discussed with my teammates and if I can run above via command line (build, and run inference) by using commands, so it is very good. Because if it works, I can create script to change image_data.h each time, build and run inference and get inference results back to PC. Do you have any comment on that? I mean that if NXP have guideline to build, flash and run sample tflm_cifar10_cm33_core0, I can customize easier. I am not good at hardware, so that I like this method (If NXP support this methods, I can create Python script to creata image_data.h each time, build, flash, run and get result back to PC, save to .csv file, e.t.c). I see other many vendors which support this method (build, flash and run, get result back to PC via command line). I think that NXP also supports this method. Re: How to evaluate NPU tflite model on large dataset on MIMRT700 board? Hi @nnxxpp, The example uses the static-header approach, as you mentioned. However, establishing a pipeline that leverages mounting images via an SD card would be much more suitable for large datasets: Have the images pre-loaded on the SD card, then mount the SD card, open the image list, and for each image: - Read into an input buffer - Run NPU inference - Write result on a "results.csv" file We currently do not have a sample code that exemplifies this, but you can refer to both the tflm_cifar10_cm33_core0 that you are using, as well as sdcard_fatfs example from the SDK, which already handles the initialization and card mounting, and has all the available APIs for SD card usage. I suggest you run and understand the sdcard example, and test reading a binary image file. Then, add the sd card components to the tflm example and import the SD card initialization and FatFs code, and finally replace the static image_data.h input with a buffer containing image info read using f_read() from the SD card. Having the images already stored in the tensor format would ease the process and prevent the use of JPEG/PNG decoding. BR, Edwin. Re: How to evaluate NPU tflite model on large dataset on MIMRT700 board? I want to add more information. Currently I follow step by steps to run inference with the sample tflm_cifar10_cm33_core0: - Copy image_data.h to sample - Click Build button - Click debug button, and click continue button to run inference. I discussed with my teammates and if I can run above via command line (build, and run inference) by using commands, so it is very good. Because if it works, I can create script to change image_data.h each time, build and run inference and get inference results back to PC. Do you have any comment on that? Thank you so much. Re: How to evaluate NPU tflite model on large dataset on MIMRT700 board? I also saw that MIMRT700 has SD card, if I can easily locate images on SDcard on load image to tflm_cifar10_cm33_core0 and save inference results on SD card, so it is very good. But to be honest, I do know how to start. I am not good at hardware.

Understanding Communication Flow between RD772BJBCANFDEVB, RD-K358BMU and RD33774CNC3EVB Hi NXP Team, We are evaluating the following NXP BMS evaluation boards: RD772BJBCANFDEVB (BJB) RD-K358BMU (BMU) RD33774CNC3EVB (CMU) While reviewing the available example software, we are unable to understand the complete communication flow between the BJB, BMU and CMU. We would appreciate clarification on the following: Overall communication sequence between the three boards. CAN messages exchanged between them. Signal flow from one board to another. Which software modules/files implement this communication. Whether any communication flow diagrams or architecture documents are available. Any documentation or application notes explaining the software communication flow would be greatly appreciated. Thank you. RD33774CNC3EVB , RD-K358BMU , RD772BJBCANFDEVB 

How to recover lost project config files of GUI Guider? An LCD screen with a resolution of 480*320 was used on the embedded T113 board. Initially, the UI design was carried out using the NXP GuiGuider software tool, which automatically generated a set of C codes. Later, the .guiguider project file was lost, and when I tried to open it again using the GuiGuider IDE software, it failed to load because the .guiguider project configuration file could not be found. Now, I can only modify the interface through the generated C codes, which is very non-intuitive and inefficient. I would like to ask everyone, is there any way to recover the .guiguider project configuration file from the C project code? Re: How to recover lost project config files of GUI Guider? Hi @wenzhang, Unfortunately, there is no real way of recovering the .guiguider project file from the C project code. These are technically independent from one another. the .guiguider file is used to have all the configuration that the GUI Guider application uses as input to be displayed as an editable project. On the other hand, the generated C code is GUI Guider's output, which is generated as LVGL configurations to display a GUI using this graphics library. If only some fine tuning is required, your best bet would likely be to create a new project roughly setting up the widget changes you need and then using this generated code as a reference to adjust the code on your original project. If the changes you need are more substantial, its likely a better idea to re-do the whole GUI on a new project in GUI Guider and let the tool handle the generation of the whole code once again. This would also enable you to update your GUI to the latest version of LVGL (v9.4.0) using the latest version of GUI Guider (v2.0.0). BR, Edwin.

了解 RD772BJBCANFDEVB、RD-K358BMU 和 RD33774CNC3EVB 之间的通信流程 您好，NXP团队： 我们正在评估以下NXP 电池管理系统评估板： RD772BJBCANFDEVB (BJB) RD-K358BMU（BMU） RD33774CNC3EVB（卡内基梅隆大学） 在审查现有示例软件时，我们无法理解 BJB、BMU 和 CMU 之间的完整通信流程。 我们希望您能就以下问题作出澄清： 三个董事会之间的整体沟通流程。 它们之间交换 CAN 消息。 信号从一个电路板流向另一个电路板。 哪些软件模块/文件实现了这种通信？ 是否有通信流程图或架构文档？ 任何解释软件通信流程的文档或应用笔记都将不胜感激。 谢谢。 RD33774CNC3EVB 、 RD-K358BMU 、 RD772BJBCANFDEVB

如何恢复 GUI Guider 丢失的项目配置文件？ 嵌入式 T113 板上使用了分辨率为 480*320 的 LCD 屏幕。最初，UI 设计是使用 NXP GuiGuider 软件工具完成的，该工具会自动生成一组 C 代码。后来，.guiguider项目文件丢失了，当我尝试使用 GuiGuider IDE 软件再次打开它时，由于 .guiguider 文件格式错误，加载失败。找不到项目配置文件。现在，我只能通过生成的 C 代码来修改界面，这非常不直观且效率低下。我想请问大家，有什么办法可以恢复 .guiguider 文件吗？从 C 项目代码中获取项目配置文件？ Re: How to recover lost project config files of GUI Guider? 嗨@wenzhang ， 遗憾的是，目前没有真正恢复 .guiguider 文件的方法。从 C 项目代码中提取的项目文件。从技术上讲，它们是彼此独立的。.guiguider该文件用于存储 GUI Guider 应用程序用作输入的所有配置，并将其显示为可编辑的项目。另一方面，生成的 C 代码是 GUI Guider 的输出，它是作为 LVGL 配置生成的，用于使用此图形库显示 GUI。 如果只需要进行一些微调，最好的办法可能是创建一个新项目，大致设置所需的组件更改，然后使用生成的代码作为参考，引用来调整原始项目的代码。 如果您需要进行的更改比较大，那么最好在 GUI Guider 中创建一个新项目，重新制作整个 GUI，并让该工具再次处理整个代码的生成。这样，您就可以使用最新版本的 GUI Guider (v2.0.0) 将您的 GUI 更新到最新版本的 LVGL (v9.4.0)。 BR， 埃德温。

S32 SDKリリース 数年前に開発された機器についても、部品表（SBOM）を作成する必要があります。これらのデバイスにはSDKのコードが含まれているため、SDKの異なるリリース一覧をまとめた概要はありますか? S32 SDK for S32K1 Re: S32 SDK Releases こんにちは、 @ABuelow さん。 残念ながら、リリースされたすべてのS32K1 SDKバージョンの完全なリストは持っていません。また、これらのリリースの中にはかなり古いものもあるため、多くは現在入手不可能となっています。 BR、VaneB

S32 SDK 版本 我们需要为几年前开发的设备创建 SBOM（软件物料清单）。由于这些设备包含来自 SDK 的一些代码，是否有概述列出了 SDK 的不同版本？ S32K1系列的S32SDK Re: S32 SDK Releases 嗨@ABuelow 遗憾的是，我们没有所有已发布的 S32K1 SDK 版本的完整列表。此外，由于其中一些版本年代久远，很多版本已经无法获取。 BR，VaneB

Does v4l2h265enc preserve input frame order? We use v4l2h265enc on i.MX95 for real-time metadata insertion. Since metadata is injected after the encoder on a per-access-unit basis, we need to know whether output access units can be emitted in a different order from incoming raw frames. Does the i.MX95 HEVC encoder generate B-frames? If yes, is there a V4L2 control to disable them? Can output access units be guaranteed to remain in input order? Is there a low-latency configuration recommended ? Our current pipeline looks like : ... ! v4l2h265enc ! h265parse ! custom_sei_injector ! rtph265pay Thank you in advance, Sincerely, LM Re: Does v4l2h265enc preserve input frame order? Hello, 1. According to reference manual, i.MX95 H.265/HEVC encode is I/P-picture only and B-frame are not generated. 2. There is no need to disable them.  3. Since the encoder only produces I/P pictures and does not encode B-frames, there is no reordering to consider 4. Low latency tuning should focus on actual V4L2 controls, DMA buffer IO, and downstream buffering rather than disabling B-frames, you can use this post as reference: https://community.nxp.com/t5/i-MX-Graphics/i-MX95-VPU-H265-latency-and-performance-v4l2h265enc-v4l2h265dec/m-p/2302467 Best regards. 

如何在MIMRT700板上使用大型数据集评估NPU tflite模型？ 我的问题如标题所示。 我有一个 tflite 模型，我把它转换成了 NPU tflite 模型。我检查发现，tflite 模型和 NPU tflite 模型的预测结果在某些情况下有所不同（但差别不大）。因此，我想在大数据集上运行 NPU tflite 模型评估。 目前，我按照示例tflm_cifar10_cm33_core0在 MIMRT700 上运行推理 NPU tflite 模型，并且运行正常。但在本示例中，我们针对静态图像修复了 image_data.h（我没有使用相机）。我想修改这个示例，以用于我的新案例“在大数据集上运行评估 NPU tflite 模型”。 我打算使用 SD 卡保存图像，并在推理时将其加载为 image_data.h。但我不知道该从何说起。 我看到MIMRT700有3个micro USB接口：调试接口、eUSB接口和USB-OTG接口。 如果您有任何建议或意见，请与我分享。如果我手动运行每个镜像（版本+刷写），那将非常耗时。 Re: How to evaluate NPU tflite model on large dataset on MIMRT700 board? @EdwinHz 谢谢你支持我。 使用SD卡的方法很好。我不擅长硬件，所以采纳了我队友的建议。 我上面提到的这种方法怎么样？ 目前我正在按照以下步骤使用样本tflm_cifar10_cm33_core0 进行推理： -将 image_data.h 复制到样本 - 点击“版本”按钮 - 点击调试按钮，然后点击继续按钮运行推理。 我和我的队友讨论过，如果我可以通过命令行使用命令来运行上述操作（版本和运行推理），那就非常好了。因为如果可行，我可以编写脚本每次修改 image_data.h 文件，构建并运行推理程序，并将推理结果返回到电脑上。您对此有何看法？ 我的意思是，如果 NXP 有构建、烧录和运行示例tflm_cifar10_cm33_core0 的指南，我可以更容易地进行自定义。我不太擅长硬件，所以我喜欢这种方法（如果NXP支持这种方法，我可以编写Python脚本，每次生成image_data.h文件，进行编译、烧录、运行并将结果返回到PC，保存为.csv文件）。文件等）。我看到很多其他厂商也支持这种方法（版本、刷写和运行，通过命令行将结果返回到 PC）。我认为恩智浦也支持这种方法。 Re: How to evaluate NPU tflite model on large dataset on MIMRT700 board? 嗨@nnxxpp ， 正如您所提到的，该示例采用了静态头文件方法。然而，对于大型数据集而言，建立一个利用 SD 卡挂载图像的流程会更加合适： 将图片预先加载到 SD 卡上，然后挂载 SD 卡，打开图片列表，并对每张图片执行以下操作： - 读入输入缓冲区 - 运行 NPU 推理 - 将结果写入“results.csv”文件文件 我们目前还没有示例代码来说明这一点，但您可以参考您正在使用的 tflm_cifar10_cm33_core0，以及 SDK 中的 sdcard_fatfs 示例，该示例已经处理了初始化和卡挂载，并具有 SD 卡使用的所有可用 API。 我建议你运行并理解 sdcard 示例，并测试读取二进制图像文件。然后，将 SD 卡组件添加到 tflm 示例中，导入 SD 卡初始化和 FatFs 代码，最后替换静态的 image_data.h 文件。输入缓冲区，其中包含使用 f_read() 从 SD 卡读取的图像信息。 如果图像已经以张量格式存储，将简化处理过程，并避免使用 JPEG/PNG 解码。 BR， 埃德温。 Re: How to evaluate NPU tflite model on large dataset on MIMRT700 board? 我想补充更多信息。 目前我正在按照以下步骤使用样本tflm_cifar10_cm33_core0 进行推理： -将 image_data.h 复制到样本 - 点击“版本”按钮 - 点击调试按钮，然后点击继续按钮运行推理。 我和我的队友讨论过，如果我可以通过命令行使用命令来运行上述操作（版本和运行推理），那就非常好了。因为如果可行，我可以编写脚本每次修改 image_data.h 文件，构建并运行推理程序，并将推理结果返回到电脑上。您对此有何看法？太感谢了。 Re: How to evaluate NPU tflite model on large dataset on MIMRT700 board? 我还看到 MIMRT700 有 SD 卡，如果我能轻松地在 SD 卡上找到图像，并将图像加载到tflm_cifar10_cm33_core0并将推理结果保存到 SD 卡上，那就非常好了。 但说实话，我知道该如何开始。我不擅长硬件。

需要一个s32k396的关于etpu的demo 需要一个s32k396的关于etpu的demo，最好是rtd直接生成的 Re: 需要一个s32k396的关于etpu的demo Hi@大概 首先你要根据你所使用的RTD版本，先安装eptu组件 https://nxp.flexnetoperations.com/control/frse/product?child_plneID=609518&cert_num=822148827 上面下载页面中已经提供了一个例程，是基于EB Tresos的。 当你在S32 DS中安装完上面的组件之后，在S32 DS中也会提供一个例程。 最后，你也可以看一下我们S32K39x提供的电机方案，在下面的下载链接中有电机的例程，其中也包含了EPTU的用法，你可以参考。 https://www.nxp.com/design/design-center/development-boards-and-designs/MCSPTR2AK396

v4l2h265encは入力フレームの順序を保持しますか？ i.MX95では、リアルタイムのメタデータ挿入にv4l2h265encを使用しています。 メタデータはエンコーダの後にアクセスユニットごとに注入されるため、出力アクセスユニットが入力された生フレームとは異なる順序で送信できるかどうかを知る必要があります。 i.MX95 HEVCエンコーダーはBフレームを生成しますか？ はいの場合、それらを無効にするためのV4L2制御はありますか？ 出力アクセスユニットは入力順序を保つことはCAN? 低レイテンシの構成が推奨されていますか? 現在のパイプラインは以下のようになっています。 ... ! v4l2h265enc ! h265parse ! custom_sei_injector ! rtph265pay よろしくお願いします、 心から、 LM Re: Does v4l2h265enc preserve input frame order? こんにちは、 1.リファレンス・マニュアルによると、i.MX95 H.265/HEVCエンコードはI/P映像のみで、Bフレームは生成されません。 2. それらを無効にする必要はありません。 3. エンコーダはI/P画像のみを生成し、Bフレームをエンコードしないため、順序変更を考慮する必要はありません。 4. 低遅延チューニングは、Bフレームを無効にするのではなく、実際のV4L2コントロール、DMAバッファIO、下流バッファリングに焦点を当てるべきです。参考文献としてこちらの投稿を参考にしてください: https://community.nxp.com/t5/i-MX-Graphics/i-MX95-VPU-H265-latency-and-performance-v4l2h265enc-v4l2h265dec/mp/2302467 よろしくお願いいたします。 

I need a demo of S32K396 using an ETPU. I need a demo of an ETPU for S32K396, preferably generated directly from an RTD. Re: 需要一个s32k396的关于etpu的demo Hi@ probably First, you need to install the eptu component according to the RTD version you are using. https://nxp.flexnetoperations.com/control/frse/product?child_plneID=609518&cert_num=822148827 The download page above already provides a sample program based on EB Tresos. After you have installed the above components in S32 DS, a routine will also be provided in S32 DS. Finally, you can also take a look at the motor solutions provided by our S32K39x. The download link below contains motor examples, which also include the usage of EPTU, for your reference. https://www.nxp.com/design/design-center/development-boards-and-designs/MCSPTR2AK396

Undefined SD Card symbols using MCUxpresso 25.6 on FRDM-K64F Hi, I am having trouble getting the SD card software going. All I need to do is get a few items on power-up, no other active management of the SD Card,although I might need logging later on.. I am trying to use data type sd_card_t, and am getting 'unknown type name' error. I have previously included fsl_sd.h and fsl_sdhc.h. but when I do that I get a multiple definition message for many functions in either.  So I assumed that we don't need fsl_sd.h.   It isn't even in my SDK, so for the original multiple definiiton error I downloaded both from github.  Now I have fsl_sdhc.h from the SDK and am still getting the 'unknown type name' message.  Needless to say I am finding the SD card examples very hard to use! Any help would be very much appreciated! Re: Undefined SD Card symbols using MCUxpresso 25.6 on FRDM-K64F Hi @ve3id  Thank you for your post, Please Manage the SDK components in you project and add drivers-> sdhc and middleware->memories->SDMMC Stack->SD At the sdcard_polling example the following components are included: To enter into manage the SDK components you need right click the project and go to SDK Managment -> Manage SDK Components Let me know if this solves the issue.  Re: Undefined SD Card symbols using MCUxpresso 25.6 on FRDM-K64F Thank you for the quick reply, Carlos, but I have already done that, so maybe there is something else? Here is my window for the SD management: Re: Undefined SD Card symbols using MCUxpresso 25.6 on FRDM-K64F Hi @ve3id  Thanks for clarifying, Could you please share which SDK version you are using?  I tried with 2.11.0 and I'm not able to replicate it at my end.  Re: Undefined SD Card symbols using MCUxpresso 25.6 on FRDM-K64F I am using SDK_2.11.0_FRDM-K64F I removed it, and built and downloaded a new one of the same version using the "download and install sdks' tab and still have the same problem. thanks Nigel

imx95 在挂起到内存时关闭 vdd_soc 你好， 我们尝试在IDLE状态后关闭VDD_SOC。 例如在 m33 控制台上： lm 暂停 lm M7 挂起 闲置的 然后我们关闭 VDD SOC（通过设置 pf09 待机模式并关闭 VDD SOC） 然后松开备用销， m33 上的 VDD_SOC 从头开始，我们仍然节省了 RAM。 我们在 spl 中修改代码，使其在 bl31 中使用热启动路径，并成功启动到内核。 然而，之后内核就卡住了，您可以查看以下最新日志。 我想知道这两个案例之间可能存在哪些区别： - 正常挂起情况：（保留 vdd_soc） - 如果出现异常情况（vdd_soc 关闭），我们是否应该在 m33 启动时执行其他操作来重新初始化某些内容？ [2026-07-06 10:39:55.070]注意：BL31：已恢复 NS 上下文 [2026-07-06 10:39:55.074][ 1018.529356][T3251] 调用 its_restore_enable+0x0/0x1ac [2026-07-06 10:39:55.080][ 1018.529356][T3251] 调用 cpu_pm_resume+0x0/0x5c [2026-07-06 10:39:55.084][ 1018.529356][T3251] 调用 kvm_resume+0x0/0x68 [2026-07-06 10:39:55.089][ 1018.529356][T3251] 调用 irq_gc_resume+0x0/0x110 [2026-07-06 10:39:55.094][ 1018.529356][T3251] 调用 irq_pm_syscore_resume+0x0/0x24 [2026-07-06 10:39:55.100][ 1018.529356][T3251] 调用 timekeeping_resume+0x0/0x188 [2026-07-06 10:39:55.105][ 1018.529356][T3251] 调用 sched_clock_resume+0x0/0xd0 [2026-07-06 10:39:55.110][ 1018.529619][T3251] 启用非启动 CPU... [2026-07-06 10:39:55.142][ 1018.559214][T0] 在 CPU1 上检测到 VIPT 指令缓存 [2026-07-06 10:39:55.146][ 1018.559246][T0] GICv3：CPU1：找到分发器 100 区域 0:0x0000000048080000 [2026-07-06 10:39:55.154][ 1018.559293][T0] CPU1：已启动辅助处理器 0x0000000100 [0x412fd050] [2026-07-06 10:39:55.161][ 1018.560868][T3251] CPU1 已启动 [2026-07-06 10:39:55.191][ 1018.608610][T0] 在 CPU2 上检测到 VIPT 指令缓存 [2026-07-06 10:39:55.196][ 1018.608642][T0] GICv3：CPU2：找到重新分发器 200 区域 0:0x00000000480a0000 [2026-07-06 10:39:55.203][ 1018.608686][T0] CPU2：已启动辅助处理器 0x0000000200 [0x412fd050] [2026-07-06 10:39:55.210][ 1018.610091][T3251] CPU2 已启动 [2026-07-06 10:39:55.240][ 1018.657836][T0] 在 CPU3 上检测到 VIPT 指令缓存 [2026-07-06 10:39:55.245][ 1018.657870][T0] GICv3：CPU3：找到 redistributor 300 区域 0:0x00000000480c0000 [2026-07-06 10:39:55.253][ 1018.657917][T0] CPU3：已启动辅助处理器 0x0000000300 [0x412fd050] [2026-07-06 10:39:55.260][ 1018.659332][T3251] CPU3 已启动 [2026-07-06 10:39:55.289][ 1018.707065][T0] 在 CPU4 上检测到 VIPT 指令缓存 [2026-07-06 10:39:55.294][ 1018.707101][T0] GICv3：CPU4：找到 400 号分发器区域 0:0x00000000480e0000 [2026-07-06 10:39:55.302][ 1018.707151][T0] CPU4：已启动辅助处理器 0x0000000400 [0x412fd050] [2026-07-06 10:39:55.309][ 1018.708560][T3251] CPU4 已启动 [2026-07-06 10:39:55.339][ 1018.756298][T0] 在 CPU5 上检测到 VIPT 指令缓存 [2026-07-06 10:39:55.344][ 1018.756332][T0] GICv3：CPU5：找到 500 重分发器区域 0:0x0000000048100000 [2026-07-06 10:39:55.351][ 1018.756379][T0] CPU5：已启动辅助处理器 0x0000000500 [0x412fd050] [2026-07-06 10:39:55.359][ 1018.758206][T3251] CPU5 已启动 [2026-07-06 10:39:55.362][ 1018.781314][T3251] rpmsg-lifecycle rpmsg-lifecycle：PM：调用 rpmsg_lifecycle_resume_noirq @ 3251，父级：平台 [2026-07-06 10:39:55.373][ 1018.792078][T3251] rpmsg-lifecycle rpmsg-lifecycle：PM：rpmsg_lifecycle_resume_noirq 在 1 微秒后返回 0 [2026-07-06 10:39:55.383][ 1018.802181][T3251]arm-smmu-v3 490d0000.iommu：PM：调用 arm_smmu_resume [arm_smmu_v3] @ 3251，父级：49000000.总线 [2026-07-06 10:39:55.394][ 1018.812966][T3251]arm-smmu-v3 490d0000.iommu：PM：arm_smmu_resume [arm_smmu_v3] 在 60 微秒后返回 0 [2026-07-06 10:39:55.403][ 1018.822745][T3251] imx_mu 445b0000.mailbox:PM：正在调用 imx_mu_resume_noirq [imx_mailbox] @ 3251，父级：44000000.总线 [2026-07-06 10:39:55.414][ 1018.833538][T3251] imx_mu 445b0000.mailbox:PM：imx_mu_resume_noirq [imx_mailbox] 在 3 微秒后返回 0 [2026-07-06 10:39:55.424][ 1018.843279][T3251] imx_mu 47300000.mailbox:PM：调用 imx_mu_resume_noirq [imx_mailbox] @ 3251，父级：soc [2026-07-06 10:39:55.434][ 1018.853283][T3251] imx_mu 47300000.mailbox:PM：imx_mu_resume_noirq [imx_mailbox] 在 2 微秒后返回 0 [2026-07-06 10:39:55.444][ 1018.863029][T3251] imx_mu 47320000.mailbox:PM：调用 imx_mu_resume_noirq [imx_mailbox] @ 3251，父级：soc [2026-07-06 10:39:55.454][ 1018.873031][T3251] imx_mu 47320000.mailbox:PM：imx_mu_resume_noirq [imx_mailbox] 在 1 微秒后返回 0 [2026-07-06 10:39:55.464][ 1018.882772][T3251] imx_mu 47330000.mailbox:PM：调用 imx_mu_resume_noirq [imx_mailbox] @ 3251，父级：soc [2026-07-06 10:39:55.474][ 1018.892773][T3251] imx_mu 47330000.mailbox:PM：imx_mu_resume_noirq [imx_mailbox] 在 1 微秒后返回 0 [2026-07-06 10:39:55.483][ 1018.902513][T3251] imx_mu 47340000.mailbox:PM：调用 imx_mu_resume_noirq [imx_mailbox] @ 3251，父级：soc [2026-07-06 10:39:55.493][ 1018.912516][T3251] imx_mu 47340000.mailbox:PM：imx_mu_resume_noirq [imx_mailbox] 在 1 微秒后返回 0 [2026-07-06 10:39:55.503][ 1018.922256][T3251] imx_mu 47350000.mailbox:PM：调用 imx_mu_resume_noirq [imx_mailbox] @ 3251，父级：soc [2026-07-06 10:39:55.513][ 1018.932256][T3251] imx_mu 47350000.mailbox:PM：imx_mu_resume_noirq [imx_mailbox] 在 1 微秒后返回 0 [2026-07-06 10:39:55.523][ 1018.941998][T3251] imx_mu 47550000.mailbox:PM：调用 imx_mu_resume_noirq [imx_mailbox] @ 3251，父级：soc [2026-07-06 10:39:55.533][ 1018.952002][T3251] imx_mu 47550000.mailbox:PM：imx_mu_resume_noirq [imx_mailbox] 在 1 微秒后返回 0 [2026-07-06 10:39:55.542][ 1018.961770][T3251] imx_mu 42430000.mailbox:PM：正在调用 imx_mu_resume_noirq [imx_mailbox] @ 3251，父级：42000000.总线 [2026-07-06 10:39:55.553][ 1018.972548][T3251] imx_mu 42430000.mailbox:PM：imx_mu_resume_noirq [imx_mailbox] 在 0 微秒后返回 0 [2026-07-06 10:39:55.563][ 1018.982411][T3251] fsl-lpuart 42590000.serial:PM：调用 lpuart_resume_noirq [fsl_lpuart] @ 3251，父级：42000000.总线 [2026-07-06 10:39:55.574][ 1018.993375][T3251] fsl-lpuart 42590000.serial:PM：lpuart_resume_noirq [fsl_lpuart] 在 2 微秒后返回 0 [2026-07-06 10:39:55.584][ 1019.003326][T3251] fsl-lpuart 44380000.serial:PM：调用 lpuart_resume_noirq [fsl_lpuart] @ 3251，父级：44000000.总线 [2026-07-06 10:39:55.595][ 1019.014289][T3251] fsl-lpuart 44380000.serial:PM：lpuart_resume_noirq [fsl_lpuart] 在 4 微秒后返回 0 [2026-07-06 10:39:55.605][ 1019.024225][T3251] imx-lpi2c 42530000.i2c:PM：调用 lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251，父级：42000000.总线 [2026-07-06 10:39:55.616][ 1019.035009][T3251] imx-lpi2c 42530000.i2c:PM：lpi2c_resume_noirq [i2c_imx_lpi2c] 在 1 微秒后返回 0 [2026-07-06 10:39:55.626][ 1019.044756][T3251] imx-lpi2c 42540000.i2c:PM：调用 lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251，父级：42000000.总线 [2026-07-06 10:39:55.636][ 1019.055531][T3251] imx-lpi2c 42540000.i2c:PM：lpi2c_resume_noirq [i2c_imx_lpi2c] 在 0 微秒后返回 0 [2026-07-06 10:39:55.646][ 1019.065272][T3251] imx-lpi2c 426b0000.i2c:PM：调用 lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251，父级：42000000.总线 [2026-07-06 10:39:55.657][ 1019.076047][T3251] imx-lpi2c 426b0000.i2c:PM：lpi2c_resume_noirq [i2c_imx_lpi2c] 在 0 微秒后返回 0 [2026-07-06 10:39:55.667][ 1019.085794][T3251] imx-lpi2c 426c0000.i2c:PM：调用 lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251，父级：42000000.总线 [2026-07-06 10:39:55.677][ 1019.096567][T3251] imx-lpi2c 426c0000.i2c:PM：lpi2c_resume_noirq [i2c_imx_lpi2c] 在 0 微秒后返回 0 [2026-07-06 10:39:55.687][ 1019.106304][T3251] imx-lpi2c 426d0000.i2c:PM：调用 lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251，父级：42000000.总线 [2026-07-06 10:39:55.698][ 1019.117086][T3251] imx-lpi2c 426d0000.i2c:PM：lpi2c_resume_noirq [i2c_imx_lpi2c] 在 0 微秒后返回 0 [2026-07-06 10:39:55.708][ 1019.126830][T3251] imx-lpi2c 44350000.i2c:PM：调用 lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251，父级：44000000.总线 [2026-07-06 10:39:55.718][ 1019.137605][T3251] imx-lpi2c 44350000.i2c:PM：lpi2c_resume_noirq [i2c_imx_lpi2c] 在 0 微秒后返回 0 [2026-07-06 10:39:55.728][ 1019.147353][T3251] imx-irqsteer 4b0b0000.中断控制器：PM：调用 genpd_resume_noirq @ 3251，父级：soc [2026-07-06 10:39:55.738][ 1019.157693][T3251] PM：GENPD_RESUME_NOIRQ dev=4b0b0000.中断控制器domain=display task=kworker/4:5 pid=3251 [2026-07-06 10:39:55.749][ 1019.168295][T3251] SCMI_PD 功能域=13 状态=开启 任务=kworker/4:5 进程 ID=3251 Linux PMIC Re: imx95 turn off vdd_soc when suspend to ram 日志中没有错误，但 a55 就此停止运行。 正常情况下（未关闭vddsoc），它会继续运行。 我们试图降低睡眠模式下的功耗，因此我们尝试通过这种方式关闭 vddsoc，同时保持 RAM 的运行。 Re: imx95 turn off vdd_soc when suspend to ram 日志中似乎没有任何错误信息。是否关闭电压可能会导致电流消耗的差异。你注意到功耗方面有任何变化吗？为什么要关闭VDDSOC？

imx95はRAMへのサスペンド時にvdd_socをオフにする こんにちは、 アイドル状態になった後、VDD_SOCをオフにしようとしています。 例えば、m33コンソールでは次のようになります。 lm サスペンド lm M7 サスペンション アイドル 次に、vdd socをオフにします（pf09のスタンバイモードをvdd socオフに設定することによって）。 次にスタンバイピンを放します。 m33 の VDD_SOC は最初からやり直しますが、RAM は保存されたままです。 bl31でウォームブートパスを実行するようにsplのコードを変更し、カーネルへの起動に成功しました。 しかしその後、カーネルが詰まってしまい、以下の通りの「最新のログ」が確認できます。 2つのCASEで何が違うのか気になります。 - CASEノーマルサスペンド:(保持vdd_soc) - Case Abnormal(vdd_soc オフ) この場合、M33の起動時に何か再初期化するために別のことをすべきでしょうか? [2026-07-06 10:39:55.070]通知: BL31: ウォームレジュームNSコンテキストが復元されました [2026-07-06 10:39:55.074][ 1018.529356][T3251] its_restore_enable+0x0/0x1ac を呼び出しています [2026-07-06 10:39:55.080][ 1018.529356][T3251] cpu_pm_resume+0x0/0x5c を呼び出しています [2026-07-06 10:39:55.084][ 1018.529356][T3251] kvm_resume+0x0/0x68 を呼び出しています [2026-07-06 10:39:55.089][ 1018.529356][T3251] irq_gc_resume+0x0/0x110 を呼び出しています [2026-07-06 10:39:55.094][ 1018.529356][T3251] irq_pm_syscore_resume+0x0/0x24 を呼び出しています [2026-07-06 10:39:55.100][ 1018.529356][T3251] timekeeping_resume+0x0/0x188 を呼び出しています [2026-07-06 10:39:55.105][ 1018.529356][T3251] sched_clock_resume+0x0/0xd0 を呼び出しています [2026-07-06 10:39:55.110][ 1018.529619][T3251] ブート以外のCPUを有効にする... [2026-07-06 10:39:55.142][ 1018.559214][T0] CPU1でVIPT命令キャッシュを検出しました [2026-07-06 10:39:55.146][ 1018.559246][T0] GICv3: CPU1: 再分配器100の領域0:0x0000000048080000が見つかりました [2026-07-06 10:39:55.154][ 1018.559293][T0] CPU1: 起動済みのセカンダリプロセッサ0x0000000100 [0x412fd050] [2026-07-06 10:39:55.161][ 1018.560868][T3251] CPU1が起動しました [2026-07-06 10:39:55.191][ 1018.608610][T0] CPU2でVIPT命令キャッシュを検出しました [2026-07-06 10:39:55.196][ 1018.608642][T0] GICv3: CPU2: 再分配器200の領域0:0x00000000480a0000が見つかりました [2026-07-06 10:39:55.203][ 1018.608686][T0] CPU2:起動されたセカンダリプロセッサ0x0000000200 [0x412fd050] [2026-07-06 10:39:55.210][ 1018.610091][T3251] CPU2が起動しました [2026-07-06 10:39:55.240][ 1018.657836][T0] CPU3でVIPT命令キャッシュを検出しました [2026-07-06 10:39:55.245][ 1018.657870][T0] GICv3: CPU3: 再分配器300領域0:0x00000000480c0000が見つかりました [2026-07-06 10:39:55.253][ 1018.657917][T0] CPU3: 起動された二次プロセッサ0x0000000300 [0x412fd050] [2026-07-06 10:39:55.260][ 1018.659332][T3251] CPU3が起動しました [2026-07-06 10:39:55.289][ 1018.707065][T0] CPU4でVIPT Iキャッシュを検出しました [2026-07-06 10:39:55.294][ 1018.707101][T0] GICv3: CPU4: 再分配器400領域0:0x00000000480e0000が見つかりました [2026-07-06 10:39:55.302][ 1018.707151][T0] CPU4:セカンダリプロセッサ0x0000000400起動 [0x412fd050] [2026-07-06 10:39:55.309][ 1018.708560][T3251] CPU4が起動しました [2026-07-06 10:39:55.339][ 1018.756298][T0] CPU5でVIPT Iキャッシュを検出しました [2026-07-06 10:39:55.344][ 1018.756332][T0] GICv3: CPU5: 再分配器500領域0:0x0000000048100000が見つかりました [2026-07-06 10:39:55.351][ 1018.756379][T0] CPU5:起動したセカンダリプロセッサ0x0000000500 [0x412fd050] [2026-07-06 10:39:55.359][ 1018.758206][T3251] CPU5が起動しました [2026-07-06 10:39:55.362][ 1018.781314][T3251] rpmsg-ライフサイクル rpmsg-lifecycle: PM: 呼び出し rpmsg_lifecycle_resume_noirq @ 3251、親: プラットフォーム [2026-07-06 10:39:55.373][ 1018.792078][T3251] rpmsg-lifecycle rpmsg-lifecycle: PM: rpmsg_lifecycle_resume_noirq が 1 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.383][ 1018.802181][T3251] arm-smmu-v3 490d0000.iommu:PM: arm_smmu_resume [arm_smmu_v3] @ 3251 を呼び出し中、親プロセス: 49000000.bus [2026-07-06 10:39:55.394][ 1018.812966][T3251] arm-smmu-v3 490d0000.iommu:PM: arm_smmu_resume [arm_smmu_v3] が 60 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.403][ 1018.822745][T3251] imx_mu 445b0000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] @ 3251 を呼び出し中、親: 44000000.bus [2026-07-06 10:39:55.414][ 1018.833538][T3251] imx_mu 445b0000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] が 3 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.424][ 1018.843279][T3251] imx_mu 47300000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] @ 3251 を呼び出し中、親: soc [2026-07-06 10:39:55.434][ 1018.853283][T3251] imx_mu 47300000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] が 2 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.444][ 1018.863029][T3251] imx_mu 47320000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] @ 3251 を呼び出し中、親: soc [2026-07-06 10:39:55.454][ 1018.873031][T3251] imx_mu 47320000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] が 1 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.464][ 1018.882772][T3251] imx_mu 47330000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] @ 3251 を呼び出し中、親: soc [2026-07-06 10:39:55.474][ 1018.892773][T3251] imx_mu 47330000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] が 1 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.483][ 1018.902513][T3251] imx_mu 47340000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] @ 3251 を呼び出し中、親: soc [2026-07-06 10:39:55.493][ 1018.912516][T3251] imx_mu 47340000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] が 1 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.503][ 1018.922256][T3251] imx_mu 47350000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] @ 3251 を呼び出し中、親: soc [2026-07-06 10:39:55.513][ 1018.932256][T3251] imx_mu 47350000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] が 1 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.523][ 1018.941998][T3251] imx_mu 47550000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] @ 3251 を呼び出し中、親: soc [2026-07-06 10:39:55.533][ 1018.952002][T3251] imx_mu 47550000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] が 1 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.542][ 1018.961770][T3251] imx_mu 42430000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] @ 3251 を呼び出し中、親: 42000000.bus [2026-07-06 10:39:55.553][ 1018.972548][T3251] imx_mu 42430000.mailbox:PM: imx_mu_resume_noirq [imx_mailbox] が 0 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.563][ 1018.982411][T3251] fsl-lpuart 42590000.serial:PM: lpuart_resume_noirq [fsl_lpuart] @ 3251 を呼び出し中、親プロセス: 42000000.bus [2026-07-06 10:39:55.574][ 1018.993375][T3251] fsl-lpuart 42590000.serial:PM: lpuart_resume_noirq [fsl_lpuart] が 2 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.584][ 1019.003326][T3251] fsl-lpuart 44380000.serial:PM: lpuart_resume_noirq [fsl_lpuart] @ 3251 を呼び出し中、親プロセス: 44000000.bus [2026-07-06 10:39:55.595][ 1019.014289][T3251] fsl-lpuart 44380000.serial:PM: lpuart_resume_noirq [fsl_lpuart] が 4 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.605][ 1019.024225][T3251] imx-lpi2c 42530000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251 を呼び出し中、親: 42000000.bus [2026-07-06 10:39:55.616][ 1019.035009][T3251] imx-lpi2c 42530000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] が 1 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.626][ 1019.044756][T3251] imx-lpi2c 42540000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251 を呼び出し中、親: 42000000.bus [2026-07-06 10:39:55.636][ 1019.055531][T3251] imx-lpi2c 42540000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] が 0 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.646][ 1019.065272][T3251] imx-lpi2c 426b0000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251 を呼び出し中、親: 42000000.bus [2026-07-06 10:39:55.657][ 1019.076047][T3251] imx-lpi2c 426b0000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] が 0 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.667][ 1019.085794][T3251] imx-lpi2c 426c0000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251 を呼び出し中、親: 42000000.bus [2026-07-06 10:39:55.677][ 1019.096567][T3251] imx-lpi2c 426c0000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] が 0 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.687][ 1019.106304][T3251] imx-lpi2c 426d0000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251 を呼び出し中、親: 42000000.bus [2026-07-06 10:39:55.698][ 1019.117086][T3251] imx-lpi2c 426d0000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] が 0 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.708][ 1019.126830][T3251] imx-lpi2c 44350000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251 を呼び出し中、親: 44000000.bus [2026-07-06 10:39:55.718][ 1019.137605][T3251] imx-lpi2c 44350000.i2c:PM: lpi2c_resume_noirq [i2c_imx_lpi2c] が 0 マイクロ秒後に 0 を返しました [2026-07-06 10:39:55.728][ 1019.147353][T3251] imx-irqsteer 4b0b0000.interrupt-controller:PM: genpd_resume_noirq @ 3251 を呼び出し中、親: soc [2026-07-06 10:39:55.738][ 1019.157693][T3251] PM: GENPD_RESUME_NOIRQ dev=4b0b0000.interrupt-controllerドメイン=display タスク=kworker/4:5 pid=3251 [2026-07-06 10:39:55.749][ 1019.168295][T3251] SCMI_PD ディスプレイ ドメイン=13 状態=オン タスク=kworker/4:5 pid=3251 Linux PMIC Re: imx95 turn off vdd_soc when suspend to ram ログにはエラーは記録されていませんが、a55はそこで停止してしまいます。 通常の場合(vddsoCを切らさずに)、そのまま動作を続けます スリープモードでの消費電力を減らそうとしているので、この方法でvddsocをオフにしつつRAMは残しています。 Re: imx95 turn off vdd_soc when suspend to ram ログにはエラー情報がないようです。電圧を遮断するかどうかによって、消費電流に差が生じる可能性があります。消費電力に違いを感じますか？また、VDDSOCをオフにしたい理由は何ですか？

在 FRDM-K64F 上使用 MCUxpresso 25.6 时出现未定义的 SD 卡符号 您好， 我无法让SD卡软件正常运行。 我只需要在开机时加载一些项目，不需要对 SD 卡进行其他主动管理，虽然以后可能需要记录日志。 我尝试使用数据类型 sd_card_t，但出现“未知类型名称”错误。 我之前已经包含了 fsl_sd.h和 fsl_sdhc.h。但是当我这样做时，两个地方都出现了多个函数重复定义的错误信息。所以我认为我们不需要 fsl_sd.h。它甚至不在我的 SDK 中，所以对于最初的多重定义错误，我从 GitHub 下载了这两个文件。我现在有了 fsl_sdhc.h我从 SDK 中获取了资源，但仍然收到“未知类型名称”消息。毋庸置疑，我发现 SD 卡示例非常难用！ 非常感谢您的帮助！ Re: Undefined SD Card symbols using MCUxpresso 25.6 on FRDM-K64F 嗨@ve3id 感谢您的帖子。 请管理项目中的 SDK 元器件，并添加 drivers->sdhc 和 中间件->memories->SDMMC Stack->SD sdcard_polling 示例中包含了以下元器件： 要进入 SDK 元器件管理界面，您需要右键单击项目，然后转到“SDK 管理”->“管理 SDK 元器件”。 请告诉我这样是否解决了问题。 Re: Undefined SD Card symbols using MCUxpresso 25.6 on FRDM-K64F 谢谢你的快速回复，卡洛斯，但我已经这样做了，所以也许还有其他办法？这是我的SD卡管理窗口： Re: Undefined SD Card symbols using MCUxpresso 25.6 on FRDM-K64F 嗨@ve3id 谢谢你的解释。 请问您使用的是哪个SDK版本？ 我用 2.11.0 版本试过了，但我这边无法重现这个问题。 Re: Undefined SD Card symbols using MCUxpresso 25.6 on FRDM-K64F 我正在使用SDK_ 2.11.0_ FRDM-K64F 我卸载了它，然后使用“下载和安装 SDK”选项卡构建并下载了相同版本的新版本，但仍然遇到同样的问题。 谢谢！ 奈杰尔

imx95 turn off vdd_soc when suspend to ram Hi, We trying to turn off VDD_SOC after idle state. For example on m33 console: lm suspend lm M7 suspend idle Then we turn off vdd soc (by settingup pf09 stby mode with off vdd soc) Then release stby pin, VDD_SOC on m33 start from scratch and we still have RAM saved. We change code in spl to go for warm boot path in bl31 and sucessfully boot up to kernel. However then, kernel got stuck after that, you can see lastest log as follow. I wonder what can be differences between two cases: - case normal suspend: (keep vdd_soc) - case abnormal (vdd_soc off)  should we do something else on m33 startup for reinitialize some thing in this case? [2026-07-06 10:39:55.070] NOTICE: BL31: warm resume NS context restored [2026-07-06 10:39:55.074] [ 1018.529356][ T3251] Calling its_restore_enable+0x0/0x1ac [2026-07-06 10:39:55.080] [ 1018.529356][ T3251] Calling cpu_pm_resume+0x0/0x5c [2026-07-06 10:39:55.084] [ 1018.529356][ T3251] Calling kvm_resume+0x0/0x68 [2026-07-06 10:39:55.089] [ 1018.529356][ T3251] Calling irq_gc_resume+0x0/0x110 [2026-07-06 10:39:55.094] [ 1018.529356][ T3251] Calling irq_pm_syscore_resume+0x0/0x24 [2026-07-06 10:39:55.100] [ 1018.529356][ T3251] Calling timekeeping_resume+0x0/0x188 [2026-07-06 10:39:55.105] [ 1018.529356][ T3251] Calling sched_clock_resume+0x0/0xd0 [2026-07-06 10:39:55.110] [ 1018.529619][ T3251] Enabling non-boot CPUs ... [2026-07-06 10:39:55.142] [ 1018.559214][ T0] Detected VIPT I-cache on CPU1 [2026-07-06 10:39:55.146] [ 1018.559246][ T0] GICv3: CPU1: found redistributor 100 region 0:0x0000000048080000 [2026-07-06 10:39:55.154] [ 1018.559293][ T0] CPU1: Booted secondary processor 0x0000000100 [0x412fd050] [2026-07-06 10:39:55.161] [ 1018.560868][ T3251] CPU1 is up [2026-07-06 10:39:55.191] [ 1018.608610][ T0] Detected VIPT I-cache on CPU2 [2026-07-06 10:39:55.196] [ 1018.608642][ T0] GICv3: CPU2: found redistributor 200 region 0:0x00000000480a0000 [2026-07-06 10:39:55.203] [ 1018.608686][ T0] CPU2: Booted secondary processor 0x0000000200 [0x412fd050] [2026-07-06 10:39:55.210] [ 1018.610091][ T3251] CPU2 is up [2026-07-06 10:39:55.240] [ 1018.657836][ T0] Detected VIPT I-cache on CPU3 [2026-07-06 10:39:55.245] [ 1018.657870][ T0] GICv3: CPU3: found redistributor 300 region 0:0x00000000480c0000 [2026-07-06 10:39:55.253] [ 1018.657917][ T0] CPU3: Booted secondary processor 0x0000000300 [0x412fd050] [2026-07-06 10:39:55.260] [ 1018.659332][ T3251] CPU3 is up [2026-07-06 10:39:55.289] [ 1018.707065][ T0] Detected VIPT I-cache on CPU4 [2026-07-06 10:39:55.294] [ 1018.707101][ T0] GICv3: CPU4: found redistributor 400 region 0:0x00000000480e0000 [2026-07-06 10:39:55.302] [ 1018.707151][ T0] CPU4: Booted secondary processor 0x0000000400 [0x412fd050] [2026-07-06 10:39:55.309] [ 1018.708560][ T3251] CPU4 is up [2026-07-06 10:39:55.339] [ 1018.756298][ T0] Detected VIPT I-cache on CPU5 [2026-07-06 10:39:55.344] [ 1018.756332][ T0] GICv3: CPU5: found redistributor 500 region 0:0x0000000048100000 [2026-07-06 10:39:55.351] [ 1018.756379][ T0] CPU5: Booted secondary processor 0x0000000500 [0x412fd050] [2026-07-06 10:39:55.359] [ 1018.758206][ T3251] CPU5 is up [2026-07-06 10:39:55.362] [ 1018.781314][ T3251] rpmsg-lifecycle rpmsg-lifecycle: PM: calling rpmsg_lifecycle_resume_noirq @ 3251, parent: platform [2026-07-06 10:39:55.373] [ 1018.792078][ T3251] rpmsg-lifecycle rpmsg-lifecycle: PM: rpmsg_lifecycle_resume_noirq returned 0 after 1 usecs [2026-07-06 10:39:55.383] [ 1018.802181][ T3251] arm-smmu-v3 490d0000.iommu: PM: calling arm_smmu_resume [arm_smmu_v3] @ 3251, parent: 49000000.bus [2026-07-06 10:39:55.394] [ 1018.812966][ T3251] arm-smmu-v3 490d0000.iommu: PM: arm_smmu_resume [arm_smmu_v3] returned 0 after 60 usecs [2026-07-06 10:39:55.403] [ 1018.822745][ T3251] imx_mu 445b0000.mailbox: PM: calling imx_mu_resume_noirq [imx_mailbox] @ 3251, parent: 44000000.bus [2026-07-06 10:39:55.414] [ 1018.833538][ T3251] imx_mu 445b0000.mailbox: PM: imx_mu_resume_noirq [imx_mailbox] returned 0 after 3 usecs [2026-07-06 10:39:55.424] [ 1018.843279][ T3251] imx_mu 47300000.mailbox: PM: calling imx_mu_resume_noirq [imx_mailbox] @ 3251, parent: soc [2026-07-06 10:39:55.434] [ 1018.853283][ T3251] imx_mu 47300000.mailbox: PM: imx_mu_resume_noirq [imx_mailbox] returned 0 after 2 usecs [2026-07-06 10:39:55.444] [ 1018.863029][ T3251] imx_mu 47320000.mailbox: PM: calling imx_mu_resume_noirq [imx_mailbox] @ 3251, parent: soc [2026-07-06 10:39:55.454] [ 1018.873031][ T3251] imx_mu 47320000.mailbox: PM: imx_mu_resume_noirq [imx_mailbox] returned 0 after 1 usecs [2026-07-06 10:39:55.464] [ 1018.882772][ T3251] imx_mu 47330000.mailbox: PM: calling imx_mu_resume_noirq [imx_mailbox] @ 3251, parent: soc [2026-07-06 10:39:55.474] [ 1018.892773][ T3251] imx_mu 47330000.mailbox: PM: imx_mu_resume_noirq [imx_mailbox] returned 0 after 1 usecs [2026-07-06 10:39:55.483] [ 1018.902513][ T3251] imx_mu 47340000.mailbox: PM: calling imx_mu_resume_noirq [imx_mailbox] @ 3251, parent: soc [2026-07-06 10:39:55.493] [ 1018.912516][ T3251] imx_mu 47340000.mailbox: PM: imx_mu_resume_noirq [imx_mailbox] returned 0 after 1 usecs [2026-07-06 10:39:55.503] [ 1018.922256][ T3251] imx_mu 47350000.mailbox: PM: calling imx_mu_resume_noirq [imx_mailbox] @ 3251, parent: soc [2026-07-06 10:39:55.513] [ 1018.932256][ T3251] imx_mu 47350000.mailbox: PM: imx_mu_resume_noirq [imx_mailbox] returned 0 after 1 usecs [2026-07-06 10:39:55.523] [ 1018.941998][ T3251] imx_mu 47550000.mailbox: PM: calling imx_mu_resume_noirq [imx_mailbox] @ 3251, parent: soc [2026-07-06 10:39:55.533] [ 1018.952002][ T3251] imx_mu 47550000.mailbox: PM: imx_mu_resume_noirq [imx_mailbox] returned 0 after 1 usecs [2026-07-06 10:39:55.542] [ 1018.961770][ T3251] imx_mu 42430000.mailbox: PM: calling imx_mu_resume_noirq [imx_mailbox] @ 3251, parent: 42000000.bus [2026-07-06 10:39:55.553] [ 1018.972548][ T3251] imx_mu 42430000.mailbox: PM: imx_mu_resume_noirq [imx_mailbox] returned 0 after 0 usecs [2026-07-06 10:39:55.563] [ 1018.982411][ T3251] fsl-lpuart 42590000.serial: PM: calling lpuart_resume_noirq [fsl_lpuart] @ 3251, parent: 42000000.bus [2026-07-06 10:39:55.574] [ 1018.993375][ T3251] fsl-lpuart 42590000.serial: PM: lpuart_resume_noirq [fsl_lpuart] returned 0 after 2 usecs [2026-07-06 10:39:55.584] [ 1019.003326][ T3251] fsl-lpuart 44380000.serial: PM: calling lpuart_resume_noirq [fsl_lpuart] @ 3251, parent: 44000000.bus [2026-07-06 10:39:55.595] [ 1019.014289][ T3251] fsl-lpuart 44380000.serial: PM: lpuart_resume_noirq [fsl_lpuart] returned 0 after 4 usecs [2026-07-06 10:39:55.605] [ 1019.024225][ T3251] imx-lpi2c 42530000.i2c: PM: calling lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251, parent: 42000000.bus [2026-07-06 10:39:55.616] [ 1019.035009][ T3251] imx-lpi2c 42530000.i2c: PM: lpi2c_resume_noirq [i2c_imx_lpi2c] returned 0 after 1 usecs [2026-07-06 10:39:55.626] [ 1019.044756][ T3251] imx-lpi2c 42540000.i2c: PM: calling lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251, parent: 42000000.bus [2026-07-06 10:39:55.636] [ 1019.055531][ T3251] imx-lpi2c 42540000.i2c: PM: lpi2c_resume_noirq [i2c_imx_lpi2c] returned 0 after 0 usecs [2026-07-06 10:39:55.646] [ 1019.065272][ T3251] imx-lpi2c 426b0000.i2c: PM: calling lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251, parent: 42000000.bus [2026-07-06 10:39:55.657] [ 1019.076047][ T3251] imx-lpi2c 426b0000.i2c: PM: lpi2c_resume_noirq [i2c_imx_lpi2c] returned 0 after 0 usecs [2026-07-06 10:39:55.667] [ 1019.085794][ T3251] imx-lpi2c 426c0000.i2c: PM: calling lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251, parent: 42000000.bus [2026-07-06 10:39:55.677] [ 1019.096567][ T3251] imx-lpi2c 426c0000.i2c: PM: lpi2c_resume_noirq [i2c_imx_lpi2c] returned 0 after 0 usecs [2026-07-06 10:39:55.687] [ 1019.106304][ T3251] imx-lpi2c 426d0000.i2c: PM: calling lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251, parent: 42000000.bus [2026-07-06 10:39:55.698] [ 1019.117086][ T3251] imx-lpi2c 426d0000.i2c: PM: lpi2c_resume_noirq [i2c_imx_lpi2c] returned 0 after 0 usecs [2026-07-06 10:39:55.708] [ 1019.126830][ T3251] imx-lpi2c 44350000.i2c: PM: calling lpi2c_resume_noirq [i2c_imx_lpi2c] @ 3251, parent: 44000000.bus [2026-07-06 10:39:55.718] [ 1019.137605][ T3251] imx-lpi2c 44350000.i2c: PM: lpi2c_resume_noirq [i2c_imx_lpi2c] returned 0 after 0 usecs [2026-07-06 10:39:55.728] [ 1019.147353][ T3251] imx-irqsteer 4b0b0000.interrupt-controller: PM: calling genpd_resume_noirq @ 3251, parent: soc [2026-07-06 10:39:55.738] [ 1019.157693][ T3251] PM: GENPD_RESUME_NOIRQ dev=4b0b0000.interrupt-controller domain=display task=kworker/4:5 pid=3251 [2026-07-06 10:39:55.749] [ 1019.168295][ T3251] SCMI_PD display domain=13 state=on task=kworker/4:5 pid=3251 Linux PMIC Re: imx95 turn off vdd_soc when suspend to ram There are no error in the log, but a55 just stop there. In normal case (without turning of vddsoc), it continue to run We try to reduce more power consumption on sleep mode so we try this way to turn off vddsoc while keeping RAM. Re: imx95 turn off vdd_soc when suspend to ram it seem there are no error information at the log. Whether turn voltage off or not may lead to the current consumption difference. Do you notice any power consumption difference and why do you want to turn off VDDSOC？

imx93のTPM EXTCLK ALT機能でサポートされる最大パルス周波数 こんにちは、 TPM EXTCLK(tpm6)がサポートする最大パルス周波数を教えていただけますか。EXTCLK)IMX93プロセッサのピンについて? よろしくお願いいたします。 アヌシュリー Re: Maxmimum pulse frequency supported by TPM EXTCLK ALT function in imx93 i.MX93のTPM6 EXTCLK制限は、単体パッドの最大値として規定されているのではなく、TPMカウンタクロックを基準として規定されています。入力は使用前に同期されるため、外部クロックソースはTPMカウンタクロック周波数の半分未満でなければなりません。 tpm6_clk_root の場合、i.MX93 クロック ルート テーブルには最大周波数83.33 MHzが記載されています。したがって、TPM6がその最大速度でクロックされている場合、それがtpm6の実用的な上限となります。EXTCLKパルスは以下の通りです: TPM制御レジスタは、TPM6がEXTCLKの立ち上がりエッジ、または両方のエッジでカウントできることを確認し、信号はTPMカウンタークロックに同期されています。また、EXTCLKを選択した場合でも、TPMプリスケーラは引き続き使用されることに注意してください。 TPM6カウンタクロックが最大83.33MHzの場合にのみ<41.7MHzを使用し、それ以外の場合はEXTCLK < TPMカウンタクロック/2を使用します。