カスタマイズした U-Boot を i.mx9352 ボードに更新するにはどうすればよいですか?消去と NXP 様、i.mx9352 のボード上でカスタム変更された U-Boot を更新するプロセスについて問い合わせたいと思います。ボードを消去して、独自の U-Boot バージョンでフラッシュする方法を教えてください。 i.MX 93 では、複数の要素が必要です。 • imx-boot（imx-mkimageによって構築）には、SPL、U-Boot、Arm Trusted Firmware、OP-TEE、Sentinelが含まれています。 ファームウェア、DDR PHYファームウェア 現時点では、SPL、Arm Trusted Firmware、OP-TEE、Sentinel Firmware、DDR PHY Firmware を変更するつもりはなく、u-boot のみに変更を加えたいと思っています。u-boot をコンパイルすることによって生成されるどのファイルをボードのパーティションで更新する必要がありますか?参照できる手順はありますか?i.mx6u の場合、参照命令は「dd if=u-boot-imx6ull-14x14-ddr512-emmc.imx of=/dev/mmcblk1boot0 bs=1024 seek=1 conv=fsync」です。SO、i.mx93 の u-boot アップデート手順は何でしょうか?ご返信をお待ちしております。ありがとう、そして楽しい人生を。 Re: How can I update my customized U-Boot to the i.mx9352 board? What are the procedures for erasing こんにちは、 @orange-bear 。 この問題の解決策は見つかりましたか? imx93 でも同じ問題が発生しています。initramfs を起動した後に FBK ID がないので、uuu から FBK コマンドを実行できません。 Re: How can I update my customized U-Boot to the i.mx9352 board? What are the procedures for erasing イメージファイルとimx93-11x11-evk.dtbで問題が発生しました。evk_example_kernel_emmc.uuu を使用して 、独自のイメージファイルとimx93-11x11-evk.dtb をEVKボードに書き込も うとしました が、「Start handle command」の段階で停止してしまいます。TFTP を使用してこれらの2つのファイルをテストしたところ、正常に動作しました。 また、/run/media/boot-mmcblk0p1に置き換えて試したところ、問題なく動作しました。SO、evk_example_kernel_emmc.uuu を使用して独自のイメージファイルとimx93-11x11-evk.dtbをEVKボードに 書き込む場合 、カーネルとデバイスツリーのどの設定を変更する必要がありますか？ Re: How can I update my customized U-Boot to the i.mx9352 board? What are the procedures for erasing NXP iMX93 EVK 開発ボードと公式イメージ パッケージを使用します。example_kernel_emmc.uuu を使用すると、次の印刷された情報からもわかるように、好ましい結果が得られます。 ...... uuu fastboot cli[ 3.160728] read strings ent 1.0.0 [built [ 3.164686] read strings Aug 17 2022 19:49:14] Start init usb uuu fastboot client 1.0.0 [built Aug 17 2022 19:49:14] Start init usb write string write string Start handle command Start handle command run shell cmd: while [ ! -e /dev/mmcblk*boot0 ]; do sleep 1; echo "wait for /dev/mmcblk*boot* appear"; done; run shell cmd: dev=`ls /dev/mmcblk*boot*`; dev=($dev); dev=${dev[0]}; dev=${dev#/dev/mmcblk}; dev=${dev%boot*}; echo $dev > /tmp/mmcdev; run shell cmd: mmc=`cat /tmp/mmcdev`; dd if=/dev/zero of=/dev/mmcblk${mmc} bs=512 count=1 1+0 records in 1+0 records out 512 bytes copied, 0.00157254 s, 326 kB/s run shell cmd: mmc=`cat /tmp/mmcdev`; PARTSTR=$'10M,500M,0c\n600M,,83\n'; echo "$PARTSTR" | sfdisk --force /dev/mmcblk${mmc} Partition #1 contains a vfat signature. Partition #2 contains a ext3 signature. ミラーが次のシェル コマンドを実行しない理由がわかりません: while [ ! -e /dev/mmcblk*boot0 ]; do sleep 1; echo "Waiting for the appearance of /dev/mmcblk*boot*"; done; Re: How can I update my customized U-Boot to the i.mx9352 board? What are the procedures for erasing 申し訳ありませんが、あなたの意図を誤解していたようです。前回の発言を明確にさせてください。 imx-image-multimedia-imx93evk.wic ファイルを更新するのではなく、コマンドまたはスクリプトを使用して imx-image-multimedia-imx93evk.tar.zst を個別に更新したいと思います。 「fsl-image-mfgtool-initramfs-imx_mfgtools.cpio.zst.u-boot」入手したイメージ パッケージは、NXP の公式 Web サイトからのものです。これは、「example_kernel_emmc.uuu」の使用法に基づいています。現在、実行は「FB: acmd ${kboot} ${loadaddr} ${initrd_addr} ${fdt_addr} 」で停止します。 Re: How can I update my customized U-Boot to the i.mx9352 board? What are the procedures for erasing これらのログから、uuu のダウンロードはまだ完了していないようです。カーネル イメージをどのように処理するかはわかりません。 例の使用方法と同様に、実行したのと同じ以下のコマンドを試すこともCAN。ただし、少なくとも、読み込みと起動に関する現在の問題のトラブルシューティングにはCAN役立ちます。 uuu.exe -v -b emmc_all imx-boot-imx93evk-sd.bin-flash_singleboot imx-image-multimedia-imx93evk.wic よろしくお願いいたします。 Harvey Re: How can I update my customized U-Boot to the i.mx9352 board? What are the procedures for erasing ご返信ありがとうございます。 L6.1.1_1.0.0_MX93-BETA2/samples ディレクトリに、私の要件を満たす example_kernel_emmc.uuu というスクリプトがあることが分かりました。IMX93 と互換性を持たせるために example_kernel_emmc.uuu を変更しようとしています。 修正された example_kernel_emmc.uuu ファイルは次のとおりです。 uuu_version 1.2.39 # Please Replace below items with actually file names # @_flash.bin | boot loader, here is imx-boot-imx93evk-sd.bin-flash_singleboot # @_Image | kernel image, arm64 is Image, arm32 it is zImage, here is Image # @_board.dtb | board dtb file, here is imx93-11x11-evk.dtb # @_initramfs.cpio.gz.uboot | mfgtool init ramfs, here is fsl-image-mfgtool-initramfs-imx_mfgtools.cpio.zst.u-boot # @_rootfs.tar.zst | rootfs, here is imx-image-multimedia-imx93evk.tar.zst # @_uTee.tar | optee image, put dummy _uTee.tar file here if platform is not MX6/MX7* # This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ SDP: boot -f imx-boot-imx93evk-sd.bin-flash_singleboot # This command will be run when ROM support stream mode # i.MX8QXP, i.MX8QM SDPS: boot -f imx-boot-imx93evk-sd.bin-flash_singleboot # SDPU will be deprecated. please use SDPV instead of SDPU # { SDPU: delay 1000 SDPU: write -f imx-boot-imx93evk-sd.bin-flash_singleboot -offset 0x57c00 SDPU: jump # } # These commands will be run when use SPL and will be skipped if no spl # if (SPL support SDPV) # { SDPV: delay 1000 SDPV: write -f imx-boot-imx93evk-sd.bin-flash_singleboot -skipspl SDPV: jump # } # use uboot burn bootloader to eMMC # becaue difference chip, offset is difference # you can use kernel to do that for specific boards FB: ucmd setenv fastboot_dev mmc FB: ucmd setenv mmcdev ${emmc_dev} FB: flash bootloader imx-boot-imx93evk-sd.bin-flash_singleboot FB: ucmd if env exists emmc_ack; then ; else setenv emmc_ack 0; fi; FB: ucmd setenv emmc_cmd mmc partconf ${emmc_dev} ${emmc_ack} 1 0 FB: ucmd if test "${emmc_skip_fb}" != "yes"; then run emmc_cmd; fi FB: ucmd setenv emmc_cmd mmc bootbus ${emmc_dev} 2 0 1; FB: ucmd if test "${emmc_skip_fb}" != "yes"; then run emmc_cmd; fi FB: ucmd setenv fastboot_buffer ${loadaddr} FB: download -f Image FB: ucmd setenv fastboot_buffer ${fdt_addr} FB: download -f imx93-11x11-evk.dtb FB: ucmd setenv fastboot_buffer ${initrd_addr} FB: download -f fsl-image-mfgtool-initramfs-imx_mfgtools.cpio.zst.u-boot #FB: ucmd setenv bootargs console=${console},${baudrate} earlycon=${earlycon},${baudrate} FB: acmd ${kboot} ${loadaddr} ${initrd_addr} ${fdt_addr} # get mmc dev number from kernel command line # Wait for emmc FBK: ucmd while [ ! -e /dev/mmcblk*boot0 ]; do sleep 1; echo "wait for /dev/mmcblk*boot* appear"; done; # serach emmc device number, if your platform have more than two emmc chip, please echo dev number >/tmp/mmcdev FBK: ucmd dev=`ls /dev/mmcblk*boot*`; dev=($dev); dev=${dev[0]}; dev=${dev#/dev/mmcblk}; dev=${dev%boot*}; echo $dev > /tmp/mmcdev; # dd to clear the possible MBR FBK: ucmd mmc=`cat /tmp/mmcdev`; dd if=/dev/zero of=/dev/mmcblk${mmc} bs=512 count=1 # create partition FBK: ucmd mmc=`cat /tmp/mmcdev`; PARTSTR=$'10M,500M,0c\n600M,,83\n'; echo "$PARTSTR" | sfdisk --force /dev/mmcblk${mmc} FBK: ucmd mmc=`cat /tmp/mmcdev`; dd if=/dev/zero of=/dev/mmcblk${mmc} bs=1k seek=4096 count=1 FBK: ucmd sync # you can enable below command to write boot partition. but offset is difference at difference platform #FBK: ucmd mmc=`cat /tmp/mmcdev`; echo 0 > /sys/block/mmcblk${mmc}boot0/force_ro #FBK: ucp imx-boot-imx93evk-sd.bin-flash_singleboot t:/tmp #FBK: ucmd mmc=`cat /tmp/mmcdev`; dd if=/tmp/imx-boot-imx93evk-sd.bin-flash_singleboot of=/dev/mmc${mmc}boot0 bs=1K seek=32 #FBK: ucmd mmc=`cat /tmp/mmcdev`; echo 1 > /sys/block/mmcblk${mmc}boot0/force_ro FBK: ucmd mmc=`cat /tmp/mmcdev`; while [ ! -e /dev/mmcblk${mmc}p1 ]; do sleep 1; done FBK: ucmd mmc=`cat /tmp/mmcdev`; mkfs.vfat /dev/mmcblk${mmc}p1 FBK: ucmd mmc=`cat /tmp/mmcdev`; mkdir -p /mnt/fat FBK: ucmd mmc=`cat /tmp/mmcdev`; mount -t vfat /dev/mmcblk${mmc}p1 /mnt/fat FBK: ucp Image t:/mnt/fat FBK: ucp imx93-11x11-evk.dtb t:/mnt/fat #FBK: ucp _uTee.tar t:/tmp/op.tar FBK: ucmd tar --no-same-owner -xf /tmp/op.tar -C /mnt/fat FBK: ucmd umount /mnt/fat FBK: ucmd mmc=`cat /tmp/mmcdev`; mkfs.ext3 -F -E nodiscard /dev/mmcblk${mmc}p2 FBK: ucmd mkdir -p /mnt/ext3 FBK: ucmd mmc=`cat /tmp/mmcdev`; mount /dev/mmcblk${mmc}p2 /mnt/ext3 FBK: acmd export EXTRACT_UNSAFE_SYMLINKS=1; tar --zstd --warning=no-timestamp -x -C /mnt/ext3 FBK: ucp imx-image-multimedia-imx93evk.tar.zst t:- FBK: Sync FBK: ucmd umount /mnt/ext3 FBK: DONE ファイルの構造は次のように表されます。 example_kernel_emmc.uuu Image imx-boot-imx93evk-sd.bin-flash_singleboot fsl-image-mfgtool-initramfs-imx_mfgtools.cpio.zst.u-boot imx93-11x11-evk.dtb imx-image-multimedia-imx93evk.rootfs.tar.zst 書き込みプロセスのログ情報は次のとおりです。 U-Boot SPL 2022.04-lf_v2022.04+g7376547b9e (Mar 01 2023 - 07:35:40 +0000) SOC: 0xa0009300 LC: 0x40010 M33 prepare ok Normal Boot Trying to boot from BOOTROM Boot Stage: USB boot Find img info 0x&88000000, size 416 Download 1610752, Total size 1611776 NOTICE: BL31: v2.6(release):lf-6.1.1-1.0.0-0-g616a4588f NOTICE: BL31: Built : 10:31:38, Mar 1 2023 U-Boot 2022.04-lf_v2022.04+g7376547b9e (Mar 01 2023 - 07:35:40 +0000) CPU: i.MX93(52) rev1.0 1700 MHz (running at 1692 MHz) CPU: Consumer temperature grade (0C to 95C) at 46C Reset cause: POR (0x1) Model: NXP i.MX93 11X11 EVK board DRAM: 2 GiB tcpc_init: Can't find device id=0x52 setup_typec: tcpc portpd init failed, err=-19 tcpc_init: Can't find device id=0x51 setup_typec: tcpc port2 init failed, err=-19 tcpc_init: Can't find device id=0x50 setup_typec: tcpc port1 init failed, err=-19 pca953x gpio@22: Error reading output register Core: 204 devices, 28 uclasses, devicetree: separate MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from nowhere... OK [*]-Video Link 0adv7535_mipi2hdmi hdmi@3d: Can't find cec device id=0x3c fail to probe panel device hdmi@3d fail to get display timings probe video device failed, ret -19 [0] lcd-controller@4ae30000, video [1] dsi@4ae10000, video_bridge [2] hdmi@3d, panel adv7535_mipi2hdmi hdmi@3d: Can't find cec device id=0x3c fail to probe panel device hdmi@3d fail to get display timings probe video device failed, ret -19 In: serial Out: serial Err: serial BuildInfo: - ELE firmware version 0.0.9-9df0f503 MMC: no card present UID: 0x1d46516e 0xa9410d98 0x93a276bd 0xe691bc10 Detect USB boot. Will enter fastboot mode! Net: pca953x gpio@22: Error reading output register pca953x gpio@22: Error reading output register Warning: ethernet@42890000 (eth0) using random MAC address - d6:1f:33:20:03:1c pca953x gpio@22: Error reading output register pca953x gpio@22: Error reading output register Warning: ethernet@428a0000 (eth1) using random MAC address - 22:92:db:80:d8:ea eth0: ethernet@42890000, eth1: ethernet@428a0000 [PRIME] Fastboot: Normal Boot from USB for mfgtools *** Warning - Use default environment for mfgtools , using default environment Run bootcmd_mfg: run mfgtool_args;if iminfo ${initrd_addr}; then if test ${tee} = yes; then bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; else booti ${loadaddr} ${initrd_addr} ${fdt_addr}; fi; else echo "Run fastboot ..."; fastboot auto; fi; Hit any key to stop autoboot: 0 ## Checking Image at 83800000 ... Legacy image found Image Name: fsl-image-mfgtool-initramfs-imx8 Created: 2011-04-05 23:00:00 UTC Image Type: AArch64 Linux RAMDisk Image (uncompressed) Data Size: 11910836 Bytes = 11.4 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... Bad Data CRC Run fastboot ... auto usb 0 UID: 0x1d46516e 0xa9410d98 0x93a276bd 0xe691bc10 Detect USB boot. Will enter fastboot mode! flash target is MMC:1 MMC: no card present MMC card init failed! MMC: no card present ** Block device MMC 1 not supported Detect USB boot. Will enter fastboot mode! flash target is MMC:0 Starting download of 1876992 bytes .............. downloading of 1876992 bytes finished writing to partition 'bootloader' Initializing 'bootloader' switch to partitions #1, OK mmc0(part 1) is current device Writing 'bootloader' MMC write: dev # 0, block # 0, count 3666 ... 3666 blocks written: OK Writing 'bootloader' DONE! Detect USB boot. Will enter fastboot mode! Detect USB boot. Will enter fastboot mode! Detect USB boot. Will enter fastboot mode! Detect USB boot. Will enter fastboot mode! Set to BOOT_BUS_WIDTH = 0x2, RESET = 0x0, BOOT_MODE = 0x1 Detect USB boot. Will enter fastboot mode! Detect USB boot. Will enter fastboot mode! Starting download of 32117248 bytes .......................................................................... .......................................................................... .......................................................................... ....................... downloading of 32117248 bytes finished Detect USB boot. Will enter fastboot mode! Starting download of 43801 bytes downloading of 43801 bytes finished Detect USB boot. Will enter fastboot mode! Starting download of 11910900 bytes .......................................................................... ................ downloading of 11910900 bytes finished ## Loading init Ramdisk from Legacy Image at 83800000 ... Image Name: fsl-image-mfgtool-initramfs-imx8 Created: 2011-04-05 23:00:00 UTC Image Type: AArch64 Linux RAMDisk Image (uncompressed) Data Size: 11910836 Bytes = 11.4 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 83000000 Booting using the fdt blob at 0x83000000 Using Device Tree in place at 0000000083000000, end 000000008300db18 adv7535_mipi2hdmi hdmi@3d: Can't find cec device id=0x3c fail to probe panel device hdmi@3d fail to get display timings probe video device failed, ret -19 Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050] [ 0.000000] Linux version 6.1.1+g29549c7073bf (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 12.2.0, GNU ld (GNU Binutils) 2.39.0.20220819) #1 SMP PREEMPT Thu Mar 2 14:54:17 UTC 2023 [ 0.000000] Machine model: NXP i.MX93 11X11 EVK board [ 0.000000] efi: UEFI not found. [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000b0000000, size 256 MiB [ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a4020000, size 1 MiB [ 0.000000] OF: reserved mem: initialized node vdevbuffer@a4020000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a4120000, size 1 MiB [ 0.000000] OF: reserved mem: initialized node ele-reserved@a4120000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000c0000000, size 256 MiB [ 0.000000] OF: reserved mem: initialized node ethosu_region@C0000000, compatible id shared-dma-pool [ 0.000000] NUMA: No NUMA configuration found [ 0.000000] NUMA: Faking a node at [mem 0x0000000080000000-0x00000000ffffffff] [ 0.000000] NUMA: NODE_DATA [mem 0xffbd3700-0xffbd5fff] [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000080000000-0x00000000ffffffff] [ 0.000000] DMA32 empty [ 0.000000] Normal empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000080000000-0x0000000095ffffff] [ 0.000000] node 0: [mem 0x0000000098000000-0x00000000a3ffffff] [ 0.000000] node 0: [mem 0x00000000a4000000-0x00000000a421ffff] [ 0.000000] node 0: [mem 0x00000000a4220000-0x00000000ffffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000ffffffff] [ 0.000000] On node 0, zone DMA: 8192 pages in unavailable ranges [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.1 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: Trusted OS migration not required [ 0.000000] psci: SMC Calling Convention v1.2 [ 0.000000] percpu: Embedded 20 pages/cpu s44520 r8192 d29208 u81920 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: detected: GIC system register CPU interface [ 0.000000] CPU features: detected: Virtualization Host Extensions [ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923 [ 0.000000] alternatives: applying boot alternatives [ 0.000000] Fallback order for Node 0: 0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 507904 [ 0.000000] Policy zone: DMA [ 0.000000] Kernel command line: console=ttyLP0,115200 earlycon,115200 rdinit=/linuxrc clk_ignore_unused [ 0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) [ 0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear) [ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off [ 0.000000] Memory: 1453904K/2064384K available (19584K kernel code, 1604K rwdata, 6712K rodata, 3328K init, 644K bss, 86192K reserved, 524288K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU event tracing is enabled. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2. [ 0.000000] Trampoline variant of Tasks RCU enabled. [ 0.000000] Tracing variant of Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode [ 0.000000] GICv3: 960 SPIs implemented [ 0.000000] GICv3: 0 Extended SPIs implemented [ 0.000000] Root IRQ handler: gic_handle_irq [ 0.000000] GICv3: GICv3 features: 16 PPIs [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000048040000 [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. [ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns [ 0.000000] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns [ 0.000309] Console: colour dummy device 80x25 [ 0.000364] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000) [ 0.000373] pid_max: default: 32768 minimum: 301 [ 0.000413] LSM: Security Framework initializing [ 0.000484] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear) [ 0.000493] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear) [ 0.001211] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 0.001615] cblist_init_generic: Setting adjustable number of callback queues. [ 0.001624] cblist_init_generic: Setting shift to 1 and lim to 1. [ 0.001670] cblist_init_generic: Setting shift to 1 and lim to 1. [ 0.001788] rcu: Hierarchical SRCU implementation. [ 0.001791] rcu: Max phase no-delay instances is 1000. [ 0.002539] EFI services will not be available. [ 0.002685] smp: Bringing up secondary CPUs ... [ 0.003029] Detected VIPT I-cache on CPU1 [ 0.003095] cacheinfo: Unable to detect cache hierarchy for CPU 1 [ 0.003105] GICv3: CPU1: found redistributor 100 region 0:0x0000000048060000 [ 0.003142] CPU1: Booted secondary processor 0x0000000100 [0x412fd050] [ 0.003229] smp: Brought up 1 node, 2 CPUs [ 0.003234] SMP: Total of 2 processors activated. [ 0.003238] CPU features: detected: 32-bit EL0 Support [ 0.003240] CPU features: detected: 32-bit EL1 Support [ 0.003244] CPU features: detected: Data cache clean to the PoU not required for I/D coherence [ 0.003247] CPU features: detected: Common not Private translations [ 0.003249] CPU features: detected: CRC32 instructions [ 0.003253] CPU features: detected: RCpc load-acquire (LDAPR) [ 0.003255] CPU features: detected: LSE atomic instructions [ 0.003257] CPU features: detected: Privileged Access Never [ 0.003259] CPU features: detected: RAS Extension Support [ 0.003265] CPU features: detected: Speculative Store Bypassing Safe (SSBS) [ 0.003313] CPU: All CPU(s) started at EL2 [ 0.003315] alternatives: applying system-wide alternatives [ 0.007599] devtmpfs: initialized [ 0.012159] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.012179] futex hash table entries: 512 (order: 3, 32768 bytes, linear) [ 0.020304] pinctrl core: initialized pinctrl subsystem [ 0.021503] DMI not present or invalid. [ 0.021949] NET: Registered PF_NETLINK/PF_ROUTE protocol family [ 0.022749] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic allocations [ 0.022890] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations [ 0.022983] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations [ 0.023035] audit: initializing netlink subsys (disabled) [ 0.023191] audit: type=2000 audit(0.020:1): state=initialized audit_enabled=0 res=1 [ 0.023541] thermal_sys: Registered thermal governor 'step_wise' [ 0.023546] thermal_sys: Registered thermal governor 'power_allocator' [ 0.023575] cpuidle: using governor menu [ 0.023744] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 0.023789] ASID allocator initialised with 65536 entries [ 0.024382] Serial: AMBA PL011 UART driver [ 0.024424] imx mu driver is registered. [ 0.024435] imx rpmsg driver is registered. [ 0.029818] imx93-pinctrl 443c0000.pinctrl: initialized IMX pinctrl driver [ 0.036057] platform 4ae30000.lcd-controller: Fixing up cyclic dependency with 4ae10000.dsi [ 0.039167] KASLR disabled due to lack of seed [ 0.050510] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages [ 0.050519] HugeTLB: 16380 KiB vmemmap can be freed for a 1.00 GiB page [ 0.050522] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages [ 0.050524] HugeTLB: 508 KiB vmemmap can be freed for a 32.0 MiB page [ 0.050527] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages [ 0.050529] HugeTLB: 28 KiB vmemmap can be freed for a 2.00 MiB page [ 0.050532] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages [ 0.050534] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page [ 0.052231] ACPI: Interpreter disabled. [ 0.053090] iommu: Default domain type: Translated [ 0.053100] iommu: DMA domain TLB invalidation policy: strict mode [ 0.053318] SCSI subsystem initialized [ 0.053622] usbcore: registered new interface driver usbfs [ 0.053650] usbcore: registered new interface driver hub [ 0.053669] usbcore: registered new device driver usb [ 0.054429] mc: Linux media interface: v0.10 [ 0.054461] videodev: Linux video capture interface: v2.00 [ 0.054497] pps_core: LinuxPPS API ver. 1 registered [ 0.054500] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.054508] PTP clock support registered [ 0.054601] EDAC MC: Ver: 3.0.0 [ 0.055719] FPGA manager framework [ 0.055781] Advanced Linux Sound Architecture Driver Initialized. [ 0.056190] Bluetooth: Core ver 2.22 [ 0.056218] NET: Registered PF_BLUETOOTH protocol family [ 0.056220] Bluetooth: HCI device and connection manager initialized [ 0.056226] Bluetooth: HCI socket layer initialized [ 0.056230] Bluetooth: L2CAP socket layer initialized [ 0.056244] Bluetooth: SCO socket layer initialized [ 0.056579] vgaarb: loaded [ 0.057072] clocksource: Switched to clocksource arch_sys_counter [ 0.057247] VFS: Disk quotas dquot_6.6.0 [ 0.057275] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 0.057384] pnp: PnP ACPI: disabled [ 0.062200] NET: Registered PF_INET protocol family [ 0.062459] IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear) [ 0.063693] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear) [ 0.063721] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear) [ 0.063730] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear) [ 0.063799] TCP bind hash table entries: 16384 (order: 7, 524288 bytes, linear) [ 0.064220] TCP: Hash tables configured (established 16384 bind 16384) [ 0.064337] UDP hash table entries: 1024 (order: 3, 32768 bytes, linear) [ 0.064375] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear) [ 0.064523] NET: Registered PF_UNIX/PF_LOCAL protocol family [ 0.064896] RPC: Registered named UNIX socket transport module. [ 0.064902] RPC: Registered udp transport module. [ 0.064904] RPC: Registered tcp transport module. [ 0.064906] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.065481] PCI: CLS 0 bytes, default 64 [ 0.065671] Unpacking initramfs... [ 0.077164] hw perfevents: enabled with armv8_cortex_a55 PMU driver, 7 counters available [ 0.077791] kvm [1]: IPA Size Limit: 40 bits [ 0.077823] kvm [1]: GICv3: no GICV resource entry [ 0.077826] kvm [1]: disabling GICv2 emulation [ 0.077840] kvm [1]: GIC system register CPU interface enabled [ 0.077945] kvm [1]: vgic interrupt IRQ9 [ 0.077995] kvm [1]: VHE mode initialized successfully [ 0.079075] Initialise system trusted keyrings [ 0.079368] workingset: timestamp_bits=42 max_order=19 bucket_order=0 [ 0.083800] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.084377] NFS: Registering the id_resolver key type [ 0.084427] Key type id_resolver registered [ 0.084430] Key type id_legacy registered [ 0.084478] nfs4filelayout_init: NFSv4 File Layout Driver Registering... [ 0.084483] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... [ 0.084498] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc. [ 0.084799] 9p: Installing v9fs 9p2000 file system support [ 0.110306] Key type asymmetric registered [ 0.110323] Asymmetric key parser 'x509' registered [ 0.110421] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243) [ 0.110426] io scheduler mq-deadline registered [ 0.110430] io scheduler kyber registered [ 0.115631] EINJ: ACPI disabled. [ 0.121059] Bus freq driver module loaded [ 0.127423] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 0.130859] 44380000.serial: ttyLP0 at MMIO 0x44380010 (irq = 18, base_baud = 1500000) is a FSL_LPUART [ 0.579725] Freeing initrd memory: 11624K [ 0.587591] printk: console [ttyLP0] enabled [ 1.297743] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 1.307341] loop: module loaded [ 1.311565] of_reserved_mem_lookup() returned NULL [ 1.316484] megasas: 07.719.03.00-rc1 [ 1.321853] imx ahci driver is registered. [ 1.329636] tun: Universal TUN/TAP device driver, 1.6 [ 1.335399] thunder_xcv, ver 1.0 [ 1.338673] thunder_bgx, ver 1.0 [ 1.341914] nicpf, ver 1.0 [ 1.345372] pps pps0: new PPS source ptp0 [ 1.354869] fec 42890000.ethernet eth0: registered PHC device 0 [ 1.362443] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version [ 1.369679] hns3: Copyright (c) 2017 Huawei Corporation. [ 1.375062] hclge is initializing [ 1.378397] e1000: Intel(R) PRO/1000 Network Driver [ 1.383269] e1000: Copyright (c) 1999-2006 Intel Corporation. [ 1.389040] e1000e: Intel(R) PRO/1000 Network Driver [ 1.394000] e1000e: Copyright(c) 1999 - 2015 Intel Corporation. [ 1.399932] igb: Intel(R) Gigabit Ethernet Network Driver [ 1.405330] igb: Copyright (c) 2007-2014 Intel Corporation. [ 1.410916] igbvf: Intel(R) Gigabit Virtual Function Network Driver [ 1.417174] igbvf: Copyright (c) 2009 - 2012 Intel Corporation. [ 1.423285] sky2: driver version 1.30 [ 1.427579] imx-dwmac 428a0000.ethernet: IRQ eth_lpi not found [ 1.433752] imx-dwmac 428a0000.ethernet: User ID: 0x10, Synopsys ID: 0x52 [ 1.440551] imx-dwmac 428a0000.ethernet: DWMAC4/5 [ 1.445333] imx-dwmac 428a0000.ethernet: DMA HW capability register supported [ 1.452455] imx-dwmac 428a0000.ethernet: RX Checksum Offload Engine supported [ 1.459578] imx-dwmac 428a0000.ethernet: TX Checksum insertion supported [ 1.466268] imx-dwmac 428a0000.ethernet: Wake-Up On Lan supported [ 1.472401] imx-dwmac 428a0000.ethernet: Enable RX Mitigation via HW Watchdog Timer [ 1.480057] imx-dwmac 428a0000.ethernet: device MAC address 86:81:0f:94:98:19 [ 1.487205] imx-dwmac 428a0000.ethernet: Enabled L3L4 Flow TC (entries=8) [ 1.493987] imx-dwmac 428a0000.ethernet: Enabled RFS Flow TC (entries=10) [ 1.500766] imx-dwmac 428a0000.ethernet: Enabling HW TC (entries=256, max_off=256) [ 1.508321] imx-dwmac 428a0000.ethernet: Using 32 bits DMA width [ 1.518225] usbcore: registered new interface driver r8152 [ 1.524089] VFIO - User Level meta-driver version: 0.3 [ 1.531938] usbcore: registered new interface driver uas [ 1.537317] usbcore: registered new interface driver usb-storage [ 1.543397] usbcore: registered new interface driver usbserial_generic [ 1.549930] usbserial: USB Serial support registered for generic [ 1.555949] usbcore: registered new interface driver ftdi_sio [ 1.561690] usbserial: USB Serial support registered for FTDI USB Serial Device [ 1.569004] usbcore: registered new interface driver usb_serial_simple [ 1.575530] usbserial: USB Serial support registered for carelink [ 1.581622] usbserial: USB Serial support registered for zio [ 1.587281] usbserial: USB Serial support registered for funsoft [ 1.593287] usbserial: USB Serial support registered for flashloader [ 1.599640] usbserial: USB Serial support registered for google [ 1.605559] usbserial: USB Serial support registered for libtransistor [ 1.612090] usbserial: USB Serial support registered for vivopay [ 1.618095] usbserial: USB Serial support registered for moto_modem [ 1.624358] usbserial: USB Serial support registered for motorola_tetra [ 1.630970] usbserial: USB Serial support registered for nokia [ 1.636807] usbserial: USB Serial support registered for novatel_gps [ 1.643163] usbserial: USB Serial support registered for hp4x [ 1.648922] usbserial: USB Serial support registered for suunto [ 1.654845] usbserial: USB Serial support registered for siemens_mpi [ 1.661206] usbcore: registered new interface driver usb_ehset_test [ 1.669805] bbnsm_pwrkey 44440000.bbnsm:pwrkey: KEY_POWER without setting in dts [ 1.678054] input: 44440000.bbnsm:pwrkey as /devices/platform/soc@0/44000000.bus/44440000.bbnsm/44440000.bbnsm:pwrkey/input/input0 [ 1.693496] bbnsm_rtc 44440000.bbnsm:rtc: registered as rtc0 [ 1.700063] bbnsm_rtc 44440000.bbnsm:rtc: setting system clock to 1970-01-01T00:40:35 UTC (2435) [ 1.709596] i2c_dev: i2c /dev entries driver [ 1.716720] imx7ulp-wdt 42490000.wdog: imx93 wdt probe [ 1.750651] Bluetooth: HCI UART driver ver 2.3 [ 1.755119] Bluetooth: HCI UART protocol H4 registered [ 1.760253] Bluetooth: HCI UART protocol BCSP registered [ 1.765575] Bluetooth: HCI UART protocol LL registered [ 1.770704] Bluetooth: HCI UART protocol ATH3K registered [ 1.776103] Bluetooth: HCI UART protocol Three-wire (H5) registered [ 1.782493] Bluetooth: HCI UART protocol Broadcom registered [ 1.788157] Bluetooth: HCI UART protocol QCA registered [ 1.794787] sdhci: Secure Digital Host Controller Interface driver [ 1.800994] sdhci: Copyright(c) Pierre Ossman [ 1.805883] Synopsys Designware Multimedia Card Interface Driver [ 1.812371] sdhci-pltfm: SDHCI platform and OF driver helper [ 1.819532] ledtrig-cpu: registered to indicate activity on CPUs [ 1.826499] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping .... [ 1.833373] usbcore: registered new interface driver usbhid [ 1.838953] usbhid: USB HID core driver [ 1.844379] ethosu ethosu: assigned reserved memory node ethosu_region@C0000000 [ 1.850056] mmc0: SDHCI controller on 42850000.mmc [42850000.mmc] using ADMA [ 1.891274] cs_system_cfg: CoreSight Configuration manager initialised [ 1.898992] optee: probing for conduit method. [ 1.903467] optee: revision 3.19 (ad4e8389) [ 1.903903] optee: dynamic shared memory is enabled [ 1.913286] optee: initialized driver [ 1.920587] NET: Registered PF_LLC protocol family [ 1.926018] NET: Registered PF_INET6 protocol family [ 1.931886] Segment Routing with IPv6 [ 1.935621] In-situ OAM (IOAM) with IPv6 [ 1.939623] NET: Registered PF_PACKET protocol family [ 1.944709] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this. [ 1.957852] Bluetooth: RFCOMM TTY layer initialized [ 1.962736] Bluetooth: RFCOMM socket layer initialized [ 1.967882] Bluetooth: RFCOMM ver 1.11 [ 1.971628] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 [ 1.975581] mmc0: new HS400 Enhanced strobe MMC card at address 0001 [ 1.976925] Bluetooth: BNEP filters: protocol multicast [ 1.983735] mmcblk0: mmc0:0001 58A398 7.28 GiB [ 1.988480] Bluetooth: BNEP socket layer initialized [ 1.994157] mmcblk0: p1 p2 [ 1.997954] Bluetooth: HIDP (Human Interface Emulation) ver 1.2 [ 2.001220] mmcblk0boot0: mmc0:0001 58A398 4.00 MiB [ 2.006645] Bluetooth: HIDP socket layer initialized [ 2.012467] mmcblk0boot1: mmc0:0001 58A398 4.00 MiB [ 2.016733] 8021q: 802.1Q VLAN Support v1.8 [ 2.022269] mmcblk0rpmb: mmc0:0001 58A398 4.00 MiB, chardev (234:0) [ 2.025790] lib80211: common routines for IEEE802.11 drivers [ 2.037706] 9pnet: Installing 9P2000 support [ 2.042071] Key type dns_resolver registered [ 2.046761] registered taskstats version 1 [ 2.050882] Loading compiled-in X.509 certificates [ 2.069935] usb_phy_generic soc@0:usbphynop1: supply vcc not found, using dummy regulator [ 2.078259] usb_phy_generic soc@0:usbphynop1: dummy supplies not allowed for exclusive requests [ 2.087063] usb_phy_generic soc@0:usbphynop2: supply vcc not found, using dummy regulator [ 2.095411] usb_phy_generic soc@0:usbphynop2: dummy supplies not allowed for exclusive requests [ 2.113448] gpio gpiochip0: (43810080.gpio): not an immutable chip, please consider fixing it! [ 2.122542] gpio gpiochip1: (43820080.gpio): not an immutable chip, please consider fixing it! [ 2.131592] gpio gpiochip2: (43830080.gpio): not an immutable chip, please consider fixing it! [ 2.140641] gpio gpiochip3: (47400080.gpio): not an immutable chip, please consider fixing it! [ 2.154906] remoteproc remoteproc0: imx-rproc is available [ 2.162795] i2c 0-003d: Fixing up cyclic dependency with 4ae10000.dsi [ 2.169394] adv7511 0-003d: supply avdd not found, using dummy regulator [ 2.176171] adv7511 0-003d: supply dvdd not found, using dummy regulator [ 2.182901] adv7511 0-003d: supply pvdd not found, using dummy regulator [ 2.189618] adv7511 0-003d: supply a2vdd not found, using dummy regulator [ 2.196414] adv7511 0-003d: supply v3p3 not found, using dummy regulator [ 2.203140] adv7511 0-003d: supply v1p2 not found, using dummy regulator [ 2.210309] adv7511 0-003d: Probe failed. Remote port 'dsi@4ae10000' disabled [ 2.217833] st_lsm6dsx_i2c 0-006a: supply vdd not found, using dummy regulator [ 2.225158] st_lsm6dsx_i2c 0-006a: supply vddio not found, using dummy regulator [ 2.289539] st_lsm6dsx_i2c 0-006a: failed to read whoami register [ 2.295812] st_lsm6dsx_i2c: probe of 0-006a failed with error -5 [ 2.301895] i2c i2c-0: LPI2C adapter registered [ 2.307942] pca953x 1-0022: supply vcc not found, using dummy regulator [ 2.314705] pca953x 1-0022: using AI [ 2.318364] pca953x 1-0022: failed writing register [ 2.323346] pca953x: probe of 1-0022 failed with error -5 [ 2.329016] adp5585 1-0034: Failed to read reg 0x00, ret is -5 [ 2.334871] adp5585: probe of 1-0034 failed with error -5 [ 2.340359] i2c i2c-1: LPI2C adapter registered [ 2.345948] i2c 2-0050: Fixing up cyclic dependency with 4c100000.usb [ 3.357110] tcpci: probe of 2-0050 failed with error -110 [ 3.362704] i2c 2-0051: Fixing up cyclic dependency with 4c200000.usb [ 4.377113] tcpci: probe of 2-0051 failed with error -110 [ 5.389069] adp5585 2-0034: Failed to read reg 0x00, ret is -110 [ 5.395082] adp5585: probe of 2-0034 failed with error -110 [ 5.400885] i2c 2-003c: Fixing up cyclic dependency with 4ae00000.csi [ 5.407546] i2c i2c-2: LPI2C adapter registered [ 5.414180] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops) [ 5.422156] [drm:drm_bridge_attach] *ERROR* failed to attach bridge /soc@0/dsi@4ae10000 to encoder DSI-34: -19 [ 5.432166] dw-mipi-dsi-imx 4ae10000.dsi: [drm:dw_mipi_dsi_imx_bind] *ERROR* failed to attach bridge: -19 [ 5.441725] imx-drm display-subsystem: failed to bind 4ae10000.dsi (ops dw_mipi_dsi_imx_ops): -19 [ 5.450869] imx-drm display-subsystem: adev bind failed: -19 [ 5.456538] dw-mipi-dsi-imx 4ae10000.dsi: [drm:dw_mipi_dsi_imx_probe] *ERROR* failed to register component: -19 [ 5.478535] sdhci-esdhc-imx 42860000.mmc: Got CD GPIO [ 5.479882] dwc-mipi-csi2-host 4ae00000.csi: lanes: 2, name: mxc-mipi-csi2.0 [ 5.498291] cfg80211: Loading compiled-in X.509 certificates for regulatory database [ 5.511405] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7' [ 5.518188] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2 [ 5.521123] clk: Not disabling unused clocks [ 5.526882] mmc1: SDHCI controller on 42860000.mmc [42860000.mmc] using ADMA [ 5.531085] ALSA device list: [ 5.538113] platform regulatory.0: Falling back to sysfs fallback for: regulatory.db [ 5.541074] No soundcards found. [ 5.554051] Freeing unused kernel memory: 3328K [ 5.573123] Run /linuxrc as init process Found New UDC: ci_hdrc.0 ci_hdrc.0 0 Found New UDC: ci_hdrc.1 ci_hdrc.1 1 ffs.utp0 [ 5.621381] file system registered ffs.utp1 run utp at /dev/usb-utp0/ep0 . run utp at /dev/usb-utp1/ep0 [ 5.642106] read descriptors uuu fastboot cli[ 5.646482] read descriptors ent 1.0.0 [built [ 5.650846] read strings Aug 17 2022 19:49[ 5.650846] read strings :14] Start init usb uuu fastboot client 1.0.0 [built Aug 17 2022 19:49:14] Start init usb write string write string Start handle command Start handle command 現時点では、「Start handle command」のままになっており、この状況を修正する方法がわかりません。ご指導をお願いするか、i.mx93 にすぐに使用できる example_kernel_emmc.uuu を提供していただければ幸いです。あなたのご返答を心待ちにしており、楽しい一日をお過ごしいただけることを祈っております。 Re: How can I update my customized U-Boot to the i.mx9352 board? What are the procedures for erasing こんにちは@orange-bear i.MX_Porting_Guide ( i.MXアプリケーション・プロセッサ向け組み込みLinux | NXP Semiconductors ) を参照してください。 よろしくお願いいたします。 Harvey

Unable to debug S32k311 mcu using Segger j-link V9 debugger I have been working with an eval board by Elekronika India for 18s BMS solution based on S32k311 MCU. The Segger j-link V9-G JTAG debugger is being used for flashing and debugging. But when we debug the sample code, after flashing, the PC goes to random RAM locations and not to the main function. Enclosed image for your reference. There are no breakpoints except main. But PC does not halt at the main and goes to random RAM locations and halts there. I tried with another example code for S32k311 and it gave the same output.    Kindly suggest a solution.   Re: Unable to debug S32k311 mcu using Segger j-link V9 debugger Issue was with the Segger connector to JTAG adapter board. It wasn't able to reset the controller before debug session. It is resolved now. Re: Unable to debug S32k311 mcu using Segger j-link V9 debugger Hello, But when we debug the sample code, after flashing, the PC goes to random RAM locations and not to the main function Ok, seems to me weird. The core will execute the instruction loaded in it. Not some random ones. There must be executed in your SW some branch (jump) to that RAM location. And the RAM location must be defined in your core registers, to perform branch. If you do step by step debug, you will see exactly where the branch to RAM is happening, and also its preconditions. But PC does not halt at the main and goes to random RAM locations and halts there. I tried with another example code for S32k311 and it gave the same output. Yes, if the main is not reached, it wont halt at main breakpoint. Since the another example gives you the same result, it could be some jumper settings on the board if you use our EVB. We supply the EVBs with getting started guide, where all necessary HW settings are described. But debugging of startup will simply tell you where the issue lie. Best regards, Peter Re: Unable to debug S32k311 mcu using Segger j-link V9 debugger Please find gdb server log for your reference

gPTP master port of sja1110 This question has troubled me for a long time. I hope to get an answer.  I will be very grateful。 I am using S32G-VNP-RDB3 and LinuxBSP 43.0. Configuring sja1110 as grand master or bridge, the master port (port 4)always sends only sync messages without follow up messages. Then the flag field of the sync message shows two step. I don't know why no follow up message was sent. The s32g pfe0 port as the slave port sends  pdelay req message, but the sja1110 port4 as the master port does not respond to the pdealy req message and sends a qdelay resp message. The command for s32g pfe0 as slave port is: sudo ./ptp4l -i pfe0 -f configs/automotive-slave.cfg --step_threshold=1 -m However, when sja1110 is configured as a bridge, the slave port of sja1110 can synchronize time normally. Sja1110 port4 as a slave port can synchronize time normally with s32g pfe0 as a master port. The command for s32g pfe0 as master port is: bluebox@ubuntu-s32g399ardb3:~/linuxptp$ sudo ./ptp4l -i pfe0 -f configs/automotive-master.cfg --step_threshold=1 -m I uploaded my project and the capture file. Re: gPTP master port of sja1110 Hello @xiaoshumiao , a new support case has been created on your behalf. You have already replied on that, as well I have. It is still on progress. I will keep you informed in that new support case. Best regards, Pavel Re: gPTP master port of sja1110 Hello @PavelL  I have replied to this email, can you see it？[email protected] Re: gPTP master port of sja1110 Hello @xiaoshumiao , yes, you are right. In the meantime, I did some research and I have a solution. I will share it via private email within this week. Best regards, Pavel Re: gPTP master port of sja1110 Hello @PavelL , Normally, the tcpip component should not affect the normal operation of the gPTP component. Will nxp fix it later? Re: gPTP master port of sja1110 hello @PavelL , Thank you so much, I will follow your suggestion. Re: gPTP master port of sja1110 Hello @xiaoshumiao , I also noticed the timer configuration issue. After spending a significant amount of time on this and performing a deep investigation using the Lauterbach debugger, I was able to identify the root cause: adding the tcpip component and the lwip_demo.c file to the gptp_sja1110x project introduces the same faulty behavior. At this point, the only available workaround is to remove both the lwip and tcpip components from the project. Please refer to gptp_sja1110x/main.c for an example of how the switch and gPTP are initialized without lwIP. Also, take note of the ENET settings, which differ slightly from those in the switch_config_s32g_vnp_rdb example. I apologize for any inconvenience this may have caused. Best regards, Pavel Re: gPTP master port of sja1110 Hello @PavelL  Thank you for your continued attention to this issue. I found a mistake in the configuration, which was caused by my carelessness. The trigger source of LPIT channel 3 should be changed to internal trigger. Other changes I made are: In this case, follow up messages are occasionally sent, but I don't know the reason. The attachment is the captured package. Re: gPTP master port of sja1110 Hello @xiaoshumiao , I apologize for the late response caused my workload. I was able to replicate your issue. It's still not clear to me, because gptp_sja1110x example working well on SJA1110-EVM. I'll do my best to reply within this week. Thank you for your patience. Best regards, Pavel Re: gPTP master port of sja1110 Hello @xiaoshumiao , I apologize for the delayed response due to public holidays. I can't see the reason for such a behavior. I will further investigated. I will keep you updated on any progress. Best regards, Pavel Re: gPTP master port of sja1110 Hello @PavelL , 1. When as bridge, the slave is port 4 and the master is port 2. Connected the slave port to nvidia orin, and then captured the packets on nvidia orin. sudo  tcpdump -i any -vnn -w tsn0707.pcap 2. when sja1110 as grandmaster, the grandmaster is port 4, and the s32g pfe0 is slave. in this case,  capture the packets on s32g: sudo  tcpdump -i any -vnn -w tsn0707.pcap In this case, the captured packet only has sync but no follow up. Re: gPTP master port of sja1110 Hello @xiaoshumiao , I apologize for the late response caused by workload. After reviewing your project, everything I checked looks correct — including the source code and gPTP settings. However, I noticed that only one port is defined for gPTP. You might want to try enabling the "Pdelay Initiator" option for that port. Could you please confirm which port you are using to connect Wireshark on your PC? General suggestions: Please compare your project with the reference example gptp_sja1110x, which was prepared for the SJA1110-EVM board. Also, refer to the gPTP application note, available on the SJA1110 product page under the Documents section (in Secure Files). Best regards, Pavel Re: gPTP master port of sja1110 Hello @PavelL , Thank you very much, I have tried to solve it many times but to no avail. Re: gPTP master port of sja1110 Hello @xiaoshumiao , I apologize for the delayed reply. I need more time, since I don't know the answer right now. Thank you for your patience. Best regards, Pavel

EB RTD license sorry, I encountered some issues while using eb. When I click on the mcal module, it shows that I don't have a license for this module, as shown in the picture below. Besides activating the eblicense and installing the corresponding rtd exe package, are there any other operations I need to perform? Re: EB RTD license Hi,  RTD itself doesn't need any license. You are probably missing license for EB tresos. You can find current EB Tresos activation key on your NXP account. 

sja1110 的 gPTP 主端口 这个问题困扰了我很长时间。希望能得到答复。 我将不胜感激。 我使用的是 S32G-VNP-RDB3 和 LinuxBSP 43.0。 将 sja1110 配置为主端口或网桥，主端口（端口 4）总是只发送同步信息，而不发送后续信息。然后，同步信息的标志字段显示两个步骤。 我不知道为什么没有发送后续信息。 作为从端口的 s32g pfe0 端口发送了 pdelay req 信息，但作为主端口的 sja1110 port4 没有响应 pdealy req 信息，而是发送了 qdelay resp 信息。 将 s32g pfe0 作为从端口的命令是 sudo ./ptp4l-i pfe0 -f configs/automotive-slave.cfg --step_threshold=1 -m 但是，当 sja1110 配置为网桥时，sja1110 的从端口可以正常同步时间。作为从端口的 Sja1110 port4 可以与作为主端口的 s32g pfe0 正常同步时间。 将 s32g pfe0 作为主端口的命令是 bluebox@ubuntu-s32g399ardb3:~/linuxptp$ sudo ./ptp4l-i pfe0 -f configs/automotive-master.cfg --step_threshold=1 -m 我上传了我的项目和捕获文件。 Re: gPTP master port of sja1110 你好@xiaoshumiao、 已为您创建了一个新的支持案例。你已经回答过了，我也回答过了。目前仍在进行中。我会随时向您通报新的支持案例。 顺祝商祺！ 帕维尔 Re: gPTP master port of sja1110 你好@PavelL 我已经回复了这封邮件，您能看到吗？[email protected] Re: gPTP master port of sja1110 你好@xiaoshumiao、 是的，你说得对。与此同时，我做了一些研究，我有一个解决方案。我将在本周内通过私人电子邮件与大家分享。 顺祝商祺！ 帕维尔 Re: gPTP master port of sja1110 你好@PavelL、 通常，tcpip 元器件不应影响 gpTP 元器件的正常运行。以后 nxp 会修复吗？ Re: gPTP master port of sja1110 你好@PavelL、 非常感谢，我会按照你的建议去做。 Re: gPTP master port of sja1110 你好@xiaoshumiao、 我还注意到计时器配置问题。 在花了大量时间研究这个问题并使用劳特巴赫调试器进行了深入调查之后，我得以确定根本原因：添加了 tcpip 元器件和 lwip_demo.c文件会引入同样的错误行为。 此时，唯一可用的解决方法是从项目中删除 lwip 和 tcpip 元器件。请参阅 gptp_sja1110x/main.c，了解在没有 lwIP 的情况下如何初始化交换机和 gPTP。此外，请注意 ENET 设置，它与 switch_config_s32g_vnp_rdb 示例中的设置略有不同。 对于由此造成的不便，我深表歉意。 顺祝商祺！ 帕维尔 Re: gPTP master port of sja1110 你好@PavelL 感谢您对这一问题的持续关注。 我发现配置中有一个错误，这是我粗心大意造成的。 LPIT 频道 3 的触发信号应更改为内部触发器。 我还做了其他改动： 在这种情况下，偶尔会发送后续信息，但我不知道原因何在。 附件是捕获的包裹。 Re: gPTP master port of sja1110 你好@xiaoshumiao、 很抱歉，由于工作繁忙，我的回复晚了。 我能够复制你的问题。我仍然不清楚，因为 gptp_sja1110x 示例在 SJA1110-EVM 上运行良好。 我会尽力在本周内回复。 感谢您的耐心等待。 顺祝商祺！ 帕维尔 Re: gPTP master port of sja1110 你好@xiaoshumiao、 很抱歉由于公共假期而延迟回复。 我不明白为什么会有这种行为。我会进一步调查。如果有任何进展，我会及时通知你们。 顺祝商祺！ 帕维尔 Re: gPTP master port of sja1110 你好@PavelL、 1.桥接时，从端口为 4，主端口为 2。 将从属端口连接到 nvidia orin，然后在 nvidia orin 上捕获数据包。 sudo tcpdump -i any -vnn -w tsn0707.pcap 2. 当 sja1110 作为主站时，主站是端口 4，而 s32g pfe0 是从站。 在这种情况下，在 s32g 上捕获数据包：sudo tcpdump-i any-vnn-w tsn0707.pcap 在这种情况下，捕获的数据包只能同步，但没有后续跟进。 Re: gPTP master port of sja1110 你好@xiaoshumiao、 由于工作繁忙，我很抱歉没有及时回复。 在查看了您的项目后，我所检查的一切看起来都是正确的，包括源代码和 gPTP 设置。不过，我注意到 gPTP 只定义了一个端口。你可能需要尝试为该端口启用 " Pdelay 启动器 " 选项。 能否请您确认连接 Wireshark 的端口？ 一般建议 请将您的项目与为 SJA1110-EVM 主板准备的参考示例 gptp_sja1110x 进行比较。 另请参阅 gPTP 应用笔记，该说明可在 SJA1110 产品页面的 “文档” 部分（在 “安全文件” 中）下找到。 顺祝商祺！ 帕维尔 Re: gPTP master port of sja1110 你好@PavelL、 非常感谢，我曾多次尝试解决这个问题，但都无济于事。 Re: gPTP master port of sja1110 你好@xiaoshumiao、 对于延迟回复，我深表歉意。 我需要更多时间，因为我现在还不知道答案。 感谢您的耐心等待。 顺祝商祺！ 帕维尔

S32K3 SPD DMA こんにちは、 RTD400とSPD105を使用し、開発ボードはS32K312 144P開発ボードです。 設定を行わずに、テスト対象の UART + DMA プログラムに FCCU モジュールを追加しました。ヘッダーファイルが参照されておらず、コード内でFCCU部分が初期化されていない場合でも、プログラムはClock_Ip_SetWaitStatesで停止します。 テスト対象の SPD モジュール プログラムに uart モジュールを通常どおり追加し (RAM およびフラッシュ インジェクション エラーを含む)、その後、設定を行わずに DMA モジュールを追加しました。ヘッダー ファイルと初期化 Fdma 部分がコード内で参照されていない場合でも、プログラムは Clock_Ip_SetWaitStates() 関数内にあります。その後、ハードウェア エラー割り込みが発生します。 FCCU モジュールを追加せずに UART + DMA のコードをアップロードしましたが、正常に動作しました。ただし、追加後はクロック初期化プログラムにハードウェア エラーが発生します。この原因は何でしょうか? また、この問題はどのように解決できるでしょうか? Re: S32K3 SPD DMA 同様の問題に遭遇しました。S32K312 のUART 割り込みモードを使用すると動作しますが、Dma_Ip_Init() および Rm_Init() の後にLpuart_Uart_Ip_AsyncSend () またはLpuart_Uart_Ip_AsyncReceive () を実行すると、 HardFault_Handler () に入ります。 サポートをお願いできますか。 Re: S32K3 SPD DMA こんにちは@ Neo1096 申し訳ございませんが、IAR をサポートすることはできません。変更するには、提供されているリンク ファイルを参照してください。 Re: S32K3 SPD DMA icf ファイルを提供してもらえますか?IARで使用する必要があります Re: S32K3 SPD DMA こんにちは@ Neo1096 問題の原因を見つけました。 これは、S32 DS が提供するリンク ファイルの構成の問題が原因です。 SPD パッケージ内のリンク ファイルを S32 DS 内のリンク ファイルに置き換えると、この問題は解決できます。 SO、さらにテストを行うには、添付ファイルのリンク ファイルを参照してください。 Re: S32K3 SPD DMA こんにちは@ Neo1096 社内チームが問題を再現し、現在考えられる原因を排除しています。 更新日時: 2025年7月23日。 Re: S32K3 SPD DMA こんにちは@Neo1096 社内フォーラムからの返信はまだ受け取っていませんので、お待ちください。 更新日:2025年7月15日。 Re: S32K3 SPD DMA こんにちは@Neo1096 社内フォーラムからの返信はまだ受け取っていませんので、お待ちください。 更新データ:2025年7月7日。 Re: S32K3 SPD DMA こんにちは@ Neo1096 今朝再度プッシュしましたが、社内フォーラムからはまだ何の返答もありません。 Re: S32K3 SPD DMA 何か進展はありましたか？ Re: S32K3 SPD DMA こんにちは@Ne01096 これはバグかもしれません。何か見落としているかどうか、デザインチームに確認する必要があります。 現状では、DMA モジュールを追加すると、クロックの初期化時にハードファルト状態になります。 さまざまなバージョンでテストしましたが、結果は同じでした。 Re: S32K3 SPD DMA exceptions.cにコードを追加しましたStartup_Code フォルダーの下に、主にエラー注入によって発生したハードウェア エラーを処理するためにあります。その他の部分は変更ありません。 Re: S32K3 SPD DMA こんにちは@Neo1096 ご提供いただいたプロジェクト「S32K312_SPD104_DMA_UART」をテストしているときに、問題が発生しました。 原因はまだ見つかっていませんが、理論上は「S32K312_SPD104」と同じ設定であれば、このような問題は発生しないはずです。 明日、「S32K312_SPD104」のコードを修正してみます。 しばらく時間がかかります。また、起動ファイルが変更されている可能性があります。 Re: S32K3 SPD DMA 以前アップロードしたコードは実行CAN。FCCU モジュールを個別に追加すると、操作が失敗します。 コードのコピーを2つ再アップロードしました。 正しく実行CANファイルは、SPD104 バージョンに基づいて RAM および FLASH インジェクション エラーをテストします。（S32K312_SPD104） もう 1 つは正しく実行できません。これは、前のコードにDMA+UART部分を追加し、Clock_Ip_SetWaitStates(); ハードウェア割り込みを入力します（S32K312_SPD104_DMA_UART） ぜひご覧ください。ありがとう。 Re: S32K3 SPD DMA こんにちは@ Neo1096 まず、提供されたプロジェクトをテストしましたが、おっしゃった問題は発生しませんでした。CANさらに詳しい情報と、変更が必要かどうかを教えてください。 第二に、SPDバージョン4.0.0に対応するP24は1.0.4のはずです。バージョン1.0.4をインストールしてもう一度お試しください

S32G3：RTD MemMap 截面违规（用于 LLCE） 您好， 根据"[S32G3/Valeo] RTD MemMap Sections Violations - NXP Community" 的建议，我创建了此票据，用于为 LLCE 进行 xxx_MemMap 审核，具体如下（完整文档附后）。 请检查使用 GHS 编译后，下列参数/函数是否遗漏包含在适当的内存区域。 ================================================================= (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_AFcfg.c: Llce_Eth2Can_EnabledFormats => CAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLE（即 bss 部分）中的数据 pLlce_Can_AfBuffer => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED（即 rodata 部分）中的数据 (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_MAIN_SOC_PBcfg.c:// VariantPostBuild 已启用 (MAIN_SOC) Llce_Rx_Filters_List_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，该数据为 rodata 部分 Llce_RxAf_Filters_List_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，该数据为 rodata 部分 Llce_Rx_Filters_Ctrl0_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，该数据为啮合数据。 Llce_Rx_Filters_Ctrl2_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，它是啮合数据 Llce_Rx_Filters_Ctrl4_PB_MAIN_SOC=> CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，该数据是啮合数据段 Llce_Rx_Filters_Ctrl9_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，该数据是啮合数据段 Llce_Rx_Filters_Ctrl15_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，该数据是啮合数据段。 Llce_RxAf_Filters_Ctrl0_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据。这是rodata部分 Llce_RxAf_Filters_Ctrl5_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，这是 Llce_RxAf_Filters_Ctrl9_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，该数据为 rodata 部分 Llce_RxAf_Filters_Ctrl15_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED 中的数据，该数据为 rodata 部分 (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_Llce: llce_minihif => 未包含在 Can_43_LLCE_MemMap.h 中的静态全局变量 u8Length => 未包含在 Can_43_LLCE_MemMap.h 中的静态局部变量 stringBuf => 未包含在 Can_43_LLCE_MemMap.h 中的静态局部变量 ***************************************************************************************************************************************************************** 答：请通过标签"LLCE" 在恩智浦社区 ***************************************************************************************************************************************************************** 向 LLCE 团队提出此问题。 LLCE Re: S32G3: RTD MemMap Sections Violations (For LLCE) 您好， 你知道修复工作是否有时间表吗？如果有，何时？ Re: S32G3: RTD MemMap Sections Violations (For LLCE) 您好， 法雷奥很晚才对您的问题做出反馈： 1.当你说:"Llce_Eth2Can_EnabledFormats => data in CAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLE which is bss section"， 你是说 Llce_Eth2Can_EnabledFormats 应该放在例如 .mcal_bss_no_cacheable 中，但实际上却放在 .bss 部分？ 该变量的初始化值为 4，但变量位于 .bss 部分，而不是 .data 部分。部分，因此变量应放在 .mcal_data_x 中。 2. 将全局静态变量llce_minihif加入相应的 MemMap 部分。u8Length/ stringBuf 是函数静态变量，它们不受 MemMap 控制，因为根据 SWS_MemMap_00023，MemMap 不能添加到函数体内部。如果需要通过 MemMap 部分对其进行控制，我们可以遵循 AUTOSAR 建议："要强制对函数的静态变量进行特殊内存映射，必须将该变量移至文件静态作用域"。 看起来这个变量在 Can_43_LLCE_TS_T40D11M10I10R0 中已被修复。 3.对于 Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ ，您确定将其放在正确的部分吗？ 从下图中可以看到，有（static、static const），但它们都被放在同一个部分，即 .mcal_cont_cfg 部分。它是 rodata，而这个文件是生成的，所以我不能把它放在任何部分。 在之前/旧的交易所中，你预计下一个版本中不会有任何软件更新，因为不会有新的软件版本。现在还是这样吗？ Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi Cong、 我已将我方的答复汇总给客户，但至今没有进一步的反馈。 我刚刚向我们的联系人发送了一封电子邮件，就您提出的 LLCE 问题征求进一步的反馈意见。 如果客户有任何回复，我们将在此更新。 此致， 理查德-钟 Re: S32G3: RTD MemMap Sections Violations (For LLCE) HiRichard, 感谢您的更新！ 我们将在 2025 年 3 月在 S32G 上发行一张光盘，计划于 2025 年 5 月发行。此后没有发布下一个版本的计划。因此，我想收集有关该主题的信息，然后我们可以将这些实现纳入即将发布的2025年5月版本中。 请就我最初答复中的问题提供反馈意见： 1.我是否正确理解了他们所说的话？当他们说"Llce_Eth2Can_EnabledFormats => data in CAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLE which is bss section"， 他们是否说 Llce_Eth2Can_EnabledFormats 应放在 .mcal_bss_no_cacheable 等位置，但实际上却放在 .bss 部分？ 2. 将全局静态变量llce_minihif加入相应的 MemMap 部分。u8Length/ stringBuf 是函数静态变量，它们不受 MemMap 控制，因为根据 SWS_MemMap_00023，MemMap 不能添加到函数体内部。如果需要通过 MemMap 部分来控制它们，我们可以遵循 AUTOSAR 的建议："要强制对函数的静态变量进行特殊内存映射，必须将该变量移至文件静态作用域"。 您能否确认这是一个强烈要求？ 3. 对于 Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ , 您是否检查过为什么客户认为它被放在了错误的部分？ Re: S32G3: RTD MemMap Sections Violations (For LLCE) 您好， 根据原始票据上关于修复期望的更新，客户将在 6 月冻结代码。 尽管涉及许多元器件并且需要补丁，但要在6月之前组装起来会很困难。 因此，除非客户进一步强调，否则请根据现有假设/资源进行规划。 此致， 理查德-钟 Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi Cong、 很抱歉迟迟没有更新，但正如您在原始票据上看到的，客户完全没有反馈。 我将再次推动这项工作，但看起来您可以根据您对当前形势的评估来制定计划。 此致， 理查德-钟 Re: S32G3: RTD MemMap Sections Violations (For LLCE) 嗨，理查德、 你有关于这个话题的最新消息吗？ 我们需要尽快在 S32G 上的三月光盘中实施。 此致， Cong Re: S32G3: RTD MemMap Sections Violations (For LLCE) 对于 2.是的，我们创建了AF-4950票来记录这些详细信息。正在等待上述问题的确认，以便最终确定机票细节。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) 您好， 感谢您的更新。 1.对于Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ ，我将进一步检查为什么客户认为它被放在了错误的部分。 2.至于其他部分，既然您提到我们将进行修订，以确保包含适当的部分，那么我们是否已经制定了解决这些问题的方案/计划，以便与客户分享？ 3.如原始票据"[S32G3/Valeo] RTD MemMap Sections Violations - NXP Community" 所述，FAE 正在与客户核实他们对此问题修正的期望，如有进一步信息，将在此更新。 此致， 理查德-钟 Re: S32G3: RTD MemMap Sections Violations (For LLCE) 你好， 首先，我需要了解报告的内容。当他们说"Llce_Eth2Can_EnabledFormats => CAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLE 中的数据，这是 bss 部分 "时， ，他们是否说 Llce_Eth2Can_EnabledFormats 应位于例如.mcal_bss_no_cacheable、但实际上它被放入 .bss部分？ 根据上述假定的理解，反馈意见是： NXP 将： - 将全局静态变量 llce_minihif 纳入相应的 MemMap 部分。u8Length/ stringBuf 是函数静态变量，它们不受 MemMap 控制，因为根据 SWS_MemMap_00023，MemMap 不能添加到函数体内部。如果需要通过 MemMap 部分对其进行控制，我们可以遵循 AUTOSAR 建议："要强制对函数的静态变量进行特殊内存映射，必须将该变量移至文件静态作用域"。您能确认这是一个强烈要求吗？ - 将全局静态变量 llce_minihif 定义纳入相应的 MemMap 部分 - 将 Llce_Eth2Can_EnabledFormats 的声明纳入相应的 MemMap 部分。这很可能就是放错位置的原因。 - 将 pLlce_Can_AfBuffer 的声明纳入相应的 MemMap 部分，并仔细检查当前 MemMap 部分是否合适。 - Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ 已被放入相应的 MemMap 部分，因此需要进行额外分析以确定变量错放的原因。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) 您好， 是否有任何更新？ 此致， 理查德-钟

S32G3: RTD MemMap Sections Violations (For LLCE) Hi, As suggested by  "[S32G3/Valeo] RTD MemMap Sections Violations - NXP Community", I am creating this ticket for xxx_MemMap review for LLCE as below (full document attached.) Please check if below parameter/functions missed to be included in proper memory region after compiled with GHS. ================================================================= (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_AFcfg.c: Llce_Eth2Can_EnabledFormats => data in CAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLE which is bss section pLlce_Can_AfBuffer => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_MAIN_SOC_PBcfg.c: // VariantPostBuild is enabled (MAIN_SOC) Llce_Rx_Filters_List_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_RxAf_Filters_List_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_Rx_Filters_Ctrl0_PB_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_Rx_Filters_Ctrl2_PB_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_Rx_Filters_Ctrl4_PB_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_Rx_Filters_Ctrl9_PB_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_Rx_Filters_Ctrl15_PB_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_RxAf_Filters_Ctrl0_PB_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_RxAf_Filters_Ctrl5_PB_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_RxAf_Filters_Ctrl9_PB_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section Llce_RxAf_Filters_Ctrl15_PB_MAIN_SOC => data in CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED which is rodata section (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_Llce: llce_minihif => Static global variable not inculded in the Can_43_LLCE_MemMap.h u8Length => Static local variable not inculded in the Can_43_LLCE_MemMap.h stringBuf => Static local variable not inculded in the Can_43_LLCE_MemMap.h ***************************************************************************************************************************************************************** Answer: please raise this questions to LLCE team via tag "LLCE" on NXP community ***************************************************************************************************************************************************************** LLCE Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi, Do you know if fixes are schedule then? if so, when? Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi, Extremely late feedback from Valeo regarding your question: 1. When you said: “Llce_Eth2Can_EnabledFormats => data in CAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLE which is bss section”, do you say that Llce_Eth2Can_EnabledFormats should be in e.g. .mcal_bss_no_cacheable, but it is actually placed into .bss section? This variable is initialized by a value of 4 but the variable is within A .bss section not .data section so yes the variable should be in e.g .mcal_data_x. 2. Include global static variable llce_minihif into the appropriate MemMap section. u8Length/ stringBuf are function-static variables and they are not under MemMap control because the MemMap cannot be added inside the body of the function according to SWS_MemMap_00023. If it is required to control them by MemMap section, we can follow the AUTOSAR recommendation : “To force a special memory mapping of a function’s static variable, this variable must be moved to file static scope”.  looks like this variable has been fixed in Can_43_LLCE_TS_T40D11M10I10R0. 3. For the Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ , are you sure you placed it in the right section? as you can see in the below image there are (static, static const) but all of them are placed in the same section which is .mcal_cont_cfg which is rodata, and this file is generated so it's not up to me to place it in any section. In the previous/old exchanges you expected no sw updates in next release as there will be no new sw version. Is it still the case?  Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi Cong, I had summarized the response from our side to customer but no further feedback so far. I just sent an individual email to our contact to ask for further feedback on LLCE questions you raised. Will update here if any reply from customer. Regards, Richard Chung. Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi Richard, Thanks for your updates! We will have a CD on S32G in Mar-2025, and it is planed in May-2025. There is no plan for the next release after that. So I want to collect the information on the topic, then we can include these implementations in this upcoming release of May-2025. Please help me with feedback on the questions on my initial response: 1. Do I understand correctly what they say? e.g: When they say: “Llce_Eth2Can_EnabledFormats => data in CAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLE which is bss section”, do they say that Llce_Eth2Can_EnabledFormats should be in e.g. .mcal_bss_no_cacheable, but it is actually placed into .bss section? 2. Include global static variable llce_minihif into the appropriate MemMap section. u8Length/ stringBuf are function-static variables and they are not under MemMap control because the MemMap cannot be added inside the body of the function according to SWS_MemMap_00023. If it is required to control them by MemMap section, we can follow the AUTOSAR recommendation : “To force a special memory mapping of a function’s static variable, this variable must be moved to file static scope”. Can you confirm this is a strong request? 3. For the Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ , Did you check why customer consider this being placed in wrong section? Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi, As updated on originating ticket about fix expectation, customer will have the code freeze by June. While there being many components getting involved and need patch, it would be difficult to put them together before June. So please plan according to your current assumption/resources unless further highlighted by customer. Regards, Richard Chung. Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi Cong, Sorry for the late update but as you can see on the origin ticket, there is totally no feedback from customer. I will push for this again but it looks like you can plan according to your evaluation as of current situation. Regards, Richard Chung. Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi Richard, Do you have any update on the topic? We need to implement it asap for the March CD on S32G. Regards, Cong Re: S32G3: RTD MemMap Sections Violations (For LLCE) For 2. Yes, we created the ticket AF-4950 to log these details. Waiting for the confirmations for the above questions to finalize the ticket details. Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi, Thanks for your update. 1. For the Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ , I will further check why customer consider this being placed in wrong section. 2. For the rest, since you mentioned we will revise to ensure the proper section inclusion, do we have a ticket/plan in place to fix them so that we can share with customer? 3. As described on the originating ticket "[S32G3/Valeo] RTD MemMap Sections Violations - NXP Community" FAE is checking with customer on their expectation of this issue correction, will update if any further information here. Regards, Richard Chung. Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi, First of all, I need to understand the report. When they say: “Llce_Eth2Can_EnabledFormats => data in CAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLE which is bss section”, do they say that Llce_Eth2Can_EnabledFormats should be in e.g. .mcal_bss_no_cacheable, but it is actually placed into .bss section? Following the presumed understanding above, the feedback is: NXP will: • Include global static variable llce_minihif into the appropriate MemMap section. u8Length/ stringBuf are function-static variables and they are not under MemMap control because the MemMap cannot be added inside the body of the function according to SWS_MemMap_00023. If it is required to control them by MemMap section, we can follow the AUTOSAR recommendation : “To force a special memory mapping of a function’s static variable, this variable must be moved to file static scope”. Can you confirm this is a strong request? • Include global static variable definition llce_minihif into the appropriate MemMap section • Include the declaration of Llce_Eth2Can_EnabledFormats into the corresponding MemMap section. This is most probably the reason for misplacement. • Include the declaration of pLlce_Can_AfBuffer into the corresponding MemMap section and double check whether the current MemMap section is appropriate . • Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ is already placed into the corresponding MemMap section, extra analysis is required to determine the source of variable misplacing. Re: S32G3: RTD MemMap Sections Violations (For LLCE) Hi, Is there any update? Regards, Richard Chung.

S32K3 SPD DMA 您好。 我使用 RTD400 和 SPD105，开发板是 S32K312 144P 开发板 我在测试的 UART+DMA 程序中添加了 FCCU 模块，但没有进行任何设置。即使未参考头文件，也没有在代码中初始化 FCCU 部分，该程序也会在 clock_ip_setWaitStates 时死亡 我在已测试的 SPD 模块程序中正常添加了 uart 模块（包括 RAM 和闪存注入错误），然后添加了 DMA 模块，但未作任何设置。即使代码中没有参考头文件和初始化 Fdma 部分，该程序仍将处于函数 Clock_Ip_SetWaitStates() 中；然后它会进入硬件错误中断。 我上传了 UART+DMA 的代码，没有添加 FCCU 模块，可以正常运行。但是，添加后，时钟初始化程序会出现硬件错误。出现这种情况的原因是什么，如何解决这个问题？ Re: S32K3 SPD DMA 我也遇到了类似的问题。在 Dma_Ip_Init() 和 Rm_Init() 之后运行Lpuart_Uart_Ip_AsyncSend() 或Lpuart_Uart_Ip_AsyncReceive() 时，使用 S32K312 的UART 中断模式 可以正常工作，但会进入HardFault_Handler()。 有人能帮我一下吗？ Re: S32K3 SPD DMA 你好@Neo1096 很抱歉，我们不支持 IAR，您可以参考我们提供的链接文件进行修改。 Re: S32K3 SPD DMA 能否提供 icf 文件？我需要在 IAR 中使用它 Re: S32K3 SPD DMA 你好@Neo1096 我们找到了问题的原因。 这是因为 S32 DS 提供的链接文件存在配置问题。 我们用 S32 DS 中的链接文件替换了 SPD 代码包，这个问题就可以解决了。 因此，请参考附件中的链接文件进行进一步测试。 Re: S32K3 SPD DMA 你好@Neo1096 内部团队已重现该问题，目前正在排除可能的原因。 更新时间 : 7/23/2025. Re: S32K3 SPD DMA 你好@Neo1096 我还没有收到内部论坛的回复，感谢您的耐心等待。 更新数据：2025 年 7 月 15 日。 Re: S32K3 SPD DMA 你好@Neo1096 我还没有收到内部论坛的回复，感谢您的耐心等待。 更新数据：7/7/2025。 Re: S32K3 SPD DMA 你好@Neo1096 我今天早上又催了一次，但还没有收到内部论坛的任何回复。 Re: S32K3 SPD DMA 有什么进展吗？ Re: S32K3 SPD DMA 你好@Ne01096 这可能是一个错误，我需要与设计团队确认我是否忽略了什么。 目前的情况是，只要我添加了 DMA 模块，它就会在初始化时钟时进入硬停机状态。 我在不同版本中进行了测试，结果都是一样的。 Re: S32K3 SPD DMA 我在 exceptions.c 中添加了一些代码主要用于处理由错误注入引起的硬件错误。其他部分保持不变。 Re: S32K3 SPD DMA 你好@Neo1096 我在测试您提供的项目"S32K312_SPD104_DMA_UART" 时遇到了您的问题。 我还没有找到原因，但从理论上讲，如果您的设置与"S32K312_SPD104" 相同，应该不会出现这样的问题。 明天我将尝试在"S32K312_SPD104" 中修改您的代码。 这需要一些时间，而且您可能已经修改了启动文件。 Re: S32K3 SPD DMA 我之前上传的代码可以运行。单独添加 FCCU 模块将导致操作失败。 我重新上传了两份代码。 根据 SPD104 版本，可以正确运行测试 RAM 和 FLASH 注入错误的文件。(S32K312_SPD104) 另一个无法正常运行。在前面的代码中额外添加 DMA+UART 部分，该部分将位于 Clock_Ip_SetWaitStates()；输入硬件中断 (S32K312_SPD104_DMA_UART) 请看一看。谢谢。 Re: S32K3 SPD DMA 你好@Neo1096 首先，我测试了你提供的项目，没有遇到你提到的问题。您能否提供更多信息，以及是否需要做一些改动？ 第二，对应于 4.0.0 的 SPD 版本P24 应为 1.0.4。您可以尝试安装 1.0.4 版，然后再试一次

OM27160 ラズベリー i2c NfcService 初期化失敗 OM27160A1HNをラズベリーパイにコネクテッドしています。 https://www.nxp.com/docs/en/application-note/AN12991.pdfの i2c の手順に従いました。 「nfcDemoApp poll」を実行すると、「NfcService Init Failed」というメッセージが表示されます。 これまで試したこと: ボードを二重にチェックしましたが、SPI ではなく I2C でした。 「i2cdetect -y 1」でi2cをスキャンしても何も表示されません。 他の i2c デバイスで動作することがわかっている 2 種類のラズベリー ナッツ クッキーで試しました。 デバッグを有効にしました。ログが添付されています。 今何をチェックすべきかアイデアがありますか? Re: OM27160 raspberry i2c NfcService Init Failed セットアップの詳細: Debian を実行している Raspberry Pi 5 (カーネル 6.12.25+rpt-rpi-2712、aarch64) NXP NFCチップ用のlinux_libnfc-nciライブラリの使用 /dev/i2c-1、/dev/i2c-13、/dev/i2c-14 のバスで I2C が有効 現在の問題: sudo i2cdetect -y 1 はデバイスを表示しません（すべて "--"） nfcDemoApp はコンパイルされますが、「NfcService Init Failed」で失敗します また、strings.cpp で C++ std::out_of_range 例外が発生します。 I2C スキャンでは、バス 1 に NFC ハードウェアが検出されないことが示されています。モジュールが正しくコネクテッドされていないか、NFC チップの I2C が正しく構成されていません。 ソースコードの分岐したブランチを使うと進歩しましたが、 @danielchenの返信を見た別の会話によると、皆さんはどこかにプライベートに保存された動作するソースコードのバージョンを持っているようです。 Re: OM27160 raspberry i2c NfcService Init Failed こんにちは@mikytron98さん、 CANセットアップの詳細を教えていただけますか?どの Raspberry Pi と Linux バージョンを使用していますか? BR トーマス Re: OM27160 raspberry i2c NfcService Init Failed 文脈的には、同じことが言えます: NfcService の初期化に失敗しました Elechouse クイック スタート ガイドに従っています。 私はM2チップを搭載したMacからSSH経由でPiにアクセスしています。ここで何が起こっているのかを正確に特定するのに役立つ追加のコンテキスト。 Re: OM27160 raspberry i2c NfcService Init Failed こんにちは@Tomas_Parizek 私も上記と同様の立場です。パッチ ファイルを見つけましたが、nfcDemoApp のポーリングを実行すると、依然として問題が発生します。sudo i2cdetect -y 1 を実行すると、ピンが検出されないことが示されます。他のセットアップで使用していて動作したため、Raspberry Pi が故障していないと判断しました。では、Pi が NFC コントローラを検出するようにするには、他にどのようなパッチを適用すればよいでしょうか? Re: OM27160 raspberry i2c NfcService Init Failed こんにちは、 KennyGさんとStephan_Bさん、 解決策はすでに用意されています。私の同僚が NXP NFC Knowledge base 経由でそれを共有します。 ここのリンクもすぐに更新します。 BR トーマス Re: OM27160 raspberry i2c NfcService Init Failed この問題は最新の Pi リリースで動作するように解決されましたか? よろしくお願いします！ --ケン Re: OM27160 raspberry i2c NfcService Init Failed ***アップデート*** --> 修正を見る https://community.nxp.com/t5/NFC-Knowledge-Base/Porting-PN7160-NCI2-stack-to-Raspberry-Pi-5-OS-Bookworm/ta-p/1977521 最新の Raspian Linux バージョン 12 (Bookworm) では、PN7160 が「NfcService Init Failed」を返すことがわかります。 Linux バージョン 11 (bullseye) の場合、この問題は発生しないはずです。 NXP はできるだけ早く修正するために取り組んでいます。 Re: OM27160 raspberry i2c NfcService Init Failed こんにちは@Tomas_Parizek 今日、セットアップがうまくいきました。古い Rasbian バージョン (bullseye) をインストールする必要がありましたが、その後はエラーなしでコンパイルされ、動作します。 どの OS / HW バージョンでテストされているかについては、「スタートガイド」にいくつかのヒントがあればよかったと思います。 よろしくお願いします。 ステファン Re: OM27160 raspberry i2c NfcService Init Failed こんにちは@Tomas_Parizek 私は Raspberry Pi 5 と Raspberry Pi 3 B+ で試してみました。32 ビット版と 64 ビット版の両方をテストしました。ただし、64 ビット バージョン用にコンパイルするときに、後で 64 ビット パッチ ファイルで見つかったコードの一部を修正する必要がありました。 次に、オシロスコープで I2C 信号が送信されているのをCAN確認できたので、これはハードウェアの問題であると想定しました。SO、別の EvalBoard を購入しましたが、まだ動作しません。 「NfcService の初期化に失敗しました」 「出発します…」 それが私が得たすべてです。OSに関してはRasbianを使っています。私は開発キットに付属していたRaspberry Shieldを使用し、ターミナル（SSH/Putty）経由ですべてをセットアップ/インストールしました。 ステファンより Re: OM27160 raspberry i2c NfcService Init Failed こんにちはStephan_Bさん、 セットアップの詳細を教えていただけますか？使用している Raspberry と OS は何ですか？ 最新の Raspberry には PN7160 の問題があるようですが、当社の SW チームがすでにそれを確認しています。 BR トーマス Re: OM27160 raspberry i2c NfcService Init Failed こんにちは@Tomas_Parizek 私も同じ問題を抱えています。I2C をチェックし、プラグを抜いて何度も再起動しましたが、常に「NfcService Init Failed」というメッセージが表示されます。セットアップを実行するために試すことができる他の提案はありますか? OM27160 が接続されているかどうかに関係なく、エラー メッセージは同じです。PN7160 が応答しているかどうかを確認する簡単な方法はありますか?ハードウェアに何らかの欠陥があるのでしょうか? よろしくお願いします。 ステファン Re: OM27160 raspberry i2c NfcService Init Failed 皆さん、完全なインストールを実行して、何かを変更できると信じているドライバを使用する時間がありませんでした。 同時に、解決策としてマークされているものは何も解決しません。私の説明を読めば、I2C を使用してさまざまなデバイスと通信することに問題がないことがわかります。SO、マークされたソリューションは、I2C を無効にすることによってそれ自体が作成した問題のみを解決します。 Re: OM27160 raspberry i2c NfcService Init Failed こんにちは、パウェルさん。 私は自分のRaspberry Piでテストしました 私はアプリに記載されている指示に正確に従いました。あなたが言及したことに注意してください。 結果は次のとおりです。 初めてですが、私もあなたと同じように「 NfcService Init Failed 」というエラー メッセージを受け取りました。 SO、PN7160 をソケットから取り外して元に戻し、I2C が有効になっているかどうかを確認しました。 すると、写真の通り、NFC アプリケーションが動作し始めました。 私が使用している HW に関する情報は次のとおりです。 また、最初にやったことがもうひとつあります。設定で I2C を有効にしました。 BR トーマス Re: OM27160 raspberry i2c NfcService Init Failed こんにちは、パウェルさん。 わかりました。Raspberry Pi を 1 台取り出して、私の側で PN7160 をチェックしてみます。 ところで、Raspberry Piの「シールド」を使用していますか、それともケーブル接続を使用していますか？ BR トーマス Re: OM27160 raspberry i2c NfcService Init Failed 7160 にファームウェアが欠落しているか、間違ったファームウェアがインストールされている可能性はありますか? SPI を試してみると役立ちますか? Re: OM27160 raspberry i2c NfcService Init Failed 以下は設定から抜粋した関連部分です。ビルディング前に構成が変更されました。 NXP_TRANSPORT=0x02 ############################################################################### # NFCデバイスノード名 NXP_NFC_DEV_NODE="/dev/i2c-1" strace ファイルには、正しいファイルが開かれていることが示されます。興味深いThreadからログのみを抜粋しました。 コマンドは「strace -ff -o strace.log nfcDemoApp poll」でした。 Re: OM27160 raspberry i2c NfcService Init Failed 設定は正しいです。/dev/i2c-1 を開いていることを示す strace ログを添付します。 Re: OM27160 raspberry i2c NfcService Init Failed こんにちは、パウェルさん。 libnfc-nxp.confを確認してください。お願いします？ ここでも I2C 代替ドライバを設定する必要があります。 I2Cの場合 -> NXP_TRANSPORT= 0x02 BR トーマス Re: OM27160 raspberry i2c NfcService Init Failed こんにちは@paweljasinski 、 あなたの調子が良いといいのですが。 PN7160 Linux 移植ガイドを参照してください。このドキュメントでは、汎用 GNU/Linux システムに PN7160 コントローラのサポートを追加する方法について詳しく説明します。 よろしく。 エドゥアルド。

EB RTDライセンス 申し訳ありませんが、eb の使用中にいくつか問題が発生しました。mcal モジュールをクリックすると、下の図に示すように、このモジュールのライセンスがないことが示されます。eblicense をアクティブ化して対応する rtd exe パッケージをインストールする以外に、実行する必要がある操作はありますか? Re: EB RTD license こんにちは、 RTD 自体にはライセンスは必要ありません。EB tresos のライセンスが不足している可能性があります。現在の EB Tresos アクティベーション キーは、NXP アカウントでCAN。

Need fastest possible LVGL graphics VGLite or PXP on iMX RT1176? I'm looking to achieve the fastest possible graphics, i.e. scrolling, animations, etc... on the iMX RT1176, running in landscape 720x1280. What settings / example LVGL demo could I reference? Right now I'm using the MIMXRT1170-EVKB and RK055HDMIPI4MA0 5.5" inch screen. Also using FreeRTOS, not bare metal... Thank you, Scott Re: Need fastest possible LVGL graphics VGLite or PXP on iMX RT1176? Hi @jingpan, @application_ninja  I am working on a LVGL to understand if I can use it in my project. That is why, I am using SDK examples and GUI Guider.  I have both MIMXRT1166 and MIMXRT1170 EVK Board. I run all examples in SDK and over GUI Guider directly. I especially focused on ScreenTransition Example in GUI Guider v1.9.0.  Till now, I tried many many possible scenarios to reach FPS values greater than 25-30FPS. However, I could not see it even though I enable GPU, which is VG-Lite or PXP or both of that. I experienced running UI just with CPU is working much better than enabling & using VGLite or PXP.  If CPU usage were too low levels, I will continue to my workings with only using CPU. However CPU usage for ScreenTransition Example in Gui Guider reaches over %90. So when my BSP involving later, I could not run and manage my project. That is why I focused to use VGLite. But surprisingly, using VGlite does not work at all. Just dropped CPU usage %70 levels but cause FPS values to 6-7 fps levels.  While I searching what else I can do more to improve UI Fps performance, I found your ticket. You mentioned that you reached 47fps levels on a 720 x 1280  display panel. So your experience is the exact my focus subject. As you read in below link, I tried many things but not close to 30fps or even 20-25 fps values at an acceptable CPU consuming usage. So, I really need your help how you obtained to reach 47fps levels?  I also opened a ticket for finding solution of the problem to GUI Guider side. Here is the link. You can read all the details what I have done so far to improve performance of LVGL UI. https://community.nxp.com/t5/GUI-Guider/LVGL-Demo-Example-Working-too-slowly-problem/td-p/2164492  Waiting your comments. Thanks in advance Re: Need fastest possible LVGL graphics VGLite or PXP on iMX RT1176? -O2 does help, but still not the performance I'd expect from this device. 😞 Re: Need fastest possible LVGL graphics VGLite or PXP on iMX RT1176? Hi @application_ninja , The original example report 20FPS on my board. If you set compile optimization level to -O2, it will be 34FPS.  The example use VGLite to off-load CPU work load. If you set  LV_USE_GPU_NXP_VG_LITE to 0, the weighted FPS is 24. And if you set compile optimization to -O2, it will be 47FPS. Regards, Jing Re: Need fastest possible LVGL graphics VGLite or PXP on iMX RT1176? I have tried GUI Guider and the results are still slow, this is why I am asking what are the optimal settings that can be used to achieve the best results? I would think a dual core 1Ghz processor should produce lighting fast graphics, but that's just not the case. Running the example "benchmark" LVGL programs result in less than 15fps, is this normal / expected? Re: Need fastest possible LVGL graphics VGLite or PXP on iMX RT1176? Hi @application_ninja , Please use GUI Guider. It's base on LVGL and is optimized for RT1176 and PXP. https://www.nxp.com/design/software/development-software/gui-guider:GUI-GUIDER Regards, Jing 

S32K3 SPD DMA Hello. I use RTD400 and SPD105, and the development board is the S32K312 144P development board I added the FCCU module to the tested UART+DMA program without making any Settings. Even if the header file is not referenced and the FCCU part is not initialized in the code, the program will die at Clock_Ip_SetWaitStates I added the uart module normally in the tested SPD module program (including RAM and flash injection errors), and then added the DMA module without making any Settings. Even if the header file and the initialization Fdma part are not referenced in the code, the program will still be in the function Clock_Ip_SetWaitStates(); Then it enters a hardware error interrupt. I uploaded the code of UART+DMA without adding the FCCU module, and it can run normally. However, after adding it, there will be a hardware error in the clock initialization program. What could be the reason for this and how can this problem be solved? Re: S32K3 SPD DMA I encountered a similar problem. It works when I use UART Interrupt mode of S32K312, but it enter HardFault_Handler(), when I running Lpuart_Uart_Ip_AsyncSend() or Lpuart_Uart_Ip_AsyncReceive()  after Dma_Ip_Init() and Rm_Init(). Can anybody help me? Re: S32K3 SPD DMA Hi@Neo1096 Sorry, we cannot support IAR, you can refer to the link file we provide to modify it. Re: S32K3 SPD DMA Could you provide the icf file? I need to use it in IAR Re: S32K3 SPD DMA Hi@Neo1096 We found the cause of the problem. This is because of the configuration problem of the link file provided by S32 DS. We replaced the link file in the SPD package with that in S32 DS, and this problem can be solved. So please refer to the link file in the attachment for further testing. Re: S32K3 SPD DMA Hi@Neo1096 The internal team has reproduced the problem and is currently eliminating possible causes. Update time : 7/23/2025. Re: S32K3 SPD DMA Hi@Neo1096 I haven't received a response from the internal forum yet, thank you for your patience. Update data:15/7/2025. Re: S32K3 SPD DMA Hi@Neo1096 I haven't received a response from the internal forum yet, thank you for your patience. Update data:7/7/2025. Re: S32K3 SPD DMA Hi@Neo1096 I pushed again this morning, but I haven't received any response from the internal forum yet. Re: S32K3 SPD DMA Has there been any progress？ Re: S32K3 SPD DMA Hi@Ne01096 This may be a bug, I need to confirm with the design team if I have overlooked something. The current situation is that as long as I add the DMA module, it will enter hardfalut when initializing the clock. I have tested it in different versions and the results are the same. Re: S32K3 SPD DMA I added some code in exceptions.c under the Startup_Code folder, mainly to handle the hardware errors caused by error injection. The other parts remain unchanged. Re: S32K3 SPD DMA Hi@Neo1096 I encountered your problem when testing the project "S32K312_SPD104_DMA_UART" you provided. I haven't found the reason yet, but in theory, if your settings are the same as "S32K312_SPD104", there shouldn't be such a problem. I will try to modify your code in "S32K312_SPD104" tomorrow. It will take some time, and you may have modified the startup file. Re: S32K3 SPD DMA The code I uploaded before can run. Adding the FCCU module separately will cause the operation to fail. I re-uploaded two copies of the code. A file that can run correctly tests RAM and FLASH injection errors based on the SPD104 version. (S32K312_SPD104) Another one cannot run correctly. It is to add the DMA+UART part additionally in the previous code, which will be in Clock_Ip_SetWaitStates(); Enter the hardware interrupt (S32K312_SPD104_DMA_UART) Please have a look. Thank you. Re: S32K3 SPD DMA Hi@Neo1096 First,I tested the project you provided, and I did not encounter the problem you mentioned. Can you provide more information and whether some changes are needed? Secondly, the SPD version corresponding to 4.0.0 P24 should be 1.0.4. You can try to install version 1.0.4 and try again

S32G3: RTD MemMap セクション違反 (LLCE の場合) こんにちは、 「 [S32G3/Valeo] RTD MemMap セクション違反 - NXP コミュニティ」の提案に従い、LLCE の xxx_MemMap レビュー用のチケットを以下のように作成します (完全なドキュメントを添付します)。 GHS でコンパイルした後、以下のパラメータ/関数が適切なメモリ領域に含まれていないかどうかを確認してください。 ================================================================= (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_AFcfg.c: Llce_Eth2Can_EnabledFormats => BSSSセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ pLlce_Can_AfBuffer => rodataセクションであるCAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIEDのデータ (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_MAIN_SOC_PBcfg.c: // VariantPostBuildが有効になっています (MAIN_SOC) Llce_Rx_Filters_List_MAIN_SOC => rodataセクションであるCAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIEDのデータ Llce_RxAf_Filters_List_MAIN_SOC => rodataセクションのCAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIEDのデータ Llce_Rx_Filters_Ctrl0_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ（rodata セクション） Llce_Rx_Filters_Ctrl2_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ（rodata セクション） Llce_Rx_Filters_Ctrl4_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ（rodata セクション） Llce_Rx_Filters_Ctrl9_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ（rodata セクション） Llce_Rx_Filters_Ctrl15_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ（rodata セクション） Llce_RxAf_Filters_Ctrl0_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ（rodata セクション） Llce_RxAf_Filters_Ctrl5_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ（rodata セクション） Llce_RxAf_Filters_Ctrl9_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ（rodata セクション） Llce_RxAf_Filters_Ctrl15_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ（rodata セクション） (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_Llce: llce_minihif => 静的グローバル変数が Can_43_LLCE_MemMap.h に含まれていません u8Length => 静的ローカル変数は Can_43_LLCE_MemMap.h に含まれていません stringBuf => 静的ローカル変数は Can_43_LLCE_MemMap.h に含まれていません ***************************************************************************************************************************************************************** 回答: この質問は、NXPコミュニティのタグ「LLCE」を介してLLCEチームに提起してください。 ***************************************************************************************************************************************************************** LLCE Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 修正が予定されているかどうかご存知ですか?もしSOなら、いつですか? Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 あなたの質問に関して、Valeo からの非常に遅いフィードバック: 1. 「Llce_Eth2Can_EnabledFormats => bssセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ」とおっしゃった場合、 Llce_Eth2Can_EnabledFormats は、たとえば .mcal_bss_no_cacheable にあるべきだと言っていますが、実際には .bss セクションに配置されていますか? この変数は4の値で初期化されていますが、変数は.dataではなく.bssセクション内にあります。セクションSO、変数はたとえば .mcal_data_x にある必要があります。 2.グローバル静的変数llce_minihif を適切な MemMap セクションに含めます。u8Length/ stringBuf は関数の静的変数であり、SWS_MemMap_00023 に従って関数の本体内に MemMap を追加できないため、MemMap の制御下にありません。MemMap セクションでそれらを制御する必要がある場合は、AUTOSAR の推奨事項に従うことができます。 「関数の静的変数の特別なメモリ マッピングを強制するには、この変数をファイルの静的スコープに移動する必要があります。」 この変数はCan_43_LLCE_TS_T40D11M10I10R0で修正されたようです。 3. Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ については、正しいセクションに配置しましたか? 下の画像を見ると、(static、static const) がありますが、それらはすべて .mcal_cont_cfg という同じセクションに配置されています。これは rodata であり、このファイルは生成されるSO、どのセクションに配置するかは私の責任ではありません。 以前のやり取りでは、新しいソフトウェア バージョンがないため、次のリリースではソフトウェア アップデートは行われないと予想されていました。それはまだCASEなのでしょうか? Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、コングさん。 弊社側からの回答をお客様にまとめましたが、今のところそれ以上のフィードバックはありません。 あなたが提起した LLCE に関する質問に対するさらなるフィードバックをお願いするために、お問い合わせに個別のメールを送信しました。 お客様からの返信があればここで更新します。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、リチャード。 更新情報をありがとうございます! S32GのCDは2025年3月にリリース予定で、2025年5月にもリリース予定です。それ以降のリリース予定はありません。SO、このトピックに関する情報を収集し、これらの実装を2025年5月のリリースに組み込む予定です。 最初の回答の質問に対するフィードバックをお願いします。 1. 彼らの言っていることは正しく理解していますか？例えば、 「Llce_Eth2Can_EnabledFormats => BSSSセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ」と書いてある場合、 Llce_Eth2Can_EnabledFormats は、たとえば .mcal_bss_no_cacheable にあるべきだと言われていますが、実際には .bss セクションに配置されていますか? 2.グローバル静的変数llce_minihif を適切な MemMap セクションに含めます。u8Length/ stringBuf は関数の静的変数であり、SWS_MemMap_00023 に従って関数の本体内に MemMap を追加できないため、MemMap の制御下にありません。MemMapセクションで制御する必要がある場合は、AUTOSARの推奨事項に従うことができます。 「関数の静的変数に特別なメモリマッピングを強制するには、この変数をファイルの静的スコープに移動する必要があります。」これは強い要求であるとCANご確認いただけますか？ 3.Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ については、お客様がこれを間違ったセクションに配置されていると考える理由を確認しましたか? Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 修正の期待に関する元のチケットの更新によると、お客様は 6 月までにコードをフリーズする予定です。 多くのコンポーネントが関係しており、パッチが必要なため、6月までにそれらをまとめるのは難しいでしょう。 SO、お客様からさらに指示がない限り、現在の想定/リソースに従って計画を立ててください。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、コングさん。 更新が遅くなり申し訳ございませんが、元のチケットでわかるように、お客様からのフィードバックはまったくありません。 私はこれを再度推進しますが、現状の評価に応じて計画を立てることがCANそうです。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、リチャード。 このトピックに関して何か最新情報はありますか? S32G の 3 月の CD にできるだけ早く実装する必要があります。 よろしくお願いいたします。 コング Re: S32G3: RTD MemMap Sections Violations (For LLCE) 2. はい、これらの詳細を記録するためにチケットAF-4950を作成しました。チケットの詳細を確定するために、上記の質問の確認を待っています。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 更新情報をありがとうございます。 1.Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ については、なぜお客様がこれを間違ったセクションに配置されていると考えるのかをさらに確認します。 2. 残りの部分については、適切なセクションが含まれるように修正するとおっしゃっていましたが、修正するためのチケットや計画は用意されていて、お客様と共有できますか? 3. 元のチケット「 [S32G3/Valeo] RTD MemMap セクション違反 - NXPコミュニティ」に記載されているように、FAE はこの問題の修正に関するお客様の期待について確認しており、追加情報が入りましたらここで更新します。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 まず、レポートを理解する必要があります。「Llce_Eth2Can_EnabledFormats => bssセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ」と書かれている場合、 Llce_Eth2Can_EnabledFormatsは例えば.mcal_bss_no_cacheable、しかし、実際には.bssに配置されますセクション？ 上記の前提となる理解に従うと、フィードバックは次のようになります。 NXP は次のことを行います。 • グローバル静的変数 llce_minihif を適切な MemMap セクションに含めます。u8Length/ stringBuf は関数の静的変数であり、SWS_MemMap_00023 に従って関数の本体内に MemMap を追加できないため、MemMap の制御下にありません。MemMap セクションでそれらを制御する必要がある場合は、AUTOSAR の推奨事項に従うことができます。「関数の静的変数の特別なメモリ マッピングを強制するには、この変数をファイルの静的スコープに移動する必要があります。」これは強い要求であることをCAN確認できますか? • グローバル静的変数定義llce_minihifを適切なMemMapセクションに含める • Llce_Eth2Can_EnabledFormats の宣言を対応する MemMap セクションに含めます。これがおそらく置き忘れの原因です。 • pLlce_Can_AfBuffer の宣言を対応する MemMap セクションに含め、現在の MemMap セクションが適切かどうかを再確認します。 • Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ はすでに対応する MemMap セクションに配置されているため、変数の配置ミスの原因を特定するには追加の分析が必要です。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 アップデートはありますか？ よろしくお願いいたします。 リチャード・チャン。

OM27160 raspberry i2c NfcService Init Failed I have a OM27160A1HN connected to raspberry pi. I have followed the instructions for i2c from https://www.nxp.com/docs/en/application-note/AN12991.pdf When I run "nfcDemoApp poll", I get the "NfcService Init Failed". What I tried so far: I have double checked the board and it is i2c and not spi. Scanning of the i2c with "i2cdetect -y 1" does not show anything. I have tried with 2 different raspberries, which are knows to work with other i2c devices. I have enabled debug, log is attached. Any idea what should I check now? Re: OM27160 raspberry i2c NfcService Init Failed Setup Details: Raspberry Pi 5 running Debian (kernel 6.12.25+rpt-rpi-2712, aarch64) Using linux_libnfc-nci library for NXP NFC chips I2C enabled with buses at /dev/i2c-1, /dev/i2c-13, /dev/i2c-14 Current Issue: sudo i2cdetect -y 1 shows no devices (all "--") nfcDemoApp compiles but fails with "NfcService Init Failed" Also getting C++ std::out_of_range exception in strings.cpp The I2C scan suggests no NFC hardware is detected on bus 1. Either the module isn't connected properly or I2C isn't configured correctly for the NFC chip. I made progress when I used a forked branch of the source code but it seems you guys have a version of the source code that works saved privately somewhere based on another conversation I saw @danielchen reply in Re: OM27160 raspberry i2c NfcService Init Failed Hello @mikytron98 ,  Can you share more details about your setup? Which Raspberry Pi and Linux version are you using?  BR Tomas  Re: OM27160 raspberry i2c NfcService Init Failed For context, I am getting the same: NfcService Init Failed and have been following the Elechouse Quick start guide. I am access the Pi via SSH from my mac that has M2 chip. Some additional context that can help pinpoint what is going on here. Re: OM27160 raspberry i2c NfcService Init Failed Hello @Tomas_Parizek I am in a similar position as the above. I found the patch file and still running into issues when I run nfcDemoApp poll. When I run sudo i2cdetect -y 1 it shows none of the pins are detected. I determined the raspberry pi is not fried because I am using with other setups and it worked. So what other things can I try to patch to get the pi to detect the NFC controller? Re: OM27160 raspberry i2c NfcService Init Failed Hello KennyG and Stephan_B,  The solution is already in place. My colleague will share it via NXP NFC Knowladge base.  I will also update the link here soon.  BR Tomas  Re: OM27160 raspberry i2c NfcService Init Failed Has this been resolved to work on the latest Pi releases? Thanks! --Ken Re: OM27160 raspberry i2c NfcService Init Failed ***UPDATE*** --> See the fix  https://community.nxp.com/t5/NFC-Knowledge-Base/Porting-PN7160-NCI2-stack-to-Raspberry-Pi-5-OS-Bookworm/ta-p/1977521 We see that the PN7160 returns "NfcService Init Failed" for latest Raspian Linux version 12 (Bookworm). For Linux version 11 (bullseye), the issue should not occur.  NXP is working to fix it as as soon as possible.  Re: OM27160 raspberry i2c NfcService Init Failed Hello @Tomas_Parizek  Today, I got my setup working. I had to install an old Rasbian version (bullseye) and then it compiled without error and it works. Would have been nice to have some pointers in the "get started guide" concerning which OS / HW versions this has been tested with. Regards Stephan Re: OM27160 raspberry i2c NfcService Init Failed Hello @Tomas_Parizek  I used a tried with a Raspberry Pi 5 as well as with a Raspberry Pi 3 B+. I tested both 32 and 64bit versions. Though when compiling for the 64bit version I needed to correct some of the code as I later found in the 64bit patch file. I then assumed, that it is a HW problem, as I can see the I2C signals being sent with the oscilloscope. So I bought another EvalBoard, but it still not working. "NfcService Init Failed" "Leaving ..." is all i get. As for the OS, I am working with Rasbian. I use the Raspberry Shield, that came with the Developmentkit and setup/installed everything via the Terminal (SSH/Putty) Regards Stephan Re: OM27160 raspberry i2c NfcService Init Failed Hello Stephan_B,  Can you share more details about your setup.... what Raspberry and OS are you using, please?  It seems that the latest Raspberry has an issue with our PN7160, our SW team is already checking that.  BR Tomas  Re: OM27160 raspberry i2c NfcService Init Failed Hi @Tomas_Parizek  I have the same issue. I've checked the I2C, unplugged and rebooted multiple times but I always get the "NfcService Init Failed". Do you have any more suggestions I could try to get my setup running? The error message is the same whether the OM27160 is plugged in or not. Is there a easy way to verify whether the PN7160 is responding? Maybe my hardware has some defect? Thanks Stephan Re: OM27160 raspberry i2c NfcService Init Failed guys, I had no time to perform the full install and try to use the driver which I believe can change something. At the same time what is marked as solution, does not solve anything. If you read my description, I have no problem talking to different devices using I2C. So the marked solution solves only the problem it created itself by disabling I2C. Re: OM27160 raspberry i2c NfcService Init Failed Hello Pawel,  I just tested with the Raspberry Pi on my side  I exactly followed the instructions listed in the App. Note you have mentioned.  Here is the result: You can see that for the first time, I also got the "NfcService Init Failed" error message as you.  So I removed the PN7160 from the socket and put it back + I checked if the I2C was enabled.  Then the NFC application started to work as you can see in the picture.  Here is the information about HW that I am using:  Also, one more thing I did at the beginning. I enabled the I2C in preferences: BR Tomas  Re: OM27160 raspberry i2c NfcService Init Failed Hello Pawel,  Ok, I see. Let me grab one Raspberry Pi and check with PN7160 on my side.  BTW. Are you using a raspberry Pi "shield" or are you using a cable connection?  BR Tomas  Re: OM27160 raspberry i2c NfcService Init Failed Is it possible that the 7160 is missing firmware or has a wrong firmware? Would trying with SPI help? Re: OM27160 raspberry i2c NfcService Init Failed here is the relevant snipped from the config. The config was changed before building. NXP_TRANSPORT=0x02 ############################################################################### # Nfc Device Node name NXP_NFC_DEV_NODE="/dev/i2c-1" The strace file shows that the correct file is open. I have selected only the log from interesting thread. The command was: "strace -ff -o strace.log nfcDemoApp poll" Re: OM27160 raspberry i2c NfcService Init Failed The setting are correct. I will attach strace log which shows opening /dev/i2c-1 Re: OM27160 raspberry i2c NfcService Init Failed Hello Pawel,  Can you check the libnfc-nxp.conf, please?  You need to set the I2C alternative driver also here: So for I2C -> NXP_TRANSPORT=0x02 BR Tomas  Re: OM27160 raspberry i2c NfcService Init Failed Hello @paweljasinski, Hope you are doing well. Could you please refer to the PN7160 Linux porting guide? This document describes in detail how to add support for a PN7160 controller to a generic GNU/Linux system. Regards. Eduardo.

EB RTD 许可证 对不起，我在使用 eb 时遇到了一些问题。如下图所示，当我点击 mcal 模块时，显示我没有该模块的许可证。除了激活 eblicense 和安装相应的 rtd exe 软件包之外，我还需要执行其他操作吗？ Re: EB RTD license 你好、 RTD 本身不需要任何许可证。您可能缺少 EB tresos 的许可证。您可以在恩智浦账户中找到当前的 EB Tresos 激活密钥。

OM27160 raspberry i2c NfcService Init 失败 我有一个连接到 raspberry pi 的 OM27160A1HN。 我按照https://www.nxp.com/docs/en/application-note/AN12991.pdf上的说明进行了 i2c 操作。 当我运行"nfcDemoApp poll" 时，我收到"NfcService Init Failed" 。 我目前尝试过的 我仔细检查了板，它是 i2c 而不是 spi。 使用"i2cdetect -y 1" 扫描 i2c，没有任何显示。 我尝试过 2 种不同的覆盆子，据说它们可以与其他 i2c 设备配合使用。 我已启用调试功能，日志附后。 我现在应该检查什么？ Re: OM27160 raspberry i2c NfcService Init Failed 设置详情： 运行 Debian（内核 6.12.25+rpt-rpi-2712，aarch64）的 Raspberry Pi 5 为恩智浦 NFC 芯片使用 linux_libnfc-nci 库 启用 I2C，总线位于 /dev/i2c-1、/dev/i2c-13、/dev/i2c-14 本期： sudo i2cdetect-y 1 不显示任何设备（全部 "--"） nfcDemoApp 编译失败，显示"NfcService Init Failed" 还在 strings.cpp 中出现 C++ std:: out_of_range 异常 I2C 扫描表明总线 1 上未检测到 NFC 硬件。要么是模块连接不正确，要么是 NFC 芯片的 I2C 配置不正确。 我在使用源代码的分叉分支时取得了进展，但根据我看到@danielchen在另一个对话中的回复，你们似乎私下在某个地方保存了能正常工作的源代码版本 Re: OM27160 raspberry i2c NfcService Init Failed 你好@mikytron98、 能否详细介绍一下您的设置？您使用的是哪种 Raspberry Pi 和 Linux 版本？ BR 托马斯 Re: OM27160 raspberry i2c NfcService Init Failed 根据上下文，我也收到了同样的信息： NfcService Init 失败 并一直在使用 Elechouse 快速入门指南。 我通过装有 M2 芯片的 Mac 以 SSH 方式访问 Pi。一些额外的背景信息可以帮助确定这里发生了什么。 Re: OM27160 raspberry i2c NfcService Init Failed 你好@Tomas_Parizek 我的情况与上述情况类似。我找到了补丁文件，但在运行 nfcDemoApp 轮询时仍遇到问题。当我运行 sudo i2cdetect -y 1 时，显示没有检测到任何引脚。我确定 raspberry pi 没有烧坏，因为我在其他设备上使用过，而且也能正常工作。那么我还能尝试修补哪些其他东西来让 pi 检测 NFC 控制器呢？ Re: OM27160 raspberry i2c NfcService Init Failed 你好 KennyG和 斯蒂芬_B, 解决方案已经到位。我的同事将通过恩智浦 NFC Knowladge 基地与大家分享。 我也会尽快更新这里的链接。 BR 托马斯 Re: OM27160 raspberry i2c NfcService Init Failed 这个问题已经解决了适用于最新的 Pi 版本吗？ 谢谢您！ --肯 Re: OM27160 raspberry i2c NfcService Init Failed ***更新**** --> 查看修复 https://community.nxp.com/t5/NFC-Knowledge-Base/Porting-PN7160-NCI2-stack-to-Raspberry-Pi-5-OS-Bookworm/ta-p/1977521 我们看到，对于最新的 Raspian Linux 版本 12 (Bookworm)，PN7160 返回"NfcService Init Failed" 。 对于 Linux 版本 11（靶心），这个问题应该不会出现。 恩智浦正在努力尽快修复。 Re: OM27160 raspberry i2c NfcService Init Failed 你好@Tomas_Parizek 今天，我的设置成功了。我不得不安装一个旧的 Rasbian 版本（bullseye），然后编译无误，可以正常工作。 如果能在"入门指南" 中提供一些指向性信息，说明已对哪些操作系统/硬件版本进行了测试，那就更好了。 此致 斯蒂芬 Re: OM27160 raspberry i2c NfcService Init Failed 你好@Tomas_Parizek 我用 Raspberry Pi 5 和 Raspberry Pi 3 B+ 都试过。我测试了 32 位和 64 位版本。不过在编译 64 位版本时，我需要更正一些代码，后来我在 64 位补丁文件中发现了这一点。 于是我认为是硬件问题，因为我可以用示波器看到 I2C 信号的发送。于是我又买了一块 EvalBoard，但它仍然无法工作。 "NfcService Init Failed" " Leaving ..." 是我得到的全部信息。至于操作系统，我正在使用 Rasbian。我使用的是开发套件附带的 Raspberry 子卡，然后通过终端（SSH/Putty）设置/安装了所有东西 问候 Stephan Re: OM27160 raspberry i2c NfcService Init Failed 你好 史蒂芬_B, 请提供有关您的设置的更多详细信息....，您使用的是什么树莓和操作系统？ 最新的树莓机似乎与我们的 PN7160 有问题，我们的 SW 团队已经在检查这个问题。 BR 托马斯 Re: OM27160 raspberry i2c NfcService Init Failed 你好@托马斯-帕里泽克 我也有同样的问题。我检查了 I2C，拔掉电源插头并重启了多次，但总是得到"NfcService Init Failed" 。您还有什么建议可以让我尝试运行我的设置吗？ 无论是否插入 OM27160，错误信息都是一样的。有什么简单的方法可以验证 PN7160 是否有响应？也许我的硬件有缺陷？ 谢谢！ 斯蒂芬 Re: OM27160 raspberry i2c NfcService Init Failed 伙计们，我没有时间进行完全安装并尝试使用驱动程序，我相信它能改变一些东西。 同时，标记为解决方案的东西并不能解决任何问题。如果你阅读我的描述，我使用I2C与不同的设备通话没有问题。因此，标记的解决方案只能通过禁用 I2C 来解决它自己造成的问题。 Re: OM27160 raspberry i2c NfcService Init Failed 你好，帕维尔、 我刚刚用我这边的 Raspberry Pi 进行了测试 我完全按照应用程序中列出的说明进行了操作。请注意您提到的 结果如下： 你可以看到，我第一次也收到了" NfcServiceInit Failed" 错误信息。 因此，我将 PN7160 从插座中取出，然后放回插座 + 检查 I2C 是否启用。 然后，NFC 应用程序开始工作，如图所示。 以下是我正在使用的 HW 的相关信息： 另外，我在一开始还做了一件事。我在首选项中启用了 I2C： BR 托马斯 Re: OM27160 raspberry i2c NfcService Init Failed 你好，帕维尔、 好吧，我明白了。让我抓起一个树莓派，用我这边的 PN7160 检查一下。 顺便说一句。你在使用树莓派 " shield " 还是在使用电缆连接？ BR 托马斯 Re: OM27160 raspberry i2c NfcService Init Failed 7160 有没有可能缺少固件或固件有误？ 尝试使用 SPI 会有帮助吗？ Re: OM27160 raspberry i2c NfcService Init Failed 以下是从配置中截取的相关内容。配置在构建前已更改。 NXP_TRANSPORT=0x02 ################################################################### N FC_DEV_NODE_NODE = " /dev/i2c-1 " strace 文件显示打开了正确的文件。我只选择了有趣主题中的日志。 命令是："strace -ff -o strace.log nfcDemoApp poll" Re: OM27160 raspberry i2c NfcService Init Failed 设置正确。我将附上跟踪日志，其中显示打开了 /dev/i2c-1 Re: OM27160 raspberry i2c NfcService Init Failed 你好，帕维尔、 请检查libnfc-nxp.conf 文件、请 您还需要在此处设置 I2C 替代驱动程序： 因此，对于 I2C -> NXP_TRANSPORT=0x02 BR 托马斯 Re: OM27160 raspberry i2c NfcService Init Failed 你好，@paweljasinski、 希望你一切顺利。 请参考PN7160 Linux 移植指南。本文档详细介绍了如何在通用 GNU/Linux 系统中添加对 PN7160 控制器的支持。 Eduardo.

MIMXRT1170 Interrupt issue Hi Everyone, I want to ask something about GPIO external interrupt. In the MIMXRT1170_igpio_input_interrupt example, GPIO13_io0 pin is defined as input and is enabled rising edge interrupt. I want to GPIO8_io29 instead of GPIO13_io0. But I can't see any interrupt handler for gpio8. How can I define gpio8_29 as external interrupt? Re: MIMXRT1170 Interrupt issue Hi @EdwinHz, I recently saw this answer you gave and started wondering whether it's actually true as something was off for me. You stated that "GPIO7 through GPIO12 are all accessible only by the CM4 domain", so I started looking through RM and I found the following: The description of AIPS-4 clearly says that this memory map range is accessible by both CM7 and CM4 cores. So from my understanding, it stands in contradiction with what you stated some time ago. What is more, I think the Bus Diagram that you pasted, actually has a bus connection to the GPIO[12-7] through the following route (provided that my understanding is correct): I sort of assumed the flow looks like that based on the information from RM that says those PGIOs are accessible. Please correct me if I'm wrong but something is definitely off and I feel it should be straightened out. Best Regards, Michael Re: MIMXRT1170 Interrupt issue I encountered the same problem. Is there any progress? Re: MIMXRT1170 Interrupt issue Thanks Edwin, I understand Re: MIMXRT1170 Interrupt issue Hi @muratokusluk, Although most of the pins are accessible by both the CM7 domain and the CM4 domain, GPIO7 through GPIO12 are all accessible only by the CM4 domain: GPIO8 is therefore only intended for CM4 access, so it does not have a CM7 interruption. Note how "Table 4-2. CM4 domain interrupt summary" from the Reference Manual has GPIO7 through GPIO11 on IRQ 99: But "Table 4-1. CM7 domain interrupt summary" has CM7_GPIO2 and CM7_GPIO3 IRQs instead: That said, GPIO_EMC_B2_19, which is the pad that routes GPIO8_IO29, also routes GPIO_MUX2_IO29 when using alt function 5 rather than 10: Therefore, you can configure the pad and interruption for GPIO8 with IRQ 99 when using CM4 or configure the same pad and interruption for CM7_GPIO2 when using CM7, and the IRQ will continue being IRQ 99 (CM7_GPIO2). If you base your project on ipgio_input_interrupt_cm4 rather than cm7, you will find "GPIO7_8_9_10_11_IRQHandler()" on startup_mimxrt1176_cm4.c I hope this answers your question. BR, Edwin.

IMX8 Video overlay with graphics before H264 encode Hi we are designing a visual inspection system using a 1920x1080p30 video camera. We need to overlay graphics onto the video stream prior to H264 encode as well as to the display on a low power system. I am not finding any information on how to do this with a SOC like an iMX8M-Plus. The iMX6 had an IPU that could compose/overlay graphics onto the video stream although at a max resolution of 1024x1024 (could do this 4 x for 1920x1080). The iMX8M family seems to have lost this aspect of video processing. So I guess the 2D or 3D GPU would have to do this composition/overlay to memory while also performing normal display work. It appears there are no gstreamer plugins to handle this so I would have to create something. However at this stage I want to know: 1. Would the iMX8-Plus hardware be capable of this with minimal CPU usage (camera would be YUV I422/I421 and composer/overlay output needs to be fed to the VPU encoder (NV12 ?) as well as to the display) ? 2. Any ideas on how to go about this ? We would have to use the GPU whilst the normal X11/Wayland graphics GUI is in use and feed the data through zero copy dma buffer pipeline etc. Terry Re: IMX8 Video overlay with graphics before H264 encode Its simple in our application. The overlay QImage is created asynchronously about once per second (Actually two QImages, one being drawn, one for display with a Mutex for switching between). The gstreamer appsrc element is configured to emit video frames at 5 fps and takes the QImage and injects it into the gstreamer stream via the imxcompositor_g2d. ogstOverlaysrc=gst_bin_get_by_name(GST_BIN(ogstPipeline), "appsrc"); if(ogstOverlaySrc){ g_object_set(G_OBJECT(ogstOverlaySrc), "caps", gst_caps_new_simple("video/x-raw", "format", G_TYPE_STRING, "BGRA", "width", G_TYPE_INT, osize.width(), "height", G_TYPE_INT, osize.height(), "framerate", GST_TYPE_FRACTION, 5, 1, NULL), NULL); g_object_set(G_OBJECT(ogstOverlaySrc), "stream-type", 0, // GST_APP_STREAM_TYPE_STREAM "format", GST_FORMAT_TIME, "is-live", FALSE, NULL); g_signal_connect(ogstOverlaySrc, "need-data", G_CALLBACK(gstOverlayAddFrameCallback), gpointer(this)); }  Pipeline bits: imxcompositor_g2d name=c latency=20000000 sink_1::alpha=1.0 ! identity drop-allocation=true v4l2src device=/dev/video3 ! video/x-raw,width=1920,height=1080,framerate=25/1 ! c.sink_0 appsrc name="appsrc" ! videoconvert ! video/x-raw,format=ARGB ! c.sink_1 Re: IMX8 Video overlay with graphics before H264 encode Thank you for the detailed answer! A few more questions based on this, if you don't mind: 1. How are you keeping the QT overlay and the video frames in sync? I presume the data overlay needs to be correctly synchronized to the video frame to which it corresponds to. 2. I'm not that experienced with the QT + Gstreamer combination, can you please give a few more details about how these two are interfaced? I found some information on how to get video using Gstreamer inside QT Apps, but not what we're trying to do. PS: My initial interpretation of your post is that you're saving the overlay as an image and then injecting that using appSrc. That link is what's not that clear to me.  Thank you! Re: IMX8 Video overlay with graphics before H264 encode Well we have an analogue camera feeding a 1920x1080p25 video stream and are overlaying on that. We create the overlay image using Qt into a QImage of the full 1920x1080 size and then use a gstreamer appSrc to inject this into one of the imxcompositor_g2d sources along with the video stream with alpha=1.0. In our case we generate the appSrc gstreamer overlay frames at 5 fps to save CPU usage on the Qt drawing side as we don't need it any faster than this, but have done the full 25 fps without issue. With our system which is capturing a FHD video stream, overlaying text/graphics, displaying on a LCD panel while H264 encoding and saving toi a file as well as managing a sound stream, the overal usage (4 cores) of the imx8mp is about 25%. But working with the IMX8mp with gstreamer is a bit of a minefield. It is relatively complex system under the hood without detailed documentation and this means you often have to play with gstreamer arrangements and settings, quite a few which are not obvious, to get things working efficiently. Re: IMX8 Video overlay with graphics before H264 encode @TerryBarnaby1 , what sort of framerate were you able to get using this solution? We're evaluating different options and there are very little resources on what potential solutions are to draw shapes or overlay text on frames captured from the camera. Thanks! Re: IMX8 Video overlay with graphics before H264 encode hello Terry In my case,  consider use case like simple wayland application with a video window inside it with a position and resolution configured , what could be the best approach ?should I use multiple egl surfaces ? or wayland sub-surfaces ? could you suggest which approach would be better? Re: IMX8 Video overlay with graphics before H264 encode hello  Any inputs on my above query ? is waylandsink has limitation with respect to alpha property ? Also any Idea how to use chromakey  property  using GPU/VPU ?  Re: IMX8 Video overlay with graphics before H264 encode hello NXP the alpha property of waylandsink is not working (5.4.70- imx8mplus) , is there any limitation?  Re: IMX8 Video overlay with graphics before H264 encode Hello  consider  simple wayland application which run multiple videos in it And another point , I am trying to use alpha property of waylandsink (imx8m-plus) which is not working, any limitation here ? Re: IMX8 Video overlay with graphics before H264 encode I guess that depends on exactly what you want to do. You will need to understand the iMX8mp hardware, the implemented gstreamer modules, the wayland server code, your GUI toolkit etc. info on which is lacking and I'm no expert. And it also depends on what you mean by Wayland GUI layer. In my case I needed to overlay some text on the video stream prior to displaying it in a Qt window as well as h264 encoding it to a file and I am using the Qt GUI platform. In my code the graphical "layer" (which comes from test1.png in my example) that is overlaid on the video is generated in a Qt QImage using normal Qt drawing primitives and the gstreamer "appsrc name=\"appsrc\" ! videoconvert ! imagefreeze ! c.sink_1" partial pipeline is used to feed this into the imxcompositor_g2d. The screen output is "waylandsink name=\"videoSink\"" and there is some C++ GUI code to move and size this walyandsink area over a particular Qt window in my application. Re: IMX8 Video overlay with graphics before H264 encode Hello Terry Thanks for the inputs, If I want to blend video  layer with wayland GUI layer is it possible with similar approach ? Re: IMX8 Video overlay with graphics before H264 encode With the current (NXP Yocto hardknott) based Linux I have found you can to use the graphics 2D engine to perform the overlay processing. The gstreamed imxcompositor_g2d module can do this. A typical gstreamer command could be like: gst-launch-1.0 imxcompositor_g2d name=c sink_1::alpha=0.5 ! waylandsink v4l2src device=/dev/video3 ! video/x-raw,width=1920,height=1080,framerate=30/1 ! c.sink_0 multifilesrc location=./test1.png caps=image/png,framerate=1/1 ! pngdec ! imagefreeze ! c.sink_1 This will take a full HD camera stream and overlay the test1.png file on it. Following the imxcompositor_g2d you can pass this video stream through "vpuenc_h264 ! h264parse ! avimux ! filesink location=/tmp/temp.avi" to encode using the hardware h264 encoder possibly teeing it to the display as well as the h264 encoder if needed. Re: IMX8 Video overlay with graphics before H264 encode Hello  I am working with similar requirements , I would like to understand how to test video overlays on imx8m plus platform, unfortunately the doc Linux user guide  dated L5.4.70_2.3.0, 13 January 2021 does not have imx8m-plus specific info and the plugin overlaysink is not available. Re: IMX8 Video overlay with graphics before H264 encode Many thanks. It would be nice to have an overview of the video processing architecture (hardware and software layers/API's and packages) and the history in the "i.MX Linux® User's Guide" and how this is supported in the NXP Yocto BSP and community Yocto BSP. Re: IMX8 Video overlay with graphics before H264 encode Hi Yes,imx-gst1.0-plugin has replaced the gstreamer1.0-plugins-imx. In i.MX6 Family :Video render relys on G2D, not DRI In i.MX8 Family:Video render relys on DRI,due to Wayland using DRI Re: IMX8 Video overlay with graphics before H264 encode Thanks for the info, but that is specific information to a specific NXP BSP release. I need to produce a Yocto release for a custom board and thus need to configure a Yocto build for this to get the most current and up-to-date video processing gstreamer elements. The NXP "Yocto" builds are different from the community builds (which are more mainline) and there is the BSP type and the three different kernel variants and then all of the paraphernalia of different kernel driver configurations etc. Aslo old Yocto builds have different gstreamer elements and drivers etc. I am just trying to understand what the current/planned underlying video processing software tree is, so I follow this in our builds. It has been stated to use the community Yocto BSP for custom boards but this is quite different to the NXP Yocto wrt video processing. For example at the user level there is the gstreamer1.0-plugins-imx and imx-gst1.0-plugin package both of which do not build with a community based Yocto dunfell build for an IMX6DL. Am I right in thinking that the imx-gst1.0-plugin package has taken over from the gstreamer1.0-plugins-imx for all IMX variants and does this rely on the DRI GPU interface route ? I just want to understand the overall hardware video processing software/hardware architecture/packages and its history so I can develop in the most sensible way. Terry Re: IMX8 Video overlay with graphics before H264 encode Hi All bsp release note and the details about i.MX GStreamer 1.0 plugins  are in i.MX_Linux_Release_Notes.pdf (Multimedia) i.MX_Linux_Users_Guide.pdf talks about how to do tests. About the last point you mentioned, the release note has said: i.MX 6 Family: • overlaysink : G2D-based video sink plugin • imxv4l2sink: V4L2-based video sink plugin Re: IMX8 Video overlay with graphics before H264 encode Thanks for the information, I had just worked out that the imx8m didn't support some video processing but I didn't release it didn't have a 2D GPU! This iMX8 range is very messy and has strange part naming! However the basic question remains, we are not targeting the imx8mq for our design, we will probably be using a IMX8M-Plus or IMX8-DualXPlus. What I am trying to determine is how to build a suitable Yocto release with support for hardware video compositing before H264 in general. The software support has changed a lot over the last 5 years and there are many routes to producing a Yocto release and many graphics and video processing driver changes in the kernel and outside etc. There doesn't appear to be a simple overall guide on these changes and where the direction is going and what user level API and what kernel and kernel level API's are needed. So I'm trying to understand this so we can first test or video processing concept and then design and board and produce a suitable Yocto build for this custom board. For example am I right in thinking that the imx-gst1.0-plugin package has replaced the gstreamer1.0-plugins-imx package and when and what lower level API's/drivers does it need/support (DRI ?). I would like to build systems for iMX6 and iMX8M-Plus that are compatible but I'm not sure this is possible. Terry Re: IMX8 Video overlay with graphics before H264 encode Hi The i.MX8MQ doesn't have 2D GPU,so you can not use imxcompositor_g2d,you can try another imxcompositor BR Re: IMX8 Video overlay with graphics before H264 encode Many thanks for the info. I would like to try this to prove that the output of this can be taken through the H264 VPU encoder and the overall CPU usage of this. However where and how would I get the gstreamer imxcompositor_g2d plugin ? I have been trying to build a suitable community or nxp based Yocto build for the iMX6 and iMX8 test platforms I have but have never seen this plugin ? The NXP gstreamer plugins seem to be in quite a mess at the moment. Should the user level part of this be in the gstreamer1.0-plugins-imx package ? If I build a IMX community Yocto release using: "https://github.com/Freescale/fsl-community-bsp-platform -b dunfell" this cannot build a gstreamer1.0-plugins-imx package. If I build a IMX NXP Yocto release using: "https://source.codeaurora.org/external/imx/imx-manifest -b imx-linux-zeus -m imx-5.4.70-2.3.0.xml" for a imx8mqevk machine there is no imxcompositor_g2d plugin as far as I can seen in the build (cannot run it as I don't have a imx8mqevk) and if I add "gstreamer1.0-plugins-imx" to the build (IMAGE_INSTALL_append) I get the error "imx8mqevk (not in COMPATIBLE_MACHINE)". So what should I build to get a suitable Yocto Linux system that will provide a working imxcompositor_g2d gstreamer plugin ? Re: IMX8 Video overlay with graphics before H264 encode Hi 1.YUV422 and YUV420 input and output formats are also supported, supports encoder (NV12). 2.You can see 7.3.16 Video composition in i.MX_Linux_User's_Guide.pdf imxcompositor_g2d uses corresponding hardware to accelerate video composition. It can be used to composite multiple videos into one. The video position, size, and rotation can be specified while composition. Video color space conversion is also performed automatically if input and output video are not same. Each video can be set to an alpha and z-order value to get alpha blending and video blending sequence.

What is the recommended microcontroller series that replaces the LPC1768 series? Hi, Anyone please suggest exact pin to pin replacement for LPC17xx series. I have existing designs, modify hardware is a problem, but I have a lot of code (tons) using LPC2148 peripherals (UART, I2C, Timers, ...), which new family is peripheral-software compatible?. What series recommended for new designs has roughly equivalent capability (Memory size, speed, peripherals, etc.)? Re: What is the recommended microcontroller series that replaces the LPC1768 series? I have the same question, and appreciate it's now almost 5 years later. Which series of microcontrollers should I be looking at to use for new designs? Re: What is the recommended microcontroller series that replaces the LPC1768 series? Hi the LPC1768 is a replacement for the LPC2368. and the LPC1769 is a replacement for the LPC1768. The only difference is the max clock frequency (120Mhz) . A replacement with less memory is the LPC1766.LPC4078 is an option for LPC176x replacement.(http://www.nxp.com/products/microcontrollers/core/cortex_m4_m4f/LPC4078FBD100.html ) Please note LPC4078 release time is 2013, 15 years longevity. Our Recommendation is LPC546xx or LPC540xx MCUs series, based on Cortex M4 core at 220MHz (with optional secondary Cortex M0+ core), similar peripherals, up to 512KB Flash and up to 200KB RAM.Please check more information in the following link:https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/lpc-cortex-m-mcus/lpc54000-series-cortex-m4-mcus:MC_1414576688124 LPC546xx and LPC540xx are not pin to pin replacement of LPC17xx Have a nice day, Jun Zhang