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expected ';', identifier or '(' before 'char' I am resurrecting a project that has sat for a few years, and which was originally developed using Kinetis Desiign Studio.  A few months ago, I imported it into MCU Expresso and it compiled fine.   However, after upgrading MCUExpresso (from 11. something to 24. something ??)  I am getting the above fatal error message on the very first char statement in the program: const char line1[]="Frere Radio "; const char line2[]="System V0.1 "; Any suggestions as to what is happening? cheers, Nigel Re: expected ';', identifier or '(' before 'char' Thank you very much! Lots of new work for me to do tomorrow! Goodnight! Re: expected ';', identifier or '(' before 'char' Hi @ve3id  I fixed this issue. In your project, CMSIS/frere.h Line 876 is missing renaming and semicolons. Please add renaming and semicolons. And source/MK64F12_Project.c  Line 354, this function is also wrong. After you fix two issues, you will compile well. This is a problem with your code, not an MCUXpresso IDE upgrade issue. BR Hang Re: expected ';', identifier or '(' before 'char' I am using linux. Specifically OpenSuSE leap 15.6. Nothing on my 60-node network uses Windows 🙂 Re: expected ';', identifier or '(' before 'char' Hi @ve3id  I see that your project format is .tar.gz. May I ask if your mcuxpresso is a window version or a Linux version? BR Hang Re: expected ';', identifier or '(' before 'char' Thank you for the kind offer, which I would appreciate you trying.  I think you are right, but I cannot put my finger on it!  I have attached a zip file of the entire directory tree Re: expected ';', identifier or '(' before 'char' Hi @ve3id  It sounds like an upgrade to MCUXpresso may have introduced changes in compiler behavior or project settings, which is causing this syntax error. Can you share this project so that I can check? BR Hang
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S32K312 PTC14 内部端口结构图 Hi NXP 我的客户需要S32K312 PTC14 内部端口结构图。 客户遇到这样一个问题,这个PIN外部用10K电阻上拉到5V,MCU供电断电后,那个Pin导通了,把电压拉低到0.7-1.1V。 帮忙分析下,谢谢! Re: S32K312 PTC14 内部端口结构图 你好@LewisLiu , PTC14 上没有什么特别之处——它是一个标准的 GPIO 引脚,在任何重置后都处于 HighZ 状态(请参阅 S32K312_IOMUX.xlsx,表S32K312_IO信号表-xlsx文件保存在S32K3xx参考手册的附件中)。因此,请检查您的固件如何使用引脚。 顺祝商祺! 帕维尔
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Can I get ethernet exampel for S32K314? Hello, Does an Ethernet sample project exist for the S32K314 MCU? If so, could you provide a link or file to access it? Thank you. Re: Can I get ethernet exampel for S32K314? thank you! Re: Can I get ethernet exampel for S32K314? Hello @malove , there is lwip example in SW32K3_TCPIP_STACK_2.0.0. Since ethernet belongs to export control, you will need approval. Please follow instruction on the page. Stacks are included in S32k3 Standard and Reference Software, accessible from the S32K3 main page. Best regards, Pavel
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S32G274A FlexRay Nodes Not Coldstarting Hi there, I am trying to get 2x S32G274A boards to communicate with each other over their LLCE Flexray. I am using the LLCE Node1 and Node2 code from the examples and am able to get them to work with default network settings. However, when I change the setting to the settings of the FlexRay network I need to interface with, they don't get past their initialization and don't go into FR_POCSTATE_NORMAL_ACTIVE. Attached is the network settings I am trying to use. Further, their state reports that they are in FR_STARTUP_INTEGRATION_LISTEN, when I would expect them to be in one of the COLDSTART_* states. Much appreciate any help! David Network Settings I'm trying to Use: Re: S32G274A FlexRay Nodes Not Coldstarting Resolved. pKeySlotID can't be the same across nodes. Payload length of Individual Buffers and static slot paylength must match in configuration. Re: S32G274A FlexRay Nodes Not Coldstarting Hi, We might be misunderstanding the overall inquiry, if so, we do apologize. We understand that you are able to run the NXP example with the S32G no problem, but once you change the network settings, it fails, is this correct? Furthermore, we understand that if you adapt our network to the one already configured under Config Tools, you are able to run the example successfully, is this correct? If so, then we understand that there is a problem with the overall configuration, but not with the example itself nor S32G. Are you able to confirm that your network settings are working without the S32G?  As for sharing your settings, we understand that, if Config Tools is not generating an error, they are "correct". You need to pair correctly your nodes, since FlexRay is a more delicate communication protocol, in which your configurations need to be perfectly matched. Again, under the example and using only S32G we understand that you are seeing no problems. An additional note is that the FlexRay Host interface has the following compliance [Page 2628, S32G2 Reference Manual, Rev. 8, February 2024]: "The FlexRay communication controller implements the FlexRay Communications System Protocol Specification, Version 2.1 Rev A." Just to confirm that your other interface is also complaint. More information on regards of the available features (i.e. data rate) for the FlexRay controller under the S32G can be found under Chapter 56 FlexRay Communication Controller (FlexRay) [Page 2833, S32G2 Reference Manual, Rev. 8, February 2024] Please, let us know. Re: S32G274A FlexRay Nodes Not Coldstarting I should add, with the default network config, I can see bits on the bus directly after Fr_43_LLCE_StartCommunication(FrConf_FrController_FrController_0); when I start only 1 of the nodes. But with my new network config, this is not the case. Therefore, the FlexRay controller must not be starting its communication correctly even though it doesn't return an error.
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Safety Peripheral Drivers not appearing in the Components/Peripherals Tab in S32 Design Studio Hello everyone! I'm currently working on the S32K344EVB-Q257 board and i am trying to explore some of its safety features and, while installing the S32 Design Studio v3.5 along with Real-Time Drivers, i came across Safety Peripheral Drivers (which include drivers for FCCU, EIM, ERM, and STCU). I installed all of these, but when i create a project and go to the Peripherals Tab to add these latter drivers, nothing about FCCU, EIM, ERM or STCU shows up. Is this a bug/problem of this version of the drivers or am i missing something? Below i included an image of the Drivers that appear when i try to add them to the project. Thanks for any help in advance! Note: RTD Version: R21-11 4.0.0 P04           SPD Version: RTM 1.0.4 Best regards, JRodrigues Re: Safety Peripheral Drivers not appearing in the Components/Peripherals Tab in S32 Design Studio Hello Vane, After your reply i have been able to see the drivers in Config Tools. Thank you for your help! Best Regards, JRodrigues Re: Safety Peripheral Drivers not appearing in the Components/Peripherals Tab in S32 Design Studio Hi @JRodrigues  Make sure that you correctly install the S32K3_SAF_1.0.4_EVAL_DS_updatesite.zip, if this was correctly installed you should be able to find the package in Installation Details as shown in the following image.  Also, if the package was correctly installed you should be able to visualize a tab named S32_SAF in Config Tools where you can add the Safety Peripheral Drivers to your project.  B.R. VaneB
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CodeWarrior crashing when opening debug configuration Hi, I'm trying to configure to debug a project, but when i click in edit on the debug configuration, the CodeWarrior 10.7 just crash. I attached a video showing the problem, do you know what is causing this?  Re: CodeWarrior crashing when opening debug configuration I solved the problem by installing the latest multilink driver direct from the PEmicro website. The CodeWarrior has stopped crashing, probably the old driver that was causing codeWarrior to crash. Re: CodeWarrior crashing when opening debug configuration Hi GustavoTsea  0 The problem may be related with a specific project, test the same with another project. 1 The problem may be related with the workspace. Create a new workspace to test if the problem still exists. 2 The problem may be related with CodeWarrior install. remove the CodeWarrior and reinstall it. test this feature with step 1 then. 3. If the problem still persists after above tests, please use the latest CodeWarrior 11.1.  https://www.nxp.com/design/design-center/software/development-software/codewarrior-development-tools/codewarrior-legacy/codewarrior-for-mcus-eclipse-ide-coldfire-56800-e-dsc-qorivva-56xx-rs08-s08-s12z-11-1:CW-MCU10 Hope this helps Jun Zhang
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linux bsp download Hi,nxp team: When I referred to this document "TP-S32G-VNP-RDB3.pdf" to download the Linux BSP, I encountered the following problem, as shown in the figure below But I visited this site and my network is fine My environment is ubuntu22.04 LTS  S32G3  Re: linux bsp download Hi, @chenyin_h @GuilhermeS32G : Thank you for your suggestions. My problem has been solved. It was due to network fluctuations. I can use it after using a VPN. Re: linux bsp download Hello @jiajun_cheng , Although the Google Repo tool may be convenient for Downloading the sources, it is not strictly essential. Alternatively, you may try to manually clone the Git repos of the Yocto layers and checkout the correct commit id. I see that you are trying to download the BSP 38.0 sources. So, according to: https://github.com/nxp-auto-linux/auto_yocto_bsp/blob/release/bsp38.0/default.xml you can run the following commands: mkdir sources && cd sources git clone https://git.yoctoproject.org/meta-freescale/ && cd meta-freescale && git checkout 6f04cf1fce13c9852d4ec86b66a3858c42b7c7c9 && cd .. git clone https://git.openembedded.org/meta-python2 && cd meta-python2 && git checkout f02882e2aa9279ca7becca8d0cedbffe88b5a253 && cd .. git clone https://git.yoctoproject.org/meta-security && cd meta-security && git checkout d398cc6ea6716afd3a3a6e88ad8fbdc89510ef23 && cd .. git clone https://git.yoctoproject.org/meta-virtualization && cd meta-virtualization && git checkout b3b3dbc67504e8cd498d6db202ddcf5a9dd26a9d && cd .. git clone https://git.openembedded.org/meta-openembedded && cd meta-openembedded && git checkout bdad2a789e30703a825b876279665720d06d55dc && cd .. git clone https://git.yoctoproject.org/poky/ && cd poky && git checkout f53ab3a2ff206a130cdc843839dd0ea5ec4ad02f && cd .. git clone https://github.com/nxp-auto-linux/meta-alb/ && cd meta-alb && git checkout 814fa233f9d5e4502090b38bd4a64d15650328e1 && cd .. && cp meta-alb/nxp-setup-alb.sh . And this is equivalent to the repo functionality. Best regards, Guilherme Re: linux bsp download Hello, @jiajun_cheng  Thanks for your post. I did not met such issue on local host(20.04), and tody I find a Ubuntu22.04 host to further test on it, but cannot reproduce the issue. Seems it is a network connection issue, may I know if you could have another trial? BR Chenyin
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Set flexspi flash clock frequency to 104Mhz Hi all, My project is based on IMXRT1061 with a mx25l25645g nor flash. The dummy cycle of the nor flash is 8. Therefore, accroding to the datasheet of the nor flash, the clock frequency should be set to 104Mhz. And I found the table from this post. Is it correct if I set the clock  with the setting below? I think it would be 102Mhz. The other question, is it possible to make the frquency closer to 104Mhz? CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 21); CLOCK_SetMux(kCLOCK_FlexspiMux, 3); CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2);   Best regards, Doris i.MXRT 106x Re: Set flexspi flash clock frequency to 104Mhz Hi Edwin, The information is helpful. Thank you. Best regards, Doris Re: Set flexspi flash clock frequency to 104Mhz Hi @MCW, I highly recomend you use MCUXpresso's ConfigTools, as this will allow you to set up the clock in a much more detailed and friendly way. From your description, I believe you had to set the FlexSPI divisor to 4 in order to get 102 MHz: This would be a possible solution to the 104MHz requirement. The only other I found was using PLL2 PFD2, with this set to 316.8 MHz, and the FlexSPI divider on /3: Further adjusting System PLL can get you closer to 104MHz, but keep in mind that this PLL is used extensivly throuout the chip, so other modules' frequencies will also change slightly: BR, Edwin.
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eIQ Toolkit download Hi,  I was trying to download the latest version of eIQ Toolkit for Ubuntu from eIQ Toolkit But the download link, eIQ Toolkit 1.13.1 Ubuntu 20.04 Installer, appears to be broken. Re: eIQ Toolkit download The issue was fixed, please try again, thanks!
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S32G-VNP-RDB3 gateway setup to resemble a real world application (with LLCE) Hello NXP Community, I'm trying to set up the S32G-VNP-RDB3 gateway to most closely resemble configuration used in real cars also assuming high security as a priority. I would like to ask which configuration is the default setup used in the automotive industry for gateways: 1. Linux OS exclusively 2. FreeRTOS or another RTOS exclusively (e.g. Autosar OS) 3. Linux + RTOS together Which is the recommended setup for the S32G-VNP-RDB3 to be used for real applications? My second question is about LLCE accelerator. It can be configured (adding filters for routing, destinations etc.) from both Linux and FreeRTOS host side. There also is a headless mode. Which of these approaches is the intended default for car manufacturers? Would it be more likely to have LLCE configured from the Linux host, FreeRTOS, combination of both OS, or using headless mode? What is the best practice? The reason I'm asking about this is that the documentation describes both approaches, e.g. there is a very nice Linux BSP document showing how to enable various features like LLCE, HSE etc. and at the same time many examples are for RTOS using S32 Design Studio which seems to be separate from using Yocto Linux. All advice and experience from real automotive projects involving gateway ECUs will be very appreciated. Thank you in advance. Re: S32G-VNP-RDB3 gateway setup to resemble a real world application (with LLCE) Hello, @OmerSakarya Thanks for your post. As you may know, NXP is the SOC manufacturer, for software side, we mainly provide the basic drivers/BSP for both M and A cores, our customers themselves have various application-level implementation according to their specific requirements based on our S32G products. For further understanding the S32G products, I could recommend referencing the GoldVIP project from following link: https://www.nxp.com/design/design-center/software/automotive-software-and-tools/s32g-vehicle-integration-platform-goldvip:GOLDVIP GoldVIP provides a reference vehicle integration platform that accelerates S32G hardware evaluation, software development and rapid prototyping efforts. It integrates NXP standard and reference software, along with open source and third-party software to provide an evaluation, development and rapid prototyping platform. The use cases in it may be useful for your questions, I suggest reading the UMs in it for further reference. BR Chenyin
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S32G-VNP-RDB3ゲートウェイを実際のアプリケーションに似せたセットアップ(LLCEを使用) NXPコミュニティの皆さん、こんにちは。 S32G-VNP-RDB3ゲートウェイは、実際の車で使用されている構成に最も近いように設定しようとしており、高いセキュリティを優先しています。自動車業界でゲートウェイに使用されているデフォルトの設定はどれですか? 1.LinuxOSのみ 2. FreeRTOSまたは別のRTOSのみ(例:Autosar OS) 3. Linux + RTOS の連携 S32G-VNP-RDB3を実際のアプリケーションに使用するための推奨セットアップはどれですか? 私の2番目の質問はLLCEアクセラレータについてです。LinuxとFreeRTOSホスト側の両方から構成(ルーティング、宛先などのフィルターを追加)できます。ヘッドレスモードもあります。これらのアプローチのうち、自動車メーカーにとって意図されたデフォルトはどれですか?LLCEは、Linuxホスト、FreeRTOS、両方のOSの組み合わせ、またはヘッドレスモードを使用して設定する可能性が高くなりますか?ベストプラクティスは何ですか? 私がこれについて尋ねている理由は、ドキュメントが両方のアプローチを説明しているためです、例えば、LLCE、HSEなどのさまざまな機能を有効にする方法を示す非常に優れたLinux BSPドキュメントがあり、同時に多くの例はS32 Design Studioを使用したRTOS用であり、Yocto Linuxの使用とは別のようです。 ゲートウェイECUを含む実際の自動車プロジェクトからのすべてのアドバイスと経験は非常に高く評価されます。よろしくお願いいたします。
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Interrupt Callback for DMA in MPC(Multiple Parallel Conversion) not getting generated (DMA trig). Hello, (For S32K39-37 (S32K396)) The below mentioned signals are connected to the respective ADCs as per the below table:  Signals ADC CL attributes FIFO SIN_P ADC3_P2 List Start FIFO 1 COS_P ADC5_P0   SIN_Inv_P ADC3_P1   COS_Inv_P ADC5_P1 Last channel Here, BCTU shall be triggered and data from the above ADCs shall be stored in FIFO1 which shall be further be accessed through DMA. Currently through debugging it can be observed that BCTU is getting triggered, FIFO is getting updated, source and destination for DMA are as expected, interrupt is also enabled but interrupt callback mentioned in DMA is not getting trigger. Please check the below doc.("Configurations.docx") for all the respective configurations. Re: Interrupt Callback for DMA in MPC(Multiple Parallel Conversion) not getting generated (DMA trig) SOLVED. Had missed updating "Dma Mux Source" Re: Interrupt Callback for DMA in MPC(Multiple Parallel Conversion) not getting generated (DMA trig) Hello @AkhileshBelore, Did you enable the DMA interrupt in the Interrupt driver?
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S32G-VNP-RDB3 网关设置类似于真实世界的应用程序(带有 LLCE) 大家好,恩智浦社区, 我正在尝试将S32G-VNP-RDB3 网关设置为最接近真实汽车使用的配置,同时优先考虑高安全性。我想问一下,汽车行业网关的默认配置是哪种: 1. 仅限Linux操作系统 2. FreeRTOS 或其他 RTOS(例如Autosar操作系统 3. Linux + RTOS 结合 对于实际应用,推荐使用哪种 S32G-VNP-RDB3 设置? 我的第二个问题是关于 LLCE 加速器。它可以从 Linux 和 FreeRTOS 主机端进行配置(添加路由、目的地等过滤器)。还有无头模式。哪种方法是汽车制造商想要的默认方法?是否更有可能从 Linux 主机、FreeRTOS、两种操作系统的组合或使用无头模式来配置 LLCE?最佳做法是什么? 我之所以问这个问题,是因为文档中描述了这两种方法。例如,有一个非常棒的 Linux BSP 文档,展示了如何启用各种功能,例如 LLCE、HSE 等。同时,许多示例都是针对使用 S32 Design Studio 的 RTOS 的,这似乎与使用 Yocto Linux 无关。非常感谢所有涉及网关 ECU 的实际汽车项目的建议和经验。提前谢谢您。
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FEC_UIO kernel driver not available in imx8mmevk Hi, I have flashed imx8mmevk with 6.6.3-lts kernel. I have use case to enable dpdk and validate on it. As per DPDK documentation I tried to use --vdev=net_enetfec and it also loaded pmd it seems as error presented was from enet_uio.c in dpdk driver code. While from the error it seems device path of uio in /sys/class/uio and /dev/uio is missing.  I looked for if enet_uio is enabled from config in /proc path and it show the config option for driver was enabled. but I could n't found the .ko file for uio and enet_uio.  Any suggestion here to enable and run dpdk. Thanks, Vikas i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: FEC_UIO kernel driver not available in imx8mmevk Thanks it worked. Re: FEC_UIO kernel driver not available in imx8mmevk Please use imx8mm-evk-dpdk.dtb
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Performance comparison between S32K and 57xx Hello, I have had some experience with 55xx, 56xx and 57xx MCUs and I am now contemplating a future migration to S32. As performance is a potential issue, I would like to know how a S32K (e.g. S32K348) with a 240MHz Cortex-M7 would perform when compared to a 264MHz MPC5674F or a 300MHz MPC5777C. Per the EEMBC website, the Coremark score of a MPC5674F (@264MHz) is 516 and the datasheet of the S32Kxx family provides a Coremark score of 1269 to the S32K348, which should mean a huge gain in performance (halving the execution time of an application?) in spite of a slighly lower core frequency... However, I once tried some Arm-based device that ran at 400MHz and, for my application (a dummy control system with no long loops, comprising mostly Boolean and floating-point logic) it barely outperformed the MPC5777C, which ran at 264MHz. Do you have any performance comparison (other than Coremark scores) between 56xx/57xx and S32K3xx? Is a S32K348 expected to outperform a MPC5777C as suggested by their Coremark scores? Thanks! Best regards, Ricardo Re: Performance comparison between S32K and 57xx QuadSPI is only name of IP, but it allows also connection of Octal SPIs as I already answered. So data can go over over 8 lines. FlexIO offerer 8 timers/shifters, so it will not be faster probably. Re: Performance comparison between S32K and 57xx Where can I find additional information regarding FlexIO? Even if it does not emulate the EBI, we might try to make use of it if its data path is wider than the 4 bits available in QSPI (which looks much slower than the EBI and might negate all gains obtained in the CPU). Thanks, Ricardo Re: Performance comparison between S32K and 57xx FlexIO is universal timing module providing capabilities as UART, SPI, I2C, I2S, LIN, PWM, but there I don't think EBI could be emulated with this peripheral. At least I am not aware of any existing solution. QuadSPI module is considered to be a replacement of external bus. It allows user to connect external memory device over QuadSPI, OctalSPI or Hyperbus communication protocol and have memory mapped access. Re: Performance comparison between S32K and 57xx Hi David, Thanks for your answer. In order to finish my performance comparison, I would like to know if, in newer devices, FlexIO can be considered as a replacement for the EBI module found in the 5xxx devices. Regards, Ricardo Re: Performance comparison between S32K and 57xx Performance of e200z759 will be around 2.27 DMips/MHz what gives 600 DMIPS per one core running at 264MHz. However MPC devices mostly haven't specified official numbers. On the other hand S32K3 has it well defined in the datasheet as you can see below, separately for ASIL-B or D (i.e. whether these are variants with cores in lockstep or decoupled).
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hse secboot command failure based on SDK BSP40 Hi, Recently, I tested secboot feature based on SDK BSP40, but got the following error: root@nxp-s32g:~# hse-secboot -s -d /dev/mmcblk0 -k /boot/rsa2048_public.pem [INFO]hse-uio 40210000.mu0b: device hse-uio v2.1 open, instances: 1 Setting up secure boot libhse: initialized, firmware status 0x0920 [INFO] Retrieving IVT from device /dev/mmcblk0 [INFO] Enabling MUs [INFO] Dhse-uio 40210000.mu0b: device hse-uio v2.1 released, instances: 0 id not find previous SYSIMG, formatting NVM and RAM key catalogs [INFO] Importing RSA public key into NVM key catalog [INFO] Generating Secure Memory Region entry ERROR: invalid fip start offset! [ERROR] Failed to allocate space for FIP header ERROR: fip smr entry install failed! libhse: closed root@nxp-s32g:~# root@nxp-s32g:~# And the BSP39 works well. So would you please help to check the issue? Thanks, Zhantao 回复: hse secboot command failure based on SDK BSP40 This issue is fixed and the reason is no relationship with the public repo codes. So I will close this ticket soon. Thanks, Zhantao 回复: hse secboot command failure based on SDK BSP40 The error messages like "ERROR: invalid fip start offset!" is for debug to see the reason, so please ignore them on your side. Thanks, Zhantao
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Check if Keys are zero or not Hi, I want to check if keys stored in NVM are zero or not. Is it possible? The format of the keys is BIN_OCTET. I tried it by using Crypto_Hse_KeyElementGet API, but I am getting HSE_SRV_RSP_INVALID_ADDR as a response. Any help on this is highly appreciated! Re: Check if Keys are zero or not Hi @shravani  As far as I know, you use SHE keys. SHE keys cannot be exported (only the SHE RAM key is an exception) and it's also not possible to get KeyInfo for SHE keys. In this case, the only option to check if SHE key is empty or not is to try to use such key. If it is still empty, you should get CRYPTO_E_KEY_EMPTY error. Regards, Lukas
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MCXN947 DAC14 DMA not working Hi, I am working with the FRDM-MCXN947 development board, MCUXpresso IDE v24.9 and SDK2.16.100 FRDM-MCXN947. The DAC is supposed to output data from an array with the help of the DMA controller (find attached code). The interrupt for the DAC is executed regularly. The FIFO status seems correct, the EMPTY and LESS_THAN_LEVEL bits are set. The problem is probably with the DMA controller. There may also be a command missing here. Unfortunately I couldn't find an example - hence my call for help to the community. Thanks, Klaus Analog(ADC|CMP|DAC|OpAmps) MCXN Re: MCXN947 DAC14 DMA not working Hi @klausfetscher, After the corresponding DMA enable register fields becomes 1, the error flags can only generate an interrupt. The Period Trigger Mode Conversion Complete Flag (PTGCOCO) is a warning flag. The error flags are FIFO Overflow Flag (OF) and FIFO Underflow Flag (UF) See section 43.3.6 DMA from MCX Nx4x Reference Manual In order to know if the transmission has ended you can read the status flags from the DAC and use a mask to know only the value of the PTGCOCO. Hope it helps you! Re: MCXN947 DAC14 DMA not working I found and corrected some errors. The transfer of the DAC data with the DMA and the output via the DAC now works. At the end of a transmission I want to receive the kDAC14_PeriodTriggerCompleteInterruptEnable. Unfortunately this interrupt is not triggered. Any idea ? Klaus
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Incompatible version of LPUART Driver Hi, I am using imxRT1050 EVKB. I want to use LPUART Driver from FreeRTOS. However, I get a warning as shown below. If I compile the code and execute it, I get a data bus error. Can someone tell me how to get compatible version of LPUART driver? Thanks! Re: Incompatible version of LPUART Driver I was able to resolve this. The receive call expects global buffer and not one allocated on stack. This ways, the UART driver in FreeRTOS is working fine, without crashing. Re: Incompatible version of LPUART Driver Hi @rajtend , Hi rajtend, Thank you for your updated information. Can you tell me how and where you call LPUART_RTOS_xxx functions? I will verify your modification on my MIMXRT board.  Wish you a nice day~ Best Regards mayliu Re: Incompatible version of LPUART Driver Can you change the Mode from Polling to FreeRTOS? You will see the warning immediately. Re: Incompatible version of LPUART Driver Hi @rajtend , Thank you so much for your interest in our products and for using our community. Please let me know if your project with FreeRTOS. I use MCUXPresso IDE, the version is same as you. I import a SDK demo "evkbimxrt1050_freertos_hello", add LPUART3 driver, There are no problem and warning. Please use a project with FREERTOS ,then add LPUART3. Wish it helps you. If you still have question about it, please kindly let me know. Best Regards mayliu Re: Incompatible version of LPUART Driver I am using the following version of MCUXpresso
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How to develop a C++ Linux app for i.MX 8M nano? There's a doc "Developing an Application for the i.MX Devices on the Linux Platform" from 2010 about using Eclipse to develop an C++ app for Linux. But, Eclipse sucks and is not used much anymore. Seem like a dead tool; at least dead to me 🙂 I did read about a tool called MCUXpresso that's for vscode. But maybe that's only for MCU development; not linux development. True? There is one process that I'm familiar with. That's to create a cross-compiler via yocto to build my C++ app and also to package it into an image. Also, can build an executable via the cross-compiler and scp it to the target. Is this the only way to develop a C++ app for an NXP imx8? i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Linux Yocto Project Re: How to develop a C++ Linux app for i.MX 8M nano? Thanks. ... and I'm not using QT; not that I was asking about that. Re: How to develop a C++ Linux app for i.MX 8M nano? Hello, That's correct is the only way to build a c++ application, but you can download the QTcreator to build c++ and qt application as well. Regards
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