******************************************************************************** * Detailed Description: * Example shows MCU's temperature measurement using internal temperature sensor. * After basic initialization, the code initializes and calibrates eQADC, reads * test flash content and performs all necessary ADC measurement to calculate die * temperature. Results are then displayed in the terminal window. * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC5674ADAT516 Rev.C, MPC567XEVBFXMB Rev.B * MCU:             PPC5674FMVYA264 * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:            264/200/150/60 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  default * ********************************************************************************

******************************************************************************** * Detailed Description: * This example implements ADC driver and demonstrated the usage of ADC in BCTU mode. * When PIT timer exceeds the trigger is sent to BCTU and BCTU triggers ADC_0 conversion. ******************************************************************************** * Test HW:  MPC57xx * Maskset:  1N81M * Target :  SRAM * Fsys:     160 MHz PLL * ******************************************************************************** Revision History: 1.0     Oct-29-2014     b21190(Vlna Peter)  Initial Version 1.1    Nov-20-2014    b21190(Vlna Peter)  Modified for Cut2.0 1.2    Nov-20-2014    b21190(Vlna Peter)  Added SWT_0 dissabling in startup 1.3    Mar-10-2016    b21190(Vlna Peter)  Fixed clock configuraion for PLL 1.4    Mar-10-2016    b21190(Vlna Peter)  Added ADC driver 1.5    Mar-16-2016    b21190(Vlna Peter)  Added BCTU and PIT drivers *******************************************************************************/

This example content a basic FMPLL initialization and configuration of Mode Entry module and Clock Generation module. By default active is core 2 -> e200z4 Demonstration of PIT triggering an interrupt on timeout. ******************************************************************************** * Test HW: MPC57xx + S32R274RRUEVB * Maskset: 1N58R * Target : internal_FLASH * Fsys: 240 MHz PLL with 40 MHz crystal reference for z7 and 120MHz for z4 ******************************************************************************** Revision History: 1.0 Apr-02-2019      b21190        (Vlna Peter) Initial Version 1.1 Sep-19-2019     nxa13250    (Vlna Peter) Added PIT + interrupts *******************************************************************************/

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON). * Its intention is to offer advanced startup code additional to CW stationery. * ------------------------------------------------------------------------------ * Test HW:        MPC5566EVB * MCU:            PPC5566MVR132 * Fsys:           144/132/112/80/12 MHz * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: TPU_PORT_37 -> USER_LED_8 *                 TPU_PORT_38 -> USER_LED_7 (to see blinking LEDs)    * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed frequency (48MHz) * Setup SIU, and demonstrate frequency modulation. * ------------------------------------------------------------------------------ * Test HW:        XPC560B 64LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU:             SPC5602D * Cut:               1M18Y * Fsys:             48 MHz * Debugger:     Lauterbach Trace32 * Target:           internal_FLASH * EVB clkout pin : Port J7 - pin 0 * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, starts second core * initializes and display notice via UART terminal and then terminals ECHO. * * * Test HW:              MPC5688EVB * MCU:                   SPC5668GMMG 0N61C * Terminal:              19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:                   116 MHz * Debugger:             Lauterbach Trace32 *                             PeMicro USB-ML-PPCNEXUS * Target:                  RAM, internal_FLASH * EVB connection:   User LED 4 connected to pin P28-10 * *

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON). * For XPC564AKIT324S it initializes EBI for mounted external SRAM. * Its intention is to offer advanced startup code additional to CW stationery. * * ------------------------------------------------------------------------------ * Test HW:        XPC564AKIT208S and XPC564AKIT324S * MCU:            SPC5644AMMG1,0M14X and SPC5644AMVZ1,0M14X * Fsys:           150/132/120/12 MHz * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON). * IT INITIALIZES EBI FOR EXTERNAL SRAM CONNECTED TO XPC564AKIT324S AND TEST IT. * * ------------------------------------------------------------------------------ * Test HW:        XPC564AKIT324S * MCU:            SPC5644AMVZ1 0M14X QAK1235G * Fsys:           150/132/120/12 MHz * Debugger:       Lauterbach Trace32 * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * * * This example demonstrate functionality of XBIC_1 error injection *  capability. The fault is generated on DMA transfer to SRAM. *  After fault generation it is propagated to FCCU unit as NCF[59]. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * ********************************************************************************

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******************************************************************************** * Detailed Description: * In case user want GHS to initialize all cores it is necessary to define * preprocessor symbol: init_cores * However in this example the cores are initialized from function: Core_Boot(); * This example demonstrates how to initialize clock module and activate core0, core1 and core0 locksteped core. * ------------------------------------------------------------------------------ * Test HW:  MPC57xx EVB * Maskset:  0N78H * Target :  internal_FLASH * Fsys:     200 MHz PLL * ******************************************************************************** Revision History: 1.0     Feb-08-2016     b21190(Vlna Peter)  Initial Version 1.1    Feb-09-2016     b21190(Vlna Peter)  Added Core_Boot() function *******************************************************************************/

* Detailed Description: * This example shows, how to use interrupt hardware vector mode. In the example * PIT3 and PIT2 interrupts are implemented. PIT interrupt toggle LED every second. * * * This example also shows, how to implement IVOR exceptions for core 0. * IVOR1 handler with while(1) loop is ready to use. * * * For correct HW vector mode setup, following files was added to the project: * *  - exceptions.s *  - handlers_vle.s *  - HW_vector.c * * * Following files has been modified (all changes are marked by comment): * *  - 56xx_flash.ld *  - Vector.c *  - MPC57xx__Interrupt_Init.c * *  Following file was removed from project (files are still place in project, but *  not compiled and linked) * *  - intc_sw_handlers.S *  - intc_SW_mode_isr_vectors_MPC5744P.c * * * * Test HW:         MPC567XADAT516, MPC567XEVBFXMB * MCU:             PPC5676RDMVY1 3N23A * Fsys:            180 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  User LED 1 connected to J241, *                    User LED 1 connected to J242. *

******************************************************************************** * Detailed Description: * This example demonstrates basic interrupt functionality. * ------------------------------------------------------------------------------ * Test HW:  MPC56xx Motherboard + XPC564xB/C 208LQFP * Maskset:  0N32E * Target :  internal_FLASH * Fsys:     16MHz IRC as system clock ******************************************************************************** Revision History: 1.0     Mar-13-2017     b21190(Vlna Peter)  Initial Version *******************************************************************************/

******************************************************************************** * Detailed Description: * 200 MHz PLL with 40 MHz crystal reference + FCCU fault clearing *           example code + FCCU ALARM state configuration * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************

* Detailed Description: * This example demonstrates frequency modulation at 20kHz with 250 steps. * Test HW: xPC57xx EVB + MPC5746C minimodule * Maskset: 1N06M * Target : Internal Flash * Fsys: 160 MHz PLL * ******************************************************************************** Revision History: 1.0 Oct-29-2014 b21190(Vlna Peter) Initial Version 1.1 Nov-20-2014 b21190(Vlna Peter) Modified for Cut2.0 1.2 Apr-23-2015 b21190(Vlna Peter) Added INTC driver and PIT ISR 1.3 May-14-2015 b21190(Vlna Peter) Dissabling SWT in Startup code 1.4 Jun-06-2017 b21190(Vlna Peter) ported for MPC5746C 1.5 Sep-29-2020 b21190(Vlna Peter) Added 20kHz frequency modulation *******************************************************************************/

Detailed Description: Demo application measures analog voltage from externally connected humidity sensor HIH-5030. Obtained values and processed and displayed on MPC5606S-DEMO-V2 board’s TFT panel. Application uses standard Graphics Libraries for MPC5606S for simple graphic output that is managed in mc_base.c module only. ------------------------------------------------------------------------------ Test HW:            MPC5606S-DEMO-V2 + HIH-5030 MCU:             PPC5606SEF OMLU 0M25V DD68391 XOTAC1003 Fsys:            64MHz Debugger:        Lauterbach Trace32 Target:          internal_FLASH Terminal:        none EVB connection:   For complete project you may see following link: Demo application MPC5606S-DEMO + LM75B + HIH-5030 + PCA8565 + GUI

********************************************************************************  Detailed Description:  This example shows ADC triggering from the eTimer1 module.  The OFLAG signal from the eTimer1 channel 5 is fed into ADC1 converter,  so ADC is set up for injected conversion with end of scan interrupt.  Red LED is dimmed based on converted value  ------------------------------------------------------------------------------  Test HW: DEVKIT-MPC5744P rev.B  Maskset: 1N16P  Target : FLASH  Fsys: 160 MHz PLL  Debugger: S32DS ********************************************************************************

******************************************************************************** * Detailed Description: * This example content a basic PMPLL initialization and * configuration of Mode Entry module and Clock Generation * module. By default active is core 2 -> e200z4a * Configure PIT timer to trigger interrupt and service it. * Example configures start of z7 cores via SW routine. * ------------------------------------------------------------------------------ * Test HW:  MPC57xx MB + MPC5775K-326DS minimodule * Maskset:  0N76P * Target :  internal_FLASH * Fsys:     265 MHz PLL with 40 MHz crystal reference * ******************************************************************************** Revision History: 1.0     Sep-07-2017     b21190(Vlna Peter)  Initial Version *******************************************************************************/ Example also contains Lauterbach multicore script as you can see below: It will display 3 Power view instances.

******************************************************************************** * Detailed Description: * A simple example configures eTPU engine B channels 0/1 for QOM and FPM. * Connect these pins by wire. Output wave is generated on chnl ETPUB0 (QOM0) * and its frequency is measured on the chnl ETPUB1 (FPM0). * TCR counter frequency is 64MHz, output wave configured as 1MHz ( expected * frequency measured by FPM. Window size is 28us (0x400) thus number of * measured pulses is 28 (27 initally). * * Note: It is needed to configure IGF module, otherwise inputs does not pass * to eTPU module. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * EVB connection:  ETPUB0 (PortR P25-1) --> ETPUB1 (PortR P25-0) by wire * ********************************************************************************