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******************************************************************************** * File:                 main.c * Owner:            Peter Vlna * Version:           1.7 * Date:               Oct-10-2017 * Classification: General Business Information * Brief:                Example contains startup with PLL0 200MHz as system clock *                          and demonstrates reset triggered on FCCU Alarm state *                          counter exppire. ******************************************************************************** * Test HW:  MPC57xx * Maskset:  1N83M (cut 2.0B) * Target :  internal_FLASH * Fsys:     200MHz PLL0 as system clock ******************************************************************************** Revision History: 1.0     Oct-19-2015     Peter Vlna   Initial Version 1.1    Nov-11-2015    Peter Vlna   Added PPL0 200MHz as system clock 1.2    Dec-02-2015    Peter Vlna  Added Flash controller init 1.3    Dec-02-2015    Peter Vlna  Fixed system clock init 1.4    Feb-07-2017    Peter Vlna  SWT0 and SWT1 disabled in startup 1.5     May-31-2017    Peter Vlna  Fixed comments in AC6 (CLKOUT) 1.6     Oct-04-2017    Peter Vlna  Added PIT + Interrupts 1.7    Oct-05-2017    Peter Vlna  FCCU EOUT test in Alarm state with SMC *******************************************************************************/
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******************************************************************************** * Detailed Description: * This exapmple demonstrates progressive clock switching from full PLL clock * 256MNHz down to 200MHz. * * --------------------------------------------------------------------------------------------- * Test HW:  MPC57xx * Maskset:  3N45H * Target :  FLASH * Fsys:     256 MHz PLL * ******************************************************************************** Revision History: 1.0     Aug-04-2016     b21190(Vlna Peter)  Initial Version 1.1    Sep-05-2017     b21190(Vlna Peter)  Added FCCU faults clearing 1.2    May-07-2018    nxa13250(Vlna Peter)  PLL switch from 256->200MHz *******************************************************************************/
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******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals, setup access right for Masters and Peripherals * on AIPS_0 * * DMA transfers block of data from variable TransmitBuffer to the variable * ReceiveBuffer. Both variables are placed in SRAM. * * ICache and DCache are both disabled in startup file using CACHE_ENABLE macro. * You can change the value of the macro at the following path: * project Properties/C/C++ General/Paths and Symbols/Symbols * If you change the value to 1, ICahce and DCache will be enabled in startup. * * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3A 0N38M * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  default * ********************************************************************************
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MPC5744P FlexPWM offers possibility to synchronize the FlexPWM modules via external synchronization. Attached is example application how to properly synchronize 2 FlexPWMs modules: FlexPWMs run with motor control clock (MOT_CLK) with 100MHz frequency: PWM period is 20MHz with 50% duty cycle: Below is figure representing External synchronization of 2 PWM (on this frequency I have 2 clocks delay between synchronization) With adjusted FlexPWM0 channel A0 init value by 2 clocks I have reached following results:
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******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, third LED by second core, initializes and display notice via UART * terminal and then terminal ECHO. * * ------------------------------------------------------------------------------ * Test HW:  XPC56xxMB2 + XPC564xB/C, PPC5646C 0M87Y silicon * Target :  internal_FLASH, RAM * Fsys:     120 MHz PLL0 * Debugger: Lauterbach Trace32. script for internal_FALSH run_from_flash.cmm *                               script for RAM: run_from_ram_vle.cmm * ********************************************************************************
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******************************************************************************** * Detailed Description: * A simple example configures eTPU engine B channels 0/1 for QOM and FPM. * Connect these pins by wire. Output wave is generated on chnl ETPUB0 (QOM0) * and its frequency is measured on the chnl ETPUB1 (FPM0). * TCR counter frequency is 64MHz, output wave configured as 1MHz ( expected * frequency measured by FPM. Window size is 28us (0x400) thus number of * measured pulses is 28 (27 initally). * * Note: It is needed to configure IGF module, otherwise inputs does not pass * to eTPU module. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * EVB connection:  ETPUB0 (PortR P25-1) --> ETPUB1 (PortR P25-0) by wire * ********************************************************************************
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This document describes, how to create another configuration to existing ones (RAM, FLASH) and how to use your own linker file for the new configuration. As soon as you have created project, right click the project and select Properties. Click Tool Chain Editor. In upper right corner, select Manage Configurations. New window will appear, then click new. As soon as you choose new, another window will appear and here you can insert name of the configuration, description and last, you must choose, which configuration will be settings copied from. So, for example, you can choose existing FLASH configuration. Click OK and new configuration will be created. Now, you can choose the new configuration as the active configuration, also this new configuration is added to configurations, and it is accessible via "hammer" icon in upper left corner. Now, it is necessary to set linker file you want to use with this configuration. Because this new configuration is inherited from FLASH configuration, it also uses default flash linker file. Set your configuration as active at first. After this step, in project properties select Settings->PowerPC Linker input tab. Into line Link Command File, choose path to required linker file you want to use with the new configuration. Click OK. You can verify the new configuration is chosen using arrow new to the hammer icon. How to use new configuration in debug configuration As soon as you have new configuration created, it is highly probable, you would like to download created elf into microcontroller and eventually debug it. Open debug configuration window. Now you can create new debug configuration or you can duplicate existing one. I will describe easier option and I will duplicate Flash configuration. Choose the flash configuration and click the duplicate icon. New configuration will appear. Now choose the new configuration, change the name and select elf file, which is created by new configuration. Click Apply and Debug button.
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******************************************************************************** * Owner:            b21190(Vlna Peter) * Version:          1.0 * Date:             May-09-2018 * Classification:   General Business Information * Brief:            BIST demonstration ******************************************************************************** * Test HW:  MPC57xx * Maskset:  3N23A * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference ******************************************************************************** Revision History: 1.0     Oct-22-2014     b21190(Vlna Peter)  Initial Version 1.1    Sep-25-2018    b21190(Vlna Peter)  STCU2 BIST Multicore *******************************************************************************/
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******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed * frequency * * User can choose, which low power mode should be entered. There is LPU_MODE * macro defined, which allows to choose STOP, STANDBY or LPU_RUN mode. * * If LPU_RUN mode is selected, user can use macro LPU_STOP_SLEEP_STANDBY, * which allows to choose LPU_STOP, LPU_SLEEP or LPU_STANDBY mode. * * Ther is also RTC initialized, which wakeup microcontroller using WKPU after * 5 seconds from some of the LPU is entered. RTC uses FIRC as a source clock, * so FIRC must be enabled in all low power modes. * * * Modified files: mem.ld, sections.ld, startup.s, added file z2_restart.s * * * ------------------------------------------------------------------------------ * Test HW:         MPC5748G-324DS, MPC574xG Motherboard * MCU:             PPC5748GMMN6A 0N78S * Fsys:            PLL0 160MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  USER LED1 to A1 *                    USER LED2 to A2 * * * ********************************************************************************
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Detailed Description:                      This config tool simplifies DCF records calculation for MPC5777M device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr
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******************************************************************************** * Detailed Description: * Sensor board OM11057A which includes two PCF8885 circuits is connected * to MPC5748G via I2C. MPC5748G continuously reads the state of touch sensors * and the state is shown on LED diodes which are driven by I2C circuit PCA9535. * * Used I2C driver: https://community.freescale.com/docs/DOC-330972 * * Touch sensor board (page 9 and 10): * http://www.nxp.com/documents/user_manual/UM10505.pdf * * ------------------------------------------------------------------------------ * * Connection: * * Connect I2C bus (I2C_2 on MPC5748G) to sensor board: * I2C_SCL: P24-33 (pin PE9) on MPC574XG-MB to K3-1 on OM11057A * I2C_SDA: P24-35 (pin PE8) on MPC574XG-MB to K3-13 on OM11057A * Note: use two pull-up resistors on I2C signals (pulled to 3.3V). * The value should be 3k3 - 10k * * Connect power supply from MPC574XG-MB to OM11057A: * GND: P24-2 on MPC574XG-MB to K3-7 on OM11057A * 3.3V: P24-1 on MPC574XG-MB to K3-9 on OM11057A * * Connect SLEEP pins of both PCF8885 to GND (this will ensure that sleep mode * is not entered): * SLEEP1: K3-11 to K2-3 (both on OM11057A) * SLEEP2: K1-6 to K1-8 (both on OM11057A) * * ------------------------------------------------------------------------------ * Sensor board:    OM11057A *                  http://www.nxp.com/documents/user_manual/UM10505.pdf * Test HW:         MPC574XG-324DS Rev.A + MPC574XG-MB Rev.C * MCU:             PPC5748GMMN6A 1N81M * Fsys:            160 MHz PLL * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * ********************************************************************************
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/* * Queue.h * *  Created on: May 28, 2015 *      Author: ShuLizhong */     #ifndef QUEUE_H_ #define QUEUE_H_ #ifdef _cplusplus extern "C" { #endif /*If you want to change the queue type(QUEUE_TYPE) and queue max size(QUEUE_MAX_SIZE),   you should define it at front of include queue.h file. eg: ******in xxx.h file***** code**** #define QUEUE_TYPE   Other type(unsigned int) #define QUEUE_MAX_SIZE   Other size(100) #include "qeue.h" code**** */ #ifndef QUEUE_TYPE #define QUEUE_TYPE unsigned char #endif #ifndef QUEUE_MAX_SIZE #define QUEUE_MAX_SIZE 100 #endif #define bool unsigned int typedef enum {   OK,   FULL,   EMPTY }QUEUE_STATUS; typedef struct {   unsigned int tail;   unsigned int head;   unsigned int size;   unsigned int length;   QUEUE_TYPE data[QUEUE_MAX_SIZE]; }Queue_tag,*pQueue_tag;     __inline void InitQueue(pQueue_tag q) {   q->tail = q->head = q->size = 0;   q->length = QUEUE_MAX_SIZE; } __inline  QUEUE_STATUS EnQueue(pQueue_tag q,QUEUE_TYPE data) {   if(q->size++ == QUEUE_MAX_SIZE)   return FULL;   q->data[q->tail] = data;   q->tail = (q->tail+1) % QUEUE_MAX_SIZE;   return OK; } __inline QUEUE_STATUS DeQueue(pQueue_tag q, QUEUE_TYPE *data) {   if(q->size-- == 0)   return EMPTY;   *data = q->data[q->head];   q->head = (q->head+1) % QUEUE_MAX_SIZE;   return OK; } __inline bool IsQueueEmpty(pQueue_tag q) {   return q->size == 0; } __inline bool IsQueueFull(pQueue_tag q) {   return q->size == QUEUE_MAX_SIZE; } __inline unsigned int GetQueueSize(pQueue_tag q) {   return q->size; } __inline unsigned int GetQueueLength(pQueue_tag  q) {   return q->length; } /*__inline unsigned int DeMoreBytesFromQueue(pQueue_tag q,QUEUE_TYPE *data,unsigned int len) {   unsigned int i = 0;   len++;   return 0; }*/     #ifdef _cplusplus } #endif #endif /* QUEUE_H_ */
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Detailed Description:                      This config tool simplifies DCF records calculation for MPC5746C device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr
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******************************************************************************** * Detailed Description: * Application performs basic initialization, initializes interrupts and NMI for * WKPCFG pin (GPIO213). * User needs to connect ETPUC9 pin to user switch and general purpose output * ETPUA30 to user LED 1: * ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) * WKPCFG  (PortC P10-4)  --> USER_SWITCHES (P6-4) * Jumper J523 position 1-2 needs to be OPEN! * * If rising edge is detected (i.e. button is pressed), machine check exception * is triggered and LED1 on is toggled. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection:  ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) *                  WKPCFG  (PortC P10-4)  --> USER_SWITCHES (P6-4) *                  Jumper J523 position 1-2 needs to be OPEN! ******************************************************************************** Revision History: Ver  Date         Author            Description of Changes 0.0  May-22-2019  David Tosenovjan  Initial version                            *******************************************************************************/
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* Detailed Description: * Test HW:  MPC57xx + S32R274RRUEVB * Maskset:  1N58R * Target :  internal_FLASH * Fsys:     240 MHz PLL with 40 MHz crystal reference for z7 and 120MHz for z4 * This example provides user with a configuration of clocks for all cores and all peripherals. * Peripherals and cores are supplied by maximum available clock configuration from PLLDIG block. ******************************************************************************** Revision History: 1.0     Apr-02-2019     b21190(Vlna Peter)  Initial Version *******************************************************************************/
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******************************************************************************** * Detailed Description: * * LINFlexD_1 configured as Master *   - sends Header *   - either transmits a data to LIN Slave or receives data from a LIN Slave *   - no interrupt is used, just SW pooling * * LINFlexD_0 as Slave *   - receives header from a LIN Master *   - either receives data from a LIN Master or transmits a data to Master *   - filter is enabled *   - TX interrupt is used to prepare data to send and *   - RX interrupt to read received data * * EVB connection: * *   LIN1 circuitry *   connect 12V to LIN1-VSUP, so connect J23.1 to P11.3 *   J13, J12 jumpers placed * *   LIN0 circuitry *   remove J11 * *   connect LIN1 to LIN0, so connect P11 to P9 *   if do not have desired cable, connect P11.3-P9.3 and P11.4-P9.4 * *   See LIN signal on P11.4 or P9.4. * * ------------------------------------------------------------------------------ * Test HW:  X-MPC574xG-324DS + X-MPC574XG-MB * Maskset:  1N81M * Target :  FLASH * Fsys:     160 MHz PLL * ********************************************************************************
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MCU:MPC5606B External Crystal Oscillator: 9.6M System Core Frequency: 64MHz DSPI Baute rate: 4Mbps CPOL:0 CPHA:0 Receive and Transmit Interrupt: disable;use PA12 13 14 15 driver FM25640b; the FM25640B's HOLD and WP pin all pull up to vcc. attention:CONT QQ:511437685
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******************************************************************************** * Detailed Description: * Purpose of the example is to show how to generate Multi-bit ECC error in * local DMEM memory. * ECC fault is generated with using of core register DMEMCTL0. If error * injection is enabled (DMEMCTL0[DPEIE]=1), subsequent write to DMEM creates * 2b ECC error in DMEM array and following read of this area causes bus error * (IVOR1 exception) or FCCU_Alarm_Interrupt. * Both function calls MEMU handler. * Example does not show any handling as it is application specific. * The example displays notices in the terminal window (connector J19 on * MPC57xx_Motherboard)(19200-8-no parity-1 stop bit-no flow control on eSCI_A). * No other external connection is required. * ------------------------------------------------------------------------------ * Test HW:         MPC57xx_Motherboard + MPC5744P-144DC * MCU:             PPC5744PFMLQ8,0N15P,QQAA1515N, Rev2.1B * Fsys:            200 MHz PLL with 40 MHz crystal reference * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH, RAM * Terminal:        19200-8-no parity-1 stop bit-no flow control * EVB connection:  default ********************************************************************************
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******************************************************************************** * File:             main.c * Owner:            b21190(Vlna Peter) * Version:          1.6 * Date:             Oct-10-2017 * Classification:   General Business Information * Brief:            Example contains startup with PLL0 200MHz as system clock *                   and demonstrates PIT interrupt triggering. ******************************************************************************** * Test HW:  MPC57xx EVB + MPC5746R minimodule * Maskset:  1N83M (cut 2.0B) * Target :  internal_FLASH * Fsys:     200MHz PLL0 as system clock ******************************************************************************** Revision History: 1.0     Oct-19-2015   b21190(Vlna Peter)  Initial Version 1.1    Nov-11-2015     b21190(Vlna Peter)  Added PPL0 200MHz as system clock 1.2    Dec-02-2015    b21190(Vlna Peter)  Added Flash controller init 1.3    Dec-02-2015    b21190(Vlna Peter)  Fixed system clock init 1.4    Feb-07-2017    b21190(Vlna Peter)  SWT0 and SWT1 disabled in startup 1.5     May-31-2017    b21190(Vlna Peter)  Fixed comments in AC6 (CLKOUT) 1.6     Oct-10-2017    b21190(Vlna Peter)  Added PIT + Interrupts *******************************************************************************/
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This session will explain how Freescale can enable customers to develop 76-81 GHz short and long range radar applications using the MPC577xK MCU, it will explain the concepts of the radar algorithms, including practical aspects such as SDADC or MIPI CSI sampling, Chirp Generation, Data Compression, R,V FFT, Detection and Tracking algorithms, and the benefits of the new Freescale IP that can allow them to improve their system resolution and accuracy. In this session customers will take away a detailed understanding of how to develop fast modulation radar systems using the MPC577xK MCU including the BOM cost advantages it also brings.
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