How to use the gadget CDC to configure the Layerscape board USB as the serial device to communicate the board by the Serial port. In this file, a setting example has been applied on the LS1028ARDB USB2.

How to use UART2 instead of UART1 on LS1043ARDB/LS1046ARDB.   1. Compile PBL binary from RCW source file 2. Compile U-Boot binary 3. Compile TF-A binaries (bl2_.pbl and fip.bin) 4. Program TF-A binaries on specific boot mode     1-COMPILE PBL BINARY FROM RCW SOURCE FILE   You have to create a new directory to compile the binaries that you need to create a TF-A binary You need to compile the rcw_<boot_mode>.bin binary to build the bl2_<boot_mode>.pbl binary.   Clone the rcw repository and compile the PBL binary.   1. $ git clone https://github.com/nxp-qoriq/rcw 2. $ cd rcw 3. $ cd ls1043ardb 4. $ make   Inside the directory called “RR_FQPP_1455” you can see some binaries with the next nomenclature: rcw_<freq>.bin Where “freq” is the frequency in MHz of the processor, the values of the frequency are 1200MHz, 1400MHz, 1500MHz, and 1600MHz   2-COMPILE U-BOOT BINARY You need to compile the u-boot.bin binary to build the fip.bin binary. Clone the U-boot repository and compile the U-Boot binary for TF-A   1. $ git clone https://github.com/nxp-qoriq/u-boot 2. $ cd u-boot 3. $ git checkout -b LSDK-21.08 LSDK-21.08 4. $ export ARCH=arm64 5. $ export CROSS_COMPILE=aarch64-linux-gnu- 6. $ make distclean 7. $ nano configs/ls1043ardb_tfa_defconfig 7.1 change the bootargs "console=ttyS0,115200" for "console=ttyS1,115200" 7.2 add "CONFIG_CONS_INDEX=2 7. $ make ls1043ardb_tfa_defconfig 8. $ make   3 Compile TF-A binaries (bl2_.pbl and fip.bin) 1. $ git clone https://github.com/nxp-qoriq/atf 2. $ cd atf 3. $ git checkout -b LSDK-21.08 LSDK-21.08 4. $ export ARCH=arm64 5. $ export CROSS_COMPILE=aarch64-linux-gnu- 6. $ nano plat/nxp/common/include/default/ch_3_2/soc_default_base_addr.h 6.1 Change the line "#define NXP_UART_ADDR 0x021C0000" for "#define NXP_UART_ADDR 0x021D0000" 6.2 Change the line "#define NXP_UART1_ADDR 0x021D0000" for "#define NXP_UART_ADDR 0x021C0000" 7. $ nano plat/nxp/common/include/default/ch_2/soc_default_base_addr.h 7.1 Change the line "#define NXP_UART_ADDR 0x021C0500" for "#define NXP_UART_ADDR 0x021C0600" 7.2 Change the line "#define NXP_UART1_ADDR 0x021C0600" for "#define NXP_UART_ADDR 0x021C0500"   The compiled BL2 binaries, bl2.bin and bl2_<boot mode>.pbl are available at atf/build/ls1043ardb/release/. NOTE: For any update in the BL2 source code or RCW binary, the bl2_<boot mode>.pbl binary needs to be recompiled   3.1 HOW TO COMPILE BL2 BINARY To compile the BL2 binary without OPTEE: make PLAT=<platform> bl2 BOOT_MODE=<boot_mode> pbl RCW=<path_to_rcw_binary>/<rcw_binary_for_specific_boot_mode> To LS1043ARDB for SD boot: make PLAT=ls1043ardb bl2 BOOT_MODE=sd pbl RCW=<path_to_rcw_binary>/<rcw_freq.bin> To LS1043ARDB for NOR boot: make PLAT=ls1043ardb bl2 BOOT_MODE=nor pbl RCW=<path_to_rcw_binary>/<rcw_freq.bin> To LS1043ARDB for NAND boot: make PLAT=ls1043ardb bl2 BOOT_MODE=nand pbl RCW=<path_to_rcw_binary>/<rcw_freq.bin>   3.2 HOW TO COMPILE FIP BINARY   To compile the FIP binary without OPTEE and trusted board boot: $make PLAT=<platform> fip BL33=<path_to_u-boot_binary>/u-boot.bin   For LS1043ARDB: $make PLAT=ls1043ardb fip BL33=<path_to_u-boot_binary>/u-boot.bin   The compiled BL31 and FIP binaries ( bl31.bin, fip.bin ) are available at atf/build/ls1043ardb/release/. For any update in the BL31, BL32, or BL33 binaries, the fip.bin binary needs to be recompiled.   4 Program TF-A binaries on specific boot mode For that step you can use a tftp server, but it is easier with a USB formatted on FAT32.   You have to put the files “ bl2_<boot_mode>.pbl” and “fip.bin” in the usb and follow the steps to your boot mode.   4.1 Program TF-A binaries on IFC NOR flash For LS1043A, the steps to program TF-A binaries on IFC NOR flash are as follows:   1. Boot the board from the default bank. 2. Under U-boot prompt: => usb start 3. Flash bl2_nor.pbl: => fatload usb 0:1 $load_addr bl2_nor.pbl a. Alternate bank: => protect off 64000000 +$filesize && erase 64000000 +$filesize && cp.b $load_addr 64000000 $filesize b. Current bank: => protect off 60000000 +$filesize && erase 60000000 +$filesize && cp.b $load_addr 60000000 $filesize 4. Flash fip.bin: => fatload usb 0:1 $load_addr fip.bin a. Alternate bank: => protect off 64100000 +$filesize && erase 64100000 +$filesize && cp.b $load_addr 64100000 $filesize b. Current bank: => protect off 60100000 +$filesize && erase 60100000 +$filesize && cp.b $load_addr 60100000 $filesize 5. Reset your board: a. Alternate bank: cpld reset altbank b. Current bank: cpld reset   4.2 Program TF-A binaries on NAND flash   1. Boot the board from the default bank. 2. Under U-boot prompt: => usb start 3. Flash bl2_nand.pbl to NAND flash: => fatload usb 0:1 $load_addr bl2_nand.pbl => nand erase 0x0 $filesize;nand write $load_addr 0x0 $filesize; 4. Flash fip_uboot.bin to NAND flash: => fatload usb 0:1 $load_addr fip.bin => nand erase 0x100000 $filesize;nand write $load_addr 0x100000 $filesize; 5. Reset your board: => cpld reset nand   4.3 Program TF-A binaries on SD card   To program TF-A binaries on an SD card, follow these steps:   1. Boot the board from the default bank. 2. Under U-boot prompt: => usb start 3. Flash bl2_sd.pbl to SD card: => fatload usb 0:1 $load_addr bl2_sd.pbl => mmc write $ load_addr 8 A1 4. Flash fip.bin to SD card: => fatload usb 0:1 $load_addr bl2_sd.pbl => mmc write $load_addr 800 A1 5. Reset your board: => cpld reset sd Now the console should be out from UART2 port of the board.  

How to bring up a card when the flash is blank, or the image is corrupted. How to boot cards from various boot mode when changed the RCW as requirements. This documentation will use LS1046ARDB as new board to realize the functions (all target board in the document is LS1046ARDB). Content Bring up LS1046A with CodeWarrior TAP Boot up from the SD card Compile PBL binary from RCW source file Compile the PBL binary into firmware Program the firmware into the target board (LS1046ARDB) Boot up from the QSPI Compile firmware from RCW source file Program the firmware into the target board (LS1046ARDB) Boot up from the eMMC Enable the on board eMMC Compile firmware from RCW source file Program the firmware into the target board (LS1046ARDB)

FlexSPI controller is new IP from Microcontroller group and it will replace QSPI in all future SoCs. FlexSPI is superset and superior to QSPI. Most of the feature set of FlexSPI and QSPI are same, but there are few difference related to IO signal width, command set, default LUT programming and Hyperflash support. FlexSPI has AHB and IP bus interface. AHB 64-bit interface and is mainly use for READ and WRITE flash operation whereas IP is 32-bit interface and it supports all flash operation – READ, WRITE, STATUS CHECK, GET PARAMS etc. FlexSPI programs various commands in LUT and these commands sequence are trigger when we do AHB/IP bus READ/WRITE operation. This documents introduces FlexSPI controller, FlexSPI serial NOR driver implementation and FlexSPI serial NAND driver implementation.  1. FlexSPI Controller Introdunction 1.1 FlexSPI Connections 1.2 FlexSPI Command Interfaces 1.3 FlexSPI Look Up Table(LUT) 1.4 FlexSPI Command Set (Programmable Sequence Engine)   2. FlexSPI serial NOR driver implementation 3. FlexSPI serial NAND driver implementation    

To extract kernel, rootfs, and dtb images from the Linux ITB (LITB) image: Browse to the folder containing LITB. For example: $ cd flexbuild_lsdk2004/build/images/ To list the header information of LITB, use the following command: $ dumpimage -l <name of the image> $ dumpimage -l lsdk2004_ubuntu_main_LS_arm64.itb FIT description: arm64 kernel, ramdisk and FDT blob Created: Tue Feb 2 18:54:19 2021 Image 0 (kernel) Description: ARM64 Kernel Created: Tue Feb 2 18:54:19 2021 Type: Kernel Image Compression: gzip compressed Data Size: 14086432 Bytes = 13756.28 kB = 13.43 MB Architecture: AArch64 OS: Linux Load Address: 0x84080000 Entry Point: 0x84080000 Hash algo: crc32 Hash value: 1980d6fd Image 1 (initrd) Description: initrd for arm64 Created: Tue Feb 2 18:54:19 2021 Type: RAMDisk Image Compression: uncompressed Data Size: 668988861 Bytes = 653309.43 kB = 638.00 MB Architecture: AArch64 OS: Linux Load Address: 0x00000000 Entry Point: 0x00000000 Hash algo: crc32 Hash value: 24aa3c08 Image 2 (ls1012ardb-dtb) Description: ls1012ardb-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 14335 Bytes = 14.00 kB = 0.01 MB Architecture: AArch64 Hash algo: crc32 Hash value: 383a8118 Image 3 (ls1012aqds-dtb) Description: ls1012aqds-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 15972 Bytes = 15.60 kB = 0.02 MB Architecture: AArch64 Hash algo: crc32 Hash value: 7d133305 Image 4 (ls1012afrwy-dtb) Description: ls1012afrwy-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 15316 Bytes = 14.96 kB = 0.01 MB Architecture: AArch64 Hash algo: crc32 Hash value: 7c456ca3 Image 5 (ls1028ardb-dtb) Description: ls1028ardb-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 19767 Bytes = 19.30 kB = 0.02 MB Architecture: AArch64 Hash algo: crc32 Hash value: db86fa4f Image 6 (ls1028aqds-dtb) Description: ls1028aqds-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 24733 Bytes = 24.15 kB = 0.02 MB Architecture: AArch64 Hash algo: crc32 Hash value: e0b7a722 Image 7 (ls1043ardb-dtb) Description: ls1043ardb-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 41085 Bytes = 40.12 kB = 0.04 MB Architecture: AArch64 Hash algo: crc32 Hash value: fcc6502c Image 8 (ls1043aqds-dtb) Description: ls1043aqds-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 34544 Bytes = 33.73 kB = 0.03 MB Architecture: AArch64 Hash algo: crc32 Hash value: 45f82fba Image 9 (ls1046ardb-dtb) Description: ls1046ardb-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 40270 Bytes = 39.33 kB = 0.04 MB Architecture: AArch64 Hash algo: crc32 Hash value: 013f5024 Image 10 (ls1046aqds-dtb) Description: ls1046aqds-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 34317 Bytes = 33.51 kB = 0.03 MB Architecture: AArch64 Hash algo: crc32 Hash value: be066013 Image 11 (ls1046afrwy-dtb) Description: ls1046afrwy-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 31528 Bytes = 30.79 kB = 0.03 MB Architecture: AArch64 Hash algo: crc32 Hash value: d872df6c Image 12 (ls1088ardb-dtb) Description: ls1088ardb-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 19523 Bytes = 19.07 kB = 0.02 MB Architecture: AArch64 Hash algo: crc32 Hash value: 403066bc Image 13 (ls1088aqds-dtb) Description: ls1088aqds-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 19415 Bytes = 18.96 kB = 0.02 MB Architecture: AArch64 Hash algo: crc32 Hash value: a2bf2786 Image 14 (ls2088ardb-dtb) Description: ls2088ardb-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 29838 Bytes = 29.14 kB = 0.03 MB Architecture: AArch64 Hash algo: crc32 Hash value: 0069fe03 Image 15 (ls2088aqds-dtb) Description: ls2088aqds-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 23557 Bytes = 23.00 kB = 0.02 MB Architecture: AArch64 Hash algo: crc32 Hash value: e8e9dfa7 Image 16 (lx2160ardb-dtb) Description: lx2160ardb-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 32643 Bytes = 31.88 kB = 0.03 MB Architecture: AArch64 Hash algo: crc32 Hash value: e5859b31 Image 17 (lx2160aqds-dtb) Description: lx2160aqds-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 27740 Bytes = 27.09 kB = 0.03 MB Architecture: AArch64 Hash algo: crc32 Hash value: f644de1e To extract a particular image from LITB, use the following command:  $ dumpimage -i <name of the image> -T <type> [-p position] [-o outfile] data_file For example: To extract the kernel image: $ dumpimage -T flat_dt -i lsdk2004_ubuntu_main_LS_arm64.itb -p 0 kernel Extracted: Image 0 (kernel) Description: ARM64 Kernel Created: Tue Feb 2 18:54:19 2021 Type: Kernel Image Compression: gzip compressed Data Size: 14086432 Bytes = 13756.28 kB = 13.43 MB Architecture: AArch64 OS: Linux Load Address: 0x84080000 Entry Point: 0x84080000 Hash algo: crc32 Hash value: 1980d6fd To extract the rootfs image: $ dumpimage -T flat_dt -i lsdk2004_ubuntu_main_LS_arm64.itb -p 1 rootfs Extracted: Image 1 (initrd) Description: initrd for arm64 Created: Tue Feb 2 18:54:19 2021 Type: RAMDisk Image Compression: uncompressed Data Size: 668988861 Bytes = 653309.43 kB = 638.00 MB Architecture: AArch64 OS: Linux Load Address: 0x00000000 Entry Point: 0x00000000 Hash algo: crc32 Hash value: 24aa3c08 To extract ls1012ardb-dtb (at position 2) and ls1012aqds-dtb (at position 3): $ dumpimage -T flat_dt -i lsdk2004_ubuntu_main_LS_arm64.itb -p 2 dtb1 Extracted: Image 2 (ls1012ardb-dtb) Description: ls1012ardb-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 14335 Bytes = 14.00 kB = 0.01 MB Architecture: AArch64 Hash algo: crc32 Hash value: 383a8118 $ dumpimage -T flat_dt -i lsdk2004_ubuntu_main_LS_arm64.itb -p 3 dtb2 Extracted: Image 3 (ls1012aqds-dtb) Description: ls1012aqds-dtb Created: Tue Feb 2 18:54:19 2021 Type: Flat Device Tree Compression: uncompressed Data Size: 15972 Bytes = 15.60 kB = 0.02 MB Architecture: AArch64 Hash algo: crc32 Hash value: 7d133305      

On successful probing of the DSA Felix switch, each available front panel switch port should have a network device interface attached with the swpX name format. The ip link show command uses the swpX@enoY name format to also indicate the associated master Ethernet interface for the DSA switch port, which corresponds to an internal ENETC interface, usually the eno2 (Port2) for the LS1028A SoC. LS1028 Interface naming in Linux Single port mode Bridge mode

Follow these steps to update the composite firmware image in QSPI NOR flash. cpld reset boots the board from QSPI NOR flash0 and cpld reset altbank boots the board from QSPI NOR flash1. sf probe 0:1 means that the alternate bank will be written to. So, if the board boots from QSPI NOR flash0 and sf probe 0:1 is entered at the U-Boot prompt, the commands that follow will program QSPI NOR flash1. Obtaining composite firmware image  LSDK includes pre-built firmware images for QSPI NOR flash. The LSDK composite firmware includes RCW+PBI, U-Boot/UEFI, PPA, boot loader environment variables, DPAA1 FMan ucode, QE/uQE firmware, Ethernet PHY firmware, device tree, and lsdk_linux_<arch>.itb images. Refer Flash layout for new boot flow with TF-A for the complete flash memory layout of the images.  On a Linux host machine, download composite firmware image for QSPI boot from nxp.com.    $ wget http://www.nxp.com/lgfiles/sdk/lsdk<LSDK version>/firmware_<RDB_name>_uboot_qspiboot.img    For example:  $ wget http://www.nxp.com/lgfiles/sdk/lsdk1812/firmware_ls1046ardb_uboot_qspiboot.img  Flashing composite firmware images to QSPI NOR flash Composite firmware image can be loaded to LS1046ARDB from a TFTP server or from a mass storage device (SD, USB, or SATA). Option 1: Load image from the TFTP server Boot LS1046RDB from QSPI NOR flash. Ensure that the switches are set to boot the board from QSPI NOR flash. For booting from QSPI flash, SW5[1:8] = 00100010 Boot from QSPI NOR flash0: => cpld reset In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 0 Set up Ethernet connection When board boots up, U-Boot prints a list of enabled Ethernet interfaces. FM1@DTSEC3 [PRIME], FM1@DTSEC4, FM1@DTSEC5, FM1@DTSEC6, FM1@TGEC1, FM1@TGEC2 Set server IP to the IP of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the Ethernet interface connected to the TFTP server. Refer LS1046ARDB Ethernet port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux. => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime FM1@DTSEC4 => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact FM1@DTSEC4 Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command. Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using FM1@DTSEC4 device host 192.168.1.1 is alive   Load composite firmware image from the TFTP server Program QSPI NOR flash1: => sf probe 0:1 Flash composite firmware image: => tftp a0000000 firmware_ls1046ardb_uboot_qspiboot.img => print filesize filesize=2351db0 Program composite firmware image to QSPI NOR flash: => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize  Address 0x0 is the location of the composite firmware image in QSPI NOR flash.  Refer Flash layout for new boot flow with TF-A for the complete flash memory layout. Boot from QSPI NOR flash1: => cpld reset altbank In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 4 Ensure that SD card, USB flash drive, or SCSI hard disk installed with LSDK Ubuntu distribution is plugged into the board to boot the board to Ubuntu. If U-Boot does not find LSDK on a mass storage device, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored in QSPI NOR flash. Option 2: Load image from partition on mass storage device (SD, USB, or SATA) Boot LS1046RDB from QSPI NOR flash. Ensure that the switches are set to boot the board from QSPI NOR flash. For booting from QSPI flash, SW5[1:8] = 00100010 Boot from QSPI NOR flash0: => cpld reset In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 0 Select mass storage device to use. => mmc rescan => mmc info Or => usb start => usb info Or => scsi scan => scsi info Optional – List files on storage device => ls mmc <device:partition> For example: => ls mmc 0:2 Or => ls usb <device:partition> For example: => ls usb 0:1 Or => ls scsi <device:partition> For example: => ls scsi 0:2 Program QSPI NOR flash1: => sf probe 0:1 Load composite firmware image from the storage device => load mmc 0:2 a0000000 <image name> => print filesize For example: => load mmc 0:2 a0000000 firmware_ls1046ardb_uboot_qspiboot.img => print filesize filesize=2351db0 Or => load usb 0:2 a0000000 <image name> => print filesize Or => load scsi 0:2 a0000000 <image name> => print filesize If the ls command fails to run, check that U-Boot in QSPI NOR flash0 supports the command by typing ls at the U-Boot prompt: => ls ls - lists files in a directory (default) Usage: ls <interface> [<dev[:part]> [directory]] - Lists files in directory [directory] of partition [part] on device type [interface] and instance [dev]. If U-Boot does not support this command, then update the composite firmware image in QSPI NOR flash0. Program image to QSPI NOR flash: => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize Address  0x0 is the location of the composite firmware image in QSPI NOR flash.  Refer Flash layout for new boot flow with TF-A for the complete flash memory layout.  Boot from QSPI NOR flash1: => cpld reset altbank In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 4 Ensure that SD card, USB flash drive, or SCSI hard disk installed with LSDK Ubuntu distribution is plugged into the board to boot the board to Ubuntu. If U-Boot does not find LSDK on a mass storage device, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored in QSPI NOR flash.

The table below shows the mapping of the Ethernet port names appearing on the front panel of the LS1043ARDB chassis with the port names in U-Boot, tinyDistro, and NXP LSDK userland.  Ethernet port mapping Port name on chassis Port name in U-Boot Port name in Linux (tinyDistro) Port name in Linux (LSDK userland) QSGMII.P0 FM1@DTSEC1 eth0 fm1-mac1 QSGMII.P1 FM1@DTSEC2 eth1 fm1-mac2 QSGMII.P2 FM1@DTSEC3 eth2 fm1-mac5 QSGMII.P3 FM1@DTSEC4 eth3 fm1-mac6 RGMII1 FM1@DTSEC5 eth4 fm1-mac3 RGMII2 FM1@DTSEC6 eth5 fm1-mac4 10G Copper FM1@TGEC1 eth6 fm1-mac9 Below is a table that shows the mapping between port numbers (from configuration file), character devices, hardware ports (Rx) and mEMACs for the standard SDK configuration (using RCW protocol 1455). FMC port mapping Port name on chassis XML port number (configuration file) Serdes protocol Character device Hardware port (device tree node) mEMAC (device tree node) QSGMII.P0 1 qsgmii fm0-port-rx0 port@88000 ethernet@e0000 QSGMII.P1 2 qsgmii fm0-port-rx1 port@89000 ethernet@e2000 QSGMII.P2 5 qsgmii fm0-port-rx4 port@8c000 ethernet@e8000 QSGMII.P3 6 qsgmii fm0-port-rx5 port@8d000 ethernet@ea000 RGMII1 3 rgmii fm0-port-rx2 port@8a000 ethernet@e4000 RGMII2 4 rgmii fm0-port-rx3 port@8b000 ethernet@e6000 10G Copper 9 xgmii fm0-port-rx6 port@90000 ethernet@f0000

LS1012A integrates a hardware packet forwarding engine to provide high performance Ethernet interfaces. This document introduces PFE hardware and software decomposition and data flow, setting up two PFE Ethernet ports to implement Ethernet packets forwarding through PFE, how to modify PFE driver and dts file to set up single PFE Ethernet port on LS1012A custom boards. PFE hardware Structure PFE Software Decomposition and Data Flow Setting up Two PFE Ethernet Ports to Implement Ethernet Packets Forwarding Set up Single PFE Ethernet Port on LS1012A Custom Boards

The integrated flash controller (IFC) is used to interface with external asynchronous/synchronous NAND flash, asynchronous NOR flash, SRAM, generic ASIC memory and EPROM. This document introduces how to configure IFC controller on QorIQ LS, T and P series custom boards, uses LS1043 custom board integrating NAND Flash MT29F64G08CBCBBH1 as an example to demonstrate IFC flash timing parameters calculation and control registers configuration, CodeWarrior initialization file customization and u-boot source code porting. 1. IFC Memory Mapped Registers Introduction 2. Calculate IFC Flash Timing Values and Configure Control Registers 3. Customize CodeWarrior Initialization File with the Calculated IFC Timing 4. Porting U-BOOT Source with the Calculated IFC Timing

This document introduces how to configure RCW to support GPIO on LS1043 platform, how to configure Linux Kernel to load Linux GPIO driver to access GPIO from SYSFS and using loopback method to do verification on the target board. RCW configuration to support GPIO Configure GPIO driver in Linux Kernel Verify GPIO on the target board

LS1043ARDB version updated because we replaced the Nand Flash with different page size one as the old one is obsolete. Version update information FA version Nand flash program by CodeWarrior Nand Flash firmware bring up files Boot Mode setting

In the LS1028ARDB, SPI is not enable, some customers need to enable this interface to debug their device and some customer maybe enable this device but the SPI sequence would be some uncertain error which will delay their plan. In this documents, will introduce how to enable the SPI3 on the LS1028ARDB, and use a SPI tools in the LSDK to help customer debug their SPI device in the initial stages of debugging.

The CodeWarrior tool – QCVS SerDes tool allows you to configure the SerDes block and provides you a GUI application to validate the SerDes configuration.  QCVS SERDES supports LX2 but except Serdes#1 Lane H, customer can use the guide below for Tx pattern generation. 

SECURE BOOT Secure Boot introduction Build secure boot ATF image Generate secure boot CSF headers for Linux tiny itb image Deploy secure boot images on the target board Blow OTPMK fuse in u-boot and through CodeWarrior CCS Write SRK hash keys to the mirror registers through CCS Secure boot Trouble Shooting  Fuse Provisioning Fuse Provisioning Utility Introduction Input File for Fuse Provisioning Tool Build Fuse Provisioning Firmware Image with flex-builder and Deploy the Firmware Image Build and Deploy Fuse Provisioning Image Manually Validate Fuse Provisioning Secure Debug Program DCVR and DRVR fuses to activate secure debug Unlock JTAG debug port after locking it through CCS commands Unlock JTAG debug port after locking it through CW IDE  

PPS (Pulses Per Second) signal applies to most network controllers of Layerscape, including DPAA1 platforms. PPS signal is output through 1588 timer pulse out pin. The QorIQ PTP driver configured fixed interval period pulse (FIPER) generator as PPS signal in default. This document describes how to create dts file to customize configuration on the 1588 timer such as selecting other reference clock source, and configuring nominal clock period, FIPERs period, and output clock period to generate the required PPS signal.

Compile kernel in the ls-5.15.71-2.2.0_distro In the LLDPUG_RevL5.15.71-2.2.0, it seems when do some reconfiguration in the kernel, rootfs should be repack to finish the change. Here will generate kernel without repack the roofts in the Linux host machine just compile the kernel.

The SerDes tool is a part of the QorIQ Configuration and Validation Suite (QCVS) product. This document will illustrate how to use the tools to validate the SerDes on the LS1046ARDB SerDes1 Lane1(Lane C) without Oscilloscope and BERT(Bit Error Ratio Tester). It validate the LS1046ARDB SerDes1 Lane1 with digital loopback, external loopback and external mode.

Basic Concept of Secure boot on LS1028A Platform Build secure boot ATF image Generate secure boot CSF headers for Linux tiny itb image Deploy secure boot images on the target board Blow OTPMK fuse in u-boot and through CodeWarrior CCS Write SRK hash keys to the mirror registers through CCS Secure boot Trouble Shooting  

The attached patch adds error detection for A53 and A57 cores. Hardware error injection is supported on A53. Software error injection is supported on both. For hardware error injection on A53 to work, proper access to L2ACTLR_EL1, CPUACTLR_EL1 needs to be granted by EL3 firmware. This is done by making an SMC call in the driver. Failure to enable access disables hardware error injection. For error interrupt to work, another SMC call enables access to L2ECTLR_EL1. Failure to enable access disables interrupt for error reporting. CPU Memory Error Syndrome and L2 Memory Error Syndrome registers can be used for checking L1 and L2 memory errors. However, only A53 supports double-bit error injection to L1 and L2 memory. This driver uses the hardware error injection when available, but also provides a way to inject errors by software. Both A53 and A57 supports interrupt when multibit errors happen. To use hardware error injection and the interrupt, proper access needs to be granted in ACTLR_EL3 (and/or ACTLR_EL2) register by EL3 firmware SMC call. Correctable errors do not trigger such interrupt. This driver uses dynamic polling internal to check for errors. The more errors detected, the more frequently it polls. Combining with interrupt, this driver can detect correctable and uncorrectable errors. However, if the uncorrectable errors cause system abort exception, this driver is not able to report errors in time.