LPC Microcontrollers Knowledge Base

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LPC Microcontrollers Knowledge Base

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Dear Community User, We recently migrated content from the LPCWare.com forums into this community site. Migrated content can be found in the following two locations: LPCXpresso IDE for content from the LPCXpresso folder on the LPCWare.com forum, and LPC for all other content. All imported content will appear as posted by "LPCWARE" and will have the following message displayed at the top of each thread with the original username and date posted in LPCWare: If you wish to find the content you created in LPCWare you must: 1.-  Open the search box at the top right side of your community near your avatar. 2.- Type in the username you had set up in LPCWare and the results should automatically appear. All responses to postings in the original LPCWare.com forums are also preserved, so if you are looking for a response you or another particular user posted then you should also be able to locate those responses using the same search mechanism. All FAQs have been migrated to the NXP Community site. Several forum postings include references to FAQs and re-directs are in place to take you to their new location from those postings.
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The documentation discusses how to generate phase-shift PWM signals based on SCTimer/PWM module, the code is developed based on MCUXpresso IDE version 10.3 and LPCXpresso5411x board. The LPC family has SCTimer/PWM module and CTimer modules, both of them can generate PWM signals, but only the SCTimer/PWM module  can generate phase-shift PWM signals. In the code, only the match registers are used to generate events, I/O signals are not used.  The match0 register is set up as (SystemCoreClock/100), which determines the PWM signal frequency. The the match1 register is set up as 0x00, which generate event1. The the match2 register is set up as (SystemCoreClock/100)/2;, which generate event2. The duty cycle is (SystemCoreClock/100)/2-0x00= (SystemCoreClock/100)/2, which is 50% duty cycle, the cycle time is (SystemCoreClock/100). The event1 sets the SCT0_OUT1, event2 clears the SCT0_OUT1, so SCT0_OUT1 has 50% duty cycle. The the match3 register is set up as (SystemCoreClock/100)/4;, which generate even3. The the match4 register is set up as 3*(SystemCoreClock/100)/4, which generate event4. The duty cycle is 3*(SystemCoreClock/100)/4  -  (SystemCoreClock/100)/4= (SystemCoreClock/100)/2, which is 50% duty cycle. The event3 sets the SCT0_OUT2, event4 clears the SCT0_OUT2, so SCT0_OUT2 has 50% duty cycle. The phase shift is (SystemCoreClock/100)/4 - 0x00= (SystemCoreClock/100)/4, which corresponds 90 degree phase shift. PWM initilization code: //The SCT0_OUT1 can output PWM signal with 50 duty cycle from PIO0_8 pin //The SCT_OUT2 can output PWM signal with 50 duty cycle fron PIO0_9 pin //The SCT0_OUT1 and SCT0_OUT2 PWM signal has 90 degree phase shift. void SCT0_PWM(void) {     SYSCON->AHBCLKCTRL[1]|=(1<<2); //SET SCT0 bit     SCT0->CONFIG = (1 << 0) | (1 << 17); // unified 32-bit timer, auto limit     SCT0->SCTMATCHREL[0] = SystemCoreClock/100; // match 0 @ 100 Hz = 10 msec     SCT0->EVENT[0].STATE = 0xFFFFFFFF; // event 0 happens in all states     //set event1     SCT0->SCTMATCHREL[1]=0x00;     SCT0->EVENT[1].STATE = 0xFFFFFFFF; // event 1 happens in all states     SCT0->EVENT[1].CTRL = (1 << 12)|(1<<0); // match 1 condition only     //set event2     SCT0->SCTMATCHREL[2]=(SystemCoreClock/100)/2;     SCT0->EVENT[2].STATE = 0xFFFFFFFF; // event 2 happens in all states     SCT0->EVENT[2].CTRL = (1 << 12)|(2<<0); // match 2 condition only     //set event3     SCT0->SCTMATCHREL[3]=(SystemCoreClock/100)/4;     SCT0->EVENT[3].STATE = 0xFFFFFFFF; // event 3 happens in all states     SCT0->EVENT[3].CTRL = (1 << 12)|(3<<0); // match 3 condition only     //set event4     SCT0->SCTMATCHREL[4]=3*(SystemCoreClock/100)/4;     SCT0->EVENT[4].STATE = 0xFFFFFFFF; // event 4 happens in all states     SCT0->EVENT[4].CTRL = (1 << 12)|(4<<0); // match 4 condition only     //PWM output1 signal     SCT0->OUT[1].SET = (1 << 1); // event 1 will set SCT1_OUT0     SCT0->OUT[1].CLR = (1 << 2); // event 2 will clear SCT1_OUT0     SCT0->RES |= (3 << 2); // output 0 toggles on conflict     //PWM output2 signal     SCT0->OUT[2].SET = (1 << 3); // event 3 will set SCT1_OUT0     SCT0->OUT[2].CLR = (1 << 4); // event 4 will clear SCT1_OUT0     SCT0->RES = (3 << 4); // output 0 toggles on conflict     //PWM start     SCT0->CTRL &= ~(1 << 2); // unhalt by clearing bit 2 of the CTRL } Pin initialization code: //PIO0_8 PIO0_8 FC2_RXD_SDA_MOSI SCT0_OUT1 CTIMER0_MAT3 //PIO0_9 PIO0_9 FC2_TXD_SCL_MISO SCT0_OUT2 CTIMER3_CAP0 - FC3_CTS_SDA_SSEL0 void SCTimerPinInit(void) {     //Enable the     SCTimer clock     SYSCON->AHBCLKCTRL[0]|=(1<<13); //set IOCON bit     //SCTimer pin assignment     IOCON->PIO[0][8]=0x182;     IOCON->PIO[0][9]=0x182;     IOCON->PIO[0][10]=0x182; } Main Code: #include <stdio.h> #include "board.h" #include "peripherals.h" #include "pin_mux.h" #include "clock_config.h" #include "LPC54114_cm4.h" void SCT0_Init(void); void SCTimerPinInit(void); void P1_9_GPIO(void); void SCT0_PWM(void); int main(void) {       /* Init board hardware. */     BOARD_InitBootPins();     BOARD_InitBootClocks();     BOARD_InitBootPeripherals();     printf("Hello World\n");    // SCT0_Init();    // P1_9_GPIO();     SCTimerPinInit();     SCT0_PWM();     /* Force the counter to be placed into memory. */     volatile static int i = 0 ;     /* Enter an infinite loop, just incrementing a counter. */     while(1) {         i++ ;     }     return 0 ; } The Yellow channel is PIO0_8 pin output signal, which is SCT0_OUT1 PWM output signal. The Bule channel is PIO0_9 pin output signal, which is SCT0_OUT2 PWM output signal.
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Link to board: http://www.lpcware.com/content/devboard/android-open-accessory-aoa-kit Android Demos There are three demos available for download on the Embedded Artists website http://embeddedartists.com/products/app/aoa_kit.php The code bundle contains the following: Demo 1: Android Open Accessory demo which lets you control and monitor the AOA Board (LPC1769 side) from an Android device. Demo 2: Android Open Accessory demo which lets an Android device detect CAN nodes (such as the LPC11C24 side of the AOA board) in a CAN network. The CAN nodes can be controlled and monitored from the Android device. Demo 3: Android Open Accessory demo which lets an Android device detect Xbee nodes in an Xbee network. The Xbee nodes can be controlled and monitored from the Android device. FreeRTOS has been ported to the board and a demo is available that show how to use it. lwIP v1.4.0 has been ported to the board. The httpserver_raw (webserver) application from the lwIP contrib package is available with a small modification to use the on-board SD-card interface instead of the ROM based file system. FatFs file system module has been ported to the board. The lwIP demo (based on httpserver_raw) is using this module to access files on an SD card. nxpUSBlib is available and used in the AOA demos. How to setup the projects in LPC Xpresso Make sure that the latest version of the LPCXpresso IDE is installed. Download the package of sample application projects into the Eclipse workspace. The package can be downloaded (as a zip-file) from Embedded Artists’ support page after registering the product. The zip-file contains all project files and is a simple way to distribute complete Eclipse projects. Start the LPCXpresso IDE and select a new (and empty) workspace directory. Select the Import and Export tab in the Quickstart Panel and then Import archived projects (zip), see Figure 1 below. Browse and select the downloaded zip file containing the archived sample applications. Select all sub-projects to be imported, see Figure 2 below. By default the NXP USB library has been configured for USB device only. This needs to be changed to USB host. Right click on the nxpUSBlib project and select Build Configuration, then Set Active. In the list select LPC17xx_Host. See Figure 3. The projects are now imported. Click (to select) the project to work with. Click Build in the Quickstart Panel (under Start Here). See Figure 4 There is also a video on how to setup Demo 1 and get it running by connecting your android device. (Getting started video provided by Embedded Artists) http://www.youtube.com/watch?v=l3f2ss1IdV0&feature=player_embedded
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Do you want to know more about one of our hottest products in the LPC800 series portfolio? Take a look at this technical presentation featuring the LPC84x MCU family. Based on the Arm Cortex-M0+ core, the LPC84x Family of MCUs is a low-cost, 32-bit MCU operating at frequencies of up to 30 MHz. The LPC84x MCU family supports of up to 64 KB of flash memory and 16 KB of SRAM. In addition, to make things easier, the LPC800 series McUs are supported by our free example code bundles and now, they're also supported by the MCUXpresso Software Develpment Kit (SDK).  Fig 1. LPC84x MCU Family Block Diagram
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LPC4088 Closed Payment Loop Demo - Compiling the software & flashing the board After connecting the three boards together, it's time to compile the software and flash it onto the board. To do so, please follow below steps. Download the software.​​ Unzip the software. Open the Keil Multi-Project workspace by opening the file .\LPC4088 POS Demo\Project_BlueboardPOS_Workspace.uvmpw. Note: Keil version V.4.54 or higher is required to open the workspace correctly. If you do not meet this requirement, an error will be shown when opening the workspace. Compile project "CDL" by right-clicking on the CDL project and selecting option "Set as Active Project" (1). Next, click on the "Rebuild" button (2) Repeat Step 4) for the 4 remaining projects (BSP, emWinlib, NxpRdLib_PublicRelease, Project_BlueboardPOS). Connect the Keil ULINK2 debugger to the baseboard (J8). If any other debugger than the Keil ULINK2 is used, the Keil project should be changed to use this other debugger. Power-up the board. Although the Embedded Artists base-board can be powered by a USB connection, it is advisable to use the power-jack because of the high-power consumption of the 7" LCD. Powering the board by USB may result in incorrect behavior. With project "Project_BlueboardPOS" set as active project, click on the "Load" button ( ). This will load the compiled POS demo to the FLASH. Proceed to "Running the demo"​
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Hello community!   Attached is a document that explains how to build and run the LPCOpen Ethernet example projects, it also explains the needed board and PC connections and configurations. The steps described in the document were done using the LPC1769 MCU like the one in the LPCXpresso board for LPC1769 with CMSIS DAP probe, but the same principles are applicable to any LPC MCU. The steps described in this document are valid for the following versions of the software tools: o    LPCXpresso v8.1.4 o    LPCOpen v2.xx Boards o    LPCXpresso board for LPC1769 with CMSIS DAP probe o    EA LPCXpresso BaseBoard o    LPC-Link2 Contents 1. Overview and concepts    1.1    LPCOpen       1.1.1 Core driver library       1.1.2 Middleware       1.1.3 Examples       1.1.4 LPCOpen with an RTOS 2. Running the lwip_tcpecho and webserver demo applications    2.1 Downloading a LPCOpen package    2.3 Setting up the hardware       2.3.1 LPCXpresso board for LPC1769 with CMSIS DAP probe       2.3.2 EA LPCXpresso BaseBoard    2.2 Importing the LPCOpen examples    2.4 Building the demo applications    2.5 Running the demo applications       2.5.1 lwip_tcpecho_sa demo       2.5.2 webserver demo Appendix A - References I hope you can benefit from this post, if you have questions please let me know.   Best Regards! Carlos Mendoza
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Description This application provides a human interface via terminal (UART1) menus and numbered selections to select and play audible medical alerts that are generated algorithmically on the NXP LPC23xx. The medical alarms are designed to comply with the IEC 60601-1-8 standard for audible medical alarms. The IEC standard seeks to improve patient safety by standardizing medical audible and visual alarms. The audible portion of the standard specifies high, medium, and low priority alarms, and these are provided via a menu system. In addition, a test menu is added to facilitate analysis of the quality of the alarms generated and their compliance with the standard. Many previous applications used playback techniques to use pre-recorded alarm sounds for the alerts. An algorithmic approach provides a much more efficient, high-quality implementation compared to the pre-recorded sounds. Plus, the sounds can be customized to differentiate equipment while still staying within the parameter limits of the standard. Block Diagram Documentation     IEC Alarm Detailed Documentation Products Below are recommended microcontrollers for use in implementing this design to a system. Comparison Table Product Pins On-Chip Flash On-Chip RAM Comments LPC2364 100 128KB 34KB 128KB flash/34KB RAM version of LPC2368, no SD/MMC LPC2366 100 256KB 58KB 256KB flash version of LPC2368, no SD/MMC LPC2368 100 512KB 58KB + 8KB 100-pin version of LPC2378, no external bus LPC2378 144 512KB 58KB + 8KB 144 pin, similar to LPC2368 but more pins and a MiniBus (8-bit) LPC2387 100 512KB 98KB LPC2368 with 98KB SRAM LPC2388 144 512KB 98KB LPC2378 with 98KB SRAM and USB Host/OTG LPC2458 180 512KB 98KB + 8KB LPC2468 with 16-bit External Memory Interface LPC2460 208 0KB 98KB + 8KB Flashless LPC2468 LPC2468 208 512KB 98KB Host/OTG/device, 32-bit ext. bus, 512KB flash/98KB RAM, 208 pin package LPC2470 208 0KB 98KB + 8KB LPC2460 with XGA LCD controller LPC2478 208 512KB 98KB + 8KB LPC2468 with XGA LCD controller More Information Example Code IEC Alarm Example Code Disclaimer This design example shows possible hardware and software techniques used to implement the design. It is imperative that the viewer use sound engineering judgment in determining the fitness of this design example for any particular application. This design example may include information from 3rd parties and/or information which may require further licensing or otherwise. Additional hardware or software design may be required. NXP Semiconductors does not support or warrant this information for any purpose other than an informational design example. documentation.pdf 395.85 KB example.code_.zip 255.55 KB
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LPC China team creats a serial of LPC82x training slides with hands-on examples for GC customers, disti and fans. And all the material are written in Chinese. This is just the SCT chapter of the whole serials. Enjoy it. #sct‌ #lpc824‌ #lpc82x‌
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This content was originally contributed to lpcware.com by Jack Ganssle In this project I looked at the relative performance of the LPC4350's M4 vs. M0 cores, emulating ARM's big.LITTLE approach. In the last few years the industry has increasingly embraced the notion of using multiple processors, often in the form of multicore. Though symmetric multiprocessing – the use of two or more identical cores – has received a lot of media attention, many embedded systems are making use of heterogeneous cores. A recent example is ARM’s big.LITTLE approach, which is specifically targeted to smart phones. A big Cortex-A15 processor does the heavy lifting, but when computational demands are slight it goes to sleep and a more power-frugal A7 runs identical code. NXP’s LPC43xx also has two ARM cores: a capable Cortex-M4 and a smaller M0. Since power constraints are hardly novel to phones, my question was: “if we mirror the big.LITTLE philosophy, what is the difference in performance between the M4 and the M0?”
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