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Kinetis Microcontrollers Knowledge Base

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Nested Vectored Interrupt Controller Module by Vicente Gómez Freescale TIC. NVIC Explanation Hands-on IRQ using a pin. Interruption timers. Presentación de la NVIC (Nested Vectored Interrupt Controller) por Vicente Gómez, Freescale TIC. Explicación de la NVIC. Hands-On IRQ usando un pin. Timers con interrupción
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KL17 reference manual V4.1 and V5.1 with updated Figure 13-2. Kinetis Bootloader Start-up Flowchart at page 179 There with modification to add "is direct boot valid" check. Please check below picture for the detailed info: The "is direct boot valid" check function is not supported for KL17 product, the correct flow chart should be below: The "is direct boot valid" check function is reserved for further parts(such as KL82), which has one bit in BCA filed to control running code in QSPI Flash or internal Flash: Thank you for the attention.
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1. 飞思卡尔常用调试工具 2. 使用OpenSDA平台作为J-Link调试Kinetis 3. 使用OpenSDA平台作为USBDM调试Kinetis 4. 使用MTB模块快速跟踪定位Cortex-M0+指令执行状态(Use MTB in Cortex-M0+ to trace instructions) 5. KL25被加密,芯片锁死问题? 6. 对比几款流行的Kinetis调试器速度 7. 修复Jlink固件损坏的方法 8. Jlink调试Kinetis L系列的使用方法 9. CMSIS-DAP调试器在IAR v7.1中问题(Probe not Found)修复 10. FRDM_KL26 虚拟串口安装失败的解决方法 11. 使用J-Link TCP-IP Server通过以太网远程下载程序到Kinetis 12.Kinetis LOCK的原因及解决方案​
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Gracias a la excelente respuesta por parte de los concursantes, les informamos que daremos a conocer los proyectos finalistas el próximo martes 26 de Noviembre de 2013, a través de la comunidad Freescale y redes sociales; recibimos proyectos con gran potencial que aún están siendo evaluados por nuestros jueces. A continuación te compartimos los criterios a evaluar: • Alineación con las tendencias del futuro (Salud y Seguridad, Efecto Net,Going Green) • Creatividad • Innovación • Utilidad de la aplicación • Beneficio ambiental potencial para el uso del producto. Los finalistas seleccionados tendrán la oportunidad de presentar su prototipo en el evento Freescale Cup 2013 el día 7 de Diciembre de 2013 en el Tecnológico de Monterrey, Campus Guadalajara; donde el proyecto ganador será elegido por los asistentes al evento, a través de la comunidad Freescale y redes sociales. Recuerda que el ganador viajará con todos los gastos pagados al Freescale Technology Forum (FTF) en Dallas, Texas. Mantente atento el próximo martes 26 de Noviembre de 2013 y descubre los proyectos finalistas, tú puedes ser uno de ellos.
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This demo is about driving TFT LCD by FlexBus module on MAPS-K22 board.       MAPS-K22 brief description: High performance Freescale ARM Cortex™ M4 SoC MK22FN512VLL12​ with 120MHz core clock, 512KB Flash and 128K RAM. Support Graphic LCD by Flexbus interface. Power supply from Micro USB 5V. Support ISO7816 smart card by UART interface. Support connector for Peripheral, Application and Socket MAPS board. SDK 1.0 Software release FlexBus Overview       The FlexBus module is a hardware module that: Provides memory expansion and provides connection to external peripherals with a parallel bus Can be directly connected to the following asynchronous or synchronous slave-only devices with little or no additional circuitry: External ROMs Flash memories Programmable logic devices Other simple target (slave) devices Block diagram Pin functions Pins allocation Demo illustration       After run the demo, the TFT LCD will display the Freescale logo as below, and I’ve also attached the demo. Welcome to download it.
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Hi, all The default AN2295 UART bootloader doesn't work well on K21/other Kinetis because of using FEI and complicated autocalibration mechanism. I made a simple version to make it works on MK21DX128VMC5, FYI. Readm.txt: UART bootloader for K21. (Default is MK21DX128VMC5) 128KB_Pflash_64KB_Dflash.icf is application link script example for MK21DX128 used together with UART bootloader, UART bootloader use 0x0 - 0xFFF. Q: Why need this patch? A: The original AN2295 use internal RC and FLL output as system clock. The calibration mechanism is not stable. The main change of this patch is to use external cystal plus PLL as system clock to communicate with PC software. Changes to AN2295 1) Add MK21D5.h for K21 support 2) Add AN2295_TWR_K21_cfg.h for K21 support(Copy from AN2295_TWR_K60_cfg.h) 3) AN2295_TWR_K21_cfg.h    1> #define KINETIS_MODEL K21_50MHz    2> #define KINETIS_FLASH FLASH_128K    3> #define BOOT_UART_BASE UART2_BASE_PTR       #define BOOT_UART_GPIO_PORT PORTE_BASE_PTR       #define BOOT_UART_GPIO_PIN_RX   17       #define BOOT_UART_GPIO_PIN_TX   16    4> #define BOOT_PIN_ENABLE_NUM        7 4) Add mcg folder and mcg.c/mcg.h 5) kinetis_params.h:    1> Modify SRS_REG/SRS_POR_MASK/INIT_CLOCKS_TO_MODULES to meet MK21D5.h    2> Add PORT_PCR_PS_MASK for BOOTLOADER_PIN_ENABLE_INIT to enable Pull-up. 6) bootloader.h: #define BOOT_WAITING_TIMEOUT 500. PC software can't communicate to bootloader if only 1s delay. 7) bootloader.c:    1> #include "mcg.h"    2> Use 25MHz PEE:       SIM_CLKDIV1 = ( 0    | SIM_CLKDIV1_OUTDIV1(1)                            | SIM_CLKDIV1_OUTDIV2(1)                            | SIM_CLKDIV1_OUTDIV4(1));             (void)pll_init(8000000,       /* CLKIN0 frequency */                      LOW_POWER,     /* Set the oscillator for low power mode */                      CRYSTAL,       /* Crystal or canned oscillator clock input */                      4,             /* PLL predivider value */                      25,            /* PLL multiplier */                      MCGOUT);       /* Use the output from this PLL as the MCGOUT */    3> Restore to FEI mode before jump to Application:       pee_pbe(8000000);       pbe_fbe(8000000);       fbe_fei(32768); Knowing issues: 1) Don't use virtualCOM from OSJTAG, it's very hard to communicate with PC software. Use RS232 in TWR-SER2. 2) BOOTLOADER_CRC_ENABLE must be 0, otherwise PC software will report unknown protocol version
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Hi, Anybody has sample code for K22 SPI? where shall I get the same? Thank Sarvani
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Kinetis L series MCUs combine the exceptional energy-efficiency and ease-of-use of the new ARM® Cortex™-M0+ processor with the performance, peripheral sets, enablement and scalability of the Kinetis 32-bit MCU portfolio. The Kinetis L series frees power-critical designs from 8- and 16-bit MCU limitations by combining excellent dynamic and stop currents with superior processing performance, a broad selection of on-chip flash memory densities and extensive analog, connectivity and HMI peripheral options. Kinetis L series MCUs are also hardware and software compatible with the ARM Cortex-M4-based Kinetis K series, providing a scalable migration path to more performance, memory and feature integration. The Kinetis L Series MCUs are Energy-Efficient Product Solutions by Freescale. For more information visit Freescale.com\Lseries
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1 Abstract      LIN (Local Interconnect Network) is a concept for low cost automotive networks, which complements the existing portfolio of automotive multiplex networks. LIN is based on the UART/SCT protocol. It can be used in the area of automotive, home appliance, office equipment, etc. The UART module in NXP kinetis L series contains the LIN slave function, it can be used as the LIN slave device in the LIN bus. Because there is few LIN slave KL sample code for the customer’s reference in our website, now this document mainly take KL43 as an example, explain how to use the FRDM-KL43 board as the LIN slave node to communicate with the LIN master device. LIN master use the specific LIN module: PCAN-USB Pro FD. Master send the publisher ID and subscriber ID, slave give the according LIN data response. This document will share the according code, hardware connection and the test result. 2 LIN bus basic knowledge review         For the convenient to understand the LIN bus, this chapter simply describe the basic knowledge for LIN bus. Mainly about the LIN topology and the LIN frame. 2.1 LIN bus topology structure       LIN bus just use the simple low cost single-wire, it uses single master to communicate with multiple slaves. The bus voltage is 12V, the speed can up to 20 kbit/s. LIN network can connect 16 nodes, but in the practical usage, normally use below 12 nodes. Figure 2-1. LIN bus topology 2.2 LIN bus frame structure          LIN Frame consists of a header (provided by the master task) and a response (provided by a slave task).     Master send publisher frame: Master send header+ data +checksum; slave just receive.     Master send subscriber frame: Master send header; slave receive send data +checksum.     The following figure is the structure of a LIN frame: Figure 2-2. LIN frame structure      LIN frame is constructed of one Break field, sync byte field (0X55), PID, data and checksum. 2.2.1 Break filed and break delimiter Break filed is consist of break and break delimiter. Break should at least 13 nominal bit times of dominant value (low voltage). The break delimiter shall be at least one nominal bit time long (high voltage). Figure 2-3. break field 2.2.2 Sync byte field Sync is a byte field with the data value 0X55. The byte field is the standard UART protocol. Figure 2-4. The sync byte field 2.2.3 Protected identifier field A protected identifier field consists of two sub-fields: the frame identifier and the parity. Bits 0 to 5 are the frame identifier and bits 6 and 7 are the parity.     ID value range: 0x00-0x3f, 64 IDs in total. It determine the frame categories and direction. Figure 2-5. The sync byte field P0 = ID0 xor ID1 xor ID2 xor ID4 P1 = -(ID1 xor ID3 xor ID4 xor ID5) -is NOT。  ID can be split in three categories:   Frame categories Frame ID Signal carrying frame Unconditional frame 0x00-0x3B Event triggered frame Sporadic frame Diagnostic frame Master request frame 0x3c Slave response frame 0x3d Reserved frame   0x3e,0x3f     2.2.4 DATA       A frame carries between one and eight bytes of data. The number of data contained in a frame with a specific frame identifier shall be agreed by the publisher and all subscribers.      For data entities longer than one byte, the entity LSB is contained in the byte sent first and the entity MSB in the byte sent last (little-endian). The data fields are labeled data 1, data 2,... up to maximum data 8. 2.2.5 checksum  The checksum contains the inverted eight bits sum with carry over all data bytes or all data bytes and the protected identifier.        Classic checksum: Checksum calculation over the data bytes. Enhanced checksum: Checksum calculation over the data bytes and the protected identifier byte.  Method: eight bits sum with carry is equivalent to sum all values and subtract 255 every time the sum is greater or equal to 256, at last, the sum data do bitwise invert.  In the receive side, do the same sum, but at last, don’t do invert, then add the received checksum data, if the result is 0XFF, it is correct, otherwise, it is wrong. 3 KL43 LIN slave example    This chapter use KL43 as the LIN slave, and communicate with the specific LIN master device, realize the LIN data sending and receiving. 3.1 Hardware prepare Hardware: FRDM-KL43,TRK-KEA8,PCAN-USB Pro FD       LIN bus voltage is 12V, but the FRDM-KL43 don’t have the LIN transceiver, so we need the external LIN transceiver connect the KL43 uart, to realize the LIN voltage switch. Here we use the TRK-KEA8 on board LIN transceiver MC33662LEF for the KL43. The MC33662LEF circuit is like this:    Figure 3-1. LIN transceiver schematic 3.1.1 FRDM-KL43 and TRK-KEA8 connections      FRDM-KL43 need to connect the UART port to the LIN transceiver. The connection shows in this table: No. FRDM-KL43 TRK-KEA8 note 1 J1-2 J10-5 UART0_RX 2 J1-4 J10-6 UART0_TX 3 J3-14 J14-1 GND 3.1.2 TRK-KEA8 and LIN master connections         LIN bus is using the signal wire.  TRK-KEA8 J14_4 is the LIN wire, it should connect with the LIN wire in PCAN-USB Pro FD. GND also need to connect together.        TRK-KEA8 P1 need a 12V DC supplier. Master also need 12V DC supplier. 3.1.3 Object connection picture   Figure 3-2. Object connections 3.2 Software flow chart and code      Now describe how to realize the LIN master and the LIN slave data transfer. LIN master send a publisher frame, the slave will receive the according data. LIN master send a subscriber frame, the slave will send the data to the master. The code is based on the KSDK2.2_FRDM-KL43 lpuart, add the LIN operation code.  3.2.1 Software flow chart         Figure 3-3. Software flow chart   3.2.2 software code     Code is based on KSDK2.2_FRDM-KL43 lpuart project, add the LIN operation code, the added code is list as follows: void LPUART0_IRQHandler(void) {      if(LPUART0->STAT & LPUART_STAT_LBKDIF_MASK)      {        LPUART0->STAT |= LPUART_STAT_LBKDIF_MASK;// clear the bit        Lin_BKflag = 1;        cnt = 0;        state = RECV_SYN;        DisableLinBreak;          }     if(LPUART0->STAT & LPUART_STAT_RDRF_MASK)      {                  rxbuff[cnt] = (uint8_t)((LPUART0->DATA) & 0xff);                  switch(state)          {             case RECV_SYN:                           if(0x55 == rxbuff[cnt])                           {                               state = RECV_PID;                           }                           else                           {                               state = IDLE;                               DisableLinBreak;                           }                           break;             case RECV_PID:                           if(0xAD == rxbuff[cnt])                           {                               state = RECV_DATA;                           }                           else if(0XEC == rxbuff[cnt])                           {                               state = SEND_DATA;                           }                           else                           {                               state = IDLE;                               DisableLinBreak;                           }                           break;             case RECV_DATA:                           recdatacnt++;                           if(recdatacnt >= 4) // 3 Bytes data + 1 Bytes checksum                           {                               recdatacnt=0;                               state = RECV_SYN;                               EnableLinBreak;                           }                           break;          default:break;                                    }                  cnt++;      }     } void uart_LIN_break(void) {     LPUART0->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK);   //Disable UART0 first     LPUART0->STAT |= LPUART_STAT_BRK13_MASK; //13 bit times LPUART0->STAT |= LPUART_STAT_LBKDE_MASK;//LIN break detection enable LPUART0->BAUD |= LPUART_BAUD_LBKDIE_MASK;         LPUART0->CTRL |= (LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK);     LPUART0->CTRL |= LPUART_CTRL_RIE_MASK;     EnableIRQ(LPUART0_IRQn);    } int main(void) {     uint8_t ch;     lpuart_config_t config;     BOARD_InitPins();     BOARD_BootClockRUN();     CLOCK_SetLpuart0Clock(0x1U);     LPUART_GetDefaultConfig(&config);     config.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;     config.enableTx = true;     config.enableRx = true;     LPUART_Init(DEMO_LPUART, &config, DEMO_LPUART_CLK_FREQ);     uart_LIN_break();     while (1)     {        if(state == SEND_DATA)        {           while((LPUART0->STAT & LPUART_STAT_TDRE_MASK) == 0); // hex mode                   LPUART0->DATA = 0X01;           while((LPUART0->STAT & LPUART_STAT_TDRE_MASK) == 0); // hex mode                   LPUART0->DATA = 0X02;           while((LPUART0->STAT & LPUART_STAT_TDRE_MASK) == 0); // hex mode                   LPUART0->DATA = 0X10;//Checksum   0X10 correct, 0xaa is wrong           recdatacnt=0;           state = RECV_SYN;           EnableLinBreak;        }     } }     4 KL43 LIN slave test result   Master defines two frames: Unconditional ID Protected ID Direction Data checksum 0X2C 0XEC subscriber 0x01,0x02 0x10 0X2D 0XAD Publisher 0x01,0x02,0x03 0x4c    Now, master send 0X2C and 0X2D data, give the test result and the according waveform. 4.1 LIN master configuration Uart baud rate is: 9600bps 4.2  Send ID 0X2C and 0X2D frame       From the PC software of LIN master, we can find 0X2D ID can send the data successfully, and 0X2C ID can receive the correct data (0x01, 0x02) and checksum (0x10) from the KL43 LIN slave side. 4.2.1 0X2D ID frame oscilloscope waveform and debug result      From the debug result, we can find the buff can receive the correct ID, data and checksum from the LIN master.    4.2.2 0X2C ID frame oscilloscope waveform 4.2.3 0X2C ID SLAVE send back the wrong checksum     From the PC software, we can find if the KL43 code modify the checksum to the wrong data 0XAA, then the PC software will display the checksum error. This is the according oscilloscope waveform for the wrong checksum data. From all the above test result. We can find, KL43 as the LIN slave, it can receive the correct data from the LIN master, and when LIN master send the subscriber ID, kl43 also can send back the correct LIN data to the master. More detail, please check the attached code project. BTW, LIN spec can be downloaded from this link: http://www.cs-group.de/wp-content/uploads/2016/11/LIN_Specification_Package_2.2A.pdf   Attached is the code and the pdf version of this document:                  
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  (para español continua mas abajo) Blind deaf-mute comunication system   Materials Used : A Freedom- KL25Z card A USB Cable A 16x2 LCD Display Three buttons A breadboard A USB cable   Project description Thinking about the difficulties a blind, deaf-mute person has to convey a message, we designed a device to facilitate their communication. Using the Morse key system, the disabled person can write a short message on a LCD screen. For this, you need to press three buttons, and depending on the duration, a function will be performed. 1. If you short-press the button on the left, this will erase the last character typed, however, if you long-press, this will erase everything written. 2. If the middle button with the green label is short-pressed, this will print a dot at the bottom of the screen. If you long press the button, it will print a dash. In Morse code, the dot represents a single signal and the dash represents a triple signal. 3. If the button on the right, with the yellow label is short pressed, the LCD display space will be added to the message. But if he was held down with a longer duration, the set of ¨ Short ¨ and ¨ Long ¨ will be transformed in to a letter in the alphabet and it will be printed on the screen. Note: * If the set of Short and Long does not match any sequence in the matrix, no character is added to the message. **The system to display and write the message on the LCD display are separate.     Modifications for the second stage of the prototype 1. Delete button on the right, the yellow label, Send and Space. a. It is intended that the third button is eliminated by increasing the code efficiency. Instead of sending the sequence of short and long pressing a button, they are sent after a desired time interval. b. Wanted to enter the space with a sequence of short and long. 2. Currently the project is divided into two boxes, one that displays the buttons and other writing. The goal is to have a single box which can write and display the message. 3. With a potentiometer seek to change the time it takes to push a button to be recognized among one short and one long signal.   Modifications for the third stage of the prototype 1. Perform the division again in two boxes , interconnected by Bluetooth modules , as the system is designed to generate a communication between two people, using a system of sending data to harvest deaf -mute person in the future by Braille .       Sistema de Comunicación para Persona Ciega, Sorda y Muda   Materiales Utilizados: Una tarjeta Freedom-KL25Z Un Cable Una Pantalla LCD 16x2 Tres botones Una placa de pruebas (protoboard) Un cable USB   Descripción de Proyecto             Pensando en las dificultades que una persona ciega, sorda y muda tiene para transmitir un mensaje, se ha diseñado un aparato para facilitar su comunicación. Utilizando el sistema de clave morse, la persona con discapacidad puede escribir un mensaje corto en una pantalla LCD. Para esto, se deben presionar tres botones que dependiendo la duración del toque, será la función que efectuará. 1. Si al botón de la izquierda, con la etiqueta azul, apenas se le presiona este borrará el ultimo carácter escrito; sin embargo, si se le presiona con una mayor duración este borrará todo lo escrito. 2. Si al botón del medio, con la etiqueta verde, apenas se le presiona este imprimirá en la parte inferior de la pantalla un punto. El punto representa, un corto en el sistema de clave morse. Sin embargo, si se le mantiene presionado por un momento mas largo, este imprimirá un guión. El guión representa un comando largo en el sistema de clave morse. 3. Si al botón de la derecha, con la etiqueta amarilla, apenas se le presiona, en la pantalla LCD se agregará un espacio al mensaje. Sin embargo si se le mantiene presionado con una mayor duración, se enviará el conjunto de ¨Cortos¨ y ¨Largos¨ a una matriz para que la secuencia se busque y cuando esta se haya, en la LCD se agrega la letra deseada al mensaje. Nota: *Si el conjunto de Cortos y Largos no coincide con ninguna secuencia en la matriz, ningún carácter se agregará al mensaje. ** El sistema para mostrar el mensaje con la LCD esta separado a los botones para escribirlo.     Modificaciones para la segunda etapa del prototipo 1.      Eliminar el botón de la derecha, con etiqueta amarilla,  de Enviar y Espacio. a.       Se pretende que el tercer botón sea eliminado mediante el aumento en la eficiencia del código. En vez de enviar la secuencia de Cortos y Largos al presionar un botón, estos se enviarían después de un intervalo de tiempo deseado. b.      Se busca que el espacio se introduzca con una secuencia de cortos y largos. 2.      Actualmente el proyecto está dividido en dos cajas, una que muestra el mensaje y otra con los botones para escribir. El objetivo es tener una sola caja con el que se pueda escribir y mostrar el mensaje. 3.      Con un potenciómetro se busca cambiar el tiempo que se necesita apretar un botón para que se reconozca entre un toque corto y uno largo.   Modificaciones para la tercera etapa del prototipo 1.      Realizar de nuevo la división en dos cajas, comunicadas entre sí por módulos bluetooth, ya que el sistema está pensado para poder generar una comunicación entre ambas personas, utilizando en un futuro, un sistema de envío de datos a la persona siega sordo-muda mediante el sistema braille.
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SSD1963驱动4.3寸屏原理图。
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Hello Kinetis community, High accuracy metering is an essential feature of an electronic power meter application. Metering accuracy is a most important attribute because inaccurate metering can result in substantial amounts of lost revenue. Moreover, inaccurate metering can also undesirably result in overcharging to customers.  The common sources of metering inaccuracies, or error sources in a meter, include the sensor devices, the sensor conditioning circuitry, the Analog FrontEnd (AFE), and the metering algorithm executed either in a digital processing engine or a microcontroller In this post you will find the description of the implementation of a Two Phase Power Meter firmware featuring Kinetis KM34 device using a metering algorithm known as Filter Based Algorithm. The showed firmware was implemented on the hardware design described in the Reference Manual DRM149 (the software implementation shown in the DRM149 is using a more complex metering algorithm called Fast Fourier Transform). Firmware Design The firmware implements the basic functions for an e-meter application such as: Power meter calibration: Performs power meter calibration and stores calibration parameters. Data processing: Read digital values form the AFE and performs scaling. Calculation of quantities: Calculates billing and non-billing quantities HMI control: Updates LCD with the new values and transitions to new LCD screen. Powe Meter Calibration The calibration task runs whenever a non-calibrated power meter is connected to the mains. First it checks if the calibration flag is already stored in the microcontroller flash, if not, then it runs the calibration. More detail about the calibration process can be found in the DRM143 document. The function: int16 CONFIG_CalcCalibData (tCONFIG_FLASH_DATA *ptr)‍‍‍ is in charge of calculating the calibration data and store the calibration flag in the flash. You can refer to the next code section for the complete usage and definition.   /* if calibration data were collected then calibration parameters are       */   /* calculated and saved to flash                                            */   if (CONFIG_CalcCalibData ((tCONFIG_FLASH_DATA *)&ramcfg) == TRUE)     CONFIG_SaveFlash ((tCONFIG_FLASH_DATA *)&ramcfg, ramcfg.flag);‍‍‍‍ The calibration task terminates by storing calibration gains, offsets and phase shift into the flash and by resetting the microcontroller device. Data Processing Reading the phase voltage and phase current samples from the analog front-end (AFE) occurs periodically every 166.6 μs. This task runs on the highest priority level (Level 0) and is triggered asynchronously when the AFE result registers receive new samples. The task reads the phase voltage and phase current samples from the AFE result registers, scales the samples to the full fractional range, and writes the values to the temporary variables for use by the calculation task. While kWh values is being calculated every 6000 Hz the remaining quantities: kVARh, QAVG, PAVG, URMS and IRMS are being calculates every 1500 Hz (666.6 μs). This is according to the decimation factor and to reduce the CPU usage since those values are not needed every AFE sample. The meter definition used for this application can be found in the meterlib2ph_cfg.h files, this file was generated using the Filter-Based Metering Algorithms Configuration Tool, for more information on how to use the tool you can refer to the AN4265 document. This is the Meter configuration: Here you can see the expected error behavior against Frequency: The configuration of the AFE module and channels is the following:   /* Current Phase 1                                                          */   AFE_ChInit (CH0,               AFE_CH_SWTRG_CCM_PGAOFF_CONFIG(DEC_OSR1024),                    0,               PRI_LVL1,               (AFE_CH_CALLBACK)NULL);     /* Current Phase 2                                                          */   AFE_ChInit (CH1,               AFE_CH_SWTRG_CCM_PGAOFF_CONFIG(DEC_OSR1024),               0,               PRI_LVL1,               (AFE_CH_CALLBACK)NULL);     /* Voltage Phase 1                                                          */   AFE_ChInit (CH2,               AFE_CH_SWTRG_CCM_PGAOFF_CONFIG(DEC_OSR1024),                    0,               PRI_LVL1,               (AFE_CH_CALLBACK)NULL);     /* Voltage Phase 2                                                          */     AFE_ChInit (CH3,               AFE_CH_SWTRG_CCM_PGAOFF_CONFIG(DEC_OSR1024),               0,               PRI_LVL1,               (AFE_CH_CALLBACK)afech3_callback);     /* AFE Initialization @ 6 KHz                                               */   AFE_Init    (AFE_MODULE_RJFORMAT_CONFIG(AFE_PLL_CLK, AFE_DIV2, 12.288e6));  ‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ As you can see only the CH3, which is measuring the Voltage phase 2, is configured with interrupt. During the CH3 callback the remaining channels are sampled to get the 4 values at the same time and performs scaling: /* measurements callback @ 6000 Hz                                            */ static void afech3_callback (AFE_CH_CALLBACK_TYPE type, int32 result) {   static int cnt_1 = 0;     if (type == COC_CALLBACK)   {      /* Current and Voltage reading                                            */     u24_sample[0] = AFE_ChRead (CH2) << U_SCALE;            /* Voltage 1 reading ... */     i24_sample[0] = AFE_ChRead (CH0) << I_SCALE;            /* Current 1 reading ... */     u24_sample[1] = AFE_ChRead (CH3) << U_SCALE;            /* Voltage 2 reading ... */     i24_sample[1] = AFE_ChRead (CH1) << I_SCALE;            /* Current 2 reading ... */     . . . . }‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Calculation of Quantities Within the CH3 interrupt the metering algorithm functions are called to process the data of the active energy, the calculation task scales the samples using calibration offsets and calibration gains obtained during the calibration phase: METERLIB2PH_ProcSamples removes DC bias from phase voltage and phase current samples together with performing an optional sensor phase shift correction. METERLIB2PH_CalcWattHours recalculates active energy using new voltage and current samples. CONFIG_UpdateOffsets updates offset of the phase voltage and current measurements conditionally. The CH3 calls the next software interrupt, auxcalc_callback where non-billing quantities are calculated: METERLIB2PH_CalcVarHours recalculates reactive energy. METERLIB2PH_CalcAuxiliary recalculates URMS, IRMS, PAVG, QAVG and S auxiliary quantities. You can find more information about the Filter-Based Algorithm function in the AN4265 document.   HMI Control The display_callback task is called every 3 Hz by the auxcalc_callback and is executed on the lowest priority. For this application it update the clock data structure, refresh the watchdog timer and call some metering algorithm functions to read the values of the billing and non-billing quantities: METERLIB2PH_ReadResultsPh1 reads URMS, IRMS, PAVG, QAVG and S auxiliary quantities from phase 1. METERLIB2PH_ReadResultsPh2 reads URMS, IRMS, PAVG, QAVG and S auxiliary quantities from phase 2. A timer interrupt is used to update the the LCD content every 1500 ms. static void lptmr_callback (void) {   lcd_all_off();   /* update menu index                                                    */   menu_fcn[menu_idx]();   if ((++menu_idx) >= DIM(menu_fcn))   {     menu_idx = 0;   } }‍‍‍‍‍‍‍‍‍‍ Results The two-phase hardware has been calibrated using the test equipment ELMA8303. During accuracy calibration and testing, the power meter measured electrical quantities generated by the test bench, calculated active and reactive energies, and generated pulses on the output LEDs; each generated pulse was equal to the active and reactive energy amount kWh (kVARh)/imp3. The deviations between pulses generated by the power meter and reference pulses generated by test equipment defined the measurement accuracy.   The next figure shows the calibration protocol of the power meter. The protocol indicates the results of the power meter calibration performed at 25 °C. The accuracy and repeatability of the measurement for various phase currents and angles between phase current and phase voltage are shown in these graphs. The first graph indicates the accuracy of the active and reactive energy measurement after calibration. The x-axis shows variation of the phase current, and the y-axis denotes the average accuracy of the power meter computed from five successive measurements The second graph (on the bottom) shows the measurement repeatability; i.e. standard deviation of error of the measurements at a specific load point.  You will find attached a ZIP file containing the IAR source code of the application and a PDF file showing the complete results of the protocol. I hope the information helps. Regards, Adrian Cano
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Hello Kinetis World, I just wanted to take this opportunity to share the press release for our newly announced WLCSP device.         http://finance.yahoo.com/news/thin-blade-grass-freescale-newest-120000684.html The Ultra Thin CSP, MK22FN512CBP12R, is equivalent to the standard height CSP, MK22FN512CBP12R.  Therefore, from Therefore, from a software enablement perspective, the MK22FN512CAP12 device can be selected as shown in the attached Processor Expert screenshot.  We're looking forward to seeing what amazing things you can accomplish using Kinetis technology!      
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Latest published errata for ISF 2.1
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VREF module provide one input pin VREF, this pin can provide reference voltage for both external circuit but also for internal Sigma Delta ADCs, AFE and DAC.  Also it includes trim function in it. In this document, I would like to use my testing to do a linearity analysis. From figure1 and 2, you can find how to make VREF as reference voltage of different analog module. For example, you can find when S1 switches down, S0 closes and S2 select VREF, VREF will be voltage resource of SAR ADC.                                               Figure 1: Voltage reference function configuration                                   Figure 2: Voltage reference module diagramming I do a testing for VREF trim value linear analysis. The process is connecting the voltmeter to VREFH pin, then record measure result for each setting of VREF trim. There will be 64 records for every different setting. Testing chip is MKM34Z256. Please find my testing result from testing data table. From testing result, you can get the formula that y = kx + x0, where k is about 0.005 (5mV) and x0 is about 1.1881, x is trim value.  You can find there is only a little offset from offset curve.                                         Table 1: Trim voltage testing date                                                                 Figure 3: Offset curve
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1. Introduction MCUboot is a common used bootloader for most of Kinetis and i.mx RT devices. It can support download application via UART/USB/CAN/I2C/SPI. It enables quick and easy programming of Kinetis MCUs and i.mx RT MPU through the entire product life cycle, including application development, final product manufacturing, and beyond. K64 is a very popular device in Kinetis family. It has a M4 core, 512k and above flash, 120M main frequency and plenty of interface, such as I2C/SPI/UART/CAN/USB/ENET. But it is a bit awkward that the MCUboot demo of K64 is not include CAN. Does K64’s CAN can’t support bootloader application? No, of course not. Here we are going to port CAN function to K64 bootloader. There are two kind of CAN peripheral in Kinetis family, FlexCAN and MSCAN. FlexCAN is more complex than MSCAN. K64 has a FlexCAN. To speed up our work, we can port FlexCAN driver and related code from TWR-KV46 bootloader. Hardware: two TWR-SER board two sets of TWR-ELEV TWR-K65F150M TWR-K64F120M   Software: MCUXpresso 11.0 MCUBoot 2.0.0 package SDK_2.6.0_TWR-K64F120M 2. Software porting Step 1, copy below files to twrk64f120m_tower_bootloader project. \drivers\fsl_flexcan.c \drivers\fsl_flexcan.h        \source\bootloader\src\flexcan_peripheral_interface.c   Step 2, modify the project to enable the FlexCAN.       In bootloader_config.h, change BL_CONFIG_CAN definition to 1.        In peripherals_MK64F12.c, add #if BL_CONFIG_CAN     // CAN0     {.typeMask = kPeripheralType_CAN,      .instance = 0,      .pinmuxConfig = can_pinmux_config,      .controlInterface = &g_flexcanControlInterface,      .byteInterface = &g_flexcanByteInterface,      .packetInterface = &g_framingPacketInterface }, #endif    // BL_CONFIG_CAN       Pin mux setting. In peripherals_pinmux.h, add #define BL_ENABLE_PINMUX_CAN0 (BL_CONFIG_CAN) //! CAN pinmux configurations #define CAN0_RX_PORT_BASE PORTB #define CAN0_RX_GPIO_PIN_NUM 18             // PIN 13 in the PTA group #define CAN0_RX_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for CAN0 RX functionality for pin 13 #define CAN0_TX_PORT_BASE PORTB #define CAN0_TX_GPIO_PIN_NUM 19             // PIN 12 in the PTA group #define CAN0_TX_FUNC_ALT_MODE kPORT_MuxAlt2 // ALT mode for CAN0 TX functionality for pin 12       Set clock. FlexCAN clock source can be OSCERCLK or bus clock. Here we use bus clock run at 48Mhz. In flexcan_peripheral.c, add these code. const flexcan_timing_config_t bit_rate_table48m[] = {     { 23, 3, 4, 4, 4 }, /* 125 kHz */     { 11, 3, 4, 4, 4 }, /* 250 kHz */     { 5, 3, 4, 4, 4 },  /* 500 kHz */     { 3, 3, 4, 4, 4 },  /* 750 kHz */     { 2, 3, 4, 4, 4 }   /* 1   MHz */ }; change line 621 FLEXCAN_SetTimingConfig((CAN_Type *)baseAddr, &bit_rate_table48m[s_flexcanInfo.baudrate]); Step 3, compile the project.   3. Function test Software preparation To connect bootloader via CAN bus, NXP has TWR-K65 as bridge. But its source code is not in K64 SDK. It is in MCUBoot2.0.0 package. User can download the package from https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools/mcuboot-mcu-bootloader-for-nxp-microcontrollers:MCUBOOT The bridge project is called buspal which can be found in NXP_Kinetis_Bootloader_2_0_0\apps\bus_pal\MK65F18. BusPal is an embedded software tool that is available as a companion to blhost. The tool acts as a bus translator with an established connection with blhost over UART and with the target device over I2C, SPI, or CAN, and assists blhost in carrying out commands and responses from the USB target device. The BusPal is available for selected platforms. The source code for BusPal is provided with the Kinetis bootloader release, it support FRDM-KL25, TWR-KV46F150M and TWR-K65F180M and can be customized to run on other platforms. More detail of buspal is in Kinetis blhost User's Guide appendix C.   Hardware connection TWR-SER has TJA1050 as transceiver. We can connect J7 on both boards. When construct the Tower system, user should take care the power. The power tree is very flexible. Improper setting may cause TJA1050 can’t work.   The Buspal project on TWR-K65F180M use UART1 to connect with computer. The port is on TWR-SER. To make the connection simple, we can share the openSDA UART port. The openSDA UART use UART2, we can jump UART1 signal to J33 and J34 on K65 tower board.     Testing: Open a command window, type >blhost -p com4,57600 –buspal can,0,321,123 – get-property 10 This command can check if the whole system work properly. Then, you can download the code to K64 now. Please type >blhost -p com4,57600 –buspal can,0,321,123 – flash-image xxxxxx.s19 erase
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El programador USBDM es una interfaz de programación y depuración para los microcontroladores Freescale, existen varias versiones de esta herramienta, el programador MantaRay USBDM está basada en la versión para los microcontroladores HCS08(BDM) y Kinetis (SWDIO). Toda la información acerca de este proyecto puedes encontrarlo en http://usbdm.sourceforge.net/index.html BDM (Background debug mode) El puerto de programación BDM es una interfaz de programación desarrollada por Freescale para los microcontroladores HCS08 (8 bits) y Coldfire V1 (32 bits). Las características más sobresalientes sobre este puerto de programación es que solo utiliza un pin de programación (BKGD). Además de permitir la programación de la memoria flash, también permite el "debug in circuit" esto quiere decir que podemos depurar nuestro codigo en tiempo real a través del software Codewarrior. SWDIO Es la versión minima del JTAG para los microcontroladores Kinetis (Cortex ARM 32 bits) en la cual solo utiliza una linea de comunicación (SWDIO) y una señal de reloj (SWCLK). Este puerto esta en los Cortex M0 como son KL01, KL02, KL03, KL1x,KL2x,KE02,KE04 y KE06. El programador MantaRay USBDM permite la programación y la depuración de los microcontroladores de Freescale de la gama de 8 bits y 32 bits. Shrimp El complemento perfecto para el programador MantaRay USBDM es Shrimp, una pequeña tarjeta que tiene el tamaño exacta de un integrado con montaje DIP28 600mil, la cual, la hace una herramienta flexible, al hacer prototipos en una protoboard, y después en un prototipo final. La tarjeta Shrimp es compatible con los microcontroladores de 8 bits MC9S08PA16 y de 32 bits MKE02Z16, los dos totalmente compatibles en pines y periféricos. MC9S08PA16 8-Bit S08 central processor unit (CPU) – Up to 20 MHz bus at 2.7 V to 5.5 V across temperature range of -40 °C to 105 °C – Supporting up to 40 interrupt/reset sources – Supporting up to four-level nested interrupt – On-chip memory – Up to 16 KB flash read/program/erase over full operating voltage and temperature – Up to 256 byte EEPROM; 2-byte erase sector; program and erase while executing flash – Up to 2048 byte random-access memory (RAM) – Flash and RAM access protection MKE02Z16 • Operating characteristics – Voltage range: 2.7 to 5.5 V – Flash write voltage range: 2.7 to 5.5 V – Temperature range (ambient): -40 to 105°C • Performance – Up to 40 MHz ARM® Cortex-M0+ core and up to 20 MHz bus clock – Single cycle 32-bit x 32-bit multiplier – Single cycle I/O access port • Memories and memory interfaces – Up to 16 KB flash – Up to 256 B EEPROM – Up to 2 KB RAM Más información técnica la puedes encontrar en el siguiente link http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KE02&nodeId=01624698C90DE4 http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=S08P&nodeId=01624684491437EDDD Muy pronto mas adelantos de este proyecto
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