Hi,     If you try to compile the sample project within S32K14X_MCAL4_2_RTM_1_0_0, you should take care of the command if you use Linaro.    After you set the environment of compiling and run the command under command window, you should enter     "launch.bat MODE=USER TOOLCHAIN=linaro"    NOT    "launch.bat MODE=USER TOOLCHAIN=LINARO"      The command is case sensitivity.   Hope you can compile the project successfully.  Cheers! Oliver

******************************************************************************************** * Test HW: S32K312 EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: Internal_FLASH ******************************************************************************************** The objective of this demo application is to generate an interrupt by comparing DAC internal reference voltage against any analog input which is connected in analog mux input channels(IN0 : IN7) and wakes the MCU from sleep(standby) mode.  In this demo code,            1)LPCMP0 is used - DAC output is  given to comparator minus (INM) and                                                      AIN2 is given to comparator plus (INP).                From S32K3 RM, highlighted the channels used for reference.                                                                     Green color represents DAC, Pink color represents AIN2 which is selected from PMUX           2) From S32K RM,                "Compares two analog input voltages applied to INP and INM,                   COUT_RAW is high when the INP input voltage is greater than the INM input voltage,                   COUT_RAW is low when the INP input voltage is less than the INM input voltage"                So in this demo code,                RED LED is ON , if AIN2 Voltage > DAC Internal reference voltage(COUT is HIGH)                GREEN LED is ON, If AIN2 Voltage < DAC Internal reference voltage (COUT is LOW)   MODULES USED:   MODIFICATIONS IN LPCMP MODULE:       MODIFICATIONS IN INTCTRL_IP MODULE:     MODIFICATIONS IN WKPU MODULE:      From S32K3 RM, Analog comparator has used Channel 2 for wakeup.  Modifications in the "Cmp_Ip_IrqHandler" function in "Cmp_IP.c" source file: NOTE: Not sure how it got missed or from where to get COUT status, so added manually to get COUT status from CSR register in the Cmp_Ip_Irqhandler once code generation is completed.   PIN SELECTION DETAILS: HOW TO TEST?  a) Connect jumper wire at the PTC2 in the EVB as highlighted in EVB below. b) RED LED ON -> Jumper wire connects to 5V      GREEN LED ON-> Jumper wire connects to GND c) MCU enters STANDBY once SW5 is pressed and it wakes up if the jumper wire is disconnected from either 5V or GND. NOTE: In this demo, since jumper wire is used instead of button/ADC, due to high impendence state, LED will be toggling if jumper wire is not connected to GND/5V. Connect male jumper wire at PTC2 Thanks & regards, Krishnakumar V

MCU : S32K144 AFE : MC33771 RTD : 1.0.1 As we know BCC sample software for MC33771C which is delivered is based on SDK for S32K144 , and uses S32DS-2.2 :-- BCC_S32K144_FreeMASTER I am having a setup , for this combination, using SPI :-- FRDM33771CSPEVB evaluation board  + S32K144 + 14 cell Battery EMULATOR :    S32K144 pins used :-- MOSI :  LPSPI0  : PTB-4 MISO :  LPSPI0  : PTB-3 SCK :    LPSPI0  : PTB-2 CSB :    LPSPI0  : PTB-5 RESET line of MC33771C : PTD-4 FRDM33771CSPEVB pins used :-- https://www.nxp.com/docs/en/user-guide/UM11402.pdf SI of MC33771C : Connects to MOSI of S32K144 : K2-7 SO of MC33771C : Connects to MISO of S32K144 : K2-9 SCK of MC33771C : Connects to PTD-4 of S32K144 : K2-11 CSB :    K2 -5 RESET line of MC33771C : K4 -1 Freemaster uses UART-1 on S32K144 EVB ():-- TX : PTC7 RX : PTC6 I have ported the BCC_S32K144_FreeMASTER  sample code to S32K144 using RTD-1.0.1 & is working fine. This attached code work fine for SPI.  Two sample project i have attached, both are tested and working fine :--- 1> Chip select is controlled by LPSPI. 2> Chip select is controlled manually in user software. Fremaster project is also inside the folder, name of freemaster project is :-- 1> FreeMASTER_project.pmp TPL related part i have not ported & tested because at present i am not having MC33664ATL on S32K144 EVB board & do not have FRDM33771BTPLEVB (MC33771C board with TPL on it). Regards, Dinesh

******************************************************************************* The purpose of this demo application is to present a usage of the EMIOS IP Driver in Polling mode for the S32K3xx MCU. The example use to :-- EMIOS-1 - ch-0  --> PTC24 --> Generate the PWM EMIOS-1 - ch-1  --> PTC25 --> is the ICU channel to measure the duty Pins used :--     This example is tested for IPWM mode .  :--       IPWM mode ,  ICU Driver User Manual :--   Result :--    ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************

Hi everyone, Welcome to the NXP Tech Days 2025 training session AUT-T437: Hands - On Workshop: Explore Ethernet Integration on the S32K3 Microcontroller. My name is Alejandro Flores Triana (Alex) and I will be your guide during this conference. I am an Automotive Applications Engineer supporting different OEMs, Tier1s, Partners and other internal NXP teams on topics related to communication protocols (e.g. CAN, LIN, SPI, I2C, Ethernet, etc.). The idea of this session is for you to understand how to program the S32K3 Ethernet interface using NXP Real-Time Drivers (RTDs) – Autosar MCAL Layer. We will use a base project and together modify it to create a simple Ethernet application. Therefore, to be ready follow the steps below to get your environment up and running before the session. On your laptop, install the NXP Software environment described in the attached presentation: Hands - On Workshop: S32K3 Ethernet Prerequisites.   Once you have the NXP software environment installed, download the attached project: S32K344_ETH_MCAL_TechDays.exe.   Run the .exe project with administrator rights. Accept the license and install in the desired folder.         Open the NXP Design Studio. Click File -> Import -> Existing Projects into Workspace.   Select root directory and browse the folder where you downloaded the project.   Select Copy projects into workspace. Then, click Finish.   Select the project. Click on the arrow next to the hammer. Click on Debug_FLASH. Then you are ready for the session! See you soon. Best Regards, Alejandro Flores Triana

*******************************************************************************  The purpose of this demo application is to present a usage of the  LPSPI IP Driver for the S32K3xx MCU.  The example uses LPSPI2 for transmit & receive Twelve bytes using the SPI polling Lpspi_Ip_SyncTransmit() method. MOSI MISO connected on Hardware in loopback.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    

*******************************************************************************  The purpose of this demo application is to present a usage of the PORT & SIUL IP Driver for the S32K3xx MCU.  The example uses SW5 for switch debouncing.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    

Abstract This example presents an use case for analogue data capturing using eMIOS, BCTU, SAR-ADC and DMA modules on S32K39-37-36 series based on the RTD low level API to support diverse application needs.   Connections: S32K396-BGA-DC1 -> Pin -> Signal -> Label J62-1 -> PTC30 -> siul2_gpio_xx -> GPIO1_GPT (D0) J58-1 -> PTE14 -> emios_0_ch_19_z -> PWM1 J58-2 -> PTG9 -> siul2_gpio_xx -> GPIO2_eMIOS_Trigger J62-2 -> PTC31 -> siul2_gpio_xx -> GPIO3_BTCU_Trigger J62-4 -> PTD6 -> siul2_gpio_xx -> GPIO4_BTCU_Watermark J62-24 -> PTB14 -> adc1_s21 -> ADC1 *To use the potentiometer of S32X-MB connect: J62-24 (in S32K396-BGA-DC1) to P26-1 (in S32X-MB) Note: Following line should be added in project/generate/src/Bctu_Ip_PBcfg.c every time the code is updated in Config Tools: #define DMA_LOGIC_CH_0 ((uint8)0U)   Detailed Description: The Compare Value of GPT eMIOS_0_ch_0 generates a time-out period. Once time-out is reached its Emios Notification toggles GPIO1. This allows us to observe in scope 2 events, which describe the start and the end of the signal sequence. The eMIOS_0_ch_23 channel is configured as global counter bus A. In this setup, it can act as the time base for other eMIOS_0 channels, enabling synchronization between other them—there is just one PWM in this case. This synchronization ensures that channels share the same time base, thereby defining a common period for their operation. The emios_0_ch_19_g channel is configured as OPWMT mode, which offer more flexibility for triggering. An interrupt is requested on every flag event, during which GPIO2 is toggled—happens at half the time high in this case. This flag event, can be configured using Trigger parameter. For more details about eMIOS, please refer to S32M27x/S32K3 – eMIOS Usage, considering differences for porting from S32K3 to S32K39-37-36 in AN14301. The BCTU implements a list for parallel conversions using ADC0 and ADC1. Which is triggered by the eMIOS channel, and the resulting data is stored in FIFO1, as follows: ADC0: VREFH_ChanNum51 -> BANDGAP_ChanNum48 ADC1: VREFL_ChanNum50 -> S21_ChanNum45 For debugging purposed the GPIO3 is toggled every BCTU Trigger Notification. Additionally, the GPIO4 is toggled in BCTU Watermark Notification, which happens every time the number of active entries in FIFO exceeds the watermark level, and therefore the data is available for reading. See full signal sequence in Figure 1: Figure 1. Signals of example project When you suspend debug session, in Expressions tab (Figure 2) you can observe results: g_fifo1Result, which corresponds to the BCTU list measurements, meanwhile g_fifo1Volts corresponds to the conversion in volts. Figure 2. Expressions tab of example project   References S32 Design Studio for S32 Platform Real-Time Drivers (RTD) S32K39, S32K37 and S32K36 Data Sheet [S32K39-S32K37-DS] S32K39, S32K37, and S32K36 Reference Manual [S32K396RM] S32K344 to S32K39/S32K37 Migration Guide [AN14301] S32K39/37/36 Electrification Microcontrollers Evaluation Board [S32K396-BGA-DC1] S32X-MB I/O Extension Evaluation Board for Real-Time Domain Control and Actuation [S32X-MB] S32M27x/S32K3 – eMIOS Usage [S32M Knowledge Base] S32M27x/S32K3 – eMIOS/BTCU/ADC/DMA – [RTD600] [S32M Knowledge Base] S32K39-37-36 – eFlexPWM/TRGMUX/BCTU/SAR-ADC/DMA – [RTD600] [S32M Knowledge Base] Application Software: - S32K396_RTD600_eMIOS_BCTU_SARADC_DMA_Ip_example Example was built and tested using the following IDE and Driver versions: - S32 Design Studio for S32 Platform Version 3.6.3 - S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0

*********************************************************************************** * Detailed Description: * C40_Ip driver is moved to SRAM in files: C40_Ip.h, SchM_Mem_43_INFLS.h * The function that launches the C40_Ip APIs from main() is also placed in the SRAM. * Check the addresses of the APIs in the .map file. * ------------------------------------------------------------------------------ * Test HW: : S32K312EVB-Q172 * MCU: : S32K312 * Project : RTD AUTOSAR 4.7 * Platform : CORTEXM * Peripheral : S32K3XX * Dependencies : none * * Autosar Version : 4.7.0 * Autosar Revision : ASR_REL_4_7_REV_0000 * Autosar Conf.Variant : * SW Version : S32DS 3.5, RTD 5.0.0 * Build Version : S32K3_RTD_5_0_0_D2408_ASR_REL_4_7_REV_0000_20241002 ***********************************************************************************

What is S32K1‘s IDLE feature: IDLE is set when the LPUART receive line becomes idle for a full character time after a period of activity.When CTRL[ILT] is cleared, the receiver starts counting idle bit times after the start bit. Why write this demo? Because the RTM driver does not support Lpuart's IDLE detect. What needs to be modified？ -1.add "UART_EVENT_DMA_IDLE = 0x04U" to “callbacks.h”   -2 add "LPUART_DRV_RxIdleCallback" to ".lpuart_driver.c"   -3 Define “LPUART_DRV_RxIdleCallback” function   static void LPUART_DRV_RxIdleCallback(uint32_t instance) { DEV_ASSERT(instance < LPUART_INSTANCE_COUNT); LPUART_Type *base = s_lpuartBase[instance]; lpuart_state_t * lpuartState = (lpuart_state_t *)s_lpuartStatePtr[instance]; LPUART_ClearStatusFlag(base,LPUART_IDLE_LINE_DETECT); if(lpuartState->transferType == LPUART_USING_DMA) { lpuartState->rxSize = EDMA_DRV_GetRemainingMajorIterationsCount(lpuartState->rxDMAChannel); LPUART_DRV_StopRxDma(instance); lpuartState->rxCallback(lpuartState,UART_EVENT_DMA_IDLE,NULL);/*UART_EVENT_DMA_IDLE : 0x04*/ } }     -4 add below code to "LPUART_DRV_IRQHandler" and be sure these code must  be put before "LPUART_DRV_ErrIrqHandler(instance)" /* Handle idle line interrupt */ if (LPUART_GetIntMode(base, LPUART_INT_IDLE_LINE)) { if (LPUART_GetStatusFlag(base, LPUART_IDLE_LINE_DETECT)) { LPUART_DRV_RxIdleCallback(instance); } }   -5 configure IDLE releated register in main function. LPUART1->CTRL |= LPUART_CTRL_ILT(1); LPUART1->CTRL |= LPUART_CTRL_IDLECFG(7); LPUART1->CTRL |= LPUART_CTRL_ILIE(1);   Test environment： Hardware is base on S32K144EVB-Q100 Software is S32 Design Studio for Arm V 2.2 + RTM 3.0.X Demo Description：           The baud rate of the serial port is set to 19200, and the function implemented is to send back the received data using DMA methods .      

*******************************************************************************  The purpose of this demo application is to present a usage of the  UART IP Driver for the S32K3xx MCU.  The example uses LPUART6 for Freemaster uart Port. Freemaster project :-- S32K312_Freemaster_UART6\GUI_new\Project.pmpx  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************        

*******************************************************************************  The purpose of this demo application is to present a usage of the  LPSPI IP Driver for the S32K3xx MCU.  The example uses LPSPI2 for transmit & receive Twelve bytes using the DMA. This above mentioned operation is performed 10 times continuously MOSI MISO connected on Hardware in loopback.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** For S32K312, please use this correct clock HSE to AIPS clock should be ½. Please make these changes in the below all example code clock setting. HSE clock to 60 MHZ.     Use this MACRO to enable disable the non cacheable region variable placement :--          

*******************************************************************************  The purpose of this demo application is to present a usage of the MEM_InFls MCAL Driver for the S32K3x1 MCU.  The example uses MEM_InFls driver to write 128 bytes to FLASH memory address  0x48_0000 .  ------------------------------------------------------------------------------ * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************     Results :--     Ram location where FLASH writing erase code is placed :-- I placed the code at 256 byte below the MAX address of the RAM size 0x20407DAA = 541097386             Size of RAM need to save the flashing routine, as per the MAP & linker file :-- 0x00406ff0 - 0x00406f78 = 120 bytes                S32K3 FLASH Memory Terminology :--        

Hi,      The draft time gap, from power-on to clock output of S32K14x, is as below.    You can take a reference. Cheers! Oliver

This is set of S32K389EVB-Q437 demo projects. S32K389_GPIO_RTD6d0_S32DS3d6d2 S32K389_LPUART_RTD6d0_S32DS3d6d2 S32K389_FlexCAN_RTD6d0_S32DS3d6d2 S32K389_PFLASH_RTD6d0_S32DS3d6d2 S32K389_ADC_RTD6d0_S32DS3d6d2 S32K389_eMIOS_GPT_RTD6d0_S32DS3d6d2 S32K389_LowPower_RTD6d0_S32DS3d6d2 Examples are based on S32K3 RTD version 6.0 and created in S32DS version 3.6.2

*******************************************************************************  The purpose of this demo application is to present a usage of the  LPSPI IP Driver for the S32K3xx MCU.  The example uses LPSPI2 for transmit & receive Twelve bytes using the DMA. MOSI MISO connected on Hardware in loopback.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** DATA and Instruction CACHE is enabled by default --> in startup code :--     ========= This selection enable the use of CACHE driver API =========     ============= Use this MACRO ==================== #define USE_NON_CHACHABLE_REGION 1 This MACRO comment & uncomment will allocate the buffer in cachable & non cacable region of memory. You can allocate the SPI buffer in in cachable & non cacable region of memory. Enabling & disabling of this MACRO will adjust the example code.     ============ How this example works : Cacheable region used ============ I have connected MOSI and MISO pins of spi at hardware level. Whenever I am  sending and receiving total 10 numbers of 12 byte packet On each transmission of 12 byte packet I am incrementing the first bite of transmit buffer just to distinguish between packets at the receive side Cache_Ip_InvalidateByAddr() --> I have to call this API every time I receive 12 byte of data on receive buffer Cache_Ip_CleanByAddr() --> every time after incrementing the transmit buffer first byte ...I have to call this API then only the correct data is transmitted otherwise it will transmit the same data which was available at first time transfer ================ Cache API operation ============== Cache_Ip_InvalidateByAddr() is for the  invalidate operation. Cache_Ip_CleanByAddr() is for the clean operation or clean&invalidate operation that can be chosen by param of this api: @Param[in]  enInvalidate      Specifies to execute operation Clean&Invalidate. Clean: This operation ensures that all dirty lines—data in the cache that has been modified but not yet written back to the main memory—are written back to the main memory ->(push data from cache memory to main memory)  Invalidate: This operation marks the cache lines as invalid, ensuring that any subsequent access to these lines results in a fetch from the main memory, thus ensuring data consistency ->(push data from main memory to cache memory) Clean&invalidate : A cache clean and invalidate operation behaves as the execution of a clean operation followed immediately by an invalidate operation. Both operations are performed to the same location. ================ Pins used ======================    

*******************************************************************************  The purpose of this demo application is to present a usage of the  POWER & WKUP IP Driver for the S32K3xx MCU. In current example :-- SW-5 = PTB-26  -----> PRESS to enter the STANDBY mode. SW-6 = PTB-19 = WKUP[38] --> PRESS to exit the STANDBY mode. The example uses PIT-0 timer, to generate the periodic interrupt.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-T172 * MCU: S32K324 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Push Buttons :---     Wake-up source, SW-6 GPIO:--     ********* If you use external BJT on your board to generate 1.5 volts *******************   I tested on Our T172 EVB, with NPN external Ballast transistor is selected to supply the V15_MCU domain. I am able to wake up from standby mode. If we select 2-3 in J31 then NPN external Ballast transistor is selected to supply the V15_MCU domain & wakeup is ok on T172 EVB You have to make following settings in code :--      

Abstract This example presents an use case for complementary PWM outputs with dead-time insertion and hardware ADC triggering using eFlexPWM, TRGMUX, BCTU, SAR-ADC and DMA modules on S32K39-37-36 series based on the RTD low level API to support diverse application needs. Connections: S32K396-BGA-DC1 -> Pin -> Signal -> Label J62-1 -> PTC30 -> siul2_gpio_94 -> GPIO1_GPT J62-5 -> PTD2 -> pwm_0_a, 2 -> PWM1 J62-6 -> PTD3 -> pwm_0_b, 2 -> PWM2 J62-30 -> PTD24 -> pwm_0_a, 0 -> PWMT J62-2 -> PTC31 -> siul2_gpio_95 -> GPIO3_BTCU_Trigger J62-4 -> PTD6 -> siul2_gpio_102 -> GPIO4_BTCU_Watermark J62-24 -> PTB14 -> adc1_s21 -> ADC1 *To use the potentiometer of S32X-MB connect: J62-24 (in S32K396-BGA-DC1) to P26-1 (in S32X-MB)   Note: Following line should be added in project/generate/src/Bctu_Ip_PBcfg.c every time the code is updated in Config Tools: #define DMA_LOGIC_CH_0 ((uint8)0U)   Detailed Description: The Compare Value of GPT eMIOS 0 channel 0 generates a time-out period. Once time-out is reached its eMIOS notification toggles GPIO1. This allows us to observe in scope 2 events, which describe the start and the end of the signal sequence. The eFlexPWM0 module is used for generating PWMs and hardware ADC triggering. The eFlexPWM0 Submodule 2 is employed to generate center-aligned complementary PWM outputs (PWM1 and PWM2) with dead-time insertion. The eFlexPWM0 Submodule 0 generates another independent PWM output (PWMT) and is utilized to generate the trigger signal for analog data capturing within the same PWM period —happens at half the time high in this case—using VAL0 register. The BCTU implements a list for parallel conversions using ADC0 and ADC1. Which is triggered by the eMIOS channel, and the resulting data is stored in FIFO1, as follows: • ADC0: VREFH_ChanNum51 -> BANDGAP_ChanNum48 • ADC1: VREFL_ChanNum50 -> S21_ChanNum45 For debugging purposed the GPIO3 is toggled every BCTU Trigger Notification. Additionally, the GPIO4 is toggled in BCTU Watermark Notification, which happens every time the number of active entries in FIFO exceeds the watermark level, and therefore the data is available for reading. See full signal sequence in Figure 1: Figure 1. Signals of example project When you suspend debug session, in Expressions tab (Figure 2) you can observe results: g_fifo1Result, which corresponds to the BCTU list measurements, meanwhile g_fifo1Volts corresponds to the conversion in volts. Figure 2. Expressions tab of example project   References S32 Design Studio for S32 Platform Real-Time Drivers (RTD) S32K39, S32K37 and S32K36 Data Sheet [S32K39-S32K37-DS] S32K39, S32K37, and S32K36 Reference Manual [S32K396RM] S32K344 to S32K39/S32K37 Migration Guide [AN14301] S32K39/37/36 Electrification Microcontrollers Evaluation Board [S32K396-BGA-DC1] S32X-MB I/O Extension Evaluation Board for Real-Time Domain Control and Actuation [S32X-MB] S32K39-37-36 – eMIOS/BTCU/SAR-ADC/DMA – [RTD600] [S32K Knowledge Base]   Application Software: - S32K396_RTD600_eFlexPWM_TRGMUX_BCTU_SARADC_DMA Example was built and tested using the following IDE and Driver versions: - S32 Design Studio for S32 Platform Version 3.6.3 - S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0

******************************************************************************** * Detailed Description: * The S32K144 MCU is configured as a LIN Slave node. * When a MasterReq frame (0x3C) is received with Go-to-sleep command, the stack goes to sleep. * The application can read: * l_flg_tst_LI0_MasterReq_flag() * l_ifc_read_status(LI0) * When a falling edge is detected on the LPUART RX pin, * LinWakeUpTimerNotification() is called. * The notification has to be enabled in MEX. * Gpt (LPIT) timer is used to calculated the length of the wake-up signal. * * ------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144 * Debugger: S32DS_ARM_3.6, S32K1_RTD_3_0_0_D2503 * Target: internal_FLASH ********************************************************************************   Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.

****************************************************************************************************** * Detailed Description: These demos showcase how to configure the eMIOS module on the S32K3 series, highlighting various operational modes and their implementations using the RTD high-level drivers, commonly known as MCAL drivers. The implementations demonstrated in these examples follow the approach outlined in the community thread:  S32M27x/S32K3 – eMIOS Usage. * Connections:  ******************************************************************************************************* * Test HW: S32K31XEVB-Q100 * MCU: S32K311 * Debugger: S32DS 3.6.2, OpenSDA/ PEmicro Multilink Universal FX  * Target: internal_FLASH ******************************************************************************************************* * Important information:  The OPWMT channel does not support the notification function. In this mode, the Sn[FLAG] bit is only set upon an AS2 match, which defines the generation of a trigger event within the PWM period. As a result, OPWMT mode cannot support notifications based on signal edges. A bus exception may occur during the execution of Mcl_Init() if the eMIOS clock is not properly enabled. To avoid this issue, ensure that the eMIOS peripheral clock is activated in the configuration settings under: MCU driver → McuModuleConfiguration → McuModeSettingConf → McuPeripheral *******************************************************************************************************