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*******************************************************************************  The purpose of this demo application is to present a usage of the Bootloader Jump to Application.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************   Jump is decided based on the boot_header, size we use to jump to the RESET handler:--   Cortex M-7 Interrupt vector table, RESET handler is 4 byte offset from starting of vector table :--     How to burn elf file of both application & bootloader code :--  
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******************************************************************************* The purpose of this demo application is to present a usage of the Hardfault handling for the S32K3xx MCU. ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** An example on S32K312: Read an unimplemented memory (0x80000):   volatile uint32_t read = *((uint32_t*)0x00080000); Hardfault will occur :--     Read Stack pointer when the HARDFAULT occur :-- SP = 0x2000ffd0 Go to this memory location , 0x2000ffd0 :--     When the program enters an exception handler, the stack frame is pushed onto the stack including the program counter value of the fault instruction.  At exception entry, the processor saves R0 R3, R12, LR, PC and PSR on the stack. hardfault occurred at, 0x00400e48, this is how to decode the address :--   Now How to reach this address 0x00400e48, using disassembly window :-- This is same place in main() function :-- volatile uint32_t read = *((uint32_t*)0x00080000);  
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This example for S32K312 is based on this, example on S32K344 :-- https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-PIT-BTCU-parallel-ADC-FIFO-DMA-DS3-5-RTD300/ta-p/1732444 *******************************************************************************  The purpose of this demo application is to present a usage of the  ADC_SAR and BCTU IP Driver for the S32K3xx MCU.  The example uses the PIT0 trigger to trigger BCTU conversion list to  perform parallel conversions on ADC0/ADC1. Three ADC channels  are selected to be converted on each ADC:  ADC0: S8 , P0, S8  ADC1: S10, S13, S17  Converted results from BCTU FIFO are moved by DMA into result array.  ADC channel S10 is connected to board's potentiometer.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** Set PIT Freeze Enable :--- BCTU will be do the parallel conversion for channel mentioned in BCTU list :--       "NEW DATA DMA enable mask" :-- controls These bit field in MCR register     "ADC target mask" :-- It controls "ADC_SEL " bit field in "Trigger Configuration (TRGCFG_0 - TRGCFG_71)" for single conversions you can enable only one instance so the possible values for target mask: 1 (0b001) ADC0 2 (0b010) ADC1 3 (0b100) ADC2| for list of conversions we can enable also parallel con version for example 3 (0b011) parallel conversion of ADC0 and ADC1 The trigger is configured as a list of parallel conversions ADC0, ADC1 in “Adc Target Mask”. List of ADC channels is defined in “BCTU List Items” while order is given by the “Adc Target Mask”: BctuListItems_0 is ADC0, BctuListItems_1 is ADC1 etc.     Result :-- I connected VDD from board on adc_0_p0 (PTD1 : J412-1)  and adc_1_p2 (PTE0 J412-13). Also POT value on S10 of ADC-1 & ADC-0-VREFH value coming correct & STABLE.      
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*******************************************************************************  The purpose of this demo application is to present a usage of the  ADC_SAR and BCTU IP Driver for the S32K3xx MCU.  The example uses the PIT0 trigger to trigger BCTU conversion list to  perform  conversions on ADC1.  ADC channels  are selected to be converted on  ADC-1:  ADC1: P0, p1, p2, p3, p4, p5, p6, S10  Converted results from  BCTU_ADC_DATA_REG are moved by DMA into result array.  ADC channel S10 is connected to board's potentiometer.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Set PIT Freeze Enable :--- All channels are for ADC-1 , in BCTU list :--     "NEW DATA DMA enable mask" :-- controls These bit field in MCR register     "ADC target mask" :-- It controls "ADC_SEL " bit field in "Trigger Configuration (TRGCFG_0 - TRGCFG_71)" for single conversions you can enable only one instance so the possible values for target mask: 1 (0b001) ADC0 2 (0b010) ADC1 3 (0b100) ADC2| for list of conversions we can enable also parallel con version for example 3 (0b011) parallel conversion of ADC0 and ADC1 The trigger is configured as a list of parallel conversions ADC0, ADC1 in “Adc Target Mask”. List of ADC channels is defined in “BCTU List Items” while order is given by the “Adc Target Mask”: BctuListItems_0 is ADC0, BctuListItems_1 is ADC1 etc.      
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*******************************************************************************  The purpose of this demo application is to present a usage of the LPI2C-0 as MASTER and LPI2C-1 SLave, using DMA for TX & RX for the S32K3xx MCU.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************
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*******************************************************************************  The purpose of this demo application is to present a usage of the Printf Semihosting for the S32K3xx MCU.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Create New project :-- Select Semi hosting library in project Properties :-- In Debugger setting :--- Include file :-- #include <stdio.h> Output :--    
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*******************************************************************************  The purpose of this demo application is to present a usage of the  SWT IP Driver for the S32K3xx MCU.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** With S32K312 device take care, HSE clock AIPS_SLOW_CLOCK ratio,  kept 1:2 :--   The example we use to trigger the SWT once & go to while(1) loop. This will trigger the watchdog RESET. Then After RESET from SWT we will check at starting of main function, if RESET reason is SWT, then glow LED and wait in while(1) loop  :--  
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******************************************************************************* The purpose of this demo application is to use pad keeping for  PINS and enter the standby mode & before entering the standby mode update variables in Standby RAM memory with pin state. Once wake up from the standby mode update the pins values from the STANDBY RAM variables.  S32K3xx MCU.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** =============== How this DEMO works ========== Before entring standby :-- Before entering standby mode, i make BLUE LED high SW6 on board pressed to enter the standby mode. Wakeup from Standby :-- SW5 on board pressed to wakeup from standby After wakeup from Stand by:-- I glow Green LED Unglow the BLUE LED Wait for SW6 on board to be pressed to enter the standby mode. ===============  Stand by RAM location =============== As noted, the Standby SRAM is allocated at the first 32 KB of the SRAM Memory. https://www.mouser.com/pdfDocs/S32K3MemoriesGuide.pdf =============== Pins used for PAD keeping =============== PTA30, PTA31, PTD14     =============== Switches used ===============   Enter Standby mode, by pressing SW6 on Board EXIT Standby mode, by pressing SW5 on Board =============== Wakeup source, SW5 PTB26 =============== =============== WKPU[41]  ---> WKPU_CH_45=============== Because First 4 WKPU are timers, so 41 + 4 = 45   =============== Linker file changed =============== Added Standby RAM memory & sections for standby RAM memory. Changes can be seen by comparing the original linker file      =============== Startup file changed , startup_cm7.s =============== Added call to Initialise the Standby RAM Changes can be seen by comparing the original startup_cm7.s file     ======================= How to verify if Standby RAM is working =============== 1> Declare two variables in file Wkup.c :-- __attribute__ ((section (".standby_ram_data"))) volatile int test_0_value ; __attribute__ ((section (".standby_ram_data"))) volatile int test_1_value ;   2> function set_pin_value() will be called before entering the standby mode. Initialise the values to these two variables inside function set_pin_value() in file Wkup.c.   3> Now burn the code inside the MCU using the PE micro debugger.     Once code is burned do not run the code & disconnect the debugger. 4> Power OFF and power ON the S32K312 board. Now code is waiting to enter standby mode. Press switch SW6 MCU will enter standby mode & Blue LED glowing. Press switch SW5 MCU will wakeup from the standby mode. Code will Now code is waiting to enter standby mode 5> Now open your debugger configuration, and attach to running target.   6> Once connected click on the ELF file & press pause button.   7> In Debug window you can see the value of variables test_0_value & test_1_value same as initialised before entering the standby mode.      
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******************************************************************************* The purpose of this demo application is to place variables in DTCM memory for the S32K3xx MCU.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** ZERO table : is for bss segment variables :  contains RAM start & end address of BSS section which need to be initialized with ZER). Init_table : is for DATA segment variables : contains RAM start address of DATA section & START & end address of ROM address where the initialization values of the variables are stored.   Startup file startup_cm7.s call function init_data_bss() . Inside this function uses these section :-- Variables declared :-- Linker file changes :--   startup_cm7.s file changes :--   MAP file :--     Debug window results :--         https://www.kernel.org/doc/html/v5.9/arm/tcm.html   Due to being embedded inside the CPU, the TCM has a Harvard-architecture, so there is an ITCM (instruction TCM) and a DTCM (data TCM).  The DTCM can not contain any instructions, but the ITCM can actually contain data.   TCM is used for a few things: FIQ and other interrupt handlers that need deterministic timing and cannot wait for cache misses. Idle loops where all external RAM is set to self-refresh retention mode, so only on-chip RAM is accessible by the CPU and then we hang inside ITCM waiting for an interrupt. Other operations which implies shutting off or reconfiguring the external RAM controller.  
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*******************************************************************************  The purpose of this demo application is to present a usage of the  UART IP Driver for the S32K3xx MCU.  The example uses LPUART6 for Freemaster uart Port. Freemaster project :-- S32K312_Freemaster_UART6\GUI_new\Project.pmpx  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************        
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*******************************************************************************  The purpose of this demo application is to present a usage of the PORT & SIUL IP Driver for the S32K3xx MCU.  The example uses SW5 for switch debouncing.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    
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*******************************************************************************  The purpose of this demo application is to present a usage of the  ADC_SAR IP Driver for the S32K3xx MCU.  The example uses the PIT0 trigger to trigger  conversions on ADC1.  ADC channels  are selected to be converted on  ADC-1:  ADC channel S10 is connected to board's potentiometer. #define ADC_SAR_USED_CH_BANDGAP 48U /* Internal Bandgap Channel */ #define ADC_SAR_USED_CH_POT_0 34U  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************      
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*******************************************************************************  The purpose of this demo application is to present a usage of the  FlexCAN IP Driver for the S32K3xx MCU.  The example uses FLEXCAN-0 for transmit & receive Tusing following Message buffer :-- #define RX_MB_IDX_0 10U #define RX_MB_IDX 11U #define TX_MB_IDX 12U FIFO Receive Message from range :-- 0x01 to 0x16 BAUDRATE : 500 KBPS  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    
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*******************************************************************************  The purpose of this demo application is to present a usage of the  FlexCAN IP Driver for the S32K3xx MCU.  The example uses FLEXCAN-0 for transmit & receive Tusing following Message buffer :-- #define RX_MB_IDX 1U #define TX_MB_IDX 0U. BAUDRATE : 500 KBPS  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    
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*******************************************************************************  The purpose of this demo application is to present a usage of the  UART IP Driver for the S32K3xx MCU.  The example uses LPUART6 for transmit & receive five bytes using the DMA.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    
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*******************************************************************************  The purpose of this demo application is to present a usage of the Siul2_Icu IP Driver for the S32K3xx MCU.  The example uses EIRQ-13 on PTB23 for interrupt..  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************        
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Customer may need more high performance via S32K3xx. How to optimization user's code?  As following have some suggestions:  1. Most of user code allocate to P-Flash and enable I-Cache 2. Allocate system stack to D-TCM and enable D-Cache 3. Execute code frequently allocate to I-TCM. E.g., ISRs etc. 4. OS' task stack allocate to D-TCM 5. vector table allocate to D-TCM Please note: 1. Due to enable D-Cache, other masters(E.g., DMA, HSE, another APP cores) access theses area of cacheable will be impact. So, theses area need to allocate to non-cacheable area. 2. If another master(E.g., DMA, HSE and another APP cores) access the D-TCM need to over back door. E.g., core1/DMA/HSE access core0' DTCM needed to over backdoor.  Information: S32K3' Coremark in RM, theses Coremark' value are from ARM. If used IAR/GHS etc and set compiler flag, then the Coremark value is very closely with RM. If used GCC, then the Coremark value will less than RM. BR Tomlin    
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*******************************************************************************  The purpose of this demo application is to present a usage of   configure TRGMUX to select triggers for staring Normal/Injected chain conversion. Select PIT0_Ch0 as the hardware trigger source of ADC1_Ch34 & Ch48 via TRGMUX and two LEDs to show the trigger Sequence. ADC1_Ch34 is connected to board's potentiometer,Ch38 is bandgap channel.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q257 * MCU: S32K344 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: OpenSDA * Target: internal_FLASH ********************************************************************************
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*************************************************************************************************************** Detailed Description: Example shows implementation of Analog Comparator ‘45.7.5 Windowed mode (#s 5A & 5B)’ of S32K1XXRM using S32 SDK API. The Comparator is configured to compare analog input 0(AIN0) with half the reference voltage generated with the internal DAC. PDB is used to generate pulse output which is used as sampling windows of CMP block via TRGMUX. PDB period is 5ms, the first 2.5ms WINDOW=1 and the next 2.5ms WINDOW=0. Pdb0PulseOut not only be TRGMUX to Cmp0Sample but also to TrgmuxOut0, so that we are able to observe WINDOW at TRGMUX_OUT0(PTA1) pin. Based on the input from CMP0_IN0 (1kHz external triangle wave) the LEDs light by the following rules: 1) Vin < DAC voltage : RED on, GREEN off 2) Vin > DAC voltage : RED off, GREEN on 3) Unknown state : RED on, GREEN on EVB connection: Signal Function pin S32K144EVB-Q100 WINDOW TRGMUX_OUT0 PTA1 J5.5 2.5ms WINDOW=1 and 2.5ms WINDOW=0 Plus input CMP0_IN0 PTA0 J5.7 Need to connect external 1khz triangle wave COUTA CMP0_OUT PTE3 J1.16 square wave PTC1 PTC1 J5.13 If there is no external triangle wave, a square wave(PTC1) is generated and output to CMP0 (PTA1) * * ------------------------------------------------------------------------------------------------------------------------ * Test HW: S32K144EVB-Q100 * MCU: S32K144UAVLL 0N47T * Target: Debug_FLASH * Compiler: S32DS3.4 * SDK release: S32SDK_S32K1XX_RTM_4.0.3 * Debugger: PEMicro OpenSDA * ------------------------------------------------------------------------------------------------------------------------ Revision History: Ver   Date              Author            Description of Changes 1.0   Nov-9-2023   Robin Shen    Initial version, based on cmp_dac_s32k144 and pdb_periodic_interrupt_s32k144 ***************************************************************************************************************
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To restrict the S32K3 MCU access by JTAG the process depends on whether HSE FW is used or not. With HSE FW (not covered in this document): 1. Set up ADKP (Application Debug Key/Password). 2. Make sure the password mode or challenge-response mode. 3. Move the lifecycle to the IN-FIELD stage. NOTE: All the above steps can only be done via HSE services (not via IVT or by direct flash programming). Without HSE FW: WARNING: ONCE YOU REALIZE THIS PROCESS YOU CAN NOT CONFIGURE HSE IN THE DEVICE. NOTE: All the following codes represent just the essential part of the application and, where made using the S32K344 (not EVB), S32DS v3.5, the S32K3 Real-Time Drivers Version 3.0.0 (released on March 31, 2023) and a modified version of the C40_Ip_Example_S32K344, unless otherwise mentioned. As the debugger the PEmicro’s USB Multilink Universal FX was used, unless otherwise mentioned. 1. Program the field CUST_DB_PSWD_A: The UTEST Sector is an OTP (One Time Programmable). This causes the erase operations not to be allowed. You only going to be able to append new data or configuration and read data. This UTEST memory field is defined with a size of 32 bytes located from addresses 1B00_0080h to 1B00_009Fh, but its real size is 16 bytes because from 1B00_0090h to 1B00_009Fh is reserved (Table 184. UTEST memory location usage by SBAF of the S32K3xx Reference Manual, Rev. 7). To write the desired password in the UTEST Sector is the same process used to program data in other blocks. I. First, the sector needs to be unlocked to realize program operations. UTEST has its register PFCBLKU_SPELOCK[SLCK]. II. Once the sector is unlocked, write the 16-byte lend password at 1B00_0080h. The following changes need to be done in the example code: /*============================================================================ * LOCAL MACROS ============================================================================*/ #define FLS_MASTER_ID 0U #define FLS_BUF_SIZE 16U #define FLS_SECTOR_ADDR 0x1B000080U #define FLS_SECTOR_TEST C40_UTEST_ARRAY_0_S000 NOTE: Make sure that the definition FLS_MAX_VIRTUAL_SECTOR located in C40_Ip_Cfg.h has the same value as the C40_UTEST_ARRAY_0_S000 and that C40_SECTOR_ERROR is one value greater than C40_UTEST_ARRAY_0_S000.  For example instead of: #define FLS_MAX_VIRTUAL_SECTOR (527U) … #define C40_SECTOR_ERROR (528U) Needs to be: #define FLS_MAX_VIRTUAL_SECTOR (528U) … #define C40_SECTOR_ERROR (529U) /*============================================================================ * GLOBAL CONSTANTS ============================================================================*/ uint8 TxBuffer[FLS_BUF_SIZE] = {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F}; /* Password */ You can confirm the password was written by using the Memory Viewer (not covered by this document).   2. Advance the MCU's lifecycle: I. First, set the address of the lifecycle configuration word in the IVT/boot header. For more information refer to sections 32.5 (Image vector table) and 32.5.3 (Structure definition of image vector table) of the S32K3xx Reference Manual, Rev. 7. NOTE: Make sure that the structure of the boot_header (located in Project_Settings -> Startup_Code -> startup_cm7.s) is defined as shown below:     #define LF_CONFIG_ADDR (0x007D2000) /* The LC word can be at any flash address, taking care that does not interfere with HSE */     II. Once defined LF_CONFIG_ADDR, write in such address the value for the LC word corresponding to the target lifecycle: Life cycle stage Valid Values for LC Advancement OEM_PROD DADA_DADAh IN_FIELD BABA_BABAh The following changes need to be done in the example code (the changes can be done in the same project used before):     /*=========================================================================== * LOCAL MACROS ===========================================================================*/ #define FLS_MASTER_ID 0U #define FLS_BUF_SIZE 8U #define FLS_SECTOR_ADDR 0x007D2000U #define FLS_SECTOR_TEST C40_CODE_ARRAY_0_BLOCK_3_S489 /* Look into C40_Ip_Cfg.h file to find the corresponding sector */ /*=========================================================================== * GLOBAL CONSTANTS ===========================================================================*/ uint8 LC_TxBuffer[FLS_LC_SIZE] = {0xDA, 0xDA, 0xDA, 0xDA, 0x0, 0x0, 0x0, 0x0}; /* Minimum data length 8 bytes */     Once the LC word is written in the memory, you can confirm the LC word was written by using the Memory viewer (not covered by this document). III. Reset the MCU NOTE: Directly from the reset pin (RESET_B), not the debugger. If the procedure was done correctly you should see the following message: Now to unlock the MCU, PEmicro provides some Python scripts (PEmicro support files package) to facilitate the authentication of the debugger when the password is set. In summary: I. Make sure to have already installed Python (3.5 or later). II. Open Command Prompt. III. Use cd to change the current working directory to where the file package is. IV. Run the script using: py authenticate_password_mode.py -hardwareid=USB1 -password=… Where hardwareid, is the debug hardware IP address, name, serial number, or port name. And the password is the preconfigured 16-byte hexadecimal. NOTE: This steps need to be done each time the MCU is reset or power cycled.  Once the debugger has been authenticated, you are going to be able to securely debug the device under S32DS. NOTE: Just make sure that In S32DS when you configure the Debug Configurations of a project, change the Target to the one that says "SECUREDEBUG". This is because during debug entry a hard reset is toggled which clears the authentication. You can follow the below steps for this:  
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