This example for S32K312 is based on this, example on S32K344 :--
https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-PIT-BTCU-parallel-ADC-FIFO-DMA-DS3-...
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The purpose of this demo application is to present a usage of the
ADC_SAR and BCTU IP Driver for the S32K3xx MCU.
The example uses the PIT0 trigger to trigger BCTU conversion list to
perform parallel conversions on ADC0/ADC1. Three ADC channels
are selected to be converted on each ADC:
ADC0: S8 , P0, S8
ADC1: S10, S13, S17
Converted results from BCTU FIFO are moved by DMA into result array.
ADC channel S10 is connected to board's potentiometer.
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* Test HW: S32K3X4EVB-Q172
* MCU: S32K312
* Compiler: S32DS3.5
* SDK release: RTD 3.0.0
* Debugger: PE Micro
* Target: internal_FLASH
********************************************************************************
Set PIT Freeze Enable :---
BCTU will be do the parallel conversion for channel mentioned in BCTU list :--
"NEW DATA DMA enable mask" :--
controls These bit field in MCR register
"ADC target mask" :--
It controls "ADC_SEL " bit field in "Trigger Configuration (TRGCFG_0 - TRGCFG_71)"
for single conversions you can enable only one instance
so the possible values for target mask:
1 (0b001) ADC0
2 (0b010) ADC1
3 (0b100) ADC2|
for list of conversions we can enable also parallel con version
for example
3 (0b011) parallel conversion of ADC0 and ADC1
The trigger is configured as a list of parallel conversions ADC0, ADC1 in “Adc Target Mask”.
List of ADC channels is defined in “BCTU List Items” while order is given by the “Adc Target Mask”: BctuListItems_0 is ADC0, BctuListItems_1 is ADC1 etc.
Result :--
I connected VDD from board on adc_0_p0 (PTD1 : J412-1) and adc_1_p2 (PTE0 J412-13).
Also POT value on S10 of ADC-1 & ADC-0-VREFH value coming correct & STABLE.
=========================Using FIFO-2 =================
FIFO-2 Trigger & LIST Index :--
ADC channel conversion :--
