s32k116 hardfault handler

[Dinesh_Guleria]

Hi NXP Application team,

Do we have some sample code where s32k116 hardfault handler is implemeted. So that we can trace from which instruction this hardfault occurred ?

Can i use same process as mentioned in this link :--
https://mcuoneclipse.com/2012/11/24/debugging-hard-faults-on-arm-cortex-m/ 

Please suggest.

Regards
Dinesh

[danielmartynek]

Hi @Dinesh_Guleria,

Unfortunately, we have no such example for S32K1xx (Cortex M0+).

The article you posted is for S32K14x (Cotex M4).

You can follow the steps here:

https://community.arm.com/support-forums/f/embedded-forum/3257/debugging-a-cortex-m0-hard-fault

You can read the stack in the memory view, there is no need to have the stacked PC stored in a variable, if you know how to read the stack.

Regards,

Daniel

[Dinesh_Guleria]

@danielmartynek ,

Thanks for your reply.

Link you  shared do not contain any solution how to do this task.

>>You can read the stack in the memory view, there is no need to have the stacked PC stored in a variable, if you know how to read the stack.

Please can you suggest how to read the stack..?

Regards,

Dinesh

[danielmartynek · Accepted solution]

Hi @Dinesh_Guleria,

There is a lot of useful information in the thread, please read it again.

An example on S32K116:

Read an unimplemented memory (0x80000):

volatile uint32_t read = *((uint32_t*)0x00080000);

void HardFault_Handler(void){
  while(1){
  }
}

Read the stack from the fault handler

danielmartynek_0-1642002157699.png

In memory view, SP + 0x18

danielmartynek_1-1642002223526.png

Find the instruction:

danielmartynek_2-1642002287673.png

Regards,

Daniel

[Dinesh_Guleria]

@danielmartynek 

Thanks for your reply, it is clear to me.

Where exactly this figure comes from :--
In memory view, SP + 0x18.

Please suggest.

Regards,
Dinesh

[danielmartynek]

Hello @Dinesh_Guleria,

This is a speudo code from ARM®v6-M Architecture Reference Manual

danielmartynek_0-1642515374308.png

Regards,

Daniel