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Description    NXP’s Personal Network Attached Storage (NAS) solution enables portable personal storage to be shared through an internal protocol (IP) or Wireless network allowing users to share photos, data, stream music or videos, backup and recovery of data over the local area network in a completely secure environment. In addition, the solution can support gateway features such as packet forwarding, cloud connectivity via Ethernet, Wi-Fi or LTE. This NAS solution offers significant advantages to consumer and SMB environments, including: Hardware-accelerated Raid for data parity and recovery, a reduced bill of materials (BOM) and ease-of-use associated with an IP network that most business and consumers already find familiar. Based on the QorIQ Layerscape LS1012A processor and the Network Attached Storage Application Solution Kit (ASK), the personal/consumer NAS solution offered by NXP allows developers to easily build storage applications leveraging the highly-optimized and feature rich ASK software stack along with the small form factor, low-power consumption and packet processing capabilities enabled by LS1012A processor. NXP provides an integrated platform solution (SW and HW) helping the customer to reduce his time to market, increase security and increase performance by leveraging the packet accelerators within the QorIQ® Layerscape LS1012A processor while delivering high NAS performance and IP forwarding applications with reduced load on the Arm® core. In addition, NXP LS1012ARDB supports a full set of popular interfaces such as SATA, USB 3.0, PCIe and 2.5/1Gigabit Ethernet for LAN and WAN, allowing customers and operators to securely connect storage devices with the cloud. Features Integrated Platform Solution Commercial Market Proven Software Solution Hardware Offloading Popular Connectivity Flexible and Optimized Software Architecture Use Cases Personal Storage Consumer Network Attached Storage (NAS) Consumer Direct Attached Storage (DAS) Battery Powered Portable NAS Wireless Personal Storage Media Gateway Chip on Drive Wi-Fi SSD and Small/Portable Drive Ethernet Drives Block Diagram Products Category Name MPU Product URL Layerscape LS1012A Communication Processor for the IoT | NXP  Product Description The QorIQ® LS1012A processor, optimized for battery-backed or USB-powered, space-constrained networking and IoT applications Category Name DC Regulator Product URL MC34VR500 | Multi-Output DC/DC Regulator | NXP  Product Description The NXP® MC34VR500 power management solution for network processor systems is a high-efficiency, quad buck regulator with up to 4.5 A output and five user-programmable LDOs. Tools Product URL QorIQ® LS1012A Development Board QorIQ® LS1012A Development Board | NXP  Layerscape FRWY-LS1012A board FRWY-LS1012A Development Platform | NXP 
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Demo Hexiwear platform combines the style and usability found in high-end consumer devices, with the functionality and expandability of sophisticated engineering development platforms, making Hexiwear the ideal form factor for the wearable market, as well as other edge-node IoT solutions. Completely open-source and developed by MikroElektronika in partnership with NXP, the Hexiwear hardware includes the low power, high performance Kinetis K6x Microcontroller based on ARM Cortex-M4 core, the Kinetis KW40Z multimode radio SoC, supporting BLE in Hexiwear. The Hardware features included 6 on-board sensors such as Optical Heart Rate Monitor, Accelerometer and Magnetometer, Gyroscope, Temperature, Humidity, light and Pressure sensor's. Hexiwear also includes Color OLED Display, Rechargeable battery and External flash memory. $49 NXP Hexiwear, IoT and Wearables development platform – ARMdevices.net   Hexiwear is supported with its own application for Android and iOS, so customers can connect the device to the cloud straight out of the box, without any additional software development. Hexiwear uses FreeRTOS, the Kinetis software development kit (SDK) and the Kinetis Design Studio IDE. The Hexiwear platform is also expandable with the option to add nearly 200 different, additional sensors through click boards™      Features •       Eye-catching small form factor (smaller than 2” by 2”) board with open source hardware with 7 NXP components and 8 sensors on-board. •       Designed for wearable applications with the onboard rechargeable battery, OLED screen and onboard sensors such as optical heart rate, accelerometer, magnetometer and gyroscope. •       Designed for IoT end node applications with the onboard sensor’s such as temperature, pressure, humidity and ambient light. •       Complete software solution with open source embedded software, cell phone apps and cloud connectivity. •       Flexibility to let you add the sensors of your choice from 180+ plug and play add on boards. NXP Products Recommended ARM Cortex-M4|Kinetis K64 120 MHz 32-bit MCUs|NXP  ARM Cortex-M0+|Kinetis KW40Z 2.4 GHz 32-bit MCUs|NXP  FXOS8700CQ Accelerometer and Magnetometer FXAS21002 Gyroscope MPL3115A2R1 Altimeter MC34671 Battery charger Other Links Kickstarter Hexiwear Design Files Hexiwear|NXP     News Module Targets Rapid IoT Development | Embedded content from Electronic Design  NXP Accelerates Smart Wearable Product Development | Business Wire  Mouser Stocking the Hexiwear Open Source IoT Platform from MikroElektronika and NXP | Electronics360  Contest Hexiwear: The Do-Anything Device! - Hackster.io  Hexiwear: Quickly Build Quality IoT Devices - HWTrek  http://www.rs-online.com/designspark/electronics/eng/blog/test-drive-hexiwear-the-wearable-iot-development-kit  Blogs https://www.linkedin.com/pulse/hexiwear-complete-iot-wearable-development-solution-powered-kedia?trk=prof-post  Introduction to Hexiwear – a wearable development kit for the IoT era – HWTrek Blog  Win an Oculus Rift! Hexiwear Design Contest | mbed  https://mcuoneclipse.com/2016/07/12/hexiwear-teardown-of-the-hackable-do-anything-device/  Freedom development platform: Hackster.io conte... | element14 Community  JavaScript mobile apps for your NXP Hexiwear BLE device | Evothings 
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        S32G just support serial download a M7 image to run by internal rom codes, our S32G DS IDE have a flash tools to use this feature to burn the image to external device. So current image burn method will divide into 2 step: 1: burn a uboot into the external device by S32G DS flash tools. 2: reboot the codes with uboot and run with network to burn the linux image into external device.      which need two working place on manufacture line, and customer wish to have a one time on-line tools, which means we need use serial port to boot uboot directly but S32G rom codes do not support it.       We have a reference tools of S32V but which IP difference is big between on S32V and S32G, So we can not reuse it and have to develop a new one.       The development working include: 序号 开发工作 说明 开发者 1 开发 根据S32G的serial boot协议要求,开发PC端的串口工具来下载M7镜像 John.Li 2 开发 根据自定义协议要求,开发PC端的串口工具来下载A核Bootloader到SRAM中 John.Li 3 开发 根据自定义协议要求,开发M7镜像的串口接收与Checksum逻辑 John.Li 4 开发 修改M7镜像支持串口0 John.Li 5 开发 开发实现M7镜像的串口单字节同步收发函数 John.Li 6 开发 开发实现A53启动功能 John.Li 7 调试与Debug 调试解决串口接收乱码问题(Serial boot rom codes仍然在回送消息串口) John.Li 8 调试与Debug 提供 解决A核启动串口halt思路(Serial boot rom codes仍然占用串口) John.Li 9 调试与Debug 优化M7镜像,缩小大小 Tony.Zhang 10 调试与Debug 根据M7镜像和A核 Uboot在SRAM中的内存分配要求,重排M7镜像位置,避免冲突 Tony.Zhang 11 调试与Debug 在M7中初始化SRAM空间 Tony.Zhang 12 调试与Debug 在M7中设置SRAM可执行空间 Tony.Zhang 13 调试与Debug 调试解决由于cache没有及时回写导致的下载镜像错误的问题 Tony.Zhang 14 调试与Debug 集成,调优与文档 John.Li   Pls check the attachment for the doc/codes/binary release which include:    Release      |->M7: Linflexd_Uart_Ip_Example_S32G274A_M7: S32DS M7工程。      |->PC: s32gSerialBoot_Csharp: PC端的Visual Studio的C#的串口工具工程。      |->Test:      |    |-> 115200_bootloader.bin: S32DS M7工程编译出来的bin文件,波特率为115200      |    |-> 921600_bootloader.bin: S32DS M7工程编译出来的bin文件,波特率为921600      |    |->load_uboot.bat: 运行工具的批处理文件,运行成功后打开串口可以看到Uboot执行,默认使用的波特率是115299         |    |->readme.txt:其它测试命令 |    |->s32gSerialBoot.exe:编译出来的PC端串口工具 |    |->u-boot.bin: BSP29默认编译出来的u-boot.bin.      Product Category NXP Part Number URL Auto MPU     S32G274     https://www.nxp.com/s32g    
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This doc explain  where is the design resource and what they are of S32G in Chinese,  Contents as follows: 目录 1 www.nxp.com 官网资源 ............................................. 2 1.1 www.nxp.com Documentation ................................ 4 1.2 www.nxp.com Tools&Software ............................. 10 2 Flexera资源 ............................................................. 18 2.1 Automotive HW-S32G Evaluation Board .............. 21 2.2 Automotive HW-S32G GoldBox ........................... 22 2.3 Automotive HW-S32G RDB2(RDB不再说明) ....... 22 2.4 Automotive SW-S32G2 Standard Software.......... 23 2.5 Automotive SW-S32G2 reference Software ......... 28 2.6 Automotive SW-S32G2 Tools .............................. 30 3 Docstore资源 ........................................................... 31
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Demo Owner: Mark Houston   Kinetis V series is a family of devices targeting motor and power control applications for the mass market with a strong focus on enablement. See two elements of that story: a product benchmark showing relative product performance and the Kinetis motor suite -- a tool that speeds your development time to market.       Features Motor speed capabilities Comparison to standard controllers Smooth transitions Featured NXP Products Kinetis V Kinetis V1 Kinetis V3 Kinetis V4 Development Tools Kinetis Motor Suite Design Resources Kinetis Motor Suite Fact Sheet
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IEEE 1588协议简单理解        IEEE 1588 是一个精密时间协议 (PTP),用于同步计算机网络中的时钟。 在局域网中,它能将时钟精确度控制在亚微秒范围内,使其适于测量和控制系统。 IEEE 1588 标准为时钟分配定义了一个主从式架构,由一个或多个网段及一个或多个时钟组成。 ​       TSN 网络中时间同步协议使用 IEEE 802.1AS 协议,它基于 IEEE 1588 协议进行精简和修改,也称为 gPTP 协议。 ​       IEEE 1588 协议简称精确时钟协议 PTP(Precision Timing Protocol),它的全称是“网络测量和控制系统的精密时钟同步协议标准”(IEEE 1588 Precision Clock Synchronization Protocol)。其工作的基本原理,是通过主从节点之间进行同步数据帧的发送,记录数据帧的发送时间和接收时间信息进行,并且将该时间信息添加到该数据帧中。从节点获取这些时间信息,并计算从节点本地时钟与主时钟的时间偏差和网络节点之间的传输延时,对本地时钟进行纠正,使之与主节点时钟同步。一个 PTP 网络只能存在一个主时钟。 ​ PTP 协议主要分为两大部分来实现时钟同步功能: ​ 1、建立同步体系: ​       协议使用最佳主时钟算法(Best Master Clock Algorithm,BMCA),通过选取主时钟,建立主从拓扑关系,进而在整个 PTP 网络中建立起同步体系。 ​ 2、同步本地时钟: ​       协议使用本地时钟同步算法(Local Clock Synchronization Algorithm,LCS),通过 PTP 数据报文在网络主从节点之间的交换,计算各从节点本地时钟与主时钟间的时间偏差,调整本地时钟,使之与主时钟同步。 IEEE 1588v1 ​       整个 PTP 网络内的时钟可按照其上 PTP 通信端口的数目来划分成普通时钟(Ordinary Clock,OC)与边界时钟(Boundary Clock,BC):普通时钟只存在一个,而边界时钟则存在多个。一般在确定性不高的网络节点处使用边界时钟,例如交换机或者路由器一般用作边界时钟,如下图所示。在每个端口上,PTP 通信都是独立进行的。 1、边界时钟: ​      边界时钟上只允许存在一个从端口,与上级节点的主端口通信,将其本地时钟与级主端口进行同步。其余端口为主端口,与下游节点的从端口进行通信。边界时钟可以连接不同的网络协议。 ​ 2、同步体系建立流程: ​   (1)初始状态,各个节点端口会在指定的时间内侦听网络中的 Sync 数据帧; 若接收到 Sync 数据帧,节点端口将根据最佳主时钟算法决定端口状态。若没有收到 Sync 数据帧,该节点状态变更为 Pre_Master,并将自己假定为主时钟节点。此时节点端口状态表现为主时钟,但是并不发送 Sync 帧。 ​   (2)端口状态在一定时间内保持 Pre_Master: 若在端口指定时间内接收到 Sync 数据帧,则该端口状态由最佳主时钟算法决定。 若判定端口为主时钟,则将周期性地发送 Sync 帧;若判定为从时钟,则接受 Sync 帧,并计算偏差,纠正本地时钟。 ​ 若在该时间段内端口没有收到 Sync 数据帧,则将状态变更为主时钟,并且开始定时发送 Sync 数据帧。 ​   (3)主时钟和从时钟的状态随着时钟性能与运行状态的变化而变化。下图展示了 BMCA 中状态转移。 3、时间同步建立流程: ​ 如下图PTP同步原理         如图所示,Master为网路中的同步时钟源,可以认为其与UTC或者GPS时无限接近。Slave为网络中需要被同步设备。假设从Master到Slave的路径符合对称路径,那么路径上的延时我们设Delay,然后设备Master和设备Slave之间待同步的时间差值为Offset,即Slave比Master在同一时刻慢Offset。         Slave设备根据算出的Offset即可以进行本地时钟校准。但是1588V1协议依赖于链路的对称性,即Master到Slave与Slave到Master时延一致,这在实际网络状况下很难满足,故需要额外的不对称算法进行链路延时差计算和补偿校准。   IEEE 1588v2 ​IEEE1588V2在IEEE1588V1版本上做了改进和扩展。主要包括: ​ 1.新增点到点路径延时测量的独立消息模式。 端口 A 与端口 B 间的路径延迟时间 Delay 为: ​        在 PTPv1 中,平均路径延迟测量时通过 Sync 帧与 Delay_Req 帧配合使用的,但是在 PTPv2 中却不需要 Sync 帧的参与,仅通过 PDelay_Req 数据帧系列来进行测量。这是一个独立的延迟测量过程,不依赖 Sync 帧和同步体系建立的参与,使得测量精度有所提高,并且可以经过多次测量求得平均值得到更为准确的路径延迟。另一方面,如果网络中的同步体系发生改变,这时不需要重新计算该节点间的路径延迟,直接使用之前已测得的延迟数据,大大增强了协议执行的效率,使得协议更为方便灵活。在PTPv2 中,利用 PDelay_req 数据帧系列已成为主要的测量路径延迟方法。 ​ 2、新增透明时钟模型 ​        在 PTPv1 中,网络中间节点均采用边界时钟模型。与网络中唯一的主时钟,即一个普通时钟连接的边界时钟,其上唯一的从端口接收主节点发送的同步数据帧,与主时钟实现同步,其余的主端口和与之相连的其他边界时钟发送同步数据帧,最后同步到网络边缘的普通时钟,这样便实现了整个网络的时间同步。这种方法虽然可行,但是由于这种方式是逐级同步,所以距离主时钟越远的节点,同步精度越低。 ​        当网络中的一些节点不需要进行时钟同步或者不具备同步功能时,便可采用透明时钟模型。透明时钟不像 BC/OC 模式那样,需要每个节点都与主时钟进行同步,它的端口只对协议数据帧进行转发,并将计算出的数据帧滞留时间添加在校正域中。这种方式将 PTP 数据帧的处理变得更为简单,降低了网络中 PTP 协议的实施难度,同时提高了各从节点的同步精度。 ​ 透明时钟有模型两种:端对端透明时钟,和点对点透明时钟。 ​     (1)端对端(E2E)透明时钟 ​ E2E 透明时钟对网络中普通数据帧不做任何处理,仅进行转达让其正常通过。但是对于 PTP 事件数据帧,则将他们从接收端口到发送端口间的驻留延迟时间累加到数据帧中的修正域,用以弥补 PTP 数据帧在经过其自身所带来的延迟误差。 ​     (2)点对点(P2P)透明时钟 ​ 点对点(P2P)透明时钟只转发特定的 PTP 报文,包括 Sync 帧、Follo_Up 帧和Announce 帧等。并且会采用 Pdelay_Req 数据帧系列计算每个端口与所连接的端口间的路径延迟时间,再与端口间延迟时间合并添加到时间修正域,来补偿数据帧从源端口到点对点透明时钟出端口的时间延迟。 ​ 3、增加单步时钟模型 ​        单步时钟模型解决了 Follow_Up 帧与 Sync 帧匹配问题。PTP 协议基本的同步过程采用双步模式,即主时钟节点发送 Sync 帧,和带有 Sync 帧发送时间的Follow_Up帧。这种方式虽然能提高 Sync 帧时间戳标记的精度,提高同步效果,但是在网络负载较大的情况下,数据帧很有可能发生丢失或者阻塞,造成两种数据帧的匹配出现差错。 ​        在 PTP 数据帧中设置一个标志,来使用单步模式,将 Sync 帧的发送时间与数据帧中的时间标签的差值作为传输延迟,并将其累加到修正域中。这样主时钟便通过单独的 Sync 帧而不需要 Follow_Up 进行时间的同步校准工作。 ​        单步模式可以减少网络流量,提高网络负载较大时同步的可靠性。单步模式需要额外的辅助硬件,来帮助计算时间修正值并将其累加到校正域中,这对网络的实时性有比较高的要求。 BMCA ​        BMCA,即最佳主时钟算法,它选择网络中性能最佳的时钟作为主时钟,并以 此建立网络拓扑,生成同步体系,进而实现时钟同步功能。 ​        最佳主时钟的选取是通过Announce帧在网络中各节点的传输,比较各个节点上的时钟属性(比如是否将时钟指定为主或者从时钟),用于标识精度的时钟等级,以及用于标识时钟源类型的时钟类型(比如铷钟、铯钟等),还有表示时钟偏移、方差等的时钟特性、时钟地址以及时钟端口号等特征来选择最佳主时钟,当其他时钟特征都一样是,协议会将端口号最小的节点时钟作为主时钟。IEEE 1588协议会以主时钟节点作为根节点形成树形拓扑结构,并且为避免生成回路,那些竞争失败的节点端口,协议将他们定义为被动或者禁用状态。
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  Overview NXP’s Motion Control and Robotics solution provides the computing performance, embedded connectivity, low latency and a real-time open source operating system to address the requirements for multi-axis motion control and robotics applications.  This solution is based on an i.MX RT1050, which controls four steppers motors that activates the different kind of movement of the robotic arm for the 3D printer to function. This solution also counts with the FreeMASTER GUI for easy debugging and a better presentation and control of the system. Use Cases Our robust product portfolio makes motor and robotics control more precise, secure and effective for the creation of end-products with applications like: 3D printers Industrial applications: Welding machines Material handling Painting and drilling Assembly machines Surgical assistants Block Diagram Products Category MCU Product URL i.MX RT1050 Crossover MCU with Arm® Cortex®-M7 core  Product Description The i.MX RT1050 is the industry's first crossover MCU and combines the high-performance and high level of integration on an applications processors with the ease of use and real-time functionality of a microcontroller.   Category Motor Driver Product URL GD3000: 3-Phase Brushless Motor Pre-Driver  Product Description The GD3000 is a gate driver IC for three-phase motor drive applications providing three half-bridge drivers, each capable of driving two N-channel MOSFETs.   Category Power Management Product URL PCA9412: 3.0 MHz, 300 mA, DC-to-DC boost converter  Product Description The PCA9412 and PCA9412A are highly efficient 3.0 MHz, 300 mA, step-up DC-to-DC converters.
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EEPROM selection guide for serial RCON boot. On S32G reference manual, we only ask customer to make sure I2C address of EEPROM is 0xA0, no others requirement. Actually, S32G only supports EEPROM with one 8-bit address byte. For high capacity EEPROM such as AT24C64D@8K bytes, which need two 8-bit word address bytes. Can’t be supported by S32G ROM.   AT24C64D.pdf         AT24C01 has been validated on S32G EVK board, which need one word address byte AT24C01.pdf   Thanks, Lambert
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This post entry provides a detailed description of the OM29263ADK kit, a new antenna tuning development kit specially designed to facilitate the NFC antenna prototyping process. This document has been structured as follows: OM29263ADK kit contents This kit consists of a single PCB board that includes:  A pre-matched antenna of 2 turns and a size of 77 by 113 mm.  A second pre-matched antenna of 4 turns and a smaller size of 20 by 20 mm.  And, 8 extra boards to prepare the matching for custom antennas. As a result, this kit is a perfect resource for different purposes such as evaluating the RF performance of different antenna sizes and, for prototyping your custom antenna quickly. In addition, this NFC antenna development kit is compatible with our existing product support package. You can directly connect it to CLRC663 demoboards, as well as to PN5180 and PN7462 demoboards after a minor tuning. Using OM29263ADK kit with CLEV6630A or CLEV6630B The process is really straightforward… First, take one CLRC663 demoboard and separate the main PCB from the antenna & matching circuit. The board includes cut lines, so you can divide both sections easily by only using your hands. Second, break the kit OM29263ADK PCB so that you separate the pre-matched antenna from the other PCB parts. Then, it is just a matter of connecting the two parts together. The kit antenna includes pin male connectors while the CLRC663 board includes the corresponding female connectors. Therefore, hook up the antenna with the main board, solder the connectors and that’s all. We can observe that when we connect the kit large antenna to the reader PCB, the  impedance measured with our network analyzer shows that the tuning is adjusted to approximately, 19 Ohms. This is the result obtained without any hardware modification The same process applies for the smaller antenna: Similarly, we can observe that when we connect the kit small antenna to the reader PCB, the  impedance measured with our network analyzer shows that the tuning is adjusted to approximately, 36 Ohms. This is the result obtained without any hardware modification: Using OM29263ADK kit with PNEV5180B or PNEV7462C In case you are interested to connect the OM29263ADK kit antennas to the PNEV5180B or PNEV7462C boards, the preparation process is the following: First, separate the antenna and the matching section from the PN5180 or PN7462 demoboards, as before, using the cut lines. Then, take one kit sample, and separate the pre-matched antennas for the other PCB parts. And finally, adjust the EMC filter. The EMC filter adaptation is required because the kit antenna is prepared for asymmetric tuning while the PN5180 and PN7462 original antenna use a symmetrical tuning. The main difference between both types of tuning is the cut off frequency. The symmetric tuning uses a cutoff frequency around 15MHz, while the asymmetric can go up to 22 MHz. In practice, for this adaptation, we only need to change the value of the capacitor C0 in the main board. For instance, the existing 220 pF capacitor can be replaced for another one of 68 pF. Using OM29263ADK kit to connect your own antenna coil This section describes how to use the kit PCB boards for our custom antenna tuning. For this task, the list of material that we need is: A reader PCB board, in the example, we picked CLRC663 One of the PCBs for antenna matching included in the kit And, the any antenna to be matched  In our case, we have selected one sample antenna available in our lab. The following explanation will be guided using this antenna as a reference, but any antenna can be tune using the same process. The usual list of steps to tune a custom antenna are: First, we need to define target impedance and Q factor, as design parameters for our reader Then, we will characterize the antenna coil and find its parameters After that, we will design the EMC filter With this, we will calculate the matching components using an Excel sheet Afterwards, we will assemble the calculated components and measure the first results. We will take field measurements, which probably will show that it is not perfect, so we may need to adapt the matching values With these fine-tuned vales, we will re-assemble again And finally, we will design the receiver circuit. Define target impedance and Q-factor First, we start defining the target impedance and Q-factor. The target impedance is a design parameter, which needs to be chosen according to our needs whether we want to go for maximum field strength or minimum battery consumption or a trade-off in between. Typically, reasonable values are between 20 Ohms and 80. Another important design parameter is the Q factor. The Q factor is a dimensionless parameter indicating the performance of a resonant circuit. The higher the Q factor, the higher the read range. On the other hand, increasing the Q factor also reduces the bandwidth of the circuit. As a result, in practical implementation, Q-factor values below 30 are demonstrated to fit well for the ISO14443 wave form timing requirements and corresponding spectrum.  For our tuning exercise, the design parameters chosen are an impedance of 20 ohms and a Q factor of 25 Measure antenna coil Next step is to characterize the antenna coil. Any antenna coil has an input impedance. This input impedance is complex and consists of an inductance, capacitance as well as some losses represented by a resistance (R). The actual values depend, among others, on antenna material, thickness of conductor, distance between the windings, number of turns, etc.  The coil characterization needs to be done with a network analyzer. It could be a high end, such as Agilent or Rohde & Schwarz, which is powerful, accurate, easy to use, but expensive. Or we can also go for low end solutions, such as the miniVNA PRO, which is cheap compared with the previous ones, and accurate enough for our needs. In our case, the characterization of our lab antenna shows:  An inductance around 1.3 uH And a resistance of 2.5 Ohms Design EMC filter The next step is to design the EMC filter. As we are using CLRC663, we will go for an asymmetric antenna tuning. Good inductor values are between 330nH and 560nH. and 21MHz cutoff frequency is ideal for asymmetric tuning. Fixing this two parameters, we can easily calculate the required capacitor component for our EMC filter with the formula below. In our example, we need to use a capacitor of C= 122 pF. With this, we just pick up the closer commercial value from our components box Calculate matching circuit components We have characterized the antenna coil and completed the EMC filter. Now, we can calculate the matching network components. The matching components need to be calculated so that the maximum power from the reader is transmitted to the antenna. This happens when the equivalent impedance seen from the reader IC only has the real part, without the complex part. There are some complex calculation involved in the process. In order to avoid these cumbersome formulas, NXP provides a useful Antenna Tuning excel sheet that calculate the appropriate components for you. Below, you can see a screenshot of the Excel sheet in the slide. This sheet calculates C1 and C2 matching values according to the inputs expected from the user. These are The measured antenna coil parameters The EMC filter parameters. The target impedance and Q-factor of our design With these values, The Excel sheet calculates and outputs the value of the matching components: C0, C1, C2 and Rs. In our exercise, the output values calculated for the matching network by the Excel sheet are C1 around 43 pF and C2 around 144 pF Assemble and measure Typically, the calculated values do not match with commercial components. The easiest way is to add components in parallel to get as close as possible to the calculated values. If we take a closer look to the kit antenna matching PCB board, the pad location is the following: We have two slots for C0 – so we can have two capacitors in parallel to achieve a better accuracy on the capacitance value we need to achieve We also have two slots for C1, for the same purpose We have two more slots for C2 soldering We also have two slots for the dampening resistor, in case we need to reduce the Q-factor of our antenna. And finally, one slot for the receiver resistor circuit. After the first component assembly, it is worth performing a field measurement to find out how accurate our matching is in reality. Typically, the measured impedance is different than the impedance calculated in the simulation. Therefore, the calculated matching components were not 100% accurate. But we knew that in advance. We were aware that we were just getting a rough approximation to the antenna parameters. As a result, a good matching is achieved after a number of iterations according to the field measurements that we obtain. As a general rule,  C1 changes the magnitude of the matching impedance and C2 changes its imaginary part. In our exercise, after soldering the first components, the equivalent impedance is around 19 Ohms but it also has a significant imaginary part. As a result, it can be fine-tuned towards better performance. We modified C1 and C2 a couple of times until we found out the final values that work better. obtaining a impedance with only real part at 22 Ohms (C1= 36pF and C2=154 pF). Adjust receiver circuit The last step of tuning our antenna is to design the receiver circuit. The Rx circuit that consists of a voltage divider and a coupling capacitor connected from the output of the EMC filter to the RX pins of the NFC reader. The objective is to set the voltage level at the reception pins to achieve the compromise between a good sensitivity. For CLRC663 plus, the serial resistor is in the range of 7 and 15 kΩ. You can start with a 11 KOhm value, then, the resistor can be adjusted depending on the voltage measured in the Rx pins. If the voltage at Rx pin is higher than 1.7 V, it is recommended to increase the resistor value and if the voltage at Rx pin is below than 1.2 V, it is recommended to decrease the resistor value. Using OM29263ADK kit to evaluate the performance of different antenna shapes The section covers how you can use the antennas included in the kit for performance comparison. Please note that this lab exercise is shown only for illustrative purposes on how the kit can be used to evaluate the performance of different antenna shapes. As an example, we defined a sample scenario where we want to characterize how the field strength decreases with distance when using antennas of different size. For that, we used the following setup: A class 1 ISO14443 Reference PICC A scope A CLRC663 board connected to the small antenna A CLRC663 board connected to the large antenna A ruler to measure the distance The measurements were taken in this way: We tuned the large and small antennas to 20 Ohms We connected the board to the laptop, and we executed the NFC Cockpit tool to control the RF field. We measured with the scope the voltage level obtained by the ISO14443 Class 1 Reference PICC while we increased the distance. Background information Before actually showing you the results, it is worth it to review a couple of antenna design principles to properly understand the results. Coupling coefficient Before actually showing you the results, it is worth it to review a couple of antenna design principles to properly understand the results. The coupling coefficient is a parameter that indicates how much of the magnetic field generated by the reader is picked up by the card. The coupling coefficient takes a value between 0 and 1 If the coupling equals 1, it means we have a perfect coupling, all magnetic field lines are picked by the card If the coupling equals 0, it means we have no coupling at all, no magnetic field lines are picked by the card The key message is that the coupling coefficient is just a geometric quantity. It depends on: The reader and card antenna dimensions (both antenna radius) Their relative position (whether in parallel or perpendicular, they will pick a different amount of magnetic field lines) The distance between them And the magnetic properties of the medium Mutual inductance Very related to the coupling coefficient, we have the mutual inductance. The mutual inductance allows us to determine the voltage induced in the card antenna, that depends on: Coupling coefficient  Better coupling, higher the voltage Driver current  The higher the current we drive in the reader antenna, the stronger the magnetic field Antenna inductance Precisely, in this setup, we are going to measure the voltage perceived by the reference PICC when using two different antennas. Antenna tuning components used for the large antenna First, we prepared a tuning of 20 Ohms in the large antenna. This task was done using the process described above. As an example, we selected a low Q-factor of 10, which helped us to accommodate high bit rates for ISO14443. In the figure below, you can see the components we assembled to tune the large antenna near to 20 Ohms. Antenna tuning components used for the small antenna Second, we prepared a tuning of 20 Ohms in the small antenna so that the results are comparable. The same Q-factor and EMC filter values were used, but obviously, as the antenna size is different, we used different C1, C2 and Rs values to achieve the same equivalent impedance OM29263ADK large antenna vs small antenna The following graph shows the results we obtained: The blue line, represents the DC output voltage obtained from the Class 1 Reference PICC as we increase the distance from the reader using the large antenna… The green line, represents the DC output voltage obtained from the Class 1 Reference PICC but using the reader with the small antenna connected. As a result, what we see is that at close distance, both antennas are able to deliver the same field strength. However, as distance increases, the RF field of the small antenna starts to attenuate quickly from 2 cm distance of the reader while the RF field of the large antenna is more or less stable until 5 cm, after that, it starts to attenuate quickly as well. Potentially, what we can conclude is that for this setup, we might be able to get more reading distance with the large antenna. ISO/IEC14443 vs ISO/IEC15693 reader - Quality factor We need to bear in mind that our antenna is not only for energy transfer, but also it should match with the waveform requirements. Therefore, from the practical point of view, the Q factor of the system is limited by the bandwidth as if we increase the Q, we increase the field strength but we decrease the bandwidth. Our reader can be optimized whether we are designing a reader for ISO14443 or ISO15693 as the signals modulation and timing requirements of the rise and fall times for both RF protocols are different. Actually, in practice, ISO15693 allows us a higher Q factor because there is a lower bandwidth requirement as the waveform timings are more relaxed and, the power transfer requirement is lower than ISO14443. For such optimization, you can refer again to NXP antenna tuning excel sheet. If you recall, one of the input fields of the excel sheet is the Q-factor. Therefore, you can introduce here a value below 30 for ISO14443 readers or below 100 for ISO15693 readers. The excel will output reasonable matching values for the first components adjustment. After that, you can do a fine tuning according to the process I explained before. Further information You can find more information about NFC in: Our NFC everywhere portal: https://www.nxp.com/nfc You can ask your question in our technical community: https://community.nxp.com/community/identification-security/nfc You can look for design partners: https://nxp.surl.ms/NFC_AEC And you can check our recorded training: http://www.nxp.com/support/online-academy/nfc-webinars:NFC-WEBINARS Video recorded session On 21 June 2018, a live session explaining this topic. You can watch the recording here:
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This guide is intended as a reference for creating a demo application using the SLN-VIZN-IOT kit. In this guide, we will be constructing a demo e-lock application using the SLN-VIZN-IOT kit for secure face recognition using liveness detection/anti-spoofing. If you haven’t already, be sure to check out the Getting Started Guide for the SLN-VIZN-IOT kit here. Build Process Our e-lock design will make use of GPIO_AD_B0_2 and GPIO_AD_B0_03 to drive an H-Bridge circuit which actuates a lock using a 9-volt battery. These pins (and our ground) can be found on the serial header located on the front of the kit as shown below: To build our e-lock, we will be modifying the sln_vizn_iot_userid_oobe application found in the SLN-VIZN-IOT SDK. Instructions for downloading the SDK and importing the userid_oobe application can be found in the ‘Get Software’ and ‘Build and Run’ sections of the Getting Started Guide. The following video shows the modifications necessary to implement the E-Lock demo using the sln_vizn_iot_userid_oobe project To enable these pins as GPIOs, we must modify pin_mux.h and pin_mux.c found under the board folder. For simplicity, we contained these initializations in a function called BOARD_InitDoorLockPins. The code to enable these pins was generated using MCUXpresso’s integrated Config Tools, although this is not necessary. The MCUXpresso Config Tools can be read about in-depth here. Next, we need to make sure that the BOARD_InitDoorLockPins function we just created actually gets called so that the GPIOs will work the way we want them to. To do this, we will add the function call inside of our main function in main.c. After adding the door lock initialization to main, we will modify sln_system_state.cpp found under the source folder to add the code which will toggle the GPIO’s we setup in the previous step. To do this, we will make use of the GPIO_PinWrite function found in “fsl_gpio.h.” Using this function requires us to add the line “#include fsl_gpio.h” at the top of sln_system.cpp like shown below: The GPIO_PinWrite functions here will be used to unlock the door whenever a face is recognized (sysStateDetectedKnownUser) and lock the door whenever no known users are in view of the camera (sysStateDetectedNoUser). With the software modifications complete, we need to compile the code and flash our kit with the updated firmware. This can be done by using the ‘Debug’ option found in the Quickstart Panel as shown below. Make sure that the project is compiled and flashed is the sln_vizn_iot_userid_oobe project by verifying the name of the project shown at the top of the Quickstart Panel. For more detailed instructions about flashing the SLN-VIZN-IOT, check out the Flash and Debug SLN-VIZN-IOT Project section under Build, Run in the Getting Started Guide.  With the software modifications complete and the updated firmware installed, all that’s left to do is to add some wires from the GPIO pins to the door lock and power on the kit. Now our e-lock is ready to go! When a user with an unrecognized face (indicated by a red LED) tries to turn the handle nothing happens.  But when a user with a recognized face (indicated by a green LED) tries to turn the handle, the lock is disengaged allowing the latch to move. Conclusion With just a few lines of code and some external hardware, we were able to create a fully-functioning face-controlled e-lock that works entirely offline just by using the SLN-VIZN-IOT. Not to mention the fact that there was no need for any ML experience whatsoever. Because the SLN-VIZN-IOT was designed with flexibility in mind, all sorts of use cases can be supported with only minimal effort when compared to a face recognition implemented from scratch. By using the production-ready software that comes provided with the kit, it’s now possible to add local (no cloud connectivity necessary) face and emotion recognition capabilities to all sorts of products in record time. We hope this guide was helpful in showing you how to jumpstart your face recognition project with the power of the SLN-VIZN-IOT. 
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目录 1 S32G Linux文档说明 .................................................. 3 2 创建S32G RDB2 Linux板级开发包编译环境 .............. 4 2.1 创建yocto编译环境: ................................................. 4 2.2 独立编译 ................................................................. 9 3 FSL Uboot 定制 ........................................................ 14 3.1 FDT支持 ............................................................... 14 3.2 DM(driver model)支持 ........................................... 20 3.3 Uboot目录结构 ...................................................... 31 3.4 Uboot编译 ............................................................. 34 3.5 Uboot初始化流程 .................................................. 35 3.6 使能了ATF后对Uboot初始化流程的影响 ............... 40 4 Uboot 定制 ............................................................... 41 4.1 修改 DDR大小 ....................................................... 41 4.2 修改调试串口与IOMUX说明 .................................. 44 4.3 DM I2C与PMIC初始化 .......................................... 53 4.4 通用GPIO ............................................................. 59 4.5 启动eMMC定制 ..................................................... 69 4.6 Ethernet定制 ......................................................... 78 5 Uboot debug信息 ..................................................... 89 5.1 Print env ............................................................... 89 5.2 dm - Driver model low level access ...................... 92 5.3 fdt .......................................................................... 95 5.4 I2C测试 ................................................................. 95 5.5 芯片寄存器访问 ..................................................... 98 updated to V5
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Wind River's Ka Kay Achacoso demonstrates VxWorks 7 with graphics on the i.MX6 series applications processor. Features Demonstration of Graphics using VXWorks 7 The drivers are taking advantage of the i.MX processor's GPU to render hardware accelerated 3D graphics Using the accelerometer to show the orientation of the board The display shows a 3D view of how the board is being positioned taking into consideration perspectives and lighting shadows Featured NXP Products ARM® Cortex®-A9 Cores: i.MX 6 Series Multicore Processors Links NXP Connect - Wind River
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About this demo   Heads up! This article contains instruction updates due to changes in NXP's SDK and also on AWS website.   This demo will focus on the WIFI enablement and cloud connectivity through AWS by using MCUXpresso and an Amazon Alexa.   Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform, offering over 165 fully-featured services from data centers globally. Millions of customers —including the fastest-growing startups, largest enterprises, and leading government agencies—trust AWS to power their infrastructure, become more agile, and lower costs. The LPC5500 used for this demo is the LPCXpresso55S69 development board which provides the ideal platform for evaluation of and development with the LPC55S6x MCU based on the Arm® Cortex®-M33 architecture. The board includes a high performance onboard debug probe, audio subsystem and accelerometer, with several options for adding off-the-shelf add-on boards for networking, sensors, displays, and other interfaces. The Alexa Skills Kit is a collection of self-service APIs, tools, documentation, and code samples that makes it easier to start building Alexa skills. Skills are like apps for Alexa, enabling customers to perform everyday tasks or engage with your content naturally with voice.   Block Diagram List of Products LPCXpresso55S69 WiFi 10 CLICK   Alexa Echo Dot USB A-to-Micro USB cable Step by Step Guides First, we need to create an account AWS and generate the “thing” that will be linked to the platform, this information can be followed step-by-step on this manual. Import AWS remote control WiFi Demo from the SDK Builder Select the LPCXpresso Board, click on the "Add software component" button, then select "Select All". Download the SDK Open MCU Xpresso and Import SDK examples, and then select the LPCXpresso 55 board and import into the aws_exaples find the aws_remote_control_wifi and also click on the UART for debugging. On the project find the amazon-freertos example, then demos and open the aws_clientcredential.h and change: The AWS IoT broker endpoint (Under thing settings “Interact” section) Write the “Things Name” And WiFi credentials. Replace the aws_clientcredential_keys.h with the one generated by the certification configuration tool from AWS, You can drag and drop it into the folder and then click overwrite. Build and download the application into your board. Video   External Links NXP Product Link LPCXpresso55S69 https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc5500-cortex-m33/lpcxpresso55s69-development-board:LPC55S69-EVK WIFI 10 CLICK https://www.mikroe.com/wifi-10-click Amazon Web Services https://aws.amazon.com/?nc2=h_lg Alexa Skills Kit https://developer.amazon.com/en-US/alexa/alexa-skills-kit   Demo instructions update for 09/25/2020 Due to NXP's SDK updates, some file routes have changed inside the MCUXpresso project: The CertificateConfiguration Tool is located now on: SDKPackages\SDK_2.8.0_LPCXpresso55S69.zip\rtos\freertos\tools\certificate_configuration\ •Location of wifi_shield_silex2401.h \wifi_qca\port\shields\silex2401\wifi_shield_silex2401.h has changed location to wifi_qca\port\boards\lpcxpresso55s69\freertos\silex2401\wifi_shield_silex2401.h Additionally, there is now a clickboard define file available and these changes are already applied: #define BOARD_INITWIFI10CLICKSHIELD_PWRON_PIN 5U //Already done #define WIFISHIELD_WLAN_PINT_CONNECT (kINPUTMUX_GpioPort1Pin18ToPintsel) // IRQ Alexa_RC_json_skill.json.zip file changes:             AMAZON.StopIntent { "name": "AMAZON.StopIntent", "samples": [] },                
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NXP Content: PN7462, NTAG I²C plus NXP Recommends: PN7462, NTAG I²C plus The NFC Cube is a universal demo with which all 3 basic NFC operation modes can be shown: Interaction between a device and a card or tag Interaction between 2 electronic devices (NFC as cable replacement) Interaction between a device and an NFC phone Value Propositions The NFC Cube is a universal NFC demo Support Under https://nxp.box.com/NFCcube you find more information and a video showing the NFC Cube in action.
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Demo Owner Rebeca   The Freescale concept car demonstrates multiple solutions for automotive systems in powertrain, infotainment, cluster, safety and body applications. Specific system solutions include engine control, small and large motor control, lamp control, radio, digital cluster, gauge drivers, TPMS, touch control, surround view camera, media player and fast boot Linux®.     https://community.nxp.com/players.brightcove.net/4089003392001/default_default/index.html?videoId=4282635362001" style="color: #05afc3; background-color: #ffffff; font-size: 14.4px;" target="_blank   Featured NXP Products Qorivva S12 MagniV S08 i.MX6 Links Automotive
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  Overview Hearables or smart headphones are highly integrated, truly wireless earbuds designed to improve audio experiences across a range of consumer and healthcare applications. Small form factors, ultra-light weight and wireless operation increase user comfort. The continued challenge for hearables is how to combine audio quality, user experience and better battery life in a tiny package while offering a multitude of possibilities, all of which demands digital signal processing. To simplify customer engineering efforts on prototype TWS earbud, NXP built an Application Development Kit. Customer just need plug and play to test the functionality and performance of earbud. The ADK demonstrated a stable audio streaming link from Bluetooth mobile phone to both ear. It can be used as a fundamental platform for customer to develop hearables. Features Fitness tracking (pedometer, heart rate, etc.) Local playback (mp3, wav…) Voice UI (command trigger, ON/OFF) Voice enhancement (argument hearing, be forming) Universal translator Block Diagram Products Category MCU Product URL LPC541XX: Low-Power Microcontrollers (MCUs) Based on Arm® Cortex®-M4 Cores With Optional Cortex®-M0+ Co-processor  Product Description The LPC541xx MCU family of single-core and dual-core MCUs are our next-generation of power efficient MCUs.   Category NFMI Radio Product URL NXH2266: NFMI radio for wireless audio and data streaming  Product Description The NXP® NXH2266 is a fully integrated single-chip solution that enables wireless audio streaming and data communication using Near Field Magnetic Induction (NFMI), a mature technology that has a proven track record in the hearing industry.   Category Audio Codec Product URL SGTL5000: Ultra-Low-Power Audio Codec  Product Description The SGTL5000 is a low-power stereo codec designed to provide a comprehensive audio solution for portable products that require line-in, mic-in, line-out, headphone-out and digital I/O.   Category NFC Product URL NTAG I2C plus: NFC Forum Type 2 Tag with I2C interface  Product Description The NTAG I2C plus combines a passive NFC interface with a contact I2C interface.   Category Accelerometer Product URL MMA8652FC: ±2g/±4g/±8g, Low g, 12-Bit Digital Accelerometer  Product Description The NXP® MMA8652FC 12-bit accelerometer has industry-leading performance in a small package.   Category Power Management Product URL MC34673: 1.2 A Single-Cell Li-Ion/Li-Polymer Battery Charger  Product Description The MC34673 is a cost-effective fully-integrated battery charger for Li-Ion or Li-Polymer batteries.   Category Voltage Level Translator Product URL GTL2005PW: Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator  Product Description The GTL2005 is a quad translating transceiver designed for 3.3 V system interface with a GTL/GTL+ bus.
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  Overview   Libraries strive to provide great service and to ensure easy access to media products. With thousands of visitors choosing from copious books, CDs, videos, and computer games, storing and controlling inventory poses huge challenges. To reduce the waiting time for visitors and to relieve staff, most libraries that use RFID rely on RFID-powered self-service media checkout stations. This approach reduces labor, ensures that books are returned to shelves quickly, shortens wait times and encourages more people to visit the library. Taking inventory with the aid of RFID takes only a fraction of the time required with traditional systems. With RFID labels easily applied to all types of media, library staff can use handheld RFID readers to quickly, conveniently and reliably locate misplaced books or other items. New systems such as Smart Shelves enable real-time location of all media within the library. Features   Faster check-out and 24/7 self return service Fast and automated sorting of returned books Improved inventory management Identification of misplaced books Reliable theft protection with Electronic Article Surveillance (EAS) Unique serialized identification No line-of-sight requirement Easily applicable to all media types Reliable, fast and convenient identification   Video     Recommended Products   Category Name ICODE ICODE SLIX SL2S2002; SL2S2102 | NXP  Standard: ISO 18000-3M1 User Memory (bit): 896 EAS protection: 32-bit password AFI protection: 32-bit password Longest read range of any standards-based passive HF RFID technology ICODE SLIX2 NFC Forum Type 5 Tag with originality signature SL2S2602 | NXP  Standard: ISO 18000-3M1 User Memory (bit): 2528 EAS protection: 32-bit password AFI protection: 32-bit password Longest read range of any standards-based passive HF RFID technology Persistent quiet and Originality signature enabled   Related Information   For publishers and retailers: How NFC will merge physical with online book sales ICODE Family data protection for Libraries
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This post entry aims at explaining the debugging process oriented to EMVCo Contactless certification of a device integrating NXP's PN5180. The structure is the following: PN5180 Antenna design considerations Before going into the debugging process for the EMVCo Contactless Analog tests we will see some important considerations for an antenna design and impedance tuning oriented for an EMVCo compliant device. Antenna tuning recommendations The first recommendation is that with the Dynamic Power Control feature the PN5180 allows us to perform symmetrical antenna tuning instead of the typical asymmetrical tuning. This symmetrical tuning provides us with a better transfer function, being able to drive more power to the antenna. The following figure shows the Smith Chart with the S11 parameter plot of a device using a symmetrical antenna tuning:   The only disadvantage of the symmetrical tuning is that we need a current limiter to avoid destroying the chip because of exceeding the chip’s limits. In the case we are documenting today, the PN5180 DPC feature is used to limit the supply voltage and therefore the transmitter current depending on the load detected by the chip. Regarding the EMC filter, the inductor should fit with the following condition to guarantee a good relation between the AGC and the ITVDD: Another consideration is about the resistor used in the reception branch. This resistor controls the receiver sensibility and as a starting point is recommended to use a value to obtain an AGC in free air of: Reader Mode only design: AGC value in free air around 600dec Full NFC design: AGC value in free air around 300dec Finally, EMV contactless transactions are performed at 106kbps which would allow us to work with a high Q factor of the overall system. This means that the power gain can be higher, but at the same time it might also lead to some issues because of the lower bandwidth. In light of this, we have to bear in mind, that if the Q factor is too high it may lead to problems in the waveform tests. PN5180 DPC calibration The Dynamic Power Control is a feature that uses the AGC value to establish different power configurations depending on the load applied to the antenna. As I mentioned before, the main goal is to protect the chip from a transmitter current level that might destroy it. The first step before calibrating the DPC is to check the correlation between the AGC value and the transmitter current or ITVDD when different loads are applied to the antenna. Basically, we will play with the distance between the load and the device to get several points with different AGC values. Based on those measurements, we can plot a graph like the following: Normally we would use a reference PICC and a metal plane or phone to check that the behavior is linear and with no big difference between those loads. Once we have checked the correlation we can proceed with the calibration process, which can be done very easily with the NFC Cockpit software. Here the important thing is to control the ITVDD and keep it always below the chip’s limit. As you can see in the figure below, without the DPC, this symmetrical tuning would lead to a voltage above the limit for positions close to the reader antenna. However, with DPC we can control that voltage at any moment. Another consideration is that we have to make sure that the DPC is calibrated to have maximum power when the reference PICC is far from the reader to avoid a lack of power in the tests at those positions. EMV L1 Analog Tests Debugging process We are going to divide this debugging process into 3 main phases which are the power tests in the first instance, followed by the waveform tests and the reception tests. The reason why we set this order is to first debug the tests that may require HW modifications which have a strong impact on the other tests. This way, for example, if you have passed all power and waveform tests, debugging the reception tests may not have an impact on the results obtained previously. Power tests Tests setup In order to debug the power tests, we will need just an oscilloscope and an EMVCo reference PICC. We will need to connect the outputs J9 and J1 of the EMVCo reference PICC to the oscilloscope and set the jumper J8 of the reference PICC in non-linear load mode. The J9 of the EMVCo reference PICC is the DC_OUT output that we will use to measure the power received by the antenna. The J1 is the LETI_COIL_OUT output and we will use it to capture the command in the oscilloscope. The overall setup is depicted in the figure below. Performing tests We have to use the trigger to capture the REQA command sent from the DTE when the reference PICC is in the position we want to test. This capture can be seen in the two figures below. The yellow channel is the LETI_COIL_OUT of the EMVCo reference PICC and the blue channel represents the DC_OUT obtained from the J1 connector. As said previously, we will use the DC_OUT to measure the voltage in the period of the signal where there is no modulation, like this part highlighted with the red squared. We have zoomed into the period to get the average value using the oscilloscope measurement features. We will use this same procedure to evaluate the power tests in all positions. Depending on the position tested, the specifications define and certain range where the voltage measured should be fitted. In this sense, the maximum voltage level is common for all planes, but the minimum voltage allowed will decrease for positions further from the terminal.  In order to identify the critical positions for the power tests, we have to identify two different scenarios, the first one with the positions that might not reach the minimum voltage established, and the positions that might exceed the maximum value. For the first scenario the critical positions are the outer positions of the plane z = 4cm and the plane z=3cm as the external positions for plane z= 3cm have a bigger radius. The other scenario is that where you can be exceeding the maximum level. This situation can happen in the central positions of the lower planes, like plane z=1 or z=0. Debugging hints In order to overcome possible issues, we will give some tips that can be used for your design. Regarding a case of lack of power, first, we have to make sure that the DPC is correctly calibrated, meaning that you are operating in gear 0 for the external positions of planes 3 and 4 and that gear 0 is operating with full power. If we have verified those two things and we still have issues, we would need to change the tuning of the antenna and reduce the target impedance. This is graphically represented in the following Smith Chart: By reducing the impedance we increase the current that the PN5180 is driving to the antenna so the voltage would increase. Is important to always verify that we are working within the recommended operating range of the chip and that we are not exceeding the transmitter current limit. In a worst-case scenario, if we cannot achieve the voltage with these HW changes we would need to evaluate changes in the hardware design, like adding a ferrite sheet or changing the antenna dimensions or position. On the other hand, if the problem comes because we are exceeding the maximum voltage allowed by the specifications we can easily solve it by reducing the power configuration of the gear used in that specific position. Waveform tests Test setup For the waveform group of tests, we will use a setup consisting of the EMVCo reference PICC along with an oscilloscope and a PC software to evaluate the signal obtained from the oscilloscope. In our case, we will use the Wave Checker software from CETECOM. We need to connect the output J9 of the EMVCo reference PICC to the oscilloscope and set the jumper J8 of the EMVCo reference PICC in the fixed load position. The oscilloscope needs to be connected to the PC or laptop, so the software is able to get the waveform and analyze the parameters needed. Type A tests The waveform group of tests for Type A consists of the following test cases: TA121: t1 TA122: Monotonic Decrease TA123: Ringing TA124: t2 TA125: t3 and t4 TA127: Monotonic Increase TA128: Overshoot Some of these test cases are directly related to the parameters defined for the specific modulation phase for Type A at 106 kbps. This modulation phase along with the respective parameters is depicted in the figure below. When the Wave Checker gets the oscilloscope capture, it automatically analyzes the signal, performing all the measurements and comparing them with the specifications limits. Debugging hints for Type A The PN5180 has a few registers and parameters to control the wave shape generated by the NFC chip and transmitted by the antenna. These are the most relevant ones: TX_CLK_MODE_RM (RF_CONTROL_TX_CLK register) Rise and Fall times (RF_CONTROL_TX register) TX_OVERSHOOT_CONFIG register From all the different test cases we will show how to debug the t3 and t4 test case as it is usually the most problematic. For this purpose, we will start from a certain configuration where the waveform tests show the following results, with a fail in the t3 and t4 test case. In order to tackle this problem, we will rely on the TAU_MOD_RISING parameter from the RF_CONTROL_TX register of the PN5180. In this case, as the timings are slightly above the maximum allowed in the specifications we will decrease the TAU_MOD_RISING 3 points and execute again the tests. The results after the modification show that all test are passing with a certain margin:   Another parameter that the PN5180 has and can be used for the waveform tests is the TX_CLK_MODE_RM parameter from the RF_CONTROL_TX_CLK register. Below you can see two graphs that clearly illustrate the effect of this parameter over the waveform.  As you can see from the two figures, by changing the default high impedance configuration of 001, to a low side pull configuration the waveform results in a smoother decay of the envelope. Type B tests For Type B waveform, the specifications define the following test cases:  TB121: Modulation Index TB122: Fall time TB123: Rise time TB124: Monotonic Increase TB125: Monotonic Decrease TB126: Overshoots TB127: Undershoots Again, these tests are based on the different parameters that can be identified for the modulation phase of the Type B commands: Debugging hints for Type B The register and parameters that the PN5180 includes to control the waveform for type B are: TX_RESIDUAL_CARRIER (RF_CONTROL_TX register) TX_CLK_MODE_RM (RF_CONTROL_TX_CLK register) TX_UNDERSHOOT_CONFIG register TX_OVERSHOOT_CONFIG register For Type B, we will study the modulation index test case, as it is the one that needs to be adjusted more often. In this case, we start from a situation where the device presents problems in the modulation index at 1 cm, with a value below the limit. In order to make corrections of the modulation index we will use the TX_RESIDUAL_CARRIER parameter from the RF_CONTROL_TX register. This parameter controls the amplitude of the residual carrier during the modulated phase. For the present problem, we will increase it by 4 points and rerun the test. As you can see in the picture below, the modulation index is within the specifications limits with margin.  Adaptative Waveform Control The PN5180 has another interesting feature called Adaptative Waveform Control that is used to set a different transmitter configuration depending on the gear and protocol used at any moment. This way we can easily debug by positions and use specific configurations for a certain group of positions without the need of rerunning all the tests for the rest of the positions. With the AWC feature we can control the: TAU_MOD_FALLING TAU_MOD_RISING TX_RESIDUAL CARRIER We can see in the table an example of an AWC configuration for Type B. Where we have changed the Residual Carrier from gear 2 onwards. As you can see, It is also configured with a change in the falling and rising times from Gear 1. As you can see this Adaptative Waveform Control feature along with the DPC represent a powerful tool to easily debug waveform tests without a change in the HW. Reception tests The reception tests purpose is to evaluate the ability of the device to identify and correctly demodulate the responses from the PICC when this response comes in the limits of the specifications for amplitude and polarity of the modulation.  Tests setup The tools and setup needed to debug the reception tests for EMVCo are depicted in the following figure: Oscilloscope to capture the signal received by the reference PICC. Arbitrary Waveform Generator to generate the response of the PICC. PC Software to control the AWG and load the EMVCo responses to the EMVCo reference PICC. For our case, we will use the Wave Player software from CETECOM. EMVCo reference PICC. This time, we will use the output J9 of the reference PICC to the oscilloscope to capture the command from the reader and trigger the injection of the response from the waveform generator to reference PICC, connected to J2. We should connect the waveform generator to the computer that has the Wave Player software installed to load the EMVCo responses. Performing tests As said previously, the reception tests aim at testing the ability of the device to correctly interpret the response when it is generated at the limit of the amplitude and polarity of the modulation. Considering the positive and negative polarity and the maximum and minimum amplitude of the modulation we have the following four test cases that are performed both for Type A and Type B: Tx131: Minimum positive modulation Tx133 - Maximum positive modulation Tx135 - Minimum negative modulation Tx137 - Maximum negative modulation To debug these tests with the PN5180 we will use: RX_GAIN (RF_CONTROL_RX register) RX_HPCF (RF_CONTROL_RX register) MIN_LEVEL (SIGPRO_RM_CONFIG register) MIN_LEVELP (SIGPRO_RM_CONFIG register) The procedure is basically to use the Waveplayer to set the amplitude and polarity of the response and check in the device is the response was correctly received and demodulated. Debugging hints To debug the reception we will test different configuration for the RX_GAIN and RX_HPCF parameters that control the reception filters, amplifier and ADC blocks from the receiver branch. These receiver blocks are pictured in the diagram below. Depending on the values used for the RX_GAIN and RX_HPCF parameters, the filter will be defined accordingly. The following table shows the filter characteristics in relation to those values: If we don’t find a correct value to pass the test at a certain position, we should modify the Rx resistor in order to increase or decrease the receiver sensibility. Adaptative Receiver Control In the same line as the Adaptative Waveform Control, the PN5180 includes the Adaptative Receiver Control that can be used to define different reception configurations depending on the gear and protocol used. With the ARC we can control all the registers involved in the reception and apply a correction to the preconfigured value depending on the gear used.  We can see an example of the Adaptative Receiver Control configuration in the following table, where we have defined a correction of -1 to the MIN_LEVEL and the HPCF parameters from gear 1. We can also see that the RX_GAIN parameter has a correction of +2 from gear 0. The ARC is very useful when we can't find a proper configuration for all positions and we need a different set of values depending on the positions tested. Rx Matrix tool Another interesting tool for debugging the reception tests is the Rx Matrix tool. This tool is used to launch and tests different receiver configuration in an automated way. The Rx Matrix tool is integrated into NXP's NFC Cockpit and you can control the Arbitrary Waveform Generator to set the amplitude of the modulation used for the tests. We can select which parameters we want to change and in which range we want them to be tested and the Rx Matrix will automatically run all the possible combinations in a sweep.   With the Rx Matrix tool, we can select the expected response and the number of iterations we want to try for every possible configuration. That way we can obtain a success ratio for the communication and easily identify the best configuration for the position tested. An example of the Rx Matrix is given in the figure below. We have fixed the RX_GAIN and RX_HPCF parameters and performed a sweep for the MinLevel, testing it from a value of 0 to 8. We have set the Rx Matrix to execute 50 iterations for every configuration, obtaining the success ratio results plotted below. As you can see the Rx Matrix along with a Waveform Generator is a powerful tool to find the optimum receiver configuration in a short time and in an effortless way. PN5180 Ecosystem The PN5180 comes with a complete and useful product support package including: The demokit, that can be used to get introduced to the product and check its features. The NFC Cockpit, that we have talked about during this article, and that represents a powerful tool to control the PN5180 with a very intuitive and useful interface. We srongly recommend that you integrate this tool in your final device as it may save you a lot of time during the debugging phase. A complete documentation including the updated product datasheet, or a set of application notes to guide you through all the designing process, from the antenna design guide to the DPC configuration or use of the Rx Matrix tool. Last but not least, the NFC Reader library which is the recommended software stack for NXP's NFC frontends and NFC controllers with customizable firmware. NFC Reader Library The NFC Reader Library comes with built-in MCU support, but it can also run on different MCU platforms, as well as non-NXP. The library has been built in such a way that you can adapt it and implement the required driver for your host platform. Other characteristics are: It is free of charge and you can download the latest release from NXP’s website. It is a complete API for developing NFC and MIFARE-based applications. Includes an HTML-based API documentation for all the components, which is generated from source-code annotations.  Finally, the release includes several examples and applications. Among the examples and applications included in the NFC Reader Library we can highlight two applications that are very useful for the preparation of the Device Test Environment required for the EMVCo certification:  The SimplifiedAPI_EMVCo for the digital testing The SimplifiedAPI_EMVCo_Analog for the Analog testing. You can control all the parameters involved in both applications using the phNxpNfcRdLib_Config.h configuration file. The identification and modification of these parameters should be very easy as the code is well documented, like you can see in the code chunk in the image: Further information You can find more information about NFC in: Our NFC everywhere portal: https://www.nxp.com/nfc You can ask your question in our technical community: https://community.nxp.com/community/identification-security/nfc You can look for design partners: https://nxp.surl.ms/NFC_AEC And you can check our recorded training: http://www.nxp.com/support/online-academy/nfc-webinars:NFC-WEBINARS Video recorded session
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