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LPCXpresso IDE - Latest Release : v8.2.2 To download installers for all platforms, please visit: http://www.nxp.com/lpcxpresso   For installation and migration hints and tips, please visit: Migrating to a new version of LPCXpresso IDE   Current release: LPCXpresso 8.2.2 (build 650) September 2016   Changes in this release include: Upgraded GNU tools to ARM launchpad GCC 5 update 2 Fixed issues with debugging FreeRTOS applications Fixed issue with startup code generated by the New Project Wizard for LPC177x_8x family Latest LP18xx/43xx LPCOpen packages included in Examples : https://community.nxp.com/community/lpc/blog/2016/09/02/lpc43xx-lpcopen-updates-are-here  New LPC8xx series "code bundles" added to Examples : LPC8xx family code example bundles  Previous releases: LPCXpresso 8.2.0 (build 647) July 2016   Changes in this release include: Upgraded GNU tools to ARM launchpad GCC 5 update 1 Updated supported C/C++ dialects in IDE preferences and wizards Fixed issue with optimization level of CM4/HardABI Redlib C library build Fixed issue with Redlib strncasecmp() function incorrectly matching for some input strings Corrected size of third RAM bank from 32KB to 16KB on LPC1820, LPC1810 and LPC18S10 Fixed issue causing some peripheral registers not to be displayed debugging LPC5411x MCUs Target CPU automatically selected if possible when debugging multicore MCUs, based on project's CPU settings New "Resume all" and "Pause all" buttons for multicore debug sessions Enabled disassembly view to show opcodes by making GDB alway return opcodes when CDT requests disassembly information. Fixed backtrace issue when debugging inside interrupt handlers Fixed issue with IDE failing to use selected GDB when debug launch configuration modified to use different executable Resolved Mac OS X specific issue with USB reenumeration which could cause a Linkserver crash Fixed issue where flash driver could start with incorrect XPSR and improved error reporting Added support for additional devices in SPIFI flash drivers Added SPIFI flash driver for use with LPC40xx family (see FAQ: LPC40xx SPIFI Flash Driver ) Updated LPC-Link2 CMSIS-DAP firmware to allow SWO Trace and power measurement to run at the same time. Also to provide an alternative firmware variant that provides higher priority for serial-VCOM data Fixed issue with SWO Trace which could trigger IDE crash if trace collected for long period of time Improved SWO Performance Counters view Fixed a Power measurement buffering issue which could result in upto 20 samples per 3k being overwritten with newer data.   LPCXpresso 8.1.4 (build 606) Mid March 2016   Changes in this release include: Fixed issue with some debugger writes to memory silently failing LPCXpresso 8.1.2 (build 603) March 2016   Changes in this release include: Fixed issue with IDE failing to boot debug Linkserver on certain non-English Windows variants Fixed issue triggering GDB to occasionally crash when debugging interrupt handlers Upgraded Eclipse to Mars SR2 (4.5.2) and CDT 8.8.1   LPCXpresso 8.1.0 (build 597) February 2016   Changes in this release include: Upgraded GNU tools to ARM launchpad GCC 5 Added support for LPC5411x devices Updated LPC-Link2 CMSIS-DAP firmware, providing probe serial number support and additional power measurement functionality Support for debugging via multiple LPC-Link2 probes concurrently using the latest CMSIS-DAP probe firmware All Cortex-M debug connections are now made via Redlink LinkServer Project wizard mechanism updated to add -fno-common compiler option and -print-memory-usage linker option to new projects IDE no longer compares Freemarker linker script with a linker script created by the pre-LPCXpresso IDE v7.90 linker script generator Makefile projects now correctly save MCU settings, including memory configuration and flash drivers (required for debugging) "Average Power" view added to compliment existing "Power Measurement Tool" view (for use with latest CMSIS-DAP firmware on LPCXpressoV3 boards) Fixed issue with GUI / command-line flash programmer when programming images with certain complex layouts Fixed issue when connecting in attach mode to LPC18xx/LPC43xx projects that use the Generic SPIFI flash driver Old SPIFI flash drivers for LPC18xx/LPC43xx removed and replaced by copies of the Generic SPIFI driver Documentation restructured, splitting the old User Guide up into several manuals Resolved issues with LPC-Link1 booting on Mac OS X 10.11 El Capitan.The use of Mac OS X 10.11.3 or later is recommended LPC-Link2 Redlink firmware is no longer provided or supported. Use the default CMSIS-DAP firmware instead "Red Trace" (SWO Trace via Red Probe+) is no longer supported. Use SWO Trace via LPC-Link2 instead   LPCXpresso 8.0.0 (build 526) November 2015   Changes in this release include: Upgraded Eclipse to Mars SR1 / CDT 8.8 (plus Java 1.8) Upgraded GNU tools to ARM launchpad GCC 4.9 update 3 Support for multiple flash drivers within a single project Generic SPIFI flash driver source project debug build fixed so that it will execute on parts with internal flash (and less RAM) SWO ITM Trace Console View added to provide printf support via ITM Stimulus Port 0 Fixed an issue triggering error dialogs when the "Terminate All" option was used for non-multicore debug sessions Updated Redlink server/CMSIS-DAP LPC-Link2 firmware to support ISP reset of target MCU (requires target hardware support) Restart button now enabled on Mac OS X by default Note: Restart workaround on Mac OS X (due to an issue with GDB) may leave an unknown "thread" in the debug view - hit terminate again to remove this. Last release to support LPC-Link2 Redlink firmware. Use the default CMSIS-DAP firmware instead Last release to support "Red Trace" (SWO Trace via Red Probe+). Use SWO Trace via LPC-Link2 instead   LPCXpresso 7.9.2 (build 493) September 2015   Changes in this release include: Various fixes and improvements for  Freemarker linker script templates: Fixed link templates for LPC29xx and LPC3xxx Added '__base...' symbols for each memory region Fixed reporting of template errors in headless builds Corrected base address of SRAM2 block for LPC1517/47 Fixed issue with multicore symbols being defined by the IDE for non-multicore parts in some circumstances Improved handling of debug termination to allow target to clean up Instruction trace and SWO trace updated to avoid conflicts when both are trying to use DWT comparators SCT code generation updated to support latest LPCOpen register names Fixed rare issue with creating activation serial number on Linux hosts The use of LPC-Link2 Redlink firmware is now deprecated, and support will be removed in a future LPCXpresso IDE release. Use the (now default) CMSIS-DAP firmware instead The use of "Red Trace" (SWO Trace via Red Probe+) is now deprecated, and support will be removed in a future LPCXpresso IDE release. Use SWO Trace via LPC-Link2 instead   LPCXpresso 7.9.0 (build 455) July 2015   Changes in this release include: Initial support for Windows 10 Upgraded GNU tools to ARM launchpad GCC 4.9 update 2 New Generic SPIFI flash driver mechanism, which will autoconfigure based on SPIFI device detected in target system Enhanced managed linker script template mechanism Known as Freemarker linker script templates Simplifies projects which relocate code from Flash to RAM Support for generating LPC MCU vector table checksums directly in the image, using the startup file and linker script "Active Config" is now the default for the indexer Fixes to Multicore projects Fixed data sections placement Slave image now has bss and noinit sections removed, as they are not required Fixed an issue that was preventing MTB trace with LPC82x parts Extended CMSIS-DAP JTAG support (for Cortex-M parts) to include Keil ULINK2/ULINK-ME probes   LPCXpresso 7.8.0 (build 426) June 2015   Changes in this release include: New SWO Interrupt Trace Graph and Table views (Pro Edition only) LPC-Link2 will now soft-boot with CMSIS-DAP rather than Redlink firmware by default Improved selection of JTAG vs SWD connections - requires launch configurations to be recreated Fixed an issue with flash programming occasionally failing to initialize or complete Fixed an issue with debugging of LPC11A parts through LPC-Link2 Fixed a problem with semihosting output for C++ projects Fixed an issue with reading and displaying unaligned data from the target Fixed an issue with making an attach-only debug connection Fixed an IDE hang if resuming a debug session mid-way through editing a peripheral register Performance improvements when displaying registers Optimized display of Peripherals when editing fields or registers It is now possible to add miscellaneous command-line options to the GUI flash programming dialog Fixed an issue with the reset target option not working when flash programming an AXF file Added path when disambiguating Launch Configurations Wizards now generate liblinks.xml 'smart update' file in library projects, which will still work after a project is renamed Code generated by LPCOpen project wizards now calls SystemCoreClockUpdate() in all cases, not just when linking to a board library For multicore-capable systems an LPCOpen project wizard-generated main.c now only calls Board_Init() for a master core and not for slaves. LPC43xx wizards now generate code using new-style multicore defines Fixed an issue with SymbolViewer not being able to display source for C++ symbols De-cluttered the toolbar by removing the duplicate quickstart toolbar (this can be re-enabled using the User Interface Enablement preferences)   LPCXpresso 7.7.2 (build 379) March 2015   Changes in this release include: Added support for LPC18Sxx and LPC43Sxx parts Upgraded Eclipse to Luna SR2 (4.4.2) and CDT 8.6 Added Technology Preview of SWO Trace support with LPC-Link2 (Redlink) Further major improvements to Flash Download performance Added "Terminate, Build and Debug" Quickstart button SPIFI flash drivers now check for recognised parts CMSIS-DAP support extended to allow multi-core and JTAG debug connections (where supported by probe implementation) Fixed issue with managed linker script for multi-core projects which caused misalignment of slave data section Added support for M4 multi-core projects to use HardABI floating point variant Redlib realloc() fixed to handle heap memory becoming exhausted The LPCXpresso54102 board Power measurement tool is now included   LPCXpresso 7.6.2 (build 326) February 2015   Changes in this release include: Fixed managed linker scripts for GCC 4.9 NewlibNano library names Stopped tracking project selection in Symbol Viewer Added toolbar button for hide/show Red Trace views. Note that a restart of LPCXpresso is required after showing these views before Red Trace can be used. Fixed problem with MCU settings not being saved if changed by using the Quickstart Panel's Edit project settings button Display target chip and core type alongside executable name in Debug View   LPCXpresso 7.6.0 (build 321) January 2015   Changes in this release include: Upgraded GNU tools to ARM launchpad GCC 4.9 Significantly improved flash programming performance across all Cortex-M targets and debug probes Support for additional SPIFI flash parts based on latest LPCSPIFI Library v1.03 Added new Symbol Viewer feature to display the symbols in an object/library/executable Redlink firmware enhanced to improve performance and provide bridging capabilities similar to latest CMSIS-DAP Managed linker scripts now contain start and end symbols for all data and bss sections Improved highlighting of changed registers when single stepping Change colors of stub console messages - dark yellow for warnings and green for information Added support for m0 small-multiplier Redlib now implements single precision fmodf() in math.h Redlib free() will now coalesce with any consecutive free blocks Fixed problem with assembler -D option when selecting No library headers Fixed issue with Memory Configuration Editor when merging memory blocks during import Fixed issue with semihosting SEEK operation (affecting Redlib and Newlib fseek()) always resetting to the start of the file Fixed linker script generation for Internal builder Fixed display of second core index for LPC5410x part (from 16->1) Fixed Build All Projects if no project selected Fixed target connection sequence to avoid timeout when downloading very large applications   LPCXpresso 7.5.0 (build 254) November 2014   Changes in this release include: Upgraded Eclipse to 4.4.1 ('Luna SR1') and CDT to v8.5.0. Upgraded GNU tools to ARM launchpad GCC 4.8 update 3. Added support for LPC5410x devices. Default optimisation level reverted to -O0 (rather than -Og) for Debug builds. LPC18/43 project wizards now provide access to Memory Configuration Editor. Add ability to Merge memory configurations and join contiguous memory blocks in Memory Configuration Editor. Enhanced link-time-optimisation (LTO) options. Disable "Set library type" on projects where it is not applicable. Added a default workspace location for Linux. Redlib string.h functions extended to include implementations of (non-ANSI-standard) strcasecmp() and strncasecmp(). Fixed very rare cause of hard fault in Redlib malloc(). Prevented changing Peripheral registers while target is running. Fixed a problem preventing debug display of arrays within a structure within a union. Fixed issue with viewing of byte-sized peripheral registers, such as CM3/CM4 NVIC priority registers. Fixed issue with writing to byte-sized variables/registers. LPCXpresso 7.4.0 (build 229) September 2014   Changes in this release include: Support for LPC82x family. Upgraded to latest Eclipse release (4.4 'Luna') and CDT 8.4. This fixes a number of display problems with complex datastructure variables. Several improvements have been made to the Opcode display in the disassembly view. Opcodes can be displayed by right-clicking in the disassembly view margin and selecting 'Show Opcodes'. Eclipse Luna requires Java 7, which is installed on all platforms in the 'jre' subdirectory. This is independent of the 'System' Java installation, which is not affected. Disabled inline editing of the Pre/Post build steps and forced editing via a dialog. Peripherals displayed in Memory View now display hexadecimal, decimal, and binary in hover for 'numeric' values. Tidied up the toolbar to remove little-used buttons (which are still available in the Quickstart panel). Added new preprocessor defines for multicore projects. LPCOpen Project wizards will now prepopulate the chip library name where possible. Cleaned up inconsistencies in various Redlib header files. Redlib memcpy and related functions now avoid use of unaligned LDR/STR instructions on Cortex-M3/M4. Fixed various single-precision Redlib math.h functions. Fixed a peripheral problem with LPC11U6x/11E6x GPIO word registers. LPCOpen code bundles are now shipped inside the Examples subdirectory, though users are recommended to check LPCware.com for the latest versions. Absolute rather than relative paths are now used in the debugger for breakpoints by default for new workspaces. The default make command is now 'make -r', which should reduce build times, particularly on Windows. Added new Quick Settings menu for changing a project's FP type. Fixed a flash programming issue for LPC15x7 parts. Fixed a flash programming issue for certain LPC21xx/22xx parts. Updated SPIFI flash drivers based on LPCOpen 'LPCSPIFI' library to use v0.07, adding drivers for more SPIFI devices Improved support for the 'Dark' Theme. Now possible to modify the start address of the heap without modifying linker scripts/templates Mac OS X 10.7 (Lion) is no longer an officially supported platform. LPCXpresso may continue to work on Mac OS X 10.7, but this can no longer be guaranteed. LPCXpresso is no longer tested on Mac OS X 10.7.   LPCXpresso 7.3.0 (build 186) July 2014   Changes in this release include: Upgraded GNU tools to ARM launchpad GCC 4.8 update 2 Run->Debug As... now works correctly for MCU targets Fix problem that caused CMSIS-DAP to not be available for some targets Correctly terminate Redlink Server after using the Flash Utility Updated LPC15xx startup code generated by new project wizards to match interrupt handler names used by LPCOpen. LPC43xx M0 startup code no longer references systick (which is only implemented on M4 cpu in LPC43xx MCUs, not M0 cpus). Fixed issue with LPC43xx (Cortex-M0 basic) wizards failing to create startup file. Quickstart Debug button now respects the build setting in the launch configuration Additional LPC18/43 SPIFI flash drivers supplied, based on LPCOpen lpcspifilib. C Library memory allocator no longer checks new heap end against current stack pointer. New "boot_link1" and "boot_link2" scripts available on all platforms for downloading probe firmware from command line. Peripheral rendering "Refresh" option now forces re-read from target. Peripheral register fix for LPC15xx GPIO port word pin registers.   LPCXpresso 7.2.0 (build 153) May 2014   Changes in this release include: Improvements to reliability of Redlink server connections Add __MULTICORE_type pre-processor symbol to compiler for multicore projects Project wizards now place default main() into projname.c rather than main.c On Mac OS X, prevent occasional hang during Debug Probe discovery On Windows, the debug drivers are now built with Visual Studio 2013 to increase compatibility with latest version of Windows. Remove crt_directory.xml to build parts database dynamically at runtime     LPCXpresso 7.1.1 (build 125) April 2014   This is a bug fix release that solves a problem found in the initial release of v7.1.0. Fixed in this release are: Fix problem affecting LPC-Link2 debug connections to Cortex-M0+ cores Fix regression preventing debugging with CMSIS-DAP Fix for a Red State UI regression which prevented users from graphically adding an output pin to a signal     LPCXpresso 7.1.0 (build 122) April 2014   Changes in this release include: Upgraded IDE to Kepler SR2 and CDT 8.3 Upgraded GNU tools to ARM launchpad GCC 4.8 update 1 Fixed problem with C/C++ indexer being disabled on startup Further reliability improvements with LPC-Link2 connections Default optimisation level is now -Og for Debug builds Improvements to Create Binary option to allow multiple commands (for example checksum the created binary) Improved NVIC/SCB peripheral displays Added preference to display peripheral registers with leading zeroes Added preference for the array "chunk" size in variable and expression views Fixed issue with instruction trace when restart carried out Redlib limits.h updated for when compiler configured to treat unspecified chars as signed (instead of default of unsigned) Redlib now implements integer only version of vprintf() as well as floating point compatible version The wrench overlay icon is now correctly displayed on a file/folder with local build settings Prevent a Redlink Server debug session on a target that is already being debugged Updated RAMFUNC definitions provided by cr_section_macros.h Note: Due to the imminent discontinuation of support by Microsoft, Windows XP is no longer an officially supported platform. LPCXpresso may continue to work on Windows XP but this can no longer be guaranteed. LPCXpresso is no longer tested on Windows XP.   LPCXpresso 7.0.2 (build 102) March 2014   Note - there is a know issue with the indexer in v7.0.2. This can be fixed by a simple change to a configuration file. For details see here.   Changes in this release include: Fixed problem with setting breakpoints on Windows with source paths containing spaces Fixed problem with Memory Configuration editor losing changes Debugging of LPC12xx and LPC11A02/LPC11A04 are now supported with LPC-Link2 mproved reliability of LPC-Link2 when downloading large images SCT code generator version updated to 2.6: switched from using register names that are undocumented on some parts, e.g. CAP_L[0] to CAP[0].L. Users should regenerate their SCT code Managed linker script support for placing specific functions into RAM Fixed display of memory if first displayed when target is executing   LPCXpresso 7.0.0 (build 92) February 2014   Major new release with features including: Support for latest NXP MCUs (including LPC1500) New release of the GNU compilers – v4.8.3. Includes new ‘general’ optimization level, -Og. This new optimization level, aims at providing fast compilation, a superior debugging experience and reasonable runtime performance. Adds Link Time Optimization (LTO). This allows all the different compilation units that make up a single executable to be optimized as a single module (not suitable for debugging). Inclusion of a new small-footprint variant of the Newlib C and C++ library, known as NewlibNano. Use of this library can result in significantly smaller code size, especially of C++ applications. Note that further details on the use of these new options can be found in the compiler documentation that is provided in the IDE help system.] New release of the base Eclipse IDE – Kepler (v4.3). The Managed Linker script mechanism has been extended to support the features of new GNU compiler. 'New project' wizards can now invoke import wizards directly to allow importing of library projects required in creating of new project. gdbserver debug connections enabled -> Enables use of Segger J-Link.   LPCXpresso 6.1.4 (build 194) January 2014 Changes in this release include: Added support for LPC11U6x. Fixed profile and interrupt trace on LPC13xx (12-bit ADC) parts Fixed regression introduced in 6.1.2 where a wizard-generated dual-core slave startup file failed to compile Removed display of CRP option in the wizard for creating dual-core slave apps Fixed various file resource leaks in the IDE; ensure temporary files are cleaned up on exit Fixed linker script generation for LPC1102/1104 Startup files fixed for various parts to prevent name mangling issues in C++ projects Corrected flash driver references for certain LPC11A, LPC11E, LPC11xxLV parts Redlink connections now display correct debug protocol in debug log In project wizards, LPCOpen wizards are listed first if available LPCOpen project wizards for LPC13xx, LPC175x_6x, LPC177x_8x, LPC407x_8x now provided LPCOpen packages can now be browsed from the Import Project page CGU related updates to LPC18/43 CMSIS driver libraries (Windows) Rebuilt version of make provided (Linux) Added new udev rules for CMSIS-DAP probes   LPCXpresso 6.1.2 (build 177) December 2013 Changes in this release include: Added support for LPC11x37H parts including support for IOHandler. Added LPCOpen V2 project wizards for LPC18 and LPC43 families Fixed issue where not all slaves were displayed in the linker properties of a MultiCore project Added missing breakpoint/watchpoint menu items while debugging in the Develop perspective Fixed issue where Watchpoints not trapping with Redlink Fixed issue where Hard fault not trapped / VectPC updated with Redlink Fixed issue with Cycle count registers broken on LPC43xx using an LPC-Link2 Fixed failure of LPC12 project wizards to set "__DISABLE_WATCHDOG" symbol On Windows 8, use the LPC-Link1 WinUSB driver instead of HID   LPCXpresso 6.1.0 (build 164) Late October 2013 Changes in this release include: Introduced Red Trace SWV support for Red Probe+ Fixed issue connecting to a third core when debugging LPC4370 Extended range of prebuilt LPC18/43 SPIFI flash drivers Fixed problem with Watchpoints not being cleared Corrected debug startup with Red Probe+ when more than one FTDI-based device is present Fixed possible null pointer exception after editing memory configuration Fixed lost highlight when using keyboard to scroll through MCU selection Windows) Updated dfu-util/libusb to support additional USB3 hubs   LPCXpresso 6.0.4 (build 159) Early October 2013 Changes in this release include: Added support for ULink-2 CMSIS-DAP interface Fixed display of C++ global variables in Expression view Prevents use of JTAG for CMSIS-DAP connections (it is not currently supported) Added missing launch shortcut preventing display of correct launch config in Run/Debug Settings dialog Stopped display of debug probes when deleting JTAG configuration Fixed display of multiple debug probes reported by Redlink Server "Quickstart->Build all" now works when no projects are selected Fixed problem with memory configurations not being stored correctly Fixed Redlib problem with free() of null pointer Added c++0x and gnu++0x C++ compiler dialect options   LPCXpresso 6.0.2 (build 151) September 2013 LPCXpresso Forum
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DES-N1849 多核 ARM ® v8 QorIQ 处理器中的异常处理 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 了解ARM®v8异常水平处理(ELO至EL3),以及基于最新的QorIQ LS系列处理器的通用中断控制器v3 (GICv3)逻辑在预封装的Linux SDK环境之外使用具有挑战性。 本次演示将介绍如何配置分发器(GICD)、再分发器(GICR)、CPU接口(ICC_*_EL*)和ARM内核,以处理专有外设中断(PPI)和软件触发的中断(SGI)。 它将用于嵌入式开发人员编写异常处理程序,以及被缩略词弄糊涂的任何人。 CodeWarrior将用于显示异常处理项目示例。 观看视频演示 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 了解ARM®v8异常水平处理(ELO至EL3),以及基于最新的QorIQ LS系列处理器的通用中断控制器v3 (GICv3)逻辑在预封装的Linux SDK环境之外使用具有挑战性。 本次演示将介绍如何配置分发器(GICD)、再分发器(GICR)、CPU接口(ICC_*_EL*)和ARM内核,以处理专有外设中断(PPI)和软件触发的中断(SGI)。 它将用于嵌入式开发人员编写异常处理程序,以及被缩略词弄糊涂的任何人。 CodeWarrior将用于显示异常处理项目示例。 观看视频演示 设计 | 软件与服务
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FTF-ACC-F1276.pdf This session will explain how Freescale can enable customers to develop 76-81 GHz short and long range radar applications using the MPC577xK MCU, it will explain the concepts of the radar algorithms, including practical aspects such as SDADC or MIPI CSI sampling, Chirp Generation, Data Compression, R,V FFT, Detection and Tracking algorithms, and the benefits of the new Freescale IP that can allow them to improve their system resolution and accuracy. In this session customers will take away a detailed understanding of how to develop fast modulation radar systems using the MPC577xK MCU including the BOM cost advantages it also brings. This session will explain how Freescale can enable customers to develop 76-81 GHz short and long range radar applications using the MPC577xK MCU, it will explain the concepts of the radar algorithms, including practical aspects such as SDADC or MIPI CSI sampling, Chirp Generation, Data Compression, R,V FFT, Detection and Tracking algorithms, and the benefits of the new Freescale IP that can allow them to improve their system resolution and accuracy. In this session customers will take away a detailed understanding of how to develop fast modulation radar systems using the MPC577xK MCU including the BOM cost advantages it also brings.
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FTF-IND-F1348 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本课程基于 FRDM-K22F 开发板和多功能新型 Arduino 兼容 Shield,讨论如何实现:使用 Kinetis K2 和 LS Research 预认证的 Wi-Fi(TiWi-CW)和 BLE(SaBLE-x)无线模块的物联网应用。使用 TiWiConnect LIFT 软件协议流式传输到云端(大大简化了软件开发)。使用与 Freescale Freedom 板连接的第三方 Pmod 兼容(I2C 和 SPI)板进行传感器和 I/O 扩展。使用加速软件开发和预认证无线模块,加快您的物联网产品的上市时间。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 本课程基于 FRDM-K22F 开发板和多功能新型 Arduino 兼容 Shield,讨论如何实现:使用 Kinetis K2 和 LS Research 预认证的 Wi-Fi(TiWi-CW)和 BLE(SaBLE-x)无线模块的物联网应用。使用 TiWiConnect LIFT 软件协议流式传输到云端(大大简化了软件开发)。使用与 Freescale Freedom 板连接的第三方 Pmod 兼容(I2C 和 SPI)板进行传感器和 I/O 扩展。使用加速软件开发和预认证无线模块,加快您的物联网产品的上市时间。
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MQX FlashXドライバー – FlexNVMの書き方は? <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 1. FlexNVMとFlashXに関する基本的な質問と回答をいくつか紹介します。 1.1 FlexNVMとは何ですか? FlexNVMは、データフラッシュとして、エミュレートされたEEPROMの不揮発性ストレージとして、または両方のオプションの組み合わせとして使用できるフラッシュメモリの追加の個別のブロックです。このドキュメントでは、最初のオプションであるFlexNVMが単にデータフラッシュとして機能することに焦点を当てます。 FlexNVMは、部品番号の専用箇所に「X」を含むMCU部品に含まれています。例えば: MK64FX512VMD12 には、1 ブロック (512 KB) のプログラムフラッシュと 1 ブロック (128 KB) の FlexNVM が含まれています。 MK64FN1M0VMD12 には、2 ブロック (各 512 KB) のプログラムフラッシュのみが含まれています。 FlexNVMとフラッシュブロックの詳細については、MCUリファレンスマニュアルを参照してください。たとえば、「フラッシュメモリサイズ」の章です。 1.2 FlashXとは何ですか? MQX FlashXドライバは、内部フラッシュへの書き込みと内部フラッシュからの読み出し機能を提供します。残念ながら、FlexNVM メモリはデフォルト ステートでは部分的にしかサポートされておらず、一部の BSP ではエミュレートされた EEPROM の設定と機能が実装されています (flexnvm サンプル コード)。詳細については、c:\Freescale\Freescale_MQX_4_2\doc\mqx フォルダの MQX_IO_User_Guide.pdf を確認してください。 1.3 FlexNVMを搭載したマイコンを搭載した自分のボードで、FlexNVMのないマイコン用BSPを使用できますか? お勧めしません。ただし、この BSP を独自のボード BSP のベースとして使用することができます。MQX_BSP_Cloning_Wizard_Getting_Started.pdfご確認ください。ドキュメントをC:\Freescale\Freescale_MQX_4_2\docフォルダにMQX_BSP_Porting_Guide.pdfおよびMQX_BSP_Porting_Example_User_Guide.pdfします。 1.4 KSDKプロジェクトでFlashXを使用できますか? 残念ながら、FlashXドライバはKSDKに実装されていませんでした。KSDKには、C90TFS/FTFxフラッシュファミリ用の独自の標準ソフトウェアドライバ(SSD)が含まれていますが、これはFlashXドライバの場合のような高レベルの抽象化レイヤーがない低レベルのドライバです。 2. FlexNVMをサポートするためのMQX FlashXドライバーのアップデート手順。 2.1これらのファイルをバックアップしてください: user_config.h、 .h 、init_flashx.c、flash_ftfl.c と flash_ftfe.cファイル。注: user_config.h、 .h および init_flashx.cBSPコードの一部です。 2.2 user_config.h で FlashX を有効にする定義によるファイル: #define BSPCFG_ENABLE_FLASHX 1 2.3 .h の更新ファイル: 2.3.1 MCUリファレンスマニュアルを確認し、必要に応じてBSP_INTERNAL_FLASH_BASE、BSP_INTERNAL_FLASH_SIZE、BSP_INTERNAL_FLASH_SECTOR_SIZEを更新してください。通常、FlexNVMのないBSPが自身のBSPのベースとして使用された場合は、BSP_INTERNAL_FLASH_SIZEを減らす必要があります。 2.3.2メモリマップでFlexNVMを定義する新しいマクロを追加します。例えば: #define BSP_INTERNAL_FLEXNVM_BASE 0x10000000 #define BSP_FLEXNVM_SECTOR_SIZE 0x400 #define BSP_INTERNAL_FLEXNVM_SIZE 0x00008000 2.4 BSPフォルダの init_flashx.c を更新します。 2.4.1 FlexNVMファイルブロックを_bsp_flashx_file_blocks[]テーブルに追加します。例えば:     データフラッシュファイルブロック { "dflash", BSP_INTERNAL_FLEXNVM_BASE, (uint32_t) (BSP_INTERNAL_FLEXNVM_BASE+ BSP_INTERNAL_FLEXNVM_SIZE - 1) }, パラメータは{ファイルブロック名、開始アドレス、終了アドレス}です。 注:これは純粋なソフトウェアインターフェースです。アドレスの範囲は、物理フラッシュ ブロック パラメーターに合わせる必要はありません。必要に応じてファイルブロックを整理できます。 2.4.2FlexNVM BSP をベースとして非 FlexNVM BSP を使用していた場合は、KinetisX デバイスの HW ブロック マップを変更する必要があります。_bsp_flashx_init構造で_flashx_kinetisN_block_mapを_flashx_kinetisX_block_mapに変更してください。 2.5 flash_ftfl.c または flash_ftfe.c を更新するファイル: 2.5.1 お使いのMCUにFTFLまたはFTFEフラッシュメモリモジュールがあるかどうかをMCUリファレンスマニュアルを参照し、編集する適切なファイルを選択してください。 2.5.2FlexNVMメモリブロックを_flashx_kinetisX_block_map[]テーブルに追加します。例えば: { BSP_INTERNAL_FLEXNVM_SIZE / BSP_FLEXNVM_SECTOR_SIZE, (_mem_size) BSP_INTERNAL_FLEXNVM_BASE, BSP_FLEXNVM_SECTOR_SIZE }, // FlexNVMブロック パラメータは{number of sectors, start address, sector size}です。 注:これは、物理ハードウェアメモリブロックの説明です。アドレスの範囲は、物理フラッシュ ブロック パラメーターに適合する必要があります。 2.5.3次に、FlexNVMアドレスの問題を修正する必要があります。プログラムフラッシュとFlexNVMフラッシュはFTFE_FCCOBn FTFL_FCCOBnどちらも、FCCOB1..FCCOB3には、24ビット形式のアドレスが含まれています。したがって、FlexNVMアドレスを直接操作することはできません - FlexNVMベース0x10000000のため、24ビットに収まりません。 FTFL/FTFE モジュールでは、24 ビット アドレスの最上位ビット (ビット 23) がプログラム フラッシュと FlexNVM フラッシュの区別に使用されるように指定されています。たとえば、次のようなコードを使用できます。 FlexNVMフラッシュアドレスのときに23ビットを設定 IF(write_addr & BSP_INTERNAL_FLEXNVM_BASE)     { write_addr = write_addr |(1<<23);     }   そして、このコードを必要な関数に追加してから、command_array[]に書き込みます( command_array[] の内容はFTFL_FCCOBn/FTFE_FCCOBnレジスタの埋めに使用されます)。 FlashXサンプルコードの基本的な作業には、少なくともftfl_flash_erase_sector()/ftfe_flash_erase_sector()およびftfl_flash_write_sector()/ftfe_flash_write_sector()関数を更新する必要があります。 2.6.これらの変更後、flash_demo.c で FlashX のサンプルコードを使用してみてくださいデフォルトのプログラムフラッシュファイルブロックの代わりにFlexNVMファイルブロックを開くだけです。例えば: #define FLASH_NAME 「flashx:bank0」 #define FLASH_NAME「flashx:dflash」 添付ファイルには、MQX4.2.0およびMK20DX72 MCUの変更例があります。 3.フラッシュの書き換え方法 - 一般的な注意事項: フラッシュ・データは、プログラミングされる前に消去済みの状態にある必要があります。 ビットの累積的なプログラミング(より多くのゼロの追加)は許可されません。 FTFLモジュールとFTFEモジュールの両方の場合、整列されたフレーズ(通常は64ビット)でフラッシュをプログラムします。より小さなチャンク(バイト単位など)でプログラムが必要な場合、FTFLモジュールでは、推奨されていなくてもこのフレーズに書き込むことができます。ただし、FTFEモジュールは、同じフレーズに2回目の書き込みを行うとバス障害を引き起こします。したがって、すでに書き込まれたFTFEフレーズのデータを変更する方法を保存する方法は、セクター全体を消去してデータを書き換え直すだけです。そのため、FTFEモジュールにはioctlコマンドFLASH_IOCTL_ENABLE_SECTOR_CACHEを使用してください。セクタ キャッシュの割り当ては、フル セクタ書き込みと、デスティネーション領域 (フレーズに揃えられた) が空白の部分的なセクタ上書きの場合には必要ありません。 Re:MQX FlashXドライバ - FlexNVMの書き方は? <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> こんにちはシュリダール、 FlexNVM の場合: flash_ftfl.cの_flashx_kinetisX_block_map[]テーブルも編集する必要がありますファイルを作成し、FlexNVMブロックの説明を追加します。 FlexRAM の場合: 電源を切る前にフラッシュ/クローズ機能を使用しましたか? FlexRAMの使用例については、c:\Freescale\Freescale_MQX_4_2\mqx\examples\flexnvmを参照してください。 EEPROM エミュレーションを有効にするまで、ターゲットの FlexRAM メモリ範囲は「標準」RAM のように機能します。 もちろん、FlexNVMメモリをデータフラッシュとして使用するか、エミュレートされたEEPROMとして使用するか、FlexNVMメモリを2つのセクションに分割して両方のオプションを使用するかを選択する必要があります(その場合、メモリ範囲はそれに応じて更新する必要があります)。 いずれにせよ、空のMCUをデフォルト設定のFlexNVMメモリはデータフラッシュとして、FlexRAMは「標準」RAMとして使用できます。エミュレートされたEEPROM(FlexRAM)を使用する場合は、FlexNVMメモリを設定する必要があります(Program PartitionコマンドおよびSet FlexRAM Functionコマンド)。flexnvm サンプルコードを参照してください...
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KSDK发布的内容 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> Kinetis SDK v2 现已推出! Kinetis SDK v2 简介 KSDK 的第一步 如何开始使用 KSDK * 已发布示例列表: KSDK示例列表* 已发布文件清单: KSDK 文件清单* *以上所有源代码仅供示例使用。恩智浦不对用户应用程序中使用这些代码承担任何责任。 概述
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FreeRTOS 与 MQX RTOS 的快速概述 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> FreeRTOS 与 MQX RTOS 的快速概述 MQX实时操作系统是专为单处理器、多处理器和分布式处理器嵌入式实时系统设计的。飞思卡尔半导体公司在其微处理器中采用了该软件平台。这包括 Kinetis、Coldfire、PowerPC、ARC、ARM、StrongARM、xscale CPU。MQX RTOS 的主要特点是可扩展的大小、面向组件的架构和易于使用。 FreeRTOS 是一种流行的嵌入式设备实时操作系统内核,已移植到 35 种架构。它在 GPL 下分发,但有一个可选例外。FreeRTOS 占用空间非常小,开销很低,执行速度非常快。内核本身仅由三或四个 C 文件组成。最少 4-8k 字节闪存。 类似功能:[待完成] 任务、事件、信号量、互斥量、消息队列、空闲省电                                                                  Freertos 的独特功能: 1 任务通知:每个 RTOS 任务都有一个 32 位通知值,该值在创建 RTOS 任务时初始化为零。RTOS 任务通知是直接发送给任务的事件,可以解除对接收任务的阻塞,并可选择更新接收任务的通知值。 2 递归互斥锁:递归使用的互斥锁可以被所有者反复“获取”。直到所有者为每次成功的 xSemaphoreTakeRecursive() 请求调用 xSemaphoreGiveRecursive() 之后,互斥锁才会再次可用。例如,如果某个任务成功“获取”同一个互斥锁 5 次,则该互斥锁将无法供任何其他任务使用,直到该任务也将互斥锁“归还”5 次为止。 3 堆栈溢出钩子/通知:每个任务维护自己的堆栈。任务堆栈使用的内存在任务创建时自动分配,并由传递给 xTaskCreate() API 函数的参数确定大小。堆栈溢出是导致应用程序不稳定的一个常见原因。因此,FreeRTOS 提供了两种可选机制,可用于协助检测和纠正此类事件 4 延迟中断处理:从应用程序中断服务程序中使用,将功能的执行延迟到 RTOS 守护进程任务。提供了一种机制,允许中断直接返回到随后将执行挂起功能的任务。这使得回调函数能够与中断连续执行 - 就像回调在中断本身中执行一样 5 多个对象上的阻塞:队列集是 FreeRTOS 的一项功能,它使 RTOS 任务能够在同时从多个队列和/或信号量接收时阻塞(挂起)。队列和信号量被分组为集合,然后,任务不再阻塞在单个队列或信号量上,而是阻塞在集合上。 MQX 的独特功能: 1 基于所有权的资源破坏:[待完成] 2 名称服务:任务可以将一个 32 位数字与一个字符串或符号名称关联起来。MQX RTOS 将这种关联存储在名称数据库中,该数据库中的所有任务 处理器可以使用。数据库避免使用全局变量。 3 处理器间通信:应用程序可以在多个处理器上同时运行,每个处理器上都有一个 MQX RTOS 的可执行映像。图像使用由内存或通过处理器间通信的通信链路传输的消息进行通信和协作。每个图像中的应用任务不必相同,而且实际上通常是不同的。 4 看门狗:看门狗是可选组件,可让用户检测任务级别的任务饥饿和死锁情况。 5 任务队列调度:您可以使用任务队列来显式调度任务,或创建更复杂的同步机制。由于任务队列提供的功能很少,因此速度很快。应用程序可以在创建任务队列时指定先进先出 (FIFO) 或循环 (Round Robin) 调度策略。
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DAC PDB DMA Vybrid The attached project shows a configuration for the DAC and its functionality is explained in the below points: The PDB triggers the next DAC conversion. The DAC features an internal buffer (DAC_DATx) that contains that data to be converted. The DAC data to be converted is determined by  an internal pointer. This internal pointer increases or moves to the next element in the buffer on every PDB trigger The DAC uses the Data Buffer as normal mode. This means that the buffer works as a circular buffer. When the internal pointer reaches some point in the internal buffer, the DMA is triggered and it transfers the new data from an iRAM buffer to the DAC internal buffer. In this specific example the DMA treats the source as a circular buffer, because the source buffer size is 512 bytes but the destination (DAC_DATx) buffer is 8 bytes. The below figure represents the configuration of the example: The frequency of each output sample is determined by the source frequency of the PDB and the DACINT value. Sample_Output_Frequency =  Source_Frequency/ [(PDB_MULT * PDB_PRESCALER) * (DACINT + 1)] In the attached example the Bus Clock = 66MHz., PDB_MULT = 1 ,  PDB_PRESCALER = 128, DACINT = 63 For the 256 elements to convert the frequency of the output signal is 31.47Hz. (Sine Wave) VF6xx
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S32K144芯片的时钟配置问题,更改时钟后定时周期出现变化 我在开发S32K144过程中遇到了如下问题: 这个定时器的初始化  计数中断溢出周期应该是1s   前提是我的  时钟配置是8M的时钟 但是当我更改时钟为  20M的时钟之后 我发现我的定时溢出周期  不是1s了  而变成了400ms    但是我的  定时器  时钟选择还是  8M的内部时钟   PCC->PCCn[PCC_FTM1_INDEX] |= PCC_PCCn_PCS(0x01) /* Clock src=1, 8 MHz SIRCDIV1_CLK */ | PCC_PCCn_CGC_MASK; /* Enable clock for FTM regs */ 我不清楚是哪里没有配置导致这个问题出现 Re: S32K144芯片的时钟配置问题,更改时钟后定时周期出现变化 HI 建议看一下S32K1 RM的表27-9。外设模块时钟(续),FTM具体选择哪个时钟源需要查看FTMn_SC[CLKS]和29.6.17 PCC FTM1寄存器(PCC_FTM1)的PCS位。 您用Processor Expert生成配置,又用裸机方式直接操作注册。我是否不确定是因为调用了SDK里的API导致和您的裸机程序冲突了。建议调试情况下直接检查上述两个注册。 顺便提一下,baremetal直接操作注册的话建议参考S32K144_Project_FTM例程,如果想用ProcessorExpert搭配SDK的API则建议参考ftm_periodic_interrupt_s32k144例程。 此致敬礼, Robin
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FRDMPKPT2000EVM 上的 INJ1 和 INJ3 波形不同——如何使它们保持一致? 大家好, 我目前正在使用 S32K144-Q100 板和 FRDMPKPT2000EVM,运行 S32K144_PT2000_EXAMPLE 项目来驱动 Bosch HDEV 5.1 喷油器(1.5Ω,峰值保持型)。 问题: INJ1 和 INJ3 的电流波形不同。这两个喷油器是同一型号,并且连接到同一种负载。 我已经尝试过: 在主函数中,我调用了 send_single_PT2000_SPI_Cmd(WRITE, ch1_ctrl_reg_uc0, 0x00); 和 send_single_PT2000_SPI_Cmd(WRITE, ch1_ctrl_reg_uc1, 0x00); – 波形没有变化。 我将 PT2000_ch1_config[20] 中的 flash_enable(地址 0x100)的值更改为 0x0008 – 仍然没有变化。 我的问题: send_single_PT2000_SPI_Cmd(WRITE, ch1_ctrl_reg_uc0, 0x00); 的目的是什么? 为什么 INJ1 和 INJ2 的波形相同,而 INJ1 和 INJ3 的波形不同? 我需要添加或修改哪些代码才能使 INJ3 与 INJ1 匹配? 非常感谢您的指导! 提前感谢! D1ego PT2000 FRDMPKPT2000EVM Re: INJ1 and INJ3 waveforms differ on FRDMPKPT2000EVM – how to make them consistent? 你好 D1ego, 该命令 send_single_PT2000_SPI_Cmd(WRITE, ch1_ctrl_reg_uc0, 0x00) 仅控制微核行为(启用/RESET/覆盖)。 它不定义喷油器电流波形,因此预计不会有明显的改变。 在 PT2000 中,喷油器输出由分组到库中的微核控制(具有独立的代码/数据 RAM)。 → 不同的库可以运行不同的我的。请参考AN5186 。 在示例项目中: INJ1 和 INJ2 共享同一个库/微码 → 波形相同 INJ3 被分配到不同的库 → 不同的波形 因此,这种行为是预期之内的,并非故障所致。 使 INJ3 与 INJ1 匹配: 确保 INJ3 使用与 INJ1 相同的配置和微码: 复制相应的数据 RAM 配置(PT2000_chX_config[]) 确保为该银行加载相同的微码 最诚挚的问候, 约瑟夫
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PN76xx - ULPCD Checklist As described in ES_PN7642 and AN15028 , the IC might rarely enter into a non-responsive state during ultra low-power card detection (ULPCD).  If there is a suspicion that the IC enters this state, NXP has provided a checklist to verify and confirm it. See the checklist in the attachment.  NFC Controller Solutions
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S32K344 Mini-EVB 上的以太网引脚冲突 您好,团队、 我正在使用S32K344 Mini-EVB进行以太网连接活动。从用户手册中我可以看到,PTD16 引脚用于 MDC,PTD17 引脚用于 MDIO。但当我在 S32DS 中进行以太网引脚配置时,我看到 PTD16 只能路由到 MDIO,而 PTD17 则路由到 MDC,而且我还从 S32K344_IOMUX 中验证了这一点,从该 excel 中我还可以看到 PTD16 --> MDIO 和 PTD17 --> MDC。 那么,用户手册文件中是否有错误,如果有,是否会影响以太网通信。 Re: Ethernet Pin Conflict on S32K344 Mini-EVB 你好@MySterio_1、 是的,你说得对。引脚 MDC 和 MDIO 对调。我已经报告过——它将在下一个版本的 UM12406 中修复——发布日期尚不清楚。 请随时参考我与此主板相关的 LwIP 示例:示例 S32K344 EMAC LWIP Fre eRTOS miniEVB S32DS 3.6.1 RTD 6.0.0   顺祝商祺! 帕维尔
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HSE_b: RSAキーをRAMにインポートすることは許可されていません 1024ビットのRSA公開鍵を1つRAMカタログにインポートして鍵インポートサービスを使用する方法を理解しようとしていますが、サーバーからHSE_SRV_RSP_NOT_ALLOWEDという応答が返されます。 私のテストアプリケーションは、RAMキーカタログを次のようにフォーマットします。 { { muMask = HSE_MU0_MASK | HSE_MU1_MASK, groupOwner = HSE_KEY_OWNER_ANY, keyType = HSE_KEY_TYPE_RSA_PUB, numOfKeySlots = 2, maxKeyBitLen = HSE_KEY1024_BITS, }, { muMask = HSE_MU0_MASK | HSE_MU1_MASK, groupOwner = HSE_KEY_OWNER_ANY, keyType = HSE_KEY_TYPE_ECC_PUB_EXT, numOfKeySlots = 2, maxKeyBitLen = HSE_KEY256_BITS, }, { muMask = 0, groupOwner = 0, keyType = 0, numOfKeySlots = 0, maxKeyBitLen = 0 }, } そして、サーバーからの応答としてHSE_SRV_RSP_OKを受け取りました。 次に、以下のキー情報を使用してRSAキーをインポートしようとします。 { keyFlags = HSE_KF_USAGE_VERIFY, keyBitLen = HSE_KEY1024_BITS, keyCounter = 0x0, smrFlags = 0x0, keyType = HSE_KEY_TYPE_RSA_PUB, specific = { pubExponentSize = 4, } } 私の要望は以下のとおりです。 { targetKeyHandle = 0x20000, pKeyInfo = 0x20401f74, pKey = { 0x210034b4, 0x21003534, 0x0}, keyLen = { 0x80, 0x4, 0x0}, } . HSE_RAM_PUB_KEY_IMPORT_POLICY_ATTR_ID を HSE_KM_POLICY_ALLOW_RAM_PUB_KEY_IMPORT に設定し、読み戻した結果も同じでした。 LC属性は0x04、HSEエラーフラグは0x0000、HSEステータスフラグは0x0B60です。ファームウェアバージョンは、0x0F SoC ID 0x0000 FWタイプ 0x02 メジャー 0x32 マイナー 0x00 パッチと読み取られます。 Re: HSE_b: Not allowed to import RSA key to RAM こんにちは、 @Emma_G-gbgさん パラメータは正しく設定されています。特に問題は見当たりません。スーパーユーザー権限を持っている場合は、その属性を設定する必要すらありません。 昨日、これと非常によく似たことをテストしていたので、1024ビットのRSA公開鍵と4バイトの公開指数をインポートするようにコードを少し更新しました。見た目はこんな感じです。 RSA公開鍵をインポートする際には、pubExponentSizeを設定する必要がないことに注意してください。HSEはこのパラメータを無視します。代わりにkeyLen[1]を使用します。 パラメータ pubExponentSize は、サービス HSE_SRV_ID_GET_KEY_INFO によって keyInfo を読み取る際に使用されます。そのキーのkeyInfoを読み取った結果は以下のとおりです。 それは単なるデータキャッシュの問題ではないでしょうか?データキャッシュを無効にして、違いが出るかどうか試していただけますか? よろしくお願いいたします。 ルーカス Re: HSE_b: Not allowed to import RSA key to RAM ありがとうございます。暗号鍵と認証鍵のハンドル情報の入力を忘れていました。確認していなかったので、HSE_INVALID_KEY_HANDLE はゼロになると思っていました。 現在は、キャッシュメモリ内の少なくとも一部の値を使用して動作しており、サービス呼び出しの前後にキャッシュメンテナンス操作が行われています。既存のプロジェクトにHSEサービスを追加しているため、キャッシュ構造を変更することはできませんが、共有メモリに実際に書き込まれていることを確認する限り、これまでのところすべて正常に動作しています。ただし、関連するメモリのキャッシュを無効にしてみましたが、違いはありませんでした。
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i.MX95 EVKまたはi.MX8QM上でAndroidとLinuxの両方をDomUとして実行する Xenハイパーバイザー上でAndroid オートモーティブとLinuxゲストOSの両方を実行できるかどうか、その適用可能性を検証しています。 リリースノートとユーザーガイドの間には、矛盾する情報がいくつかあります。Android オートモーティブのリリースノートでは、i.MX8QMとi.MX95の両方で仮想化 Android に「N」が付いていますが、ユーザーガイドではXen上でAndroidを実行する方法が明確に説明されています。 サポートされているかどうかという質問に答えたいのですが、異なるドキュメントに基づいて正確に判断することができません。古いドキュメントではi.MX8QMでもサポートされていると書かれていますが、新しいドキュメントではサポートされていないと書かれています。 ユーザーガイドには、LinuxゲストまたはAndroid Automotiveゲストを実行できると記載されていますが、それらが同時に共存できるかどうか(2つのDomU)については記載されていません。i.MX95、i.MX8QM、あるいはその両方でこれが可能かどうか教えてください。 質問1で述べたように、i.MX 8QuadMaxについては、古いドキュメントにXen上でAndroid VMを実行できると記載されていましたが、それはAndroid 9またはAndroid 10の場合でした。最近のドキュメントでは、Xen 上の Android VM では「N」と記載されており、ユーザーガイドには i.mx 95 の手順しか記載されていません。新しいバージョンの Android を実行できない理由は何でしょうか? Android i.MX 8ファミリ | i.MX 8QuadMax (8QM) | 8QuadPlus Linux Re: Running both Android + Linux as DomU's on i.MX95 EVK or i.MX8QM こんにちは、 1> 以前のバージョンの Android では、デモ/リファレンスとして i.MX8 XEN のサポートがありましたが、新しい Android リリースではサポートされなくなりました。一方、i.MX95については、最新リリースでサポートされています。 2> 上記のように、古いリリースでは i.MX8 で可能かもしれませんが、i.MX95 は公式にはサポートされていませんが、カスタム統合により技術的には可能です。 3> これは、1) i.MX8 用の公式 XEN がデモ/リファレンスとしてリリースされたことに関連しており、新しい Android リリースへの変更により、焦点は新しい i.MX95 に移されました。 よろしくお願いいたします。 アルド。 Re: Running both Android + Linux as DomU's on i.MX95 EVK or i.MX8QM こんにちは、迅速なご対応ありがとうございます! i.MX95の場合、公式にサポートされているのはDom0(Linux、ドキュメントを見る限りシンクライアントではないようです)とDomU(Android)のみです。Dom0にディスプレイを1つ、DomUにもう1つのディスプレイを接続することは可能ですか? i.MX95でFUTURE的に2つのDomUをサポートする予定はありますか? Re: Running both Android + Linux as DomU's on i.MX95 EVK or i.MX8QM こんにちは、アルドさん。 私の質問について何か進展はありますか?
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Ara240 Module Bring-Up on FRDM-IMX95 Getting Started Video: (function() { var wrapper = document.getElementById('lia-vid-6393577020112w960h540r856'); var videoEl = wrapper ? wrapper.querySelector('video-js') : null; if (videoEl) { if (window.videojs) { window.videojs(videoEl).ready(function() { this.on('loadedmetadata', function() { this.el().querySelectorAll('.vjs-load-progress div[data-start]').forEach(function(bar) { bar.setAttribute('role', 'presentation'); bar.setAttribute('aria-hidden', 'true'); }); }); }); } }})(); (view in My Videos) This guide provides step-by-step instructions on how to verify successful communication with the Ara240 module and the runtime software environment to interface  with the FRDM i.MX 95 development board. Out of the Box Get Familiar with the Ara240 Module   Ara240 Module [Top view]Ara240 Module [Top view] Ara240 Module [Back view]Ara240 Module [Back view]      Connecting the M.2 Module This section explains how to connect Ara240, a discrete module, to the FRDM i.MX 95 development board. The instructions in the FRDM i.MX 95 Quick Start Guide will walk you through the boot-up process for the pre-loaded Embedded Linux image on the board and how to connect the USB debug cable. For additional details, see the official FRDM i.MX 95 Development Board documentation. References: FRDM i.MX 95 Quick Start Guide FRDM i.MX 95 Development Board product page FRDM i.MX 95 getting started page Getting Started with ARA2-M2-16G-GT Follow the steps below to connect the Ara240 module to the FRDM i.MX 95 development board: Spoiler (Highlight to read) Important: Ensure the board is powered off before making any connections. Important: Ensure the board is powered off before making any connections. Insert the Ara240 module into the M.2 Key-M socket on the FRDM i.MX 95 development board. Using the screw provided, secure the module. Connect the fan cable to the board’s fan header (refer to the FRDM i.MX 95 board documentation for the exact header location). Connect the Ara240 to the FRDM i.MX 95 development board.Connect the Ara240 to the FRDM i.MX 95 development board. Power on the Board Follow the instructions to power on (boot) the board found in the Getting Started with FRDM-IMX95. After powering on, verify that the fan and green LED indicators Ara240 module are on are on.   Get the Software This section will walk you through the Ara240 Runtime software development kit (SDK), a streamlined subset of the Ara240 SDK designed for rapid enablement and execution on NXP platforms. The Runtime SDK simplifies installation and configuration, enabling developers to quickly deploy and run AI/ML workloads on the Ara240 module with minimal effort. Overview Refer to Ara240 software release notes for details on the Ara240 software development kit (SDK) The Getting Started page for Ara240 only outlines usage on specific i.MX development platforms For any other platforms please reach out to your NXP representative for guidance. Module Enumeration and Software Configuration This section provides instructions to verify proper installation of Ara240 module and configuration of the Ara240 Runtime SDK on the FRDM i.MX 95 development board. Verify Device Detection Once the board has successfully booted, connect to the serial debug port to monitor system logs. To confirm that the Ara240 module is being detected by the board, run the following command: $ lspci | grep 1e58 Expected output: 0000:01:00.0 Processing accelerators: Device 1e58:0002 (rev 02) Enable Ara240 device For quick enablement, the Ara240 Runtime SDK starts at boot time. Refer to the Ara240 Runtime SDK documentation for detailed instructions and environment setup steps. Developer Experience This section provides an overview of Ara240 runtime software enablement using the FRDM i.MX 95 development board. Verify Setup Environment Use the following guidance on how to connect required devices. For most of the demos, you would need a camera, keyboard, mouse, internet connection and a HDMI display monitor. Setup preparation for FRDM i.MX 95 board [Top view]Setup preparation for FRDM i.MX 95 board [Top view] Setup preparation for FRDM i.MX 95 board [Back view]Setup preparation for FRDM i.MX 95 board [Back view] Spoiler (Highlight to read) NOTE: You might need to use a USB hub to connect keyboard, mouse and camera at the same time. NOTE: You might need to use a USB hub to connect keyboard, mouse and camera at the same time.   Runtime setup Description: Runtime SDK delivers a complete runtime environment that enables AI/ML acceleration on the Ara240 module. To run demo applications, ensure that the Ara240 bring-up process has been successfully completed and the system is ready for demo evaluation. Refer to the Runtime SDK documentation for detailed guidance on: Verifying correct installation of the Runtime SDK. Checking and updating the Ara240 firmware version. Validating proxy service bring-up status. Executing benchmark tests on Ara240. Following these steps ensures that the module is properly initialized and ready for use. Ara240 supports the execution of CNNs, LLMs, VLMs, and agentic frameworks, enabling advanced AI workloads to run directly on Ara. For comprehensive examples and end-to-end workflow guidance, please refer to the Ara SDK documentation page. FRDM-IMX9
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How to use SecureElement SE05x: Using SE050 via OpenSSL (Japanese blog) In the previous article, we described the procedure for setting up the "Plug and Trust Middleware" library for SE05x (Secure Element) on a Raspberry Pi and FRDM-IMX93 (development board for i.MX 93) . How to use Secure Element SE05x: Setting up Plug and Trust Middleware on Raspberry Pi (Japanese blog) How to use Secure Element SE05x: Setting up Plug and Trust Middleware on the FRDM-IMX93 development board (Japanese blog) By using Secure Element and "*Plug and Trust Middleware," you can apply protection features to all applications that perform authentication using OpenSSL (e.g., Eclipse Mosquitto ™ , etc.) without modifying the application itself . This article explains practical ways to use SE05x in conjunction with OpenSSL. (Estimated time: 10 minutes *Assuming Plug and Trust Middleware is already set up) *Plug and Trust Middleware also includes integration with OpenSSL, which is widely used on Linux. Hardware, software, and versions used in writing this article Hardware: Raspberry Pi 3 Model B+ EdgeLock ® SE050 Development Kit ( OM-SE050ARD-E ) Five jumper wires (male-to-female or female-to-female) or an Arduino to Raspberry Pi adapter board ( OM-SE050RPI ) software: Raspberry Pi OS 12 64-bit SE-PLUG-TRUST-MW_04.07.01 *After unzipping, you can access the documentation from simw-top/doc/index.html (hereafter, "documentation" refers to this HTML file). The OpenSSL provider within the middleware is also available on GitHub, where you can find command examples and other information. https://github.com/NXPPlugNTrust/se05x-openssl-provider   Summary of this article OpenSSL has an interface called `provider` (or `engine` in earlier versions) since version 3.0, which allows you to replace parts of OpenSSL's operation with customized code. Plug and Trust Middleware provides a provider/engine to replace the cryptographic processing performed by OpenSSL with cryptographic processing using SE05x. The corresponding process is described in section "8.2" of the documentation. Please refer to "Introduction on OpenSSL provider". If a provider is not used (see the diagram on the left below) , the key, including the private key, is placed on the file system, and OpenSSL reads it and performs the processing. (*Since the key is stored on the file system, there is a high risk of key leakage.) When using a Provider (see the diagram on the right below) , it will look like this: OpenSSL instructs the Plug and Trust Middleware Provider to perform cryptographic processing. The Provider reads the Key file, and upon recognizing that it is in the format of a reference key, it retrieves the Key ID from the reference key and instructs the SE05x to perform encryption using the Key with that ID. (If a regular key file that is not a reference key is recognized, the process returns to the left.) In this article, Creating a reference key to use the key pair pre-installed on the SE05x at the time of shipment. Enabling the OpenSSL Provider Example of the steps for signing and verifying using these methods. I will explain this.   Retrieving the object list within SE05x Similar to the Plug and Trust Middleware setup, we will enable venv and perform operations in an independent Python environment (virtual environment). Enable venv from the Plug and Trust Middleware deployment directory using the following command. cd simw-top/pycli/ source venv/bin/activate The following command will display a list of objects within SE05x. ssscli connect se05x t1oi2c none ssscli se05x readidlist ssscli disconnect The execution result will be as follows: (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli $ ssscli connect se05x t1oi2c none (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli $ ssscli se05x readidlist sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! Key-Id: 0X7fff0201 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0X7fff0202 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0X7fff0204 NIST-P (Public Key) Size(Bits): 256 Key-Id: 0X7fff0206 BINARY Size(Bits): 144 Key-Id: 0x7fff020b HMAC Size(Bits): No Info available Key-Id: 0Xf0000000 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000001 BINARY Size(Bits): 3760 Key-Id: 0Xf0000002 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000003 BINARY Size(Bits): 3760 Key-Id: 0Xf0000012 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000013 BINARY Size(Bits): 3736 Key-Id: 0Xf0000020 NIST-P (Public Key) Size(Bits): 256 Key-Id: 0Xf0000100 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000101 BINARY Size(Bits): 4392 Key-Id: 0Xf0000102 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000103 BINARY Size(Bits): 4392 Key-Id: 0Xf0003394 AES Size(Bits): 256 (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli $ ssscli disconnect   SE05x factory-programmed user identification information (keypair, certificate) Details of the displayed list of objects can be found in AN12436: SE050 configurations . The following are key pairs and their certificates that do not have a designated purpose and can be used freely by users. Key-Id: 0Xf0000100 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000101 BINARY Size(Bits): 4392 Key-Id: 0Xf0000102 NIST-P (Key Pair) Size(Bits): 256 Key-Id: 0Xf0000103 BINARY Size(Bits): 4392 0Xf0000101 and 0Xf0000103 are certificates corresponding to the key pairs 0Xf0000100 and 0Xf0000102, respectively. Let's try using the key pair 0Xf0000100. OpenSSL treats key pairs as files, but there's no point in protecting the private key with SE050 if you're going to extract and use the private key. Therefore, it is obtained in a format that does not include the private key, called a reference key, which will be described later. The following commands will create a directory for storing keys and retrieve the keys. mkdir se050_keys cd se050_keys/ ssscli connect se05x t1oi2c none ssscli refpem ecc pair 0xf0000100 reference_key_0xf0000100.pem ssscli get ecc pub 0xf0000100 public_key_0xf0000100.pem ssscli disconnect For comparison purposes, we will also generate a key pair and public key without using the SE050 as described below. Please execute the following command. openssl ecparam -genkey -name prime256v1 -out keypair.pem openssl ec -in keypair.pem -outform PEM -pubout -out public_key.pem About the Reference Key Let's display the contents of the reference key and public key obtained using the following command. openssl ec -text -noout -in reference_key_0xf0000100.pem openssl ec -text -noout -pubin -in public_key_0xf0000100.pem The execution result will be as follows: (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl ec -text -noout -in reference_key_0xf0000100.pem read EC key Private-Key: (256 bit) priv: 10:00:00:00:00:00:00:00:00:00:00:00:00:00:00: 00:00:00:f0:00:01:00:a5:a6:b5:b6:a5:a6:b5:b6: 10:00 pub: 04:e7:e0:f5:77:d7:b7:6f:0c:e6:93:7c:61:bf:85: 5e:80:37:76:9a:01:e3:e4:18:60:67:7a:3f:ab:bd: 9b:b6:53:64:4d:40:9b:07:c6:18:c9:5a:74:b9:c7: c8:d4:ae:2e:49:ae:68:63:de:64:77:6d:1e:1c:94: 4b:bb:70:10:0b ASN1 OID: prime256v1 NIST CURVE: P-256 (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl ec -text -noout -pubin -in public_key_0xf0000100.pem read EC key Public-Key: (256 bit) pub: 04:e7:e0:f5:77:d7:b7:6f:0c:e6:93:7c:61:bf:85: 5e:80:37:76:9a:01:e3:e4:18:60:67:7a:3f:ab:bd: 9b:b6:53:64:4d:40:9b:07:c6:18:c9:5a:74:b9:c7: c8:d4:ae:2e:49:ae:68:63:de:64:77:6d:1e:1c:94: 4b:bb:70:10:0b ASN1 OID: prime256v1 NIST CURVE: P-256 As can be seen above, the `pub` field of the reference key contains the same public key as the public key file, but the private key portion starting with `priv` contains a series of zeros, indicating that it does not actually contain the private key. The `priv` field in the Reference key does not contain the private key itself, but rather indicates where the private key is stored within SE050. In this case, it indicates that it is stored at 0xf0000100. For formatting information, see document "8.1.2.2". It is described in "EC Reference key format". Enabling the OpenSSL Provider There are several ways to use the OpenSSL Provider, but here we will enable it by reading a config file. The config file is located in simw-top/demos/linux/common/ and there are several versions of it. openssl11_sss_se050.cnf ----- OpenSSL 1.1.1 and SE050 openssl_sss_se050.cnf ----- OpenSSL 1.0.0 and SE050 openssl30_sss_se050.cnf ----- OpenSSL 3.x and SE050 You can check the OpenSSL version with the following command. openssl version If you're using a Raspberry Pi, it should be version 3.0. Apply the configuration using the following command. Replace with the middleware deployment location. export OPENSSL_CONF= /simw-top/demos/linux/common/openssl30_sss_se050.cnf   Signature generation and verification using SE050 + OpenSSL provider Use the following command: Use the reference key to generate a signature using the private key with ID:0xf0000100 within SE05x. Signature verification using the reference key and the public key with ID:0xf0000100 within SE05x. Signature verification using a client key We will do this. openssl pkeyutl -sign -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -out signature_with_provider.txt -digest sha256 openssl pkeyutl -verify -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_with_provider.txt -digest sha256 openssl pkeyutl -verify -pubin -inkey public_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_with_provider.txt -digest sha256 The execution result will be as follows: (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -sign -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -out signature_with_provider.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Performing ECDSA sign using SE05x (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_with_provider.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Performing ECDSA verify using SE05x Signature Verified Successfully (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -pubin -inkey public_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_with_provider.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Not a key in secure element. Performing ECDSA verify operation using host software Signature Verified Successfully Since the OpenSSL provider is enabled, messages related to the OpenSSL provider will be displayed. The following display shows that SE05x is actually using the object specified by the reference key to generate and verify the signature. If it is not displayed, please check the OPENSSL_CONF settings. sssprov-flw: Performing ECDSA sign using SE05x sssprov-flw: Performing ECDSA verify using SE05x When verifying a signature using a file containing only the public key, the following message is displayed, indicating that SE050 is not being used. sssprov-flw: Not a key in secure element. Performing ECDSA verify operation using host software For comparison, we will perform the same operation using a key pair and public key generated outside of the SE050. openssl pkeyutl -sign -inkey keypair.pem -rawin -in public_key.pem -out signature.txt -digest sha256 openssl pkeyutl -verify -inkey keypair.pem -rawin -in public_key.pem -sigfile signature.txt -digest sha256 openssl pkeyutl -verify -pubin -inkey public_key.pem -rawin -in public_key.pem -sigfile signature.txt -digest sha256 The execution result will be as follows: (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -sign -inkey keypair.pem -rawin -in public_key.pem -out signature.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Not a ref key sssprov-flw: Not a key in secure element. Performing ECDSA sign operation using host software sssprov-flw: Get random data from SE05x (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -inkey keypair.pem -rawin -in public_key.pem -sigfile signature.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Not a ref key sssprov-flw: Not a key in secure element. Performing ECDSA verify operation using host software Signature Verified Successfully (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -pubin -inkey public_key.pem -rawin -in public_key.pem -sigfile signature.txt -digest sha256 App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! sssprov-flw: Not a key in secure element. Performing ECDSA verify operation using host software Signature Verified Successfully When a key pair is specified, the following is displayed, indicating that signature generation is performed using the private key in the key pair file, not SE050. sssprov-flw: Not a ref key However, since the OpenSSL Provider provides a random number generation function, the following is displayed during signature generation, and random numbers are generated using SE050. sssprov-flw: Get random data from SE05x For comparison, the following is the result of using a reference key with the OpenSSL provider disabled. (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ export OPENSSL_CONF= (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -sign -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -out signature_without_provider.txt -digest sha256 (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli/se050_keys $ openssl pkeyutl -verify -inkey reference_key_0xf0000100.pem -rawin -in public_key_0xf0000100.pem -sigfile signature_without_provider.txt -digest sha256 Signature Verification Failure The priv portion of the reference key is interpreted as the private key, and the signature is generated accordingly. The signature generation is successful, but the signature verification will naturally fail because the private key being used does not correspond to the public key. In this case, we applied SE050 protection to a process that uses OpenSSL commands. An example of applying SE050 protection to an application using the OpenSSL library is described in the following article. Connecting to Azure IoT Hub using the Eclipse Mosquitto client ========================= We are currently unable to respond to comments left in the " Comment " section of this post . We apologize for the inconvenience, but please refer to " Technical Questions to NXP - How to Contact Us( Japanese Blog) " when making inquiries.(If you are already an NXP distributor or have a relationship with NXP, you may ask your representative directly.) In the previous article, we described the procedure for setting up the "Plug and Trust Middleware" library for SE05x (Secure Element) on a Raspberry Pi and FRDM-IMX93 (development board for i.MX 93) . How to use Secure Element SE05x: Setting up Plug and Trust Middleware on Raspberry Pi (Japanese blog) How to use Secure Element SE05x: Setting up Plug and Trust Middleware on the FRDM-IMX93 development board (Japanese blog) By using Secure Element and "*Plug and Trust Middleware," you can apply protection features to all applications that perform authentication using OpenSSL (e.g., Eclipse Mosquitto ™ , etc.) without modifying the application itself . This article explains practical ways to use SE05x in conjunction with OpenSSL. (Estimated time: 10 minutes *Assuming Plug and Trust Middleware is already set up) *Plug and Trust Middleware also includes integration with OpenSSL, which is widely used on Linux. Security Technology Focus Japanese Blog
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How to use Secure Element SE05x: Setting up Plug and Trust Middleware on Raspberry Pi (Japanese blog) Introduction Many people are interested in secure elements, but perhaps they have the impression that they are "somehow difficult to use." NXP's Secure Element SE05x comes with middleware called Plug and Trust Middleware. This includes a dedicated API for using SE05x, as well as plugins for widely used libraries such as OpenSSL and mbed-TLS. Therefore, applications using these libraries (e.g., Eclipse Mosquitto ™ , etc.) can leverage the functionality of the Secure Element with little to no modifications. This middleware's reference operating environment supports "Windows PCs" and "various NXP MCUs/MPUs (Linux)," but it also supports the readily available "Raspberry Pi." Command-line tools are available in Windows and Linux environments, making it easy to verify various operations. This article explains how to set up Plug and Trust Middleware on a Raspberry Pi. Hardware, software, and versions used in writing this article Hardware: Raspberry Pi 3 Model B+ EdgeLock ® SE050 Development Kit ( OM-SE050ARD-E ) Five jumper wires (male-to-female or female-to-female) or an Arduino to Raspberry Pi adapter board ( OM-SE050RPI ) software: Raspberry Pi OS 12 64-bit SE-PLUG-TRUST-MW_04.07.01 *The method for accessing the documentation is explained below. Download the Plug and Trust middleware package. First, please download the Plug and Trust middleware package (SE05x-PLUG-TRUST-MW) from here. * A MyNXP account is required for downloading. Registration is free and easy. * After unzipping, you can access the documentation from simw-top/doc/index.html (hereafter, "documentation" refers to this HTML file). For information on using Plug and Trust middleware with Raspberry Pi, please also refer to AN12570 . Hardware preparation Connect the Raspberry Pi and the OM-SE050ARD-E using jumper wires (or OM-SE050RPI). For connections using jumper wires, see section 4.5 in the documentation. Please refer to the diagram below for Raspberry Pi Build. However, as of the time of writing this article, GPIO22 connected as described above does not function correctly due to changes in the GPIO control specifications of the Raspberry Pi OS. Although the cause and solution are known, for the time being, this article will show how to disable control via GPIO22 by changing the jumper settings. To operate without using GPIO22, change the following two jumper settings on the OM-SE050ARD-E. J13: 1-2 J14: 1-2 Setting J13 to 1-2 connects SE050's ENA to GND, and setting J14 to 1-2 connects SE050's VCC to VIN. ENA is the control pin for DPD (Deep Power-down) mode. When using DPD, connect VOUT and VCC, and control the power supply from VOUT using ENA to reduce current consumption. Since the ENA control is not working properly this time, we will temporarily disable the DPD setting. If DPD is not used, leave VOUT open and connect VCC to VIN to ensure a constant power supply. While connecting ENA to GND appears to be acceptable in terms of evaluation, the datasheet recommends connecting it to VCC if ENA is not being used. Pre-build preparations After flashing Raspberry Pi OS using Raspberry Pi Imager and booting, open a terminal. Enable I2C If i2c-1 is not displayed after running the following command, I2C is not enabled, so enable it. ls /sys/bus/i2c/devices After executing the following command, go to Interfacing Options -> I2C and enable I2C. sudo raspi-config - Install additional build tools Perform the following: sudo apt-get install cmake cmake-curses-gui cmake-gui libssl-dev libsystemd-dev Middleware setup and running the sample application Copy the downloaded Plug and Trust middleware package to your Raspberry Pi. Navigate to the directory where you copied the Plug and Trust middleware and execute the following: cd simw-top python scripts/create_cmake_projects.py cd ../simw-top_build/raspberrypi_native_se050_t1oi2c cmake --build . sudo make install sudo ldconfig /usr/local/lib The built applications are located in simw-top_build/raspbian_native_se050_t1oi2c/bin. Since the files were copied to /usr/local/bin/ during the installation process described earlier, you can run the program without specifying the files in that location. Running se05x_GetInfo to verify operation will display device information. shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top_build/raspbian_native_se050_t1oi2c $ se05x_GetInfo Failed to export Enable pin : Invalid argument Failed to open GPIO value file : No such file or directory Failed to unexport GPIO : Invalid argument App :INFO :Running se05x_GetInfo App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. App :INFO :PlugAndTrust_v04.07.01_20250519 sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 App :WARN :No SemsLite Applet Available. App :INFO :Running se05x_GetInfo App :INFO :If you want to over-ride the selection, use ENV=EX_SSS_BOOT_SSS_PORT or pass in command line arguments. sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! App :WARN :##################################################### App :INFO :uid (Len=18) 04 00 50 01 6A 17 2A E0 43 2E 7C 04 27 6A D2 9C 1D 90 App :WARN :##################################################### App :INFO :Applet Major = 7 App :INFO :Applet Minor = 2 App :INFO :Applet patch = 0 App :INFO :AppletConfig = 3F9F App :INFO :With ECDSA_ECDH_ECDHE App :INFO :With EDDSA App :INFO :With DH_MONT App :INFO :With HMAC App :INFO :WithOut RSA_PLAIN App :INFO :WithOut RSA_CRT App :INFO :With AES App :INFO :With DES App :INFO :With PBKDF App :INFO :With TLS App :INFO :With MIFARE App :INFO :With I2CM App :INFO :Internal = FFFF App :WARN :##################################################### App :INFO :Tag value - proprietary data 0xFE = 0xFE App :INFO :Length of following data 0x45 = 0x45 App :INFO :Tag card identification data (Len=2) DF 28 App :INFO :Length of card identification data = 0x42 App :INFO :Tag configuration ID (Must be 0x01) = 0x01 App :INFO :Configuration ID (Len=12) 00 01 A9 21 89 0A 6F 56 4A 23 9C 41 App :INFO :OEF ID (Len=2) A9 21 App :INFO :Tag patch ID (Must be 0x02) = 0x02 App :INFO :Patch ID (Len=8) 00 00 00 00 00 00 00 01 App :INFO :Tag platform build ID1 (Must be 0x03) = 0x03 App :INFO :Platform build ID (Len=24) 4A 33 52 33 35 31 30 32 39 42 34 31 31 31 30 30 1A 08 FA 50 67 B5 F2 56 App :INFO :JCOP Platform ID = J3R351029B411100 App :INFO :Tag FIPS mode (Must be 0x05) = 0x05 App :INFO :FIPS mode var = 0x00 App :INFO :Tag pre-perso state (Must be 0x07) = 0x07 App :INFO :Bit mask of pre-perso state var = 0x00 App :INFO :Tag ROM ID (Must be 0x08) = 0x08 App :INFO :ROM ID (Len=8) 2E 5A D8 84 09 C9 BA DB App :INFO :Status Word (SW) (Len=2) 90 00 App :INFO :se05x_GetInfoPlainApplet Example Success !!!... App :WARN :##################################################### App :INFO :cplc_data.IC_fabricator (Len=2) 47 90 App :INFO :cplc_data.IC_type1 (Len=2) D3 21 App :INFO :cplc_data.Operating_system_identifier (Len=2) 47 00 App :INFO :cplc_data.Operating_system_release_date (Len=2) 00 00 App :INFO :cplc_data.Operating_system_release_level (Len=2) 00 00 App :INFO :cplc_data.IC_fabrication_date (Len=2) 41 50 App :INFO :cplc_data.IC_Serial_number (Len=4) 13 93 77 21 App :INFO :cplc_data.IC_Batch_identifier (Len=2) 05 57 App :INFO :cplc_data.IC_module_fabricator (Len=2) 00 00 App :INFO :cplc_data.IC_module_packaging_date (Len=2) 00 00 App :INFO :cplc_data.ICC_manufacturer (Len=2) 00 00 App :INFO :cplc_data.IC_embedding_date (Len=2) 00 00 App :INFO :cplc_data.IC_OS_initializer (Len=2) 07 27 App :INFO :cplc_data.IC_OS_initialization_date (Len=2) 6A 33 App :INFO :cplc_data.IC_OS_initialization_equipment (Len=4) 39 33 37 37 App :INFO :cplc_data.IC_personalizer (Len=2) 00 00 App :INFO :cplc_data.IC_personalization_date (Len=2) 00 00 App :INFO :cplc_data.IC_personalization_equipment_ID (Len=4) 00 00 00 00 App :INFO :cplc_data.SW (Len=2) 90 00 App :INFO :ex_sss Finished Failed to open GPIO value file : No such file or directory Failed to unexport GPIO : Invalid argument Failed to unexport GPIO : Invalid argument As mentioned earlier, there is a problem with GPIO control, so GPIO-related errors will be displayed at the beginning and end of the message, but this does not affect the operation. If you see a section reading the uid (Unique ID) as shown below, it's working correctly. Since the uid is a different value for each device, a different value should be read depending on the board being used. App :INFO :uid (Len=18) 04 00 50 01 6A 17 2A E0 43 2E 7C 04 27 6A D2 9C 1D 90 The following message is also displayed, which indicates that protection (message authentication and encryption) for communication between the host and SE050 is not enabled. During mass production, we strongly recommend changing the middleware build settings to enable protection. sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! Setting up the command line tool (ssscli) ssscli is a Python-based command-line tool for controlling SE05X. Document 9.3.1.3. We will set it up according to the instructions for the Raspberry Pi. The following instructions will create a venv in simw-top/pycli, but you can change this according to your preference. cd simw-top/pycli sudo apt-get install python3-pip python3-dev libffi-dev sudo apt install python3-virtualenv virtualenv venv source venv/bin/activate pip install -r requirements.txt cd src pip install --editable . Once the above is complete, try using ssscli to retrieve the uid. (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli $ ssscli connect se05x t1oi2c none (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli $ ssscli se05x uid sss :INFO :atr (Len=35) 01 A0 00 00 03 96 04 03 E8 00 FE 02 0B 03 E8 00 01 00 00 00 00 64 13 88 0A 00 65 53 45 30 35 31 00 00 00 sss :WARN :Communication channel is Plain. sss :WARN :!!!Not recommended for production use.!!! 040050016a172ae0432e7c04276ad29c1d90 Unique ID: 040050016a172ae0432e7c04276ad29c1d90 (venv) shinji@raspberrypi:~/SE-PLUG-TRUST-MW_04.07.01/simw-top/pycli $ ssscli disconnect The same ID was obtained as in the previous execution of se05x_GetInfo, indicating that it is working correctly. This completes the setup of Plug and Trust Middleware. Specific usage examples will be introduced in a separate article. ========================= We are currently unable to respond to comments left in the " Comment " section of this post . We apologize for the inconvenience, but please refer to " Technical Questions to NXP - How to Contact Us( Japanese Blog) " when making inquiries.(If you are already an NXP distributor or have a relationship with NXP, you may ask your representative directly.) Many people are interested in secure elements, but perhaps they have the impression that they are "somehow difficult to use." NXP's Secure Element SE05x comes with middleware called Plug and Trust Middleware. This includes a dedicated API for using SE05x, as well as plugins for widely used libraries such as OpenSSL and mbed-TLS. Therefore, applications using these libraries (e.g., Eclipse Mosquitto ™ etc.) can leverage the functionality of the Secure Element with little to no modifications. This middleware's reference operating environment supports Windows PCs and various NXP MCUs/MPUs (Linux), but it also supports the readily available Raspberry Pi. Command-line tools are available for Windows and Linux environments, making it easy to verify various operations. This article explains how to set up Plug and Trust Middleware on a Raspberry Pi. (Working time: 20 minutes) Security Technology Focus Japanese Blog
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如何通过 UART 接收不同长度的数据? 嘿 ! 我使用的是 s32k144 评估板,我使用 UART_PAL 库使用 MODBUS 协议通过 UART 接收数据。我在 while 循环中使用了 thenon 阻塞 uart_receivedata() API,并使用回调检查接收事件和接收数据。 在我确定要接收的数据长度之前,一切都很正常,但当要接收的数据长度不固定,而且每次都不一样时,我该怎么办呢? 我看到了许多相同的主题,但没有一个主题提供了绝对的解决方案,我请求您指导我一个正确的解决方案,如果可能的话,请提供相同的代码/屏幕截图。 我附上了一张截图,在开关语句中,不同情况下接收数据的长度是不确定的。 请@Robin_Shen为我们提供解决方案。 此致, 阿达尔什 Re: How to receive data of varying length over UART? 你好,我想问一下你们是否解决了在 485 上接收变长数据的问题。我目前也遇到了同样的问题,但一直无法解决。 Re: How to receive data of varying length over UART? 本指南中还缺少一样东西,但@Robin_Shen发送的链接中却有。我也会把它写在这里。 6.在 LPUART_DRV_StartReceiveDataUsingInt() 函数中,启用 CTRL[IDLE]。 非常感谢@Adarshnanda制作这份指南! Re: How to receive data of varying length over UART? HI 我正在尝试通过 LPC804 的 UART 接收数据,并使用 mcuxpresso ide,请问谁能提供代码并告诉我接收数据的步骤。 Re: How to receive data of varying length over UART? 嘿,@Robin_Shen、 我查看了该主题,它对我很有效。唯一令人困惑的是,该主题中有些答案与通过 DMA 接收数据有关,有些则与通过中断接收数据有关。 如果想使用 INTERRUPTS 实现 UART_IDLE_LINE_RECEIVE,让我总结一下需要遵循的步骤。 请注意,我们需要添加 LPUART 驱动程序。 1.在 LPUART_DRV_INIT 函数中,必须配置外设寄存器,以启用 IDLE LINE INTERRUPT& 设置 IDLE 标志设置前接收的空闲字符数。你应该看看参考手册。我已将其配置为 8 个空闲字符& ,在此附上截图。 2.在 LPUART_DRV_IRQHandler 中,必须检查 IDLE_LINE_DETECT 标志是否设置& ,如果设置了,则调用 LPUART_DRV_RxIdleCallback 函数(默认情况下没有,用户需要定义)。请注意 - 需要在启动 IRQ_Handler 时调用此函数。 3.在文件 - (callbacks.h) 的枚举 - uart_event_t 中,定义一个事件 UART_EVENT_IDLE_DETECT。 4.定义 LPUART_DRV_RxIdleCallback& 并提供其函数原型。 5.之后,您就可以在应用程序中使用它了。 谢谢@Robin_Shen & 我希望这对其他人有所帮助。 此致, 阿达尔什 Re: How to receive data of varying length over UART? 你好,阿达什、 很抱歉,最近的 S32K1 SDK/RTD 驱动程序没有实现空闲检测功能。您是否参考过S32K144 LPUART IDLE 线路中断配置中的讨论? 您需要更改 SDK 驱动程序,才能获得 LPUART 空闲线中断。 祝好, Robin ------------------------------------------------------------------------------- 注: - 如果本帖回答了您的问题,请点击"Mark Correct" 按钮。谢谢! - 我们会在最后一次发帖后的 7 周内跟踪主题,之后的回复将被忽略 如果您以后有相关问题,请另开新主题,并参考已关闭的主题。 ------------------------------------------------------------------------------- Re: How to receive data of varying length over UART? 7。调用 LPUART_DRV_GetReceiveStatus 函数来计算接收的长度,调用 LPUART_DRV_AbortReceivingData 函数以在处理第一帧后重新开始接收数据,这样接收缓冲区从 0 开始。 这是我添加的内容。现在调试成功了。感谢专家们分享之前的内容。谢谢大家。
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ENEDC(S32K3)に関する質問 こんにちはチーム K3のENEDCについてお伺いしてもよろしいでしょうか? 顧客は RTD 付きの MCAL を使用します。 しかし、ENEDC に関する RTD の情報は見つかりませんでした。 MSCM からは、ISR コア割り当て構成のみが表示されます。 RTD(MCAL) を使用して ENEDC を有効にする方法を教えてください。 ありがとう。 SAFETY_SW 出典: 直接顧客 出典: NXP社内 Re: Question about ENEDC(S32K3) ご説明ありがとうございます! Re: Question about ENEDC(S32K3) こんにちは@Luke_Chun 、 RM の説明から私が理解したところによると、ガスケットから FCCU へのレポート パスをアクティブにしたい場合は、これらのビットを有効にする必要があります。 このため、sCheck はこれらのビットを有効にします。そうしないと、レポート パスをテストできなくなります。 これは必須の設定であること、そしておそらく多くの K3 お客様がこの設定に気付いていない (関連する FCCU チャネルを有効にするだけで、これらのビットは有効にしない) ことには同意します。 敬具、 ラドスラフ Re: Question about ENEDC(S32K3) こんにちは@RadoslavB ご説明ありがとうございます。しかし、ENEDC の提案についてはよく分かりません。 私の理解を確認していただけますか? ENEDC では「TEST」のみを使用する必要がありますか? または セーフティアプリケーションを有効にする必要はありますか?(たとえば、ユーザーが eDMA 読み取りのチェックを使用したい場合は、ENEDC のビット 2 を FCCU 構成で手動で「設定」します。) ありがとう。 Re: Question about ENEDC(S32K3) こんにちは@Luke_Chun 、 SAF で MSCM ペリフェラルレジスタを構成する要求はありません。 sCheck テストは、関連する EDC ガスケットの潜在的な障害をテストするときにこれらのレジスタを内部的に有効にしますが、アプリケーションに対してこれらのビットを有効にすることはどの NXP SW でもカバーされていません。 したがって、お客様はこれらのレジスタを手動で有効にする必要があります。 S32K5 の場合、これらのレジスタをイネーブルメントの sBoot チェックが定義されていますが、繰り返しますが、私の知る限り、構成はどの NXP SW の範囲にも含まれていません。 敬具、 ラドスラフ Re: Question about ENEDC(S32K3) こんにちは@Luke_Chun 、 セーフティドライバーに関連する問題はサポートしていません。彼らにサポートを依頼するには、投稿で「RTD」ラベルを削除し、「Safety_SW」ラベルのみを残す必要があります。または、Safety_SW のみに新しい投稿を作成することもできます。 よろしくお願いいたします。 ダン Re: Question about ENEDC(S32K3) こんにちは@DanNguyenDuy 更新情報をありがとうございます。 セーフティドライブも確認しましたが、どれがENEDCに関係するのかわかりませんでした... どうやって確認すればいいのでしょうか? よろしくお願いします。 Re: Question about ENEDC(S32K3) こんにちは@Luke_Chun 、 RTD ドライバーは ENEDC の構成ではサポートされていません。私の観点からすると、このレジスタは FCCU に関連しているため、セーフティドライバのモジュールでこの機能を確認する必要があります。 よろしくお願いいたします。 ダン Re: Question about ENEDC(S32K3) K3 HW セーフティマニュアルからの抜粋を追加します: したがって、現時点ではこの AoU に従うかどうかはお客様の責任です。構成とチェックは現時点では NXP ではサポートされていません。 敬具、 ラドスラフ Re: Question about ENEDC(S32K3) こんにちは@Luke_Chun 、 INTM ペリフェラルの構成がサポートされており、RTD プラットフォーム プラグイン - 割り込みモニターで見つけることができます。 SAF 側では、sCheck は INTM 潜在的障害テストを備えていますが、sBoot は INTM 構成レジスタをチェックしません。私の意見では、割り込みがセーフティ関連の障害の検出/反応メカニズムである場合、SM1.INT_MON はアクティブである必要があり、顧客は SM4.INT_CHK を満たす必要があり、sBoot はそのような構成を再確認する必要があります。 敬具、 ラドスラフ Re: Question about ENEDC(S32K3) こんにちは@RadoslavB もう1つ質問してもよろしいでしょうか? INTM_MMはどうでしょうか? これは ENEDC でも同じですか? (RTD または SAF は INTM_MM 有効構成をサポートしていません。ユーザーはユーザー コードによって INTM_MM の構成を行う必要があります。 ありがとう。  
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Cortex-M33 上的 i.mx93 LPSPI + eDMA 问题 我使用的是 Tria i.MX9332(B1 硅)SMARC 模块,并尝试在 Cortex-M33 上使用带有 eDMA 的 LPSPI6,但无法正常工作。 开发环境 VS 代码 1.109.0 用于 VS 代码扩展的 MCUXpresso 26.1.56 SDK 25.09.00 硬件 在定制载板上试用 SM2S-IMX93 通过 SPI(LPSPI6)连接带有ILI9341控制器的 LCD 现状 使用不带 DMA 的 LPSPI6 时,显示正常。 我试图切换到LPSPI6 + eDMA以提高吞吐量,但无法收到完成通知。 问题 基于 DMA 的传输似乎开始了,但我从未在传输结束时收到 LPSPI DMA 完成回调。 详细信息和相关代码/配置见附件。 有人能指出我可能遗漏了什么,或者为什么没有触发信号吗? Re: i.mx93 LPSPI + eDMA problem on Cortex-M33 感谢您提供的示例代码。回顾范例让我明白了这一点。 Re: i.mx93 LPSPI + eDMA problem on Cortex-M33 你好@albi84 请参考附件中的补丁文件配置 LPDPI 与 EDMA B.R Re: i.mx93 LPSPI + eDMA problem on Cortex-M33 你好 能否请您分享带有 eDMA 的 LPSPI 的骨架? 谢谢。 Re: i.mx93 LPSPI + eDMA problem on Cortex-M33 这不是一个骨架,而是我使用的实际代码。这有帮助吗?
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