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サーボの紹介 - パートI <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> RCサーボとそのインターフェースの検討。パルス幅変調のレビューを行い、構成例を示します。 ビデオリンクを見る: 1465 (マイビデオで視聴)
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How to setup i.MX6Dual/Quad and i.MX6Solo/DualLite Linux software for PCIe compliance Test? Overview This document introduces how to setup i.MX6Dual/Quad and i.MX6Solo/DualLite Linux software for PCIe compliance test. Software Baselines i.MX6Dual/Quad: Linux BSP L2.6.35_1.0.0 i.MX6Solo/DualLite: Linux BSP L2.6.35_2.0.0 Software Changes To enable PCIe compliance test, PCIe software driver should not turn off PCIe clock and power in the tests. So the following changes are required: diff --git a/arch/arm/mach-mx6/pcie.c b/arch/arm/mach-mx6/pcie.c index 26d26f2..ad71085 100644 --- a/arch/arm/mach-mx6/pcie.c +++ b/arch/arm/mach-mx6/pcie.c @@ -801,6 +801,7 @@ static void __init add_pcie_port(void __iomem *base, void __iomem *dbi_base,      } else {          pr_info("IMX PCIe port: link down!\n"); +#if 0          /* Release the clocks, and disable the power */          pcie_clk = clk_get(NULL, "pcie_clk");          if (IS_ERR(pcie_clk)) @@ -820,6 +821,7 @@ static void __init add_pcie_port(void __iomem *base, void __iomem *dbi_base,          imx_pcie_clrset(IOMUXC_GPR1_TEST_POWERDOWN, 1 << 18,                  IOMUXC_GPR1); +#endif      } } Software Build Integrate the patch to the baseline code and recompile the kernel by following the instructions in Linux BSP user guide. Before recompile, please ensure the following configuration is enabled by selecting " System Type -> Freescale MXC Implementations -> PCI Express support" as "*": # MX6 Options: # CONFIG_IMX_PCIE=y i.MX6DL i.MX6Dual i.MX6Quad i.MX6S
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飞思卡尔杯线扫描相机 - 第三部分 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 使用线扫描相机教程第 2 部分中描述的逻辑,将显示界面的实际实现。FRDM-TFC 屏蔽的示例代码将用作完全中断驱动的相机接口的参考实现。 (在 “我的视频” 中查看)
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サーボ入門 - パートII <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> FRDM-TFC に用意されているサーボのサンプル コードを確認します。TPM 周辺機器の初期化と簡単なドライバー インターフェイスが表示されます。 ビデオリンクを見る: 1464 (マイビデオで視聴)
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CodeWarriorのProcessor Expertの例とチュートリアルはどこで入手できますか? <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> サンプルプロジェクトのインポート CodeWarrior メニューから[ファイル] > [インポート] を選択します 。[インポート] ダイアログが表示されます。「 一般」/「既存のプロジェクトをワークスペース へ」 を選択し、「次へ」をクリックします 。「 ルートディレクトリの選択 」 オプションを選択し、「 参照」 をクリックします 。 CodeWarriorインストール・ディレクトリの次の場所を参照します。 \MCU\CodeWarrior_Examples\Processor_Expert 複数のプロジェクトをインポートする場合はサンプルプロジェクトを含むフォルダを選択し、特定のサンプルプロジェクトを選択します。 [OK] をクリックします 。 フォルダを選択した場合は、フォルダ内で使用可能なサンプルプロジェクトのリストが「プロジェクト」領域に表示されます。インポートするプロジェクトの横にあるチェックボックスをオンにします。 「プロジェクトをワークスペースにコピー 」チェックボックスを選択して 、プロジェクトの独立したコピーをワークスペースに作成します。 「終了」 をクリックします 。 チュートリアルとヒント チュートリアルとヒントは、チートシートの形で提供されます。それらにアクセスするには、CodeWarriorメニューの ヘルプ>チートシート... をクリックし 、[ CodeWarrior Processor Expert Features]を選択します 。 一般的なコンポーネントの使用法 生成されたコードの使用例については、 コンポーネントの 「一般的な使用方法 」 ページを参照してください。このページは、コンポーネントヘルプ内で提供されます。このヘルプを取得するには、コンポーネントのポップアップメニューコマンド の ヘルプ を使用するか、 CodeWarrior for Microcontrollers V10.x > Processor Expert Manuals の CodeWarriorヘルプシステム内の Processor Expert Components Manual で コンポーネントを参照します 。 一般的な使用法 ページは、すべての LDD または高レベル コンポーネントのドキュメントの一部として利用できます。 Re: CodeWarrior の Processor Expert の例とチュートリアルはどこにありますか? <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> ありがとうPetr、私はチートシートと典型的な使用法を使用しました、そしてそれらは役に立ちます。 PEのユーザーガイドはありますか? プログラムがどのように機能するかをよりよく知るといいのですが...。 Tim オフグリッド
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网络标签打印机的流量控制 标签打印机需要某种方法来调节与其连接的系统之间的数据流。在各种情况下,暂停和恢复数据流都是必要的。附件的PPT介绍了一种在lwIP协议栈上运行的简单有效的流量控制方法。 技术
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S32 Design Studio と Apache Log4j CVE-2021-45046 の脆弱性 Apache Log4j の脆弱性は、投稿された記事で特定されました: CVE-2021-44228 および CVE-2021-45046 NXPは、S32 Design Studioに関してこの脆弱性の分析を実施しました。私たちの結論は、S32 Design Studio(すべてのバージョン)は影響を受けないということです。Log4jはS32 Design Studioで使用されていますが、使用されるバージョンは1.xであり、この脆弱性は、LDAPポリシーがデフォルトで有効になっているJavaバージョン9/10/11の組み合わせでバージョン2.12で導入されました(CVE-2021-45046)。S32Design Studioのインストール環境は独立しており、S32Design Studio IDEで実行されるすべてのツールに共通するJava 8バージョンに基づいています。さらに、S32 Design StudioはJMSAppenderを使用しないため、特定されたlog4j 1.xの使用上の問題(CVE-2021-44228)の影響を受けません。S32 Design Studioの将来のリリースでLog4jおよび/またはJavaバージョンのアップグレードが必要であると判断した場合、この脆弱性は対処されます。 NXP Automotive Processing Software Toolsが所有する他のツールの詳細については、添付のプレゼンテーションを参照してください。 Eclipse IDEの使用と設定
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U-boot.bin <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 添付されているのは、次のイメージを構築するために必要な U-boot バイナリです。 i.MX 6Dual/6Quad消費電力測定Linuxイメージ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 添付されているのは、次のイメージを構築するために必要な U-boot バイナリです。 i.MX 6Dual/6Quad消費電力測定Linuxイメージ i.MX6Dual i.MX6Quad
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CodeWarrior and the Apache Log4j CVE-2021-45046 vulnerability A vulnerability in the Apache Log4j was identified in the article posted: CVE-2021-45046 NXP has performed an analysis of this vulnerability with regard to the CodeWarrior. Our conclusion is that the CodeWarrior (all versions) is NOT IMPACTED. Although the Log4j is used by CodeWarrior, the version used is 1.x and the vulnerability was introduced in version 2.x. We do not plan to upgrade the Log4j version at this time. Going forward, if we determine an upgrade of the Log4j is required for a future release of CodeWarrior, then this vulnerability will be addressed.
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Hey StarCore users! CodeWarrior for v10.2.12 is here! The past week I received an email with Freescale great news! on the top of it I could read the phrase:   "Now Available - CodeWarrior Development Studio for StarCore v10.2.12"   And as you might well imagine I got all excited to see what new features this software brings into the party. The highlight of this release in comparison to the previous one, includes an updated version of SmartDSP OS and addresses some errata.   Now, if you are developing for MSC8156, PSC9131 and G1110, or need early PSC9132 support, you totally should download the product, as well if the build tools (via makefile) and simulators (via Runsim) you're using support MSC8156 and SC3850 development.   If you need to migrate MSC8144 projects to target MSC8156 and you are currently using CodeWarrior Developer Studio 3.2 and previous versions, you must get it, too!   Finally, if you seek for better performance from code not previously hand-optimized or developers willing to tune their code for performance, you woulnd't want to miss this, would you?   Are you familiar with any of these cases? Download the new product!     For internal users,you can obtain JTAG and Trace Hardware by contacting your local Freescale sales representative or Buy Direct on the Freescale web site. Part numbers for the hardware are listed below:   CWH-UTP-STC-HE: USB TAP for StarCore CWH-ETP-STC-HE: Ethernet TAP for StarCore     On the contrary, if you are developing for StarCore MSC8122/26, MSC8113/12, MSC8101/3, and MSC711x DSPs, I do not recommend you to download it because these processor families will not be supported with CodeWarrior for StarCore v10.0. Also if you are already developing production code targeting StarCore MSC8144 using CodeWarrior for StarCore 3.2, I strongly advice you to keep creating amazing stuff with this version.   For any concern, follow DebuggerGuys and don't be afraid of asking your doubts! General
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How to enable SPI NOR boot for i.MX28 (Spansion s25fl256s) Here is an example for i.MX28 EVK board to support SPI NOR boot in uboot, kernel and MFGTool.   Attached files are the patches to support SPI NOR flash on i.MX28 EVK bord based on L2.6.35 ER11.09.01 BSP. It was verified on Spansion s25fl256s SPI NOR. "ER11.09.01_uboot_imx28_spi_nor.patch" is the Uboot patch. "ER11.09.01_kernel_imx28_spi_nor.patch" is the kernel patch. "ucl.xml" is the updated MFGTool config file, please update it to "Mfgtools-Rel\Profiles\MX28 Linux Update\OS Firmware\ucl.xml".   The uboot boot paramters for SPI: setenv bootargs_base 'setenv bootargs console=ttyAM0,115200' setenv loadaddr 0x42000000 setenv bootargs_spi 'setenv bootargs ${bootargs} root=/dev/mtdblock2 rootfstype=jffs2 rootwait rw ip=none' setenv bootcmd_spi 'run bootargs_base bootargs_spi;sf probe 2:0; sf read ${loadaddr} 0x100000 0x300000;bootm' setenv bootcmd 'run bootcmd_spi' saveenv   To boot the board from SPI NOR s25fl256s, the 4KB page region of the NOR should be put to top, the last 128KB of the NOR address space. The uboot.sb is about 220KB, it can't be put to 4KB and 64KB combined region. The IMX28 boot ROM can only handle simple page size for boot. All 4KB page region or all 64KB page region are both OK for boot, but combined region can't boot.   For default, the s25fl256s NOR's 128KB 4KB page size region is at the bottom of the NOR, we should update the OTP to set this region to TOP, in Uboot, we run the followed command to burn the OTP: MX28 U-Boot -> sf probe 2:0 MX28 U-Boot -> sf set_config_reg 0x04   To boot the i.MX28 EVK board from SPI2 NOR flash, the BM3~0 should be 0010.   In this example, we only used the JFFS2 file system. To support the UBIFS, there is a known issue, that the UBIFS will use vmalloc to alloc memory, and if SPI driver used the DMA, kernel will halt with error "kernel BUG at arch/arm/mm/dma-mapping.c:409!".   For 11.09.01 BSP, the default MFGTool rootfs "initramfs.cpio.gz" will be bigger than 4MB, but in i.MX28 bootlets code, the BSP only set ramdisk to 4MB, so we need modify this limitation for MFGTool.   Use command "./ltib -p imx-bootlets -m prep" to get the bootlets code, modify "ltib/rpm/BUILD/imx-bootlets-src-11.09.01/linux_prep/core/setup.c", function setup_initrd_tag(), change from "params->u.initrd.size =  0x00400000;" to "params->u.initrd.size =  0x00500000;". Modify "ltib/rpm/BUILD/imx-bootlets-src-11.09.01/updater.bd" and "updater_ivt.bd", change from "load 0.b    > 0x40800000..0x40c00000;" to "load 0.b    > 0x40800000..0x40d00000;".   Now the MFGTool rootfs size can be 5MB.   2013-05-09: Updated hardware rework: On iMX28 EVK board, rework J89 as followed and mount R320,R321,R322 and C178. MX28 U49 Pin1 /CS <-> NOR Pin7 CS# MX28 U49 Pin2  D0 <-> NOR Pin8 SI/IO1 MX28 U49 Pin5 DIO <-> NOR Pin15 SI/IO0 MX28 U49 Pin6 CLK<-> NOR pin 16 SCK. MX28 U49 Pin8 VCC <-> NOR Pin2 VCC                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 MX28 U49 Pin4 GND <-> NOR Pin10 VSS MX28 U49 Pin3 /WP <-> NOR Pin9 WP MX28 U49 Pin7 /Hold <-> NOR Pin pin1 hold   Software reset issue for 32MB SPI NOR: For 32MB SPI NOR, after booted into kernel, the kernel driver will set SPI NOR to 4 bytes address mode, but for iMX28 SPI boot, it can only boot with 3 bytes address mode, if reset the iMX28 board but SPI NOR was not reset, it will fail to reboot. Hardware solution: when iMX28 was reboot, reset the SPI NOR too, the SPI NOR will work in 3 bytes address mode as default. Software solution: In kernel SPI NOR driver, always switch SPI NOR to 3 bytes address mode after each SPI NOR access, and switch to 4 bytes address mode before each access. There is no such issue if the SPI NOR size is less than 32MB.     i.MX2x Linux
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Configuring PPB Area Access in the TEE Tool If you are using LPCSxx microcontrollers and the TEE tool for configuration of resources isolation, you may encounter a tool warning or the chip’s behaviour differs from the expectations. This article may help you in configuring the Private Peripheral Bus (PPB) area properly. The 0xE000_0000 – 0xFFFF_FFFF area has specific behaviour in the TrustZone. The area’s security can be configured in the SAU, however, multiple regions are either exempt from security checking, or are fixed as Secure. Especially: 0xE000_0000 - 0xE000_2FFF – exempt from security violation checks 0xE000_E000 - 0xE000_EFFF – exempt from security violation checks 0xE002_E000 - 0xE002_EFFF – exempt from security violation checks 0xE004_0000 - 0xE004_1FFF – exempt from security violation checks 0xE00F_F000 - 0xE00F_FFFF – exempt from security violation checks 0xE000_0000 - 0xEFFF_FFFF – exempt from security violation checks for instruction fetch 0xF000_0000 – 0xFFFF_FFFF – fixed as Secure Therefore if you configure any address range mentioned above as a Non-Secure region in the SAU, the TEE tool generates a warning.
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i.MX6X Core Board User Guide.pdf
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USB DFU boot loader for MCUs By Paolo Alcantara RTAC Americas Mexico 2012 USB device firmware update (DFU) bootloader provides an easy and reliable way to load new user applications to devices having preloaded the USB DFU bootloader. After loaded, the new user application is be able to run in the MCU. The USB DFU bootloader requires an application running on a PC (USB DFU PC application). The DFU PC application supports loading the firmware to the device by using specific requests as stated in the USB DFU specification class. The USB DFU bootloader is able to enumerate in two ways: -USB composite device mode: also know as run time mode. It’s formed of a DFU device plus another USB device class. For this implementation, human interface device (HID) mouse device is used to avoid increasing the bootloader memory size. The MCU must be in the following conditions prior to enter to this mode: MCU doesn’t contain a valid firmware image or doesn’t contain firmware. An external action is applied to MCU such as pressing a button during a reset event. This is dependant of the USB DFU bootloader implementation. -DFU device mode: used when DFU is ready to upload or download firmware images by a request made from the USB DFU PC Application. Prior to this mode, the MCU was in USB composite device mode. A bootloader is a small application that is used to load new user applications to devices. Therefore, the bootloader needs to be able to run in both, the user application and bootloader mode. As an example: After reset, the device attempts to run the user application. If the user application is not found or corrupted, the device automatically runs into bootloader mode. In case the application is valid and user wants to run bootloader program, external intervention is required such as pressing a specific key at reset time to force the device entering to bootloader mode. Full application note and software attached. Re: USB DFU boot loader for MCUs Is the source code for the DFU PC Demo software available (or can it be made available)? Re: USB DFU boot loader for MCUs Thanks for your comments. The PLL passed. The code works, I will test the bootloader with my own code. The code should be revised on website. Re: USB DFU boot loader for MCUs Yes Re: USB DFU boot loader for MCUs Yes, the VID and PID are defined in the usb_descriptor.c file. The VID and PID in the PC inf file are also needed to be modified. Re: USB DFU boot loader for MCUs Change the value of MCG_C2 as the following: //    MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK | MCG_C2_IRCS_MASK;    MCG_C2 = (MCG_C2_LOCRE0_MASK | MCG_C2_RANGE0(1) | MCG_C2_EREFS0_MASK); Re: USB DFU boot loader for MCUs I have tried it on IAR EW650+FRDM-KL25Z. It doesn't work. When I look into debugger. It has nothing to do with GPIO differences between TWR and FRDM. I found it is hung in clock setup pll_init(). main_kinetis.c pll_init()         SIM_CLKDIV1 = 0x1003000 // OUTDIV1 = 0x01, OUTDIV4 = 0x03         MCG_C2 = 0x2D // RANGE=2, HGO=1, EREFS=1, LP=0, IRCS=1         MCG_C1 = 0x98 // CLKS=2, FRDIV=3        ......         #ifndef EXTERNAL_OSC             /* wait for oscillator to initialize */             while (!(MCG_S & MCG_S_OSCINIT_MASK)) //<=== loop forever for OSCINIT             {;}         #endif I am not familiar with KL25Z so far. Would you please give some suggestions? Re: USB DFU boot loader for MCUs Will this work with MCF51JM? Re: USB DFU boot loader for MCUs Thanks a lot for this very useful app note. I would like to know if it is possible to modify the USB VID/PID (since my company owns a vendor id...) ? Best regards, AV
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EdgeLock™ SE050 と EdgeLock 2GO による産業用アプリケーション向けのセキュアな認証情報管理 EdgeLock™ SE050ファミリーは、ICレベルでの信頼の基点を提供します。このCC EAL6+認定セキュアエレメントは、ISO/IEC 62443 SL3などの規格への準拠もサポートしています。EdgeLock SE050は、認証とアクセス権を安全に管理するためのキーと資格情報を保存します。しかし、これらの資格情報はセキュアエレメントにどのように保存されるのでしょうか?また、現場で安全な方法で資格情報を変更または更新する場合はどうでしょうか。 さまざまなNXPコンポーネントで構成されるデモとともに、EdgeLock SE050で資格情報をプロビジョニングおよび変更して、産業用およびスマートホームアプリケーションの安全なアクセスを実現する方法を体験します。また、資格情報を管理するためのさまざまなオプションと、NXPのEdgeLock 2GOマネージドサービスを使用してIoTデバイスを構成する方法についても学習します。デモに続いて、さまざまなHWおよびSWビルディングブロックを確認し、NXPソリューションに基づいてこのようなユースケースを実装する方法について説明します。 NXPコンポーネントには、EdgeLock SE050セキュアエレメント、EdgeLock 2GOサービス、i.MXRT1060クロスオーバーMCU、CLRC663 NFCフロントエンド、88W8977 WiFi 4およびBluetooth SoC(PAN9026モジュールを使用)が含まれます。 プレゼンター: Antje Schütz氏、IoTセキュリティ担当シニアマーケティングマネージャー、NXP Massimo Incerti氏、EMEAディストリビューションCASマネージャー、NXP
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Developer’s Serial Bootloader. for M68HC08, HCS08, ColdFire and Kinetis MCUs by: Pavel Lajsner, Pavel Krenek, Petr Gargulak Freescale Czech System Center Roznov p.R., Czech Republic The developer's serial bootloader offers to user easiest possible way how to update existing firmware on most of Freescale microcontrollers in-circuit. In-circuit programming is not intended to replace any of debuging and developing tool but it serves only as simple option of embedded system reprograming via serial asynchronous port or USB. The developer’s serial bootloader supported microcotrollers includes 8-bit families HC08, HCS08 and 32-bit families ColdFire, Kinetis. New Kinetis families include support for K series and L series. This application note is for embedded-software developers interested in alternative reprogramming tools. Because of its ability to modify MCU memory in-circuit, the serial bootloader is a utility that may be useful in developing applications. The developer’s serial bootloader is a complementary utility for either demo purposes or applications originally developed using MMDS and requiring minor modifications to be done in-circuit. The serial bootloader offers a zero-cost solution to applications already equipped with a serial interface and SCI pins available on a connector. This document also describes other programming techniques: FLASH reprogramming using ROM routines Simple software SCI Software for USB (HC08JW, HCS08JM and MCF51JM MCUs) Use of the internal clock generator PLL clock programming EEPROM programming (AS/AZ HC08 families) CRC protection of serial protocol option NOTE: QUICK LINKS The Master applications user guides: Section 10, Master applications user guides. The description of Kinetis version of protocol including the changes in user application: Section 7, FC Protocol, Version 5, Kinetis. The quick start guide how to modify the user Kinetis application to be ready for AN2295 bootloader: Section 7.8, Quick guide: How to prepare the user Kinetis application for AN2295 bootloader. Full application note and  software attached. Freedom Development Platform Kinetis K Series MCUs Kinetis L Series MCUs Re: Developer’s Serial Bootloader. Hi, link is broken, can you fix it please? Re: Developer’s Serial Bootloader. Is there any support for the 9s12 parts?  It would seem to be a good fit. Bob Re: Developer’s Serial Bootloader. https://community.freescale.com/thread/38615?start=210&tstart=0 Re: Developer’s Serial Bootloader. Where I can find this bootloader for CW? I need implement it on KwikStick its running on K40X256VLQ. I have downloaded this version for IAR and can build it with iar but can't build debug version, so any help is good from you guys. When I try to build debug version with iar I get this error " Error[Li005]: no definition for "main" [program entry] Error[Lp014]: cannot fit "Section .text (bootloader.o #21)" (min size 0x5a0, alignment 0x4) into any of the ranges <[0x00000040-0x000003ff],  [0x00000410-0x000008ff]> Error while running Linker " I tried to edit project->options->debugger->runto __main but with no success. Re: Developer’s Serial Bootloader. Hi, Yes it is available for Kinetis K, L and M series. Re: Developer’s Serial Bootloader. Hi All, Is it available for Kinetis? Thanks. Re: Developer’s Serial Bootloader. Hello. Anyone know when it will be available the Serial Bootloader for Kinetis, for CodeWarrior 10.3? Thank you. Fernando. Re: Developer’s Serial Bootloader. CodeWarrior 10.4 is out. Any idea when the Serial Bootloader for Kinetis will be available? Thanks.. Joe Re: Developer’s Serial Bootloader. Actually I tried to enforce EWARM to jump to __main instead of main, but debugger report error as well. I forgot to mentioned in my previous post. I know supporting different compilers + mcu + boards + configurations are messy and difficult work. Re: Developer’s Serial Bootloader. Hi All, New version of the bootloader includes support for CodeWarrior 10.3 for all Kinetis families will be available in the next weeks. Pavel Krenek AN2295 developer Re: Developer’s Serial Bootloader. Hi, classic main function is not included in the bootloader source code, we used __main as you mentioned. This function has the same functionality. Re: Developer’s Serial Bootloader. It covers too many micros in one package. I doubt if you guys have enough time to test the code. Re: Developer’s Serial Bootloader. I use AN2295 for Kinetis KL25Z FRDM as bootloader. I can build it successfully, but its debugger reports following message: The stack plug-in failed to set a breakpoint on "main". The stack window will not be able to display stack contents. You can change this setting in the Tools>Options dialog box. Actually I can not find main(void), but I do find __main(void) in bootloader.c How can I fix it? Re: Developer’s Serial Bootloader. I heard freescale was suppose to release the software for the kinetis but I have not seen it. Still waiting. Re: Developer’s Serial Bootloader. Is there some gays to use this docment to do it sucessful Re: Developer’s Serial Bootloader. Same here. I am struggling to convert this over to CW 10.3 for the TWR-K20D50M using either CWC-compiler or the GNU-compiler. Has anyone succeeded with that yet? Re: Developer’s Serial Bootloader. I am struggling a little trying to convert this over to Codewarrior 10.2 and a K70. Has there been any work done on that yet? Or even a CW10.3 version? Re: Developer’s Serial Bootloader. It would be fantastic if a Codewarrior 10.x version were to be available. I am having a little difficulty figuring out the conversion. Linker files, etc. Thank you very much for posting this. P
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为什么它坏了?(CodeWarrior工具) <meta http-equiv="Content-Type" content="text/html; charset=utf-8" />   确实,编码并不总是一件容易的工作,特别是当涉及到你不熟悉的工具时。我不是CodeWarrior专家,但我非常喜欢开发嵌入式系统或至少其中的一部分。显然,一开始IDE上会出现一堆错误信息。(对于某些人来说这是一个很棒的功能,尽管 C 和 C++ 不会立即显示词汇或命令错误)。   当我尝试完成我正在处理的一组代码行时,通常会出现一堆有趣的错误消息,例如“非法的‘朋友’声明”或“函数没有原型”。   好吧,我最近在 飞思卡尔 的网页上找到了更新的 BUILD TOOLS MESSAGE REFERENCE MANUAL 。构建工具消息参考手册记录了 CodeWarrior 构建工具生成的消息。此信息可帮助您解决构建工具在构建项目时遇到的问题。请注意,本手册仅记录由编译器、汇编器和链接器生成的消息。   它显示了错误消息的详细列表以及如何修复它们,所以现在就去检查一下,它非常有用! 概述
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UART Emulation Using the FTM or TPM Introduction Even with the prevalence of universal asynchronous receiver/transmitter (UART) peripherals on microcontrollers (MCUs), bit banged UART algorithms are still used.  The reasons for this vary from application to application.  Sometimes it is simply because more UARTs are needed than the selected device provides.  Maybe application or layout restrictions require certain pins to be used for the UART functions but the device does not route UART pins to the required package pins.  Maybe the application requires a non-standard or proprietary UART scheme. Whatever the reason, there are applications where a bit banged UART is used and is typically a pure software implementation (a timer is used and the MCU core controls a GPIO pin directly).  A better alternative may be to use Flextimer (FTM) or Timer/PWM Module (TPM) to take advantage of the features of these peripherals and possibly offload the CPU.  This document will explain and provide a sample application of how to emulate a UART using the FTM or TPM peripheral.  A Kinetis SDK example (for the TWR-K22F120M and FRDM-K22F platforms) and a baremetal legacy code example (for the FRDM-KL26Z) are provided here. UART protocol Before creating an application to emulate a UART, the UART protocol and encoding must be understood. The UART protocol is an asynchronous protocol that typically includes a start bit, payload (of 7-10 data bits), and a stop bit but does allow for many variations on the number of stop bits and what/how to transfer the data.  For this document and application example, the focus will be UART transmission that follows 1 start bit, 8 data bits, 1 stop bit, no parity, and no flow control.  The data will be transmitted least significant bit (LSB) first.  The following image is a block diagram of this transmission. However, this doesn't specify what the transmission looks like electrically. The figure below shows a screenshot of an oscilloscope capture of a UART transmission.  The data transmitted is 0x55 or a "U" in the ASCII representation. Notice that the transmission line is initially a logic high, and then transitions low to signal the start of the transmission.  The transmission line must stay low for one bit width for the receiver to detect it.  Then there are 8 data bits, followed by 1 stop bit.  In the case shown above, the data bits are 0x55 or 0b0101_0101.  Remember that the transmissions are sent LSB first, so the screenshot shows 1-0-1-0-1-0-1-0.  The last transition high marks the beginning of the stop bit and the line remains in that state until the start of the next transmission.  The receiver, being asynchronous, does not require any type of identifying transition to mark the end of the stop bit. FTM/TPM configuration The first question many may ask when beginning a project like this is "How do I configure the FTM/TPM when emulating a UART".  The answer to this depends on the aspect of this problem you are trying to solve.  Transmitting and receiving characters require two different configurations.  Transmission requires a configuration that manipulates the output pin at specific points in time.  Receiving characters requires a configuration that samples the receive pin and measures the time between pin transitions.  The FTM and TPM have the modes listed in the following table: The FTM and TPM have four different modes that manipulate an output:  Output compare (no pulse), Output compare (with pulse), Edge-aligned PWM, and Center-aligned PWM.  Neither PWM mode is ideal for the requirements of the application.  This is because the PWM modes are designed to produce a continuous waveform and are always going to return to the initialized state once during the cycle of the waveform.  However, the UART protocol may have continuous 1's or 0's in the data without pin transitions between them. The output compare mode (high-true or low-true pulse modes) is designed to only manipulate the pin once, and only produces pulses that are one FTM/TPM clock cycle in duration.  So this is obviously not desirable for the application.  The output compare mode (Set/Clear/Toggle on match) is promising.  This mode manipulates the output pin every cycle.  There are three different options:  clear output on match, set output on match, and toggle output on match.  Neither "clear output on match" nor "set output on match" are ideal as either would require configuration changes during the transmission of a character.  The "toggle output on match", however, can be used and is the selected configuration mode for this sample application. To receive characters, there is only one mode that is intuitive:  "the input capture mode".  This mode records the timer count value on an edge transition of the selected input pin.  Similar to the output compare mode chosen for the transmit functionality, the input capture mode has three sub-modes:  capture on rising edge, capture of falling edge, and capture on either edge.  It is clear from the descriptions that capture on either edge should be selected. Transmit encoding The selection of the FTM/TPM mode is moderately intuitive, but using this mode to emulate a UART transmission is not.  There are two issues that make this a little tricky. 1) The output pin is initialized low. However, the UART protocol needs the pin to begin in a logical high state. 2) The pin transitions on every cycle provided the channel value is less than the value of the MOD register. Due to continuous strings of 1's or 0's, it is necessary to have periods where the pin does not transition. Both of these points have workarounds. Output pin initialization For the first issue, the channel interrupt is first enabled and the channel value register is loaded with a value much less than the value in the MOD register.  Then in the channel interrupt service routine, the pin is sampled to ensure that it is in the logic high state and the channel interrupt is disabled (and will not be re-enabled throughout the life of the application).  The code for this interrupt service routine is as follows. Output pin control For the second issue, a method of not transitioning the pin value while allowing the timer to continue counting normally is necessary.  The Output Compare mode uses the channel value register to determine when the pin transition occurs.  If a value greater than MOD is written to the channel value register, the channel value will never match the count register and thus, a pin transition will never occur.  So, when a series of continuous 1's or 0's need to be transmitted, a value greater than the value in the MOD register can be written to the channel value register to keep the output pin in its current state. However, when a value greater than MOD is written to the channel value register, no channel match will occur (which means channel interrupts will not occur).  So the timer overflow interrupt must be used to continue writing values.  This requires the updates to be output pin to be planned ahead of time and makes the transmission algorithm a little tricky.  The following diagram displays when which values should be written to the channel value register at which points in time to generate the appropriate pulses. Writing a function to translate a number into the appropriate series of MOD/2 and MOD+1 values can be a little tricky. To do this, we must first notice that MOD/2 needs to be written when changes on the transmission pin are need and MOD+1 needs to be written when pin transmissions are not desired.   So, what logical function can we use to determine when a change has happened?  XOR is the correct answer.  So what two values need to be XOR'd together?  One value is obviously the value that we want to send.  But what is the second value?  It turns out that the second value is a shifted version of the value that we want to send.  Specifically, the second value is the desired value to send shifted to the left by one.  (You can think of it as sort of a "future" value of the desired value).  The following pictures show how to determine the queue to use for the transmission. Receive decoding The receive functionality has an advantage over the transmit functions in that it is possible to use DMA for the reception of characters.  This is because the receive function takes advantage of the input capture functionality of the FTM / TPM and therefore can use the channel match interrupt.  The example application provided with this document implements a DMA method and a non-DMA method for reception. First, the non-DMA method will be discussed. Before discussing the specifics of gathering the input pulse widths, some details of the receive pin need to be discussed. Detecting the start bit The receive pin needs to be able to determine when the start of the packet transmission begins.  To do this, the receive pin is configured as an FTM / TPM pin. At the same time, the GPIO interrupt functionality is configured on the same pin for a falling edge interrupt.  The GPIO interrupt capabilities are enabled in any digital mode, so the GPIO interrupt will still be able to be routed to the Nested Vector Interrupt Controller (NVIC).  The pin interrupt is used to start the FTM / TPM clock when a new character reception begins. In the GPIO interrupt for this pin, the FTM / TPM counter register is reset and the clock to the FTM / TPM is turned on.  The code for the GPIO interrupt service routine is shown below.  Receiving characters without DMA Now, when receiving characters and not using DMA, the first thing to understand is that the Interrupt Service Routine (ISR) will be used and it will mainly be used to record the captured count values.  The interrupt service routine also tracks the current receive character length and resets the counter register.  This is so that the values in the receive queue reflect the time since the last pin transition.  The interrupt function for the non-DMA application is shown below. Notice that the first two actions in the ISR are resetting the count register, and clearing the channel event interrupt flag.  Then the channel value is stored in the receive pulse width array (this is simply an array that holds the receive pulse widths of the current character being received).  Next, recvQueueLength, the variable which holds the current length of the character being received, is updated to reflect the latest character length.  The next step is to determine if the full character has been received.  This is determined by comparing recvQueueLength to the RECV_QUEUE_THRESH, which is the threshold as determined by multiplying the number of expected bits by the expected bit width plus another bit width (for the start bit).  If the recvQueueLength is greater than the RECV_QUEUE_THRESH, then a semaphore is set, recvdChar, to indicate that a full character has been received.  The FTM / TPM clock is turned off, and the pin interrupt functionality of the receive pin is enabled.  The final step in the interrupt routine is to increment the receive queue index, recvQueueIndex.  This variable points to the current entry in the receive queue array. Using DMA to receive characters When using DMA, the receive FTM / TPM interrupt is much different. The interrupt routine simply needs to clear the channel interrupt flag, stop the FTM / TPM timer, disable the DMA channel, and set the received character semaphore.  The character is then decoded outside of the interrupt routine.  The interrupt function when using DMA is shown below: Decoding the received pulse widths Once the array of pulse widths has been populated, the received character needs to be translated into a single number.  This varies slightly when using DMA and when not using DMA. However, the basic principle is the same.  The number of bits in a single entry is determined by dividing by the expected bit width and this is translated into a temporary array that contains 1's and 0's, and then that is used to shift in the appropriate number of 1's and 0's into the returned char variable.  A temporary array is needed because the values are shifted into the UART LSB first, so the bit must be physically flipped from the first entry to the last.  There is no logical operation that will do this automatically. The algorithm to perform this translation is shown below.  In this algorithm, note that recvPulseWidth is the array that contains the raw count value of the pulse width.  The array tempRxChar holds the decoded character in reverse order and rxChar is a char variable that holds the received character. Conclusion This document provides an overview of the UART protocol and describes a method for creating a software UART using the timing features of the FTM or TPM peripheral.  This method allows for accurate timing and while not relying entirely on the CPU and the latency associated with the interrupt and the GPIO pins.  The receive function is open to further optimization by using DMA, which can provide further unloading of the CPU. Kinetis Hardware Support Kinetis K Series MCUs Kinetis L Series MCUs Kinetis V Series MCUs
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FMPLL 変調の例 GHS716 MPC5746C *詳細な説明: * この例では、20kHzで250ステップの周波数変調を示しています。 *テストHW:xPC57xx EVB + MPC5746Cミニモジュール *マスクセット:1N06M ※対象:内部フラッシュ * Fsys:160 MHz PLL * ******************************************************************************** 改訂履歴: 1.0 2014年10月29日 b21190(VLNA Peter) 初期バージョン 1.1 2014年11月20日 b21190(VLNA Peter) Cut2.0 用修正 1.2 2015年4月23日 b21190(Vlna Peter) INTCドライバとPIT ISRを追加 1.3 2015年5月14日 b21190(Vlna Peter) スタートアップコードでSWTを分解する 1.4 Jun-06-2017 b21190(Vlna Peter)をMPC5746Cに移植 1.5 Sep-29-2020 b21190(Vlna Peter) 20kHz周波数変調を追加 *******************************************************************************/ テスト
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MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> このMQXデモは、GT202 Wi-FiモジュールをSoftAPモードでセットアップした標準のMQX web_hvacデモを再利用しています。この例では、Atherosドライバを使用してKinetisマイクロコントローラで実行されているMQX RTCS、DHCPサーバ、およびWebサーバを示しています。クライアントは、ソフトアクセスポイントに接続し、IPアドレスを受け取り、Webブラウザを使用してweb_hvac Webページを表示できます。 ユーザーガイドはZIPファイルに含まれています。 <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> このMQXデモは、GT202 Wi-FiモジュールをSoftAPモードでセットアップした標準のMQX web_hvacデモを再利用しています。この例では、Atherosドライバを使用してKinetisマイクロコントローラで実行されているMQX RTCS、DHCPサーバ、およびWebサーバを示しています。クライアントは、ソフトアクセスポイントに接続し、IPアドレスを受け取り、Webブラウザを使用してweb_hvac Webページを表示できます。 ユーザーガイドはZIPファイルに含まれています。 通信インフラストラクチャ 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 私も同じ問題を抱えていました:それはあなたがどの「パッチ」をインストールするかによります....このファイルには、FRDMK22 (FSLMQX4.1_PATCH_GT202_3.0.2CS.exe から Setup_MQX4.1_GT202_3.0.2CS.exe) のパッチが含まれていませんしかし、私はこのファイルをQCA4004と一緒に持っていました。MQX.exeパッチ)。 誰かが必要な正確なパッチ(名前とリンク)とそれらを適用するためのオーダーを共有するべきなら、それは完璧です! 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> 私にとっては今のところありません、多くの時間(数日)の後でも... このデモは、IARとFRDM K22、さらには.binでも完璧です再構築(throughput_demo)。 しかし、その後、FRDM K64、MQX4.1、CW10.6は何もありませんでした...。 もし誰かがより良い結果を持っているなら、共有してください 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> ねえ皆さん GT-202とFRDM-K64Fボード、Kinetis Studio環境を使用して、この例を動作させることに成功した方はいらっしゃいますか? 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> こんにちはクリフ GT202モジュールをプロジェクトに含めたいのですが、問題があります。FRDMK64FボードとMQX4.1を使用しています。Kinetis Design Studio 3.0という開発環境を使用しています。あなたは幸運にも移住しましたか?その過程で私を助けてもらえますか? ありがとうクリフ ケビン・カーセル 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> こんにちはトーマス ユーザーガイドの手順に従って、Qualcomm Wi-Fiモジュールに必要なMQXパッチを追加しましたか? 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> こんにちはクリフ、 ご自身で何か進歩はありましたか?私も似たような状況に陥っています。Kinetis開発ボードと直接インタフェースし、フリースケールOSを実行するボードが、Kinetis Development Studioで使用するために移植されていないのは、ちょっとイライラします。 Larry 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> こんにちはチンニホワイト、 web_hvacを見つける場所がはっきりしていなかったら申し訳ありません。web_hvacデモは、MQX v4.1.1以前に含まれている標準のMQXデモです。\demo\web_hvacにあります。GT202 PDKのインストール手順に従えば、MQX v4.1.0のインストールが1ステップです。その手順の後、web_hvacデモがインストールに含まれるようになります。 GT202 PDK をインストールしても、web_hvac デモは変更されません。これは、MQXインストールで提供されたオリジナルのデモです。先ほど、このページの SoftAP デモは web_hvac デモに基づいており、GT202 モジュールと SoftAP 機能を使用するように変更されたことを説明しました。GT202 の更新されたweb_hvacを確認したい場合は、この SoftAP デモを例に挙げることができます。 このページはDemoLabコミュニティスペースにあるため、ここに投稿されたコメントはMQXサポートチームに気づかれません。この SoftAP デモに固有の質問がある場合は、お知らせください。MQXに関する他の質問がある場合は、https://community.freescale.com/community/mqx で新しいディスカッションを作成することをお勧めします ありがとうございます 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> こんにちはクリフ、 KSDK v1.1.0を参照しているようです<>以下に。Kinetisソフトウェア開発キット(KSDK)は、ドライバ、スタック、およびMQXなどのRTOSのライブラリです。Kinetis Design Studio(KDS)<>は、Kinetisアプリケーションを構築するためのツールチェーンです。以下で参照する場所の例は、KSDK の一部です。 web_hvac例は、MQXがKSDKと統合される前のMQXインストールから来ています。現在はMQX v4.1.1以前です。GT202 PDKのインストール手順に従うと、\Freescale_MQX_4_1\demo\web_hvacにweb_hvacデモがインストールされています。web_hvacデモをMQX for KSDKに移植する計画があると思いますが、最新のKSDK v1.1.0の時点では含まれていません。 ただし、GT202ドライバーはまだKSDKに移植されていないことに注意してください。GT202ドライバーとPDKはMQX v4.1.0で開発されました。GT202 を KSDK と共に使用する場合は、ドライバーを移植し、KSDK SPI および GPIO ペリフェラル ドライバーを使用する必要があります。または、MQX v4.1を使用している場合は、GT202ドライバーがすでに移植されています。 ありがとうございます 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> こんにちはクリフ、 はい、GT202 MQX サンプル プロジェクトが IAR を使用しているため、この SoftAP デモ プロジェクトは IAR を使用しています。他のツールチェーンの GT202 MQX サンプル プロジェクトを知りません。 しかし、ご存知のように、MQXにはKDS用のFRDM-K64F BSPプロジェクトが含まれています。そのプロジェクトを変更して、GT202 の BSP に Atheros ドライバーを追加できます。FRDM-K22FのGT202サンプルBSPを参考にすることができます。また、ドライバーを統合するために必要な、提供されている BSP ファイルにもいくつかの変更が加えられています。GT202 FRDM-K22F BSPファイルに加えられた変更は、MQXインストールの元のFRDM-K22F BSPファイルと比較して確認できます。次に、K64BSPで同様の変更を加えます。 SoftAP アプリケーションの例は、MQX に含まれている web_hvac デモに基づいています。このデモには、FRDM-K64FのKDSプロジェクトもあります。そのため、アプリケーションはそのデモ プロジェクトから開始し、SoftAP デモからソース ファイルをコピーできます。BSP に GT202 ドライバーを使用すると、この SoftAP アプリケーションをビルドできます。 それがお役に立てば幸いです。感謝 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> こんにちはチンニホワイト、 MQX では、BSP で複数の ENET デバイスを有効にできます。しかし、GT202と有線イーサネットでそれを示す例は知りません。 MQXスペースに新しい質問を投稿して、MQXサポートスタッフがそれを認識し、回答できるようにすることをお勧めします。 https://community.freescale.com/community/mqx ありがとうございます 日時:MQX Wi-Fi SoftAPデモ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> これは本当に適切です。これをできるだけ早くIoTTでライブにしたいです!Iot.freescale.com
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