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iMX93 : Voltage Monitoring Issue with i.MX93 EVK Using BCU Tool Hello NXP Community, I'm currently using the i.MX93 EVK and have encountered an issue while monitoring the board's power supply with the BCU tool. Attached is a picture showing the voltage readings I'm getting. Despite these readings, everything else appears to be functioning normally—the Linux OS boots up without issues and the display output is as expected. Has anyone else experienced similar voltage readings with their setup? Could this indicate a potential problem, or are these variations within a normal range? Any insights or suggestions on how to address this would be greatly appreciated. Thank you in advance for your assistance! Re: iMX93 : Voltage Monitoring Issue with i.MX93 EVK Using BCU Tool Thank you very much !  Re: iMX93 : Voltage Monitoring Issue with i.MX93 EVK Using BCU Tool Hi @Khaled_Gued! Thank you for contacting NXP Support! Looks like you are using the wrong command in BCU tool. I am using the iMX93 EVK too and looks good. the command that I have used is the next: bcu monitor -board=imx93evk11b1 You can consult a detailed guidde here. Best Regards! Chavira
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MC33774 Internal acquisition circuitry The customer's engineer reported that there was a 1K resistance at the CTn of the acquisition pin about MC33774, see the picture. For example, if the external power supply is 3.3V, CTn-1 and CTn+1 are both 4V, but the voltage collected by CTn is only 1.7V. How does it affect the acquisition of CTn acquisition?Can the internal acquisition circuit be shared? Thanks! Evaluation Board Re: MC33774 Internal acquisition circuitry Okay I just want to confirm, that the board is your own design and you used our schematics. (what document did you use?) to make your board, but your board has an unusually resistance between the Cn and CTn-1 Please follow the link below: https://www.nxp.com/products/MC33774 Scroll to Documentation, in this section you must choose "secure files", if you do not have access, you must open a ticket to request access. I recommend you read: “MC33774A data sheet rev 2.0”, here you can find more information about the internal circuit and representation (here is the representation of the cell voltage acquisition circuit.) “MC33774A cell balancing modes” & “MC33775A and MC33774A measurement”, information with more examples of the different balancing modes and how measurement the cells “AN13881 - MC33774A layout recommendation and BOM justification”, if you decide change the design of your board I hope this information has helped you, please let me know if this information is enough, I have doubts if I am understanding you correctly. Correct me if I'm wrong Have a great day and best of luck. Re: MC33774 Internal acquisition circuitry Hi Rafa This 1K resistor is not added by design, but the board is abnormal and the resistor on the bench forms a series loop, thanks! Re: MC33774 Internal acquisition circuitry Hi Louis Before sharing my opinion I want to verify all the documentation. What example or documentation is your design based on? Have a great day and best of luck.
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如何在imx7d evm上配置emmc设备树 嗨,专家们 我正在尝试通过在 imx7d sabresd evm 上安装 emmc 进行测试。 为了启用 emmc,我在设备树中添加了 usdhc3 status="okay" 并使用 pinctrl_usdhc3 作为 pinctrl 设置 但是,没有MX7D_PAD_SD3_RESET_B_SD3_RESET的引脚描述 在原理图上,emmc 重置 ping 连接到 GPIO_SD3_RESET_B。我是否需要使用 rst-gpios 在 ushdc3 设备树中进行设置? 真诚感谢 i.MX7 双核 回复:如何在 imx7d evm 上配置 emmc 设备树 你好 是的,你需要使用重置密码 此致 志明
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S32K396 NXP RTOS Missing files Hello, I am trying to create NXP RTOS firmware using Design Studio for S32K396. On creating the firmware (example RTOS_example_S32K396_SC2),I get following error on compilation - ../RTOS_S32K396/include/Os_prop_autosar_api.h:47:17: fatal error: Os_prop.h: No such file or directory Building file: ../board/dcf_config.c 47 | #include "Os_prop.h" /* OS Properties */ | ^~~~~~~~~~~ I checked the installation, the mentioned file `Os_prop.h` is not available.  Is there any other package required which provides this file? Best regards, Nandan Chaturbhuj Re: S32K396 NXP RTOS Missing files Hello, I spend some time to build the example, and looks like you were not reading instruction in description.txt carefully and forget to add RTOS configuration in OS plugin. Such will generate all os required files like c and h into project folder. Best regards, Peter Re: S32K396 NXP RTOS Missing files Following are the packages installed - 1. S32K396_M7_NXP_RTOS_4_7_183_RTM_1_1_0_D2501_DesignStudio_updatesite.zip 2. SW32K3_S32M27x_RTD_R21-11_5.0.0_D2410_DesignStudio_updatesite.zip But the file mentioned is still missing. I checked in the Design studio installation folder as well. The file "Os_prop.h" file is not there as well. Can you share the location you have this file installed or generated ? Re: S32K396 NXP RTOS Missing files Hello, First, make sure tour SW version match the requirements. Could you please list the packages you have used? Like RTD, S3DS versions etc... ? Please respect the version of RTD and S32DS which is required to buide the demo, otherwise you wont be able to compile it: You will find demo requirements description in the demo project: Best regards, Peter
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MPC5777C - Com:55 Performance Monitor description not clear Hello! I need to count all the write-through requests to the memory hierarchy. To do so, I thought that the Com:55 performance monitor was the best fit. However, in the event collumn it says that the monitor counts "Write-through store translation hits", while the description collumn says that the monitor counts "Write-through stores translated".  It is not clear to me if the Com:55 performance monitor counts write-through store translation hits to the translation lookaside buffer or if it counts all Write-through stores translations. Which interpretation is correct? Best regards,  Matheus. Re: MPC5777C - Com:55 Performance Monitor description not clear 1) Yes, correct. 2) Yes, correct. 3) Certainly it does. Re: MPC5777C - Com:55 Performance Monitor description not clear Let me see if I understood: 1) Com:55 counter increases when a write-through is performed and the data to be stored in the SRAM is also in the L1 data cache (i.e., store hit). Is that correct? 2) So, if the data to be written via write-through in the SRAM is not present in the L1 data cache, Com:55 does not increase. Correct? 3) Does the counter increase when the virtual and physical addresses are the same? Best regards, Matheus. Re: MPC5777C - Com:55 Performance Monitor description not clear "translated" should point to virtual addresses i.e. store hits with enabled cache with write through
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SRAM 与 imxrt1062 接口 大家好,我需要帮助审查我的设计。这是我第一次使用IMXRT1062处理器进行设计。 我的设计的主要目标是使用 ADMUX 模式将 IMXRT1062 与外部 SRAM 连接起来,并使用 QSPI 将 IMXRT1062 与外部闪存连接起来。 我已经完成了电路设计,想知道是否需要进行任何更改或添加才能使电路完美运行。 我利用锁存器 74HC574 来分离地址和数据总线,利用缓冲器来控制读写操作,以及利用解码器 IC 来增加 SRAM 应用的芯片选择选项。 请发表评论并提出宝贵建议。 回复:SRAM与imxrt1062接口 请回复此帖子.... 回复:SRAM与imxrt1062接口 谢谢先生的宝贵意见和建议。 回复:SRAM与imxrt1062接口 你的设计看起来不错。它按照表 25-6 将 SRAM 引脚连接到 RT1060。 DQS 引脚上的电容器可能不需要,但这可以通过测试来评估,其值是通过测试不同的电容器值来选择的。 此致, 奥马尔
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Extended datasheet for MC33772B I would like to have the extended version of the datasheet for the MC33772B, as the current version of the datasheet is the short version lacking the register information. Thank you in advance. Re: Extended datasheet for MC33772B Dear Jose, to be able to download the MC33772B full datasheet and other confidential documents you need to have a valid NDA (Non Disclosure Agreement) and you need to be registered on the nxp.com page. If you do not have the valid NDA yet, please request it here. After the process you can download the datasheet from the MC33772B product page under the secure files. With Best Regards, Jozef
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TfLite NPU run error op_layout_inference.cc:MapAxis:177 Map axis failed Hello everyone Sorry for asking. I tried to build my own C++ program which is a converted program from python , to run a simple model to detect people for my board imx8m plus. The Code: 1. main.cpp // main.cpp #include "detector.h" #include int main(int argc, char* argv[]) { if (argc != 2) { std::cerr << "Usage: " << argv[0] << " " << std::endl; return 1; } std::string image_path = argv[1]; std::string model_path = "model.tflite"; std::string delegate_path = "/usr/lib/libvx_delegate.so"; cv::Size input_size(192, 192); float score_th = 0.5; float nms_th = 0.4; Detector detector(model_path, delegate_path, input_size, score_th, nms_th); if (!detector.init_model()) { return 1; } cv::Mat image = cv::imread(image_path); if (image.empty()) { std::cerr << "Failed to load image from " << image_path << std::endl; return 1; } auto [bboxes, scores] = detector.detect(image); for (size_t i = 0; i < bboxes.size(); ++i) { cv::rectangle(image, bboxes[i], cv::Scalar(0, 255, 0), 2); std::cout << "Detected bbox: " << bboxes[i] << " with score: " << scores[i] << std::endl; } // cv::imshow("Detections", image); cv::waitKey(0); return 0; } 2. detector.h // detector.h #ifndef DETECTOR_H #define DETECTOR_H #include #include #include #include #include #include #include #include "delegate_main.h" class Detector { public: Detector(const std::string& model_path, const std::string& delegate_path, const cv::Size& input_shape, float score_th, float nms_th); bool init_model(); std::pair<:vector><:rect>, std::vector > detect(const cv::Mat& image); private: std::string model_path_; std::string delegate_path_; cv::Size input_shape_; float score_th_; float nms_th_; std::unique_ptr<:interpreter> interpreter_; std::pair<:mat> preprocess(const cv::Mat& image, const cv::Size& input_size); std::tuple<:vector><:rect>, std::vector , std::vector > postprocess(cv::Mat& outputs, const cv::Size& img_size, float ratio, float score_th, float nms_th); void meshgrid(const cv::Range& x_range, const cv::Range& y_range, cv::Mat& xv, cv::Mat& yv); std::tuple<:vector><:rect>, std::vector , std::vector > nms(const std::vector<:rect>& bboxes, const std::vector & scores, float score_th, float nms_th); }; #endif // DETECTOR_H 3. detector.cpp // detector.cpp #include "detector.h" #include Detector::Detector(const std::string& model_path, const std::string& delegate_path, const cv::Size& input_shape, float score_th, float nms_th) : model_path_(model_path), delegate_path_(delegate_path), input_shape_(input_shape), score_th_(score_th), nms_th_(nms_th) {} bool Detector::init_model() { auto model = tflite::FlatBufferModel::BuildFromFile(model_path_.c_str()); if (!model) { std::cerr << "Failed to load model from " << model_path_ << std::endl; return false; } auto ext_delegate_option = TfLiteExternalDelegateOptionsDefault(delegate_path_.c_str()); auto ext_delegate_ptr = TfLiteExternalDelegateCreate(&ext_delegate_option); if (!ext_delegate_ptr) { std::cerr << "Failed to create external delegate" << std::endl; return false; } tflite::ops::builtin::BuiltinOpResolver resolver; resolver.AddCustom(kNbgCustomOp, tflite::ops::custom::Register_VSI_NPU_PRECOMPILED()); tflite::InterpreterBuilder builder(*model, resolver); builder(&interpreter_); if (!interpreter_) { std::cerr << "Failed to build interpreter" << std::endl; return false; } interpreter_->ModifyGraphWithDelegate(ext_delegate_ptr); if (interpreter_->AllocateTensors() != kTfLiteOk) { std::cerr << "Failed to allocate tensors" << std::endl; return false; } return true; } std::pair<:mat> Detector::preprocess(const cv::Mat& image, const cv::Size& input_size) { float ratio = std::min(static_cast (input_size.width) / image.cols, static_cast (input_size.height) / image.rows); cv::Size new_size(static_cast (image.cols * ratio), static_cast (image.rows * ratio)); cv::Mat resized_image; cv::resize(image, resized_image, new_size, 0, 0, cv::INTER_LINEAR); cv::Mat padded_image = cv::Mat::ones(input_size, CV_8UC3) * 114; resized_image.copyTo(padded_image(cv::Rect(0, 0, resized_image.cols, resized_image.rows))); std::vector<:mat> channels(3); cv::split(padded_image, channels); cv::Mat chw_image(3, input_size.height * input_size.width, CV_32F); for(int i = 0; i < 3; ++i) { channels[i].convertTo(channels[i], CV_32F); std::memcpy(chw_image.ptr (i), channels[i].data, channels[i].total() * sizeof(float)); } cv::Mat reshaped_image = chw_image.reshape(1, {1, 3, input_size.height, input_size.width}); return std::make_pair(reshaped_image, ratio); } std::tuple<:vector><:rect>, std::vector , std::vector > Detector::postprocess(cv::Mat& outputs, const cv::Size& img_size, float ratio, float score_th, float nms_th) { std::vector<:rect> bboxes; std::vector scores; std::vector class_ids; std::vector strides = {8, 16, 32}; std::vector<:mat> grids; std::vector<:mat> expanded_strides; for (int stride : strides) { int hsize = img_size.height / stride; int wsize = img_size.width / stride; cv::Mat xv, yv; meshgrid(cv::Range(0, wsize - 1), cv::Range(0, hsize - 1), xv, yv); cv::Mat grid; cv::hconcat(xv.reshape(1, 1), yv.reshape(1, 1), grid); grids.push_back(grid.reshape(2, 1)); expanded_strides.push_back(cv::Mat(grid.size(), CV_32F, cv::Scalar(stride))); } cv::Mat grid_cat, stride_cat; cv::vconcat(grids, grid_cat); cv::vconcat(expanded_strides, stride_cat); outputs.colRange(2, 4).convertTo(outputs.colRange(2, 4), CV_32F); cv::Mat exp_colRange(outputs.colRange(2, 4).size(), CV_32F); cv::exp(outputs.colRange(2, 4), exp_colRange); outputs.colRange(0, 2) = (outputs.colRange(0, 2) + grid_cat) * stride_cat; outputs.colRange(2, 4) = exp_colRange.mul(stride_cat); cv::Mat predictions = outputs.row(0); cv::Mat bboxes_mat = predictions.colRange(0, 4); cv::Mat scores_mat = predictions.col(4).mul(predictions.colRange(5, predictions.cols)); scores.assign(scores_mat.begin (), scores_mat.end ()); std::vector<:rect> bboxes_xyxy(bboxes_mat.rows); for (int i = 0; i < bboxes_mat.rows; ++i) { float x_center = bboxes_mat.at (i, 0); float y_center = bboxes_mat.at (i, 1); float width = bboxes_mat.at (i, 2); float height = bboxes_mat.at (i, 3); float x_min = x_center - width / 2.0; float y_min = y_center - height / 2.0; float x_max = x_center + width / 2.0; float y_max = y_center + height / 2.0; bboxes_xyxy[i] = cv::Rect(cv::Point(x_min / ratio, y_min / ratio), cv::Point(x_max / ratio, y_max / ratio)); } return nms(bboxes_xyxy, scores, score_th, nms_th); } void Detector::meshgrid(const cv::Range& x_range, const cv::Range& y_range, cv::Mat& xv, cv::Mat& yv) { cv::Mat x_coords = cv::Mat(x_range.size(), 1, CV_32F); cv::Mat y_coords = cv::Mat(y_range.size(), 1, CV_32F); for (int i = 0; i < x_range.size(); ++i) { x_coords.at (i,0) = x_range.start + i; } for (int i = 0; i < y_range.size(); ++i) { y_coords.at (i,0) = y_range.start + i; } cv::repeat(x_coords, 1, y_range.size(), xv); cv::repeat(y_coords.t(), x_range.size(), 1, yv); } std::tuple<:vector><:rect>, std::vector , std::vector > Detector::nms(const std::vector<:rect>& bboxes, const std::vector & scores, float score_th, float nms_th) { std::vector<:rect> bboxes_filtered; std::vector scores_filtered; std::vector class_ids_filtered; std::vector indices; cv::dnn::NMSBoxes(bboxes, scores, score_th, nms_th, indices); for(int idx : indices) { bboxes_filtered.push_back(bboxes[idx]); scores_filtered.push_back(scores[idx]); class_ids_filtered.push_back(0); } return std::make_tuple(bboxes_filtered, scores_filtered, class_ids_filtered); } std::pair<:vector><:rect>, std::vector > Detector::detect(const cv::Mat& image) { cv::Mat temp_image = image.clone(); auto [preprocessed_image, ratio] = preprocess(temp_image, input_shape_); std::cout << "Preprocess Completed"<<:endl>tensor(interpreter_->inputs()[0]); const uint input_width = input_data->dims->data[3]; const uint input_height = input_data->dims->data[2]; const uint input_channels = input_data->dims->data[1]; const uint batch_size = input_data->dims->data[0]; std::cout << "Expected dimension: "<< batch_size << "x" << input_channels << "x" << input_height << "x" << input_width << std::endl; const uint image_width = preprocessed_image.size[3]; const uint image_height = preprocessed_image.size[2]; const uint image_channels = preprocessed_image.size[1]; const uint image_batch_size = preprocessed_image.size[0]; std::cout << "Image dimension: "<< image_batch_size << "x" << image_channels << "x" << image_height << "x" << image_width << std::endl; if(input_data->type !=kTfLiteFloat32){ std::cerr << "input tensor is not of type float" << std::endl; return std::make_pair(std::vector<:rect>(), std::vector ()); } if(input_data->data.f == nullptr) { std::cerr << "input tensor data pointer is null" << std::endl; return std::make_pair(std::vector<:rect>(), std::vector ()); } std::memcpy(input_data->data.f, preprocessed_image.ptr (0), batch_size * input_width * input_height * input_channels * sizeof(float)); if(memcmp(input_data->data.f, preprocessed_image.ptr (0),batch_size * input_width * input_height * input_channels * sizeof(float)) != 0){ std::cerr << "data copy to input tensor failed" << std::endl; return std::make_pair(std::vector<:rect>(), std::vector ()); } else{ std::cout << "Set up Input Tensor Completed"<<:endl>Invoke(); std::cout << "Inference Completed"<<:endl>typed_output_tensor (0); size_t output_size = interpreter_->tensor(interpreter_->outputs()[0])->bytes / sizeof(float); cv::Mat results(1, output_size, CV_32F, output_tensor); std::cout << "Get Results Completed"<<:endl> result_rect_list; for (size_t i = 0; i < bboxes_xyxy.size(); ++i) { result_rect_list.push_back(bboxes_xyxy[i]); } // Returning the list of rectangles and the associated scores return {result_rect_list, scores}; } my board image is nanbield 6.6.3_1.0.0 full image I tried to run it using VX Delegate and NPU and encounter a problem when running the code root@imx8mpevk:/run/media/SD CARD-sda1/test_npu# ./detector_app lena_color_512.tif INFO: Vx delegate: allowed_cache_mode set to 0. INFO: Vx delegate: device num set to 0. INFO: Vx delegate: allowed_builtin_code set to 0. INFO: Vx delegate: error_during_init set to 0. INFO: Vx delegate: error_during_prepare set to 0. INFO: Vx delegate: error_during_invoke set to 0. Preprocess Completed Expected dimension: 1x3x192x192 Image dimension: 1x3x192x192 Set up Input Tensor Completed E [/usr/src/debug/tim-vx/1.1.88-r[ 126.612163] audit: type=1701 audit(1695250801.923:18): auid=4294967295 uid=0 gid=0 ses=4294967295 pid=1270 comm="detector_app" exe=2F72756E2F6D656469612F534420434152442D736461312F746573745F6E70752F6465746563746F725F617070 sig=6 res=1 0/src/tim/transform/ops/op_layout_inference.cc:MapAxis:177]Map axis failed. detector_app: /usr/src/debug/tim-vx/1.1.88-r0/src/tim/transform/ops/op_layout_inference.cc:178: uint32_t tim::transform::OpLayoutInfer::MapAxis(const std::vector &, uint32_t): Assertion `false' failed. Aborted (core dumped) I also tried to get the gdb debug running, and it return something like this: (gdb) set args lena_color_512.tif (gdb) run Starting program: /run/media/SD CARD-sda1/test_npu/detector_app lena_color_512.tif [Thread debugging using libthread_db enabled] Using host libthread_db library "/usr/lib/libthread_db.so.1". INFO: Vx delegate: allowed_cache_mode set to 0. INFO: Vx delegate: device num set to 0. INFO: Vx delegate: allowed_builtin_code set to 0. INFO: Vx delegate: error_during_init set to 0. INFO: Vx delegate: error_during_prepare set to 0. INFO: Vx delegate: error_during_invoke set to 0. Preprocess Completed Expected dimension: 1x3x192x192 Image dimension: 1x3x192x192 Set up Input Tensor Completed [New Thread 0xfffff146cf00 (LWP 1660)] E [/usr/src/debug/tim-vx/1.1.88-r0/src/tim/transform/ops/op_layout_inference.cc:MapAxis:177]Map axis failed. detector_app: /usr/src/debug/tim-vx/1.1.88-r0/src/tim/transform/ops/op_layout_inference.cc:178: uint32_t tim::transform::OpLayoutInfer::MapAxis(const std::vector &, uint32_t): Assertion `false' failed. Thread 1 "detector_app" received signal SIGABRT, Aborted. __pthread_kill_implementation (threadid= , signo=signo@entry=6, no_tid=no_tid@entry=0) at pthread_kill.c:44 44 pthread_kill.c: No such file or directory. (gdb) bt #0 __pthread_kill_implementation (threadid= , signo=signo@entry=6, no_tid=no_tid@entry=0) at pthread_kill.c:44 #1 0x0000fffff69c0568 in __pthread_kill_internal (signo=6, threadid= ) at pthread_kill.c:78 #2 0x0000fffff697acd0 in __GI_raise (sig=sig@entry=6) at /usr/src/debug/glibc/2.38+git-r0/sysdeps/posix/raise.c:26 #3 0x0000fffff6966ef0 in __GI_abort () at abort.c:79 #4 0x0000fffff69743f8 in __assert_fail_base (fmt=0xfffff6a8a8e8 "%s%s%s:%u: %s%sAssertion `%s' failed.\n%n", assertion=assertion@entry=0xfffff1ffdcf0 "false", file=file@entry=0xfffff1fff568 "/usr/src/debug/tim-vx/1.1.88-r0/src/tim/transform/ops/op_layout_inference.cc", line=line@entry=178, function=function@entry=0xfffff1fff5d8 "uint32_t tim::transform::OpLayoutInfer::MapAxis(const std::vector &, uint32_t)") at assert.c:92 #5 0x0000fffff6974470 in __assert_fail (assertion=0xfffff1ffdcf0 "false", file=0xfffff1fff568 "/usr/src/debug/tim-vx/1.1.88-r0/src/tim/transform/ops/op_layout_inference.cc", line=178, function=0xfffff1fff5d8 "uint32_t tim::transform::OpLayoutInfer::MapAxis(const std::vector &, uint32_t)") at assert.c:101 #6 0x0000fffff1fa5f74 in tim::transform::OpLayoutInfer::MapAxis(std::vector > const&, unsigned int) () from /usr/lib/libtim-vx.so #7 0x0000fffff1f6a1b0 in ?? () from /usr/lib/libtim-vx.so #8 0x0000fffff1f4e5f4 in tim::transform::layout_inference_impl::HandleLayoutInfer(std::shared_ptr<:transform::layout_inference_impl::layoutinfercontext>&, std::shared_ptr<:vx::operation> const&) () from /usr/lib/libtim-vx.so #9 0x0000fffff1f531f4 in tim::transform::LayoutInference(std::shared_ptr<:vx::graph> const&, std::shared_ptr<:vx::context>&, std::map<:shared_ptr><:vx::tensor>, std::shared_ptr<:transform::ipermutevector>, std::less<:shared_ptr><:vx::tensor> >, std::allocator<:pair><:shared_ptr><:vx::tensor> const, std::shared_ptr<:transform::ipermutevector> > > >) () from /usr/lib/libtim-vx.so #10 0x0000fffff23d85ac in vx::delegate::Delegate::Invoke(vx::delegate::OpData const&, TfLiteContext*, TfLiteNode*) () from /usr/lib/libvx_delegate.so #11 0x0000fffff7be9d9c in tflite::Subgraph::InvokeImpl() () from /usr/lib/libtensorflow-lite.so.2.14.0 #12 0x0000fffff7bea388 in tflite::Subgraph::Invoke() () from /usr/lib/libtensorflow-lite.so.2.14.0 #13 0x0000fffff7bd440c in tflite::impl::Interpreter::Invoke() () from /usr/lib/libtensorflow-lite.so.2.14.0 #14 0x0000aaaaaaaa62e0 in Detector::detect (this=this@entry=0xfffffffff890, image=...) at /home/ubuntu/imx-yocto-bsp/sdk/sysroots/armv8a-poky-linux/usr/include/c++/13.2.0/bits/unique_ptr.h:199 #15 0x0000aaaaaaaa35b0 in main (argc= , argv= ) at /home/ubuntu/imx-yocto-bsp/tflite_test/build_minim/main.cpp:29 Does anyone have a clue what is wrong? because I am not sure what happened here. but what i only know that the assertion at op_layout_inference.cc:MapAxis:177 Map axis failed because of assertion error (?) Thank you in advance i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus Re: TfLite NPU run error op_layout_inference.cc:MapAxis:177 Map axis failed I found the cause of the problem. Apparently this line caused the error: resolver.AddCustom(kNbgCustomOp, tflite::ops::custom::Register_VSI_NPU_PRECOMPILED()); So for now, i just disable it and magically it works. Maybe someone can explain why it trigger the error, but for now I can finally continue with my app development. For the model, I check it using Python code, and apparently no error, so the model itself is compatible with the NPU run.  Thank you Re: TfLite NPU run error op_layout_inference.cc:MapAxis:177 Map axis failed is it possible that the model is not compatible with the NPU/VX delegate run? bc when i try to run it with CPU i got different error (related to one of the StridedSlice layer, but i havent check it properly yet for CPU run) Re: TfLite NPU run error op_layout_inference.cc:MapAxis:177 Map axis failed Hello, It looks tile the assertion is there to say that as far as you aware, has made it impossible to call the zero-args constructor according is private and so if a call occurs, that assertion has been violated per your error. Regards
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使用带有自定义 M7 映像的引导加载程序 早上好, 我尝试通过将 M7 图像更改为自定义图像来定制 GoldVIP 启动过程。 在使用 u-boot 将完整的 GoldVIP 映像刷新到 QSPI 内存上之后,如 goldvip 用户手册(一切都从此配置开始)中所述,我使用 S32DS 构建了一个示例项目,并尝试自定义引导加载程序配置以使其适应新的二进制文件,尝试遵循 AN13750、引导加载程序手册和“S32G-VNP-GLDBOX3 软件支持指南”中提供的说明。 然而,在使用 S23 Flash Tool 刷新新的 bootloder 二进制文件、新的 bootloader 配置和自定义 M7 二进制文件后,bootloader 正确执行,并且库存 A53 映像启动,而新的 M7 二进制文件显然无法执行。 因此,我想知道用 S32DS 构建的任何二进制文件是否可以与引导加载程序一起使用,或者是否需要采取一些额外的步骤才能在这种情况下使用它。 提前谢谢您。
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MCX-A15x manual missing memory map The A15x manual (MCXAP64M96FS3RM.pdf) System Memory Map section states "See the attached Memory Map spreadsheet (Overview tab) for the chip's high-level memory map." but there is no attached spreadsheet or Overview tab. I'm unable to find a useful memory map anywhere in the document. Please let me know where to find the system memory map document. MCXA Re: MCX-A15x manual missing memory map I was able to see the attachments using Firefox's PDF viewer. Thanks again. Re: MCX-A15x manual missing memory map Thanks Alice. This is not ideal as most people not using Windows are not using Acrobat/Acrobat Reader (or Microsoft Excel). I'll try to find a way to extract these without Adobe software. Re: MCX-A15x manual missing memory map Hello @litui  What kind of reader are you using? Please use one reader tool that support the attachment viewing function. For example Acrobat Reader. You will find the memory map as below: BR Alice Re: MCX-A15x manual missing memory map I did manage to find a very basic breakdown in this MCXN->MCXA migration guide. It'd still be nice to have a proper map in the actual manual though.
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PCA9617 Distance: 10m I'm thinking of using two PCA9617A, with a master-slave distance of 10m. Is this ok according to the specs? One PCA9617 will be connected directly to the master board, and the other one will be placed very close to the slave board. Re: PCA9617 Distance: 10m The typical blue Cat5e communication cable is about 46 pF/m Your usage 10m capacitance + PCA9617 Cio should be less 4000pF,if low speed should be OK. --- 2 channel, bidirectional buffer isolates capacitance and allows 540 pF on either side of the device at 1 MHz and up to 4000 pF at lower speeds --- Thanks! Re: PCA9617 Distance: 10m Thank you for recommending PCA9614/9615 for high speed. However, this time I'm limiting the communication speed to 100kHz. In that case, can I use PCA9617? Re: PCA9617 Distance: 10m HI yuji0935 For the high speed 10m I recommend the differential I2C-bus buffer  PCA9614/9615
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uint32 startup getAipsRegisterValue(void) and uint32 startup_getControlRegisterValue(void) Where is the definition of startup_getAipsRegisterValue() and startup_getControlRegisterValue()? When I enabled the MCAL_ENABLE_USER_MODE_SUPPORT definition in the S32K344 code, the compiler reported an error that it could not find the definitions for both functions.   With best wishes Re: uint32 startup getAipsRegisterValue(void) and uint32 startup_getControlRegisterValue(void) Hi @NaYil  Sorry for the delay. Due to workload, my response might be delayed. The MCAL_ENABLE_USER_MODE_SUPPORT macro must be added to the project properties under C/C++ Build > Settings > Standard S32DS C Compiler > Preprocessor and Standard S32DS Assembler > Preprocessor.  Let me know if this works for you.  BR, VaneB
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Model-Based Design Toolbox for S32K3xx beginners guide Hi, i would like to know if there are any beginners guide to watch for MBDT, related to S32K3xx uC. I'm trying to learn how to use the S32K358 EVB. Thanks, Simon Re: Model-Based Design Toolbox for S32K3xx beginners guide Hi @simon98  Check the following links. It contains information related to the topic that you may find useful. Interacting with Digital Inputs/Outputs on MR-CANHUBK344 Controlling LED intensity with ADC and PWM Introducing the SPI Communication Blocks from NXP MBDT Introducing the CAN Communication Blocks from NXP MBDT Introducing the LIN Communication Blocks of the NXP MBDT A Model-Based Design (MBDT) Environment for Motor Control Algorithm Development Deploying AUTOSAR and Non-AUTOSAR Software Components on NXP S32K3 with MathWorks Tools Model-Based Design Toolbox S32K3xx Series Quick Start Guide MBDT for S32K3 - Frequently Asked Questions Some of the links above are for S32K1 devices, but since the module between both families is similar, it will be a good reference. Also, we have a dedicated community (Model-Based Design Tools (MBDT)) where you can ask for more help on this part. BR, VaneB
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RT1176のタイマーからのXBAR入力 RT1176のXBARへの入力としてGPT2を使用したいです。これは可能ですか?「_xbar_input_signal」リストに記載されているのはクワッドタイマーのみのようです。
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Tabviewはソフトウェアでタブを0に設定できません タイトルの通り、タブビューを使用してスライディング ウィンドウを作成する場合、タブの高さを 0 に設定する必要がありますが、ガイド ソフトウェアの最小設定は 1 です。 Re: Tabview はソフトウェアでタブを 0 に設定できません ありがとう Re: Tabview はソフトウェアでタブを 0 に設定できません こんにちは、張さん。ご返信ありがとうございます。ご回答は承知しておりますが、Guiderで直接設定したいと思っています。そうすれば、チップにダウンロードするのではなく、シミュレータで直接実行できるので、効果の確認に便利です。設定できない場合は、他のコントロールの位置にも影響してしまいます。後から、このタブに吸着されている他のコントロールの位置を手動で調整する必要があり、移植の作業負荷が増大します。
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S32K312 Flexcan CANFDモード設定CANフィルタの問題 すみません: S32K312 Flexcan CANFDモードでCANフィルタ機能を設定する FlexCAN_Ip_ConfigRxMb(INST_FLEXCAN_0、RX_MB_IDX_0、&rx_info、0x55) この設定では、ID 0x55 のメッセージのみを受信できますか? この関数を使用してフィルターを設定する場合、複数の特定のメッセージ (ID=0x35、ID=0x68、ID=0x123 など) を受信するにはどうすればよいでしょうか? ありがとう!
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i.MX8QX 变体的安全功能 尊敬的恩智浦团队: 根据此页面: https://www.nxp.com/products/i.MX8X?page =2&nrnd=false 具有内联加密、TRNG 等安全功能的四核 i.MX8X 的唯一变体是MIMX8QX2AVOFZAC 。 所有其他变体是否都没有安全功能? 此致, 雷纳
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S32K342 MemAcc_MainFunction() does not complete Remaking post as I have a better understanding of what the issue appears to be? When I run the program, it appears to initialize the first MemAcc successfully, but the 2nd and 3rd is completely blank data and never initializes even once the first area is complete. In the example after the first is finished with 96 of 96 then the 2nd one fills in its values. The first never changes off JOB_STATE_STOP and AreaIndex 1 never moves off of JOB_STATE_STARTING. I have each memsector batch configured identically and assigned to their own Memaccaddress configurations that are also identical.   A comparison with FEE_Example_S32K344 where once Length remain reaches 0, the area index 0 memacc data is removed and AreaIndex 1's information is used and it goes from JOB_STATE_STARTING to JOB_STATE_PROCESSING What might be causing this error of not completeing the job on the first Memory area? Re: S32K342 MemAcc_MainFunction() does not complete The issue was that the default for Mem Acc Job End Notification Name is a default to NULL_PTR rather than "Fee_JobEndNotification," it would be really nice if the FEE example pointed out such things. Also it initializes just fine with NULL_PTR for some reason? Which I find very confusing in both this and the example but I suppose I will not question it as I cannot find the config pointer for FEE_Init. Re: S32K342 MemAcc_MainFunction() does not complete Hi @pb632146, I haven't tested the project, but I noticed that you initialize MemAcc_Init() with a NULL_PTR. Regards, Daniel
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S32DS DRAM U-Boot 代码生成 我正在使用 S32DS DRAM 工具来分析我的主板,并且能够生成功能性的 Arm Trusted Firmware 代码。当我更改设置以生成 U-Boot 代码时,它会创建与 ATF 相同的代码集。我已经创建了一个干净的新项目来尝试生成 U-Boot 代码,但没有生成。这个功能有用吗? 据我所知,AT-F 生成的代码与 U-Boot 代码库不兼容,生成的文件不存在于 U-Boot 代码树中。
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S32K396 ADCBIST示例 S32K396是否有ADCBIST功能的使用示例或应用手册?我在DS中找不到任何相关的示例程序。 回复:S32K396 ADCBIST示例 好的,谢谢你的回复。
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