2027761_en-US

[#1]

MPC5777C - Com:55 Performance Monitor description not clear

Hello!

I need to count all the write-through requests to the memory hierarchy. To do so, I thought that the Com:55 performance monitor was the best fit. However, in the event collumn it says that the monitor counts "Write-through store translation hits", while the description collumn says that the monitor counts "Write-through stores translated". 

It is not clear to me if the Com:55 performance monitor counts write-through store translation hits to the translation lookaside buffer or if it counts all Write-through stores translations. Which interpretation is correct?

Best regards, 

Matheus.

Re: MPC5777C - Com:55 Performance Monitor description not clear

1) Yes, correct.

2) Yes, correct.

3) Certainly it does.

Re: MPC5777C - Com:55 Performance Monitor description not clearLet me see if I understood:

1) Com:55 counter increases when a write-through is performed and the data to be stored in the SRAM is also in the L1 data cache (i.e., store hit). Is that correct?

2) So, if the data to be written via write-through in the SRAM is not present in the L1 data cache, Com:55 does not increase. Correct?

3) Does the counter increase when the virtual and physical addresses are the same?


Best regards,
Matheus.
Re: MPC5777C - Com:55 Performance Monitor description not clear

"translated" should point to virtual addresses i.e. store hits with enabled cache with write through