S32DS DRAM U-Boot 代码生成 我正在使用 S32DS DRAM 工具来分析我的主板，并且能够生成功能性的 Arm Trusted Firmware 代码。当我更改设置以生成 U-Boot 代码时，它会创建与 ATF 相同的代码集。我已经创建了一个干净的新项目来尝试生成 U-Boot 代码，但没有生成。这个功能有用吗？ 据我所知，AT-F 生成的代码与 U-Boot 代码库不兼容，生成的文件不存在于 U-Boot 代码树中。

S32K396 ADCBIST示例 S32K396是否有ADCBIST功能的使用示例或应用手册？我在DS中找不到任何相关的示例程序。 回复：S32K396 ADCBIST示例 好的，谢谢你的回复。

GUI-Guider-1.9.0-GAでのMIMXRT1170-EVKBのW(1280)xH(720)の設定に関するお問い合わせ GUI-Guider-1.9.0-GAでMIMXRT1170-EVKBの設定を使用すると、必ずH(1280)とW(720)になりますが、 そして、ユーザー設定としてW(1280)とH(720)に設定すると、プロジェクトの作成で停止します...地位。 DigitalCluster Demoのように、W(1280)とH(720)でプロジェクトを作成したいです。 どうすればいいですか?

S32G3 FTM input capture mode in BSP41 Hi, How can I enable FTM input capture mode in BSP41 on S32G3? I noticed the s32cc-ftm-pwm entry in the device tree, but I am unsure how to configure the FTM for input capture mode. I couldn't find any relevant driver documentation for this. Is there something I might have missed? Thanks, XD Re: S32G3 FTM input capture mode in BSP41 Hello, @XD  Thank for your post. As far as I know, there was no input capture available under S32G NXP’s FTM Linux kernel driver (pwm-fsl-ftm.c).  currently, it is not supported in BSP. I apologize for your inconvenience. BR Chenyin

设置图片存储在FLASH 中模拟仿真无法显示图片的问题 GUI guider 1.8.0版本中 将图片设置为存储在FLASH 中，那么模拟仿真的时候将无法显示图片资源 Re: 设置图片存储在FLASH 中模拟仿真无法显示图片的问题 经过反复测试，发现小分辨率的图像是可以显示的，尺寸稍微大一点就不行了，比如你可以在800*480的屏幕上,使用image 组件 ，放一张 480*320的图片就不可以， Re: 设置图片存储在FLASH 中模拟仿真无法显示图片的问题 Hi @ZYQ, 请尝试使用与小部件相同大小且为 JPG 格式的图像，否则可能会产生不同的结果。 顺祝商祺！ Wenbin

Watchdog timer usage imx6ull Hello, We are planning to use the Watchdog timer for our existing system for any type of os failure or hardware failure, and we are using the IMX6ULL board so can you suggest which watchdog we can use for the best output and feasibility point of view? i.MX6UL Re: Watchdog timer usage imx6ull Hello @amiraj_patel  I hope you are doing very well. You can refer to the imx6ul device tree, the only wdog used is the wdog1, you can use wdog2 and wdog3, just you must declare it on the device tree. I hope this can helps to you. Best regards, Salas.

How to program S32K314 in production line with Jlink and Jflash Dear NXP Expert, Do you have any guidance of programming S32K314 in production line with Jlink and Jflash. Customer have integrated HSE in their code. Thank you &Best Regards Sophie Re: How to program S32K314 in production line with Jlink and Jflash NXP S32K3xx - SEGGER Wiki

IMX8QM DP++ (DisplayPort Dual-Mode) Hi, We've a custom (imx8qm) board with an mDP (mini DisplayPort) connector, and I'd like to connect an external HDMI screen using a passive mDP-HDMI adapter. My understanding is that this should be possible if DP++ (DisplayPort Dual-Mode) is supported. I have a few questions regarding DP++ support on the i.MX8QM: i.MX8QM DP++ Support: Does the i.MX8QM processor itself support DP++? Cadence Firmware DP++ Support: Does the Cadence firmware for the i.MX8QM's DisplayPort controller support DP++? Device Tree Configuration: Are there any necessary device tree (dtb) configurations required to enable and utilize DP++ functionality? If so, could you please provide details on the specific settings? Thank you for your assistance. Re: IMX8QM DP++ (DisplayPort Dual-Mode) Hello, Unfortunately DisplayPort Dual-Mode is not supported in i.MX8QM, you need to look into another adapter. I apologize the inconvenience that this may affect your design. Best regards.

What does it mean HSE_SWT_RST on S32K311!!! Hello all. Where can I found information about HSE_SWT_RST reset? With the following clock configuration: PLL_PHI0_CLK=120MHz CORE_CLK=PLL_PHI0_CLK/1=120MHz AIPS_PLAT_CLK=PLL_PHI0_CLK/2=60MHz AIPS_SLOW_CLK=PLL_PHI0_CLK/4=30MHz HSE_CLK=PLL_PHI0_CLK/1=120MHz DCM_CLK=PLL_PHI0_CLK/4=30MHz at power on I occasionally get the reset HSE_SWT_RST. What is the cause? I probably need to reduce the HSE clock to 60 MHz or change the value of HSE_CLK_MODE_AND_GSKT_CTRL to 10 of the dcf_client_utest_misc client. Where can I find documentation that explains this? Best regards E. Re: What does it mean HSE_SWT_RST on S32K311!!! Hi @enricoantonioli  The HSE_SWT_RST is usually caused by wrong clock configuration. It was found out that it is possible to configure 120MHz HSE_CLK only during reset by DCF record. It cannot be done later by software for some reasons. That means it is necessary to set PLL_ENABLE in BCW (Boot Configuration Word) in IVT, it is necessary to program crystal oscillator configuration flag in UTEST at 0x1B000050 (see section 32.4.3.2 Crystal oscillator configuration flag in the S32K3 RM), it is necessary to program the dcf_client_utest_misc - HSE_CLK_MODE_AND_GSKT_CTRL equal to 10 or 11. Re: What does it mean HSE_SWT_RST on S32K311!!! Hi, Thanks for the precious information, but I still don't understand why in my situation there is a HSE_SWT_RST reset. What is the cause? What's wrong with the HSE? Best regards E. Re: What does it mean HSE_SWT_RST on S32K311!!! Hi @enricoantonioli  What does HSE_SWT_RST mean? It stands for HSE Software Watchdog Timer Reset. Is it a reset due to an internal HSE watchdog or what? The HSE CPU is mainly composed of Arm Cortex-M0+, which one of its essential peripherals is the watchdog.  So yes, it is trigger by HSE SWT as the name implies. Why this reset occurs if no firmware is programmed into the HSE memory? The HSE CPU, even if the HSE firmware is not loaded, is active because it contains the SBAF code. Re: What does it mean HSE_SWT_RST on S32K311!!! HI Vane, first of all, thank you very much for your quick reply. At the moment I have reduced the HSE_CLOCK to 60 MHz because in the HSE there isn't programmed a firmware. I will activate HSE soon. What does HSE_SWT_RST mean? Is it a reset due to an internal HSE watchdog or what? What I don't understand is why this reset occurs if no firmware is programmed into the HSE memory? If I understand correctly, at power on the HSE processor executes the SBAF code and then stops in a WFI. So who triggers the HSE_SWT_RST reset? Best regards E. Re: What does it mean HSE_SWT_RST on S32K311!!! Hi @enricoantonioli  According to the information, it seems that the problem is due to incorrect clock configuration. The HSE_CLK_MODE_AND_GSKT_CTRL (bit 30-29) must be set to 1x if you want to use HSE_CLK equal to 120 MHZ. On the other hand, if HSE_CLK_MODE_AND_GSKT_CTRL was set to 00, it is necessary to change HSE_CLK to 60 MHZ. Refer to S32K3xx_DCF_clients file attached to the S32K3xx Reference Manual.  This must be done by writing to dcf in UTEST memory using Flash controller. You can check the following article, it might be a good reference.  [S32K3] Restrict the debug access with a password when HSE is not used BR,VaneB

mbdt simulink peripherals Can somebody clarify with this issue regarding port error. how can i restore it to defaults Re: mbdt simulink peripherals So sir within the range of port pin ids can we assign the portpin_id numbers randomly ? Re: mbdt simulink peripherals Hi, @paul_ephraim_13, The PortPin Id tab represents the ID of the port pin, as the name suggests, and can be seen more easily as the index of all the pins in the Port tab. The error you encounter is due to the fact that the mentioned Id is greater than the total number of pins. For example, if we have configured 2 PortContainers and each of them has 5 PortPins, then the PortPin Ids will be from 1 to 10. If you try to set PortPin Id 11 to one of the pins, then the error will show as in the image presented by you, because the number of pins is 10. In your case, I think that you most likely deleted one of the pins and the order of the IDs was altered. Make sure that the PortPin Id is not greater than the total number of pins and the error will disappear. Another recommendation would be not to modify the mex file that contains the default configuration, i.e. S32K312-Q172.mex, as I can see in your screenshot, but it is recommended to modify the mex file of the model you are trying to configure. When you open a model set on S32 Configuration Tools, or create a new one, the mex file with the default configuration from the devices folder is copied next to this model. After this copying, you can change the mex file next to the model by clicking on the Configure button from any block in the MBDT library, and you can make configuration changes without changing the default mex file. Thus, if you want to return to the default settings, by deleting the mex file next to the model and reopening it, the default mex file will be copied again next to the model. Hope this clears up your problem. Best regards,  Dragos

ISO-26262 ASIL-C compliant PIL testing with S32G-VNP-GLDBOX Hi, it there some ISO 26262 certification of S32G-VNP-GLDBOX used together with Matlab Simulink plugin for PIL testing, and some guidelines to prove the toolchain can be considered as qualified? I mean something like MathWorks have their ICE Certification kit?  Simulink plugin: Model-Based Design Toolbox | NXP Semiconductors Re: ISO-26262 ASIL-C compliant PIL testing with S32G-VNP-GLDBOX Hi @Jan_S,  Thanks for the questions. Unfortunately, we do not have the expertise with the MBDT software to give a support with that you can ask at: Model-Based Design Toolbox (MBDT) community, the Goldbox there is known as HCP.  Regarding to the ISO 26262 you can find the following on the S32G3 Reference Manual:   [Page 3660, S32G3 Reference Manual, Rev. 4, 02/2024] Also, at the Product details of the GoldBox 3 Vehicle Networking Development Platform site you could find the next:

LPUART データを受信できません S32K311のLPUARTを使用してデータを送受信しています。データを送信するのは正常ですが、チップはコンピューターから送信されたデータを受信できません。その理由は何ですか?ありがとうございます。 Re:LPUARTはデータを受信できません こんにちは、@Julián_AragónM、 ご返信ありがとうございます。問題を解決しましたが、接続に問題があります。再接続後は正常に通信ができます。 Re:LPUARTはデータを受信できません Hi.@Julian-アラゴンM、 ご返信ありがとうございます。シリアルからUSBへのコンバーターを使用し、あなたが私に与えた例に従ってコードを変更しましたが、私のチップはまだデータを受信できません。問題が何であるかを見つけるのを手伝ってもらえますか?

S32G3 ubuntu login in username & passwd Hi, I recently used yocyo to compile fsl-image-ubuntu, but after burning the generated image to the sd card, the login is not like fsl-image-auto, which can be used by using "root". Please tell me how to log in to ubuntu  S32G-VNP-RDB3  Re: S32G3 ubuntu login in username & passwd Hi, @carlos_o : Thanks for your suggestion,you are right! Re: S32G3 ubuntu login in username & passwd Hi @jiajun_cheng, Please refer to the BSP User Manual of the version you are using. There at the chapter 3.1.3 BSP Ubuntu Build you can find the user and password.   [page 13, Linux BSP 42.0 User Manual for S32G3 platforms] 

软件激活失败，服务器错误 我正在尝试激活 S32 Design Studio for Arm，但在线和离线激活均失败，并显示错误消息“ com.acresso.activation.handler.ServerException ” 激活服务器似乎出了问题？

ファイル .prmおよび .inc9S12XEA128用 コミュニティの皆さん、こんにちは。私は.prmを探しています9S12XEA128 のファイル、またはその更新 (Service Pack) があるかどうかを調べるため。どなたかお持ちですか?CW5.2を使用していますが、デバイスのリストにありません。 ありがとうございます。

S32K144 MCUを使用して同じFTMインスタンスのFTMチャネルで異なる周波数を使用する方法 私はS32K144 MCUを使用しており、FTMペリフェラルインスタンス0を使用しています。 FTM0_CH0とFTM0CH1で異なる周波数を生成したい。 しかし、私が観察したことは、APIによって1つのチャネルの周波数/周期を変更すると、 次のようになりますFtm_Pwm_Ip_UpdatePwmPeriodAndDuty(FTM_INSTANCE_0、channel0、35000、12000、TRUE); その後、他のチャンネルの周波数も変更されます。 すべてのチャンネルのMOD登録が同じであることがわかりました。したがって、周波数を変更するためにMOD値を変更すると、FTMインスタンス全体の周期が変更されます。 しかし、同じFTMインスタンスのチャネルで異なる周波数を使用したい場合はどうでしょうか。 どうすればそれを達成できますか?

文件 .prm和 .inc对于 9S12XEA128 社区里的大家好。我正在寻找 .prm9S12XEA128 的文件或查明是否有更新（服务包）。有人有嗎？我使用 CW5.2，但它不在设备列表中。 谢谢。

s32k312 can not debug Hi NXP,    my environment is  jlink v11  and s32DS. it  works until yesterday, when starting debug, it can stop at main entry,  then run step into, or any other operation, it goes to unknown state. the abnormal as attached. 1. debug can't  halt CPU. 2. read sram failed. but with the same hardware and elf file,  i use ozone , it works normally.  here my debug cofig. it's same compare to it's working time. 回复： s32k312 can not debug i dont know what cause this problem, after totally reinstall S32DS , solved.  but after few days use, S32DS debuger seems responses slower than normal. currently, use OZone to program and debugger instead. Re: s32k312 can not debug Hi, Senlent Ozone is software on PC, my board and jlink are the same. i just use it instead of S32DS debug function, all others are same. Re: s32k312 can not debug Hi@victory I don't find any problem with your configuration, and your other debuggers (ozone) can burn and debug your hardware normally, so the possible reason may be your J-LINK tool or the link problem.

[I.MX8M Plus][BSP L6.1.22]从Docker容器内部访问NPU的方法 我们的产品需要把AI推论应用方法Docker容器中运行，请问怎样做才能让Docker内的应用程序直接访问NPU呢？ 我搜索了论坛找到一篇相关的帖子，但是它的BSP版本太旧了。 https://community.nxp.com/t5/eIQ-Machine-Learning-Software/eIQ-Docker-8MP-L5-10-X-NPU/m-p/1348329/highlight/true?profile.language=ja 请帮助解决，谢谢。 回复： [I.MX8M Plus][BSP L6.1.22]从Docker容器内部访问NPU的方法 HI @linzhenggang1  请问解决了吗，可以分享一下步骤吗

ADC1 is not working on S32K148 Hello, I am using an S32K148 development board and I am trying to use ADC0 and ADC1. ADC0 is working properly but from some reason, I am not able to use ADC1, it seems like this is not enabled. The get_adc1_data() is printing any time value 0 Do you have any suggestion? I am using the following code #define INST_ADC_CONFIG_1 (0U) #define INST_ADC_CONFIG_2 (1U) const adc_converter_config_t adc_config_1_ConvConfig0 = {     .clockDivide = ADC_CLK_DIVIDE_2,     .sampleTime = 255U,     .resolution = ADC_RESOLUTION_8BIT,     .inputClock = ADC_CLK_ALT_1,     .trigger = ADC_TRIGGER_SOFTWARE,     .pretriggerSel = ADC_PRETRIGGER_SEL_PDB,     .triggerSel = ADC_TRIGGER_SEL_PDB,     .dmaEnable = false,     .voltageRef = ADC_VOLTAGEREF_VREF,     .continuousConvEnable = false,     .supplyMonitoringEnable = false }; const adc_chan_config_t adc_config_1_ChnConfig0 = {     .interruptEnable = true,     .channel = ADC_INPUTCHAN_EXT17 }; const adc_converter_config_t adc_config_2_ConvConfig0 = {     .clockDivide = ADC_CLK_DIVIDE_2,     .sampleTime = 255U,     .resolution = ADC_RESOLUTION_8BIT,     .inputClock = ADC_CLK_ALT_1,     .trigger = ADC_TRIGGER_SOFTWARE,     .pretriggerSel = ADC_PRETRIGGER_SEL_PDB,     .triggerSel = ADC_TRIGGER_SEL_PDB,     .dmaEnable = false,     .voltageRef = ADC_VOLTAGEREF_VREF,     .continuousConvEnable = false,     .supplyMonitoringEnable = false }; const adc_chan_config_t adc_config_2_ChnConfig0 = {     .interruptEnable = true,     .channel = ADC_INPUTCHAN_EXT13 }; void ADC_init() {     /* Initialize ADC */     ADC_DRV_ConfigConverter(INST_ADC_CONFIG_1, &adc_config_1_ConvConfig0);     ADC_DRV_AutoCalibration(INST_ADC_CONFIG_1);       /* Initialize ADC */     ADC_DRV_ConfigConverter(INST_ADC_CONFIG_2, &adc_config_2_ConvConfig0);     ADC_DRV_AutoCalibration(INST_ADC_CONFIG_2); }   void get_adc0_data() {       uint16_t adcRead;       (void) data;     (void) len;       ADC_DRV_ConfigChan(INST_ADC_CONFIG_1, 0U, &adc_config_1_ChnConfig0);     ADC_DRV_WaitConvDone(INST_ADC_CONFIG_1);       /* Store the channel result into a local variable adcRead*/     ADC_DRV_GetChanResult(INST_ADC_CONFIG_1, 0U, &adcRead);       printf("ADC0 data = %d\n\r>", adcRead); }   void get_adc1_data() {       uint16_t adcRead;       (void) data;     (void) len;       ADC_DRV_ConfigChan(INST_ADC_CONFIG_2, 1U, &adc_config_2_ChnConfig0);     ADC_DRV_WaitConvDone(INST_ADC_CONFIG_2);       /* Store the channel result into a local variable adcRead*/     ADC_DRV_GetChanResult(INST_ADC_CONFIG_2, 1U, &adcRead);       printf("water temp is = %d\n\r>", adcRead);  } Re: ADC1 is not working on S32K148 Thank you very much. It was working! Re: ADC1 is not working on S32K148 Hi@mcristian please change the below hightlight part to 0 Re: ADC1 is not working on S32K148 Hello, Thanks for reply. You can find the project attached Re: ADC1 is not working on S32K148 Hi@mcristian Can you provide me with a working project so that I can reproduce your problem?