DDR T2081 プロセッサからの u-boot のデバッグ こんにちはNxpチーム、 T2081 プロセッサの NOR フラッシュ用の U-Boot を正常にビルドし、U-Boot プロンプトに到達しました。ただし、現在、イーサネットは動作していないため、さらにデバッグを実行するのは困難です。 デバッグプロセスを容易にするために、USB経由でDDRにファイルをロードできるため、U-BootをDDRから実行するようにコンパイルしたいと思います。 この構成を有効にするための適切なコンパイル オプションについて教えてください。 QorIQ T2デバイス 日時:DDR T2081プロセッサからのu-bootのデバッグ この変更が必要なのは、CodeWarrior を使用して U-Boot を NOR に書き込むのにかなりの時間がかかるためです。U-Boot を DDR にロードすると、開発プロセスのターンアラウンド タイムが短縮されます。

从 DDR T2081 处理器调试 u-boot 嗨，Nxp 团队， 我们已经成功为T2081处理器上的NOR闪存构建了U-Boot，并达到了U-Boot提示。然而，我们的以太网目前无法运行，这使得进一步的调试变得具有挑战性。 为了方便我们的调试过程，我们希望编译 U-Boot 从 DDR 运行，因为我们可以通过 USB 将文件加载到 DDR 中。 您能否建议一些适当的编译选项来启用此配置？ QorIQ T2设备 回复：从 DDR T2081 处理器调试 u-boot 我们需要进行这种改变，因为通过 CodeWarrior 将 U-Boot 刻录到 NOR 需要花费大量时间。将 U-Boot 加载到 DDR 中可以为我们的开发过程提供更快的周转时间。

S32K344:内部フラッシュに書き込む方法は?アルゴリズム/ステップ/コード例/説明は何ですか? S32K344:内部フラッシュに書き込む方法は? アルゴリズム/ステップ/コード例/説明は何ですか? AUTOSARを使用しないコード例を提供できますか? Re:s32k344:内部フラッシュに書き込む方法は?アルゴリズム/ステップ/コード例/説明は何ですか? コンパイル前 - *.mexファイルを開き、「コードを更新」します。PIN SDKファイルが欠落している問題を修正します。 「Siul2_Port_Ip_Defines.h」を見つけました-見逃しています。 このファイルを別のプロジェクトからコピーした後 - 実行できます。

compilation Fail SDK_32XX_4.0.0 Hi, when I create a new project with S32K344, compilation work but if i configure a pin and update code,compilation failed directory platform install is \NXP\S32\S32DS\software\PlatformSDK_S32XX_4_0_0\RTD\Base_TS_T40D11M40I0R0 but message is D:/NXP/S32/S32DS/software/PlatformSDK_S32K3/RTD/BaseNXP_TS_T40D34M40I0R0/include/OsIf_Internal.h:45:10: fatal error: OsIf_Cfg.h: No such file or directory when I compile Re: compilation Fail SDK_32XX_4.0.0 i reinstall package and my problem has resolved Re: compilation Fail SDK_32XX_4.0.0 Hi@monk_65 Have you installed multiple RTD versions under one S32 DS? Installing different RTD versions under the same S32 DS will cause some similar errors. This is somewhat similar to what I told you before. If possible, you can uninstall the IDE and reinstall it and Please remember to delete all files in the installation directory. Re: compilation Fail SDK_32XX_4.0.0 but i don't have peripheral , components view, and Osif configuration so i can't add this file when i click on the peripherals tools,  it display  "The peripheral tool is enabled but it does not support the selected processor" Re: compilation Fail SDK_32XX_4.0.0 Because you have not generated the OS. Press the generate button in peripheral>>OS>>general. And update the project Re: compilation Fail SDK_32XX_4.0.0 Hi@monk_65 Re: compilation Fail SDK_32XX_4.0.0 i reinstalled package with S32 extensions and updates RTD S32K3_S32M27X 4.0.0.202404020208 com.nxp.RTD.S32K3_S32M27X.root.feature.feature.group NXP Semiconductors, Inc. RTD S32K3XX 4.0.0.202404020208 com.nxp.RTD.S32K3XX.root.feature.feature.group NXP Semiconductors, Inc. S32K3xx development package 3.5.8.202311290134 com.nxp.s32ds.s32k3.dev.feature.feature.group NXP S32 Design Studio for S32 Platform 3.5.11.202403280939 com.nxp.s32ds.platform.ide.feature.feature.group NXP FREERTOS S32K3_S32M27X 4.0.0.202312180411 com.nxp.FREERTOS.S32K3_S32M27X.root.4.0.0.feature.feature.group NXP Semiconductors, Inc. i create a project with a guide_started_s32k_3xx and compilation is OK but i tried to configure a pin and i have a error D:/NXP/S32DS.3.5/S32DS/software/PlatformSDK_S32K3/RTD/BaseNXP_TS_T40D34M40I0R0/include/OsIf_Internal.h:45:10: fatal error: OsIf_Cfg.h: No such file or directory i don't understand  why  this file is not inside my project when i use the "manager SDK component" i selected "OS" package and i have files related in OS in my project Re: compilation Fail SDK_32XX_4.0.0 Hi@monk_65 Does this project come from S32DS? Have you installed multiple RTD versions under one S32 DS? Installing different RTD versions under the same S32 DS will cause some similar errors. Please be sure to install a separate S32 DS for each RTD versions. Re: compilation Fail SDK_32XX_4.0.0 Have you properly started from demo project for S32K344? please check Re: compilation Fail SDK_32XX_4.0.0 thanks, to have more information, here the message when i select peripheral my configuration is S32K344, why is not compatible ? Re: compilation Fail SDK_32XX_4.0.0 Hi@monk_65 Please try opening a sample project from S32 DS and test if such problem still exists. If yes, it may be an issue with the RTD installation If not, check your project and compare the difference between the two projects. Re: compilation Fail SDK_32XX_4.0.0 It seems you have not generated the OS code. Please check in the Peripheral setup, in OS>Generate you find Generate Configuration button. Press it and then update the code

s32k344: how to write to internal flash? what is the algorithm/steps/code example/explanation? s32k344: how to write to internal flash? what is the algorithm/steps/code example/explanation? can you provide code example without autosar? Re: s32k344: how to write to internal flash? what is the algorithm/steps/code example/explanation? before compilation - I open *.mex file and "Update code". Fix absent PIN SDK files. I found "Siul2_Port_Ip_Defines.h" - is missed. After copy this file from another project - It can run. Re: s32k344: how to write to internal flash? what is the algorithm/steps/code example/explanation? when I import this project (exactly from same repository version you point on your picture) to S32 Design Studio - it cannot be compiled. Re: s32k344: how to write to internal flash? what is the algorithm/steps/code example/explanation? Hi@paulffff you can find C40_Ip_Example_S32K344 in your S32 DS if you already installed the RTD package. for you better understand the s32k3 memory, you can take a look at the application AN13388 also. https://www.nxp.com/webapp/Download?colCode=AN13388&location=null

MAX98357A Audio Codec (Amplifier) on i.MX8M Mini I'm trying to get a MAX98357A I2S audio amplifier working on the i.MX8M Mini EVK. I've had this codec working perfectly fine on an i.MX6 board using the 'simple-audio-card' approach before so I copied most of the device tree blocks and changed the SAI parts. It currently looks like this: codec: max98357a { compatible = "maxim,max98357a"; #sound-dai-cells = <0>; }; sound { compatible = "simple-audio-card"; simple-audio-card,name = "max98357a"; simple-audio-card,format = "i2s"; simple-audio-card,widgets = "Speaker", "Speakers"; simple-audio-card,routing = "Speakers", "Speaker"; simple-audio-card,bitclock-master = <&cpu_dai>; simple-audio-card,frame-master = <&cpu_dai>; cpu_dai: simple-audio-card,cpu { sound-dai = <&sai3>; dai-tdm-slot-num = <2>; dai-tdm-slot-width = <16>; }; codec_dai: simple-audio-card,codec { sound-dai = <&codec>; clocks = <&clk IMX8MM_CLK_SAI3_ROOT>; }; }; &sai3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai3>; assigned-clocks = <&clk IMX8MM_CLK_SAI3>; assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL2_OUT>; assigned-clock-rates = <24576000>; fsl,sai-mclk-direction-output; status = "okay"; }; pinctrl_sai3: sai3grp { fsl,pins = < MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 >; }; The audio device is recognized and the driver module is loaded. However I am unable to play any files: # aplay ImperialMarch60.wav Playing WAVE 'ImperialMarch60.wav' : Signed 16 bit Little Endian, Rate 22050 Hz, Mono aplay: set_params:1456: Unable to install hw params Kernel: [ 990.915833] fsl-sai 30030000.sai: failed to derive required Tx rate: 1411200 [ 990.923163] fsl-sai 30030000.sai: ASoC: error at snd_soc_dai_hw_params on 30030000.sai: -22 Using a scope I can see the MCLK on SAI3 but no activity on the data lines. I already found a matching issue in form of a Toradex post, that's why I changed from PLL1 to PLL2 but in contrast to that topic over there this did not fix my issue. I also found this post in the NXP community describing the very same issue but on an i.MX8M Plus. I tried adapting the solution but it seems to me that there are multiple clocks that are just not present on the 8M Mini (e.g. IMX8MP_CLK_AUDIOMIX_SAI3_IPG). Thanks in advance for any help on this! i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Linux Re: MAX98357A Audio Codec (Amplifier) on i.MX8M Mini Solved my issue. Turned out that the kernel/dts was not the culprit, it was ALSA. I've used the same test file all the time, which was a 22 kHz mono file. When I tried with a 48 kHz stereo one it just worked. So I added the following as '/etc/asound.conf' in order to re-sample everything to 48 kHz stereo: pcm.speakerbonnet { type hw card 0 } pcm.dmixer { type dmix ipc_key 1024 ipc_perm 0666 slave { pcm "speakerbonnet" rate 48000 channels 2 } } ctl.dmixer { type hw card 0 } pcm.softvol { type softvol slave.pcm "dmixer" control.name "PCM" control.card 0 } ctl.softvol { type hw card 0 } pcm.!default { type plug slave.pcm "softvol" }  Now my original 22 kHz test file works fine as well 🙂 Re: MAX98357A Audio Codec (Amplifier) on i.MX8M Mini Hi JorgeCas! Thanks for your quick answer. I did already have assigned-clock-rates = <24576000>; in the sai3 block so I just switched from PLL2 to PLL1 for the assigned-clock-parents as you suggested but this did not change anything. I also tried with the second clock rate that you have proposed: assigned-clock-rates = <12288000>; Unfortunately this did not change anything either, same error message: [ 34.068689] fsl-sai 30030000.sai: failed to derive required Tx rate: 1411200 [ 34.077415] fsl-sai 30030000.sai: ASoC: error at snd_soc_dai_hw_params on 30030000.sai: -2 Edit: I've attached the clock summary for reference. Re: MAX98357A Audio Codec (Amplifier) on i.MX8M Mini Issues related to the error: [ 990.915833] fsl-sai 30030000.sai: failed to derive required Tx rate: 1411200 [ 990.923163] fsl-sai 30030000.sai: ASoC: error at snd_soc_dai_hw_params on 30030000.sai: -22 Are related to PLL, because pre-scalers and adjustment cannot reach that specific frequency. Our BSP works with 12288000 and 24576000. So, I suggest try with these clock rates and verify it on Linux's clk summary: cat /sys/kernel/debug/clk/clk_summary If we use our EVK device tree as reference it uses the next value on assigned-clock-parents property, could you please try it? &sai3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai3>; assigned-clocks = <&clk IMX8MM_CLK_SAI3>; assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; assigned-clock-rates = <24576000>; fsl,sai-mclk-direction-output; status = "okay"; }; Best regards.

Unable to boot Linux on imx8m plus evk Source: IMX_YOCTO_PROJECT_USERS_GUIDE.pdf  we are referring the above guide to build Linux bsp.  The below is the default boot flow layout, # The disk layout used is: # - ---------- -------------- -------------- # |   | imx-boot | boot | rootfs | # - ---------- -------------- -------------- # ^ ^                  ^         ^           ^ # |   |                   |           |            | # 0  |                8MiB    72MiB     72MiB + rootfs + IMAGE_EXTRA_SPACE (default 10MiB) # ${IMX_BOOT_SEEK} 32 or 33kiB, see reference manual imx-boot = SPL + ATF + TEE + U-BOOT --> boots to linux Modified boot flow layout, # The disk layout used is: # - ---------- -------------- -------------- # |   |   Bios.bin  | boot | rootfs | # - ---------- -------------- -------------- # ^ ^                  ^         ^           ^ # |   |                   |           |            | # 0  |                8MiB    72MiB     72MiB + rootfs + IMAGE_EXTRA_SPACE (default 10MiB) # ${IMX_BOOT_SEEK} 32 or 33kiB, see reference manual Bios.bin = SPL + ATF + TEE + U-BOOT + UEFI Loader --> boot upto before linux login terminal Attached the original and modified debug logs. any suggestions ? Re: Unable to boot Linux on imx8m plus evk Hi @pengyong_zhang Thanks for all your response !!! Thanks, JP Re: Unable to boot Linux on imx8m plus evk hi @sjp  I do not think you can use another bootloader replace the uboot for the Embedded CPU. B.R Re: Unable to boot Linux on imx8m plus evk Hi @pengyong_zhang  What do you mean similar U-boot? Why are you not use U-boot? We are just analyzing to replace u-boot with another bootloader.  Thanks, JP Re: Unable to boot Linux on imx8m plus evk HI @sjp  1. Can we use a non-UEFI bootloader, similar to U-boot, to boot Linux with Linux BSP ? >>> What do you mean similar U-boot? Why are you not use U-boot? 2. What types of bootloaders are supported for booting Linux ? >>>It is the default linux bootloader, SPL->ATF->UBOOT->KERNAL->ROOTFS B.R Re: Unable to boot Linux on imx8m plus evk Hi @pengyong_zhang Sorry i missed it. Thank you !!! I have another query, 1. Can we use a non-UEFI bootloader, similar to U-boot, to boot Linux with Linux BSP ? 2. What types of bootloaders are supported for booting Linux ? Thanks, JP Re: Unable to boot Linux on imx8m plus evk hi @sjp  Have you seen my previous reply?  Linux BSP do not support UEFI boot. Only PC have this. The embedded test CPU does not use BIOS. B.R B.R Re: Unable to boot Linux on imx8m plus evk Hi @pengyong_zhang, Is there any update from your internal team ? Thanks, JP Re: Unable to boot Linux on imx8m plus evk HI @sjp  I have talk about your request with our internal team, our Linux BSP do not support UEFI boot. Only PC have this. The embedded test CPU does not use BIOS. B.R Re: Unable to boot Linux on imx8m plus evk Hi @pengyong_zhang  1. How did you "modified boot flow" you mentioned? Step 1: We used the source code from WIN10_1.5.0_SOURCE  built it with the following command: ./buildme64.sh -b MX8M_PLUS_EVK -t uefi -bc DEBUG The resulting binary we used is located at imx-windows-iot/BSP/firmware/MX8M_PLUS_EVK/firmware_uuu.bin. Note: Additionally, we added a driver to this source. The purpose of this driver is to load the device tree and Kernel into memory. Step 2:       1. Host machine setup:             i) Essential Yocto Project host packages are:                  $ sudo apt install gawk wget git diffstat unzip texinfo gcc build-essential chrpath socat cpio python3 python3-pip python3-pexpect xz-utils debianutils iputils-ping python3-git python3-jinja2 python3-subunit zstd liblz4-tool file locales libacl1             ii) Setting up the Repo utility:                  $ mkdir ~/bin (this step may not be needed if the bin folder already exists)                  $ curl https://storage.googleapis.com/git-repo-downloads/repo > ~/bin/repo                   $ chmod a+x ~/bin/repo                  $ export PATH=~/bin:$PATH         2. Yocto Project Setup:             i) Git set up:                 $ git config --global user.name "Your Name"                   $ git config --global user.email "Your Email"                   $ git config --list               ii) Repo sync:                    $ mkdir imx-yocto-bsp $ cd imx-yocto-bsp                   $ repo init -u https://github.com/nxp-imx/imx-manifest -b imx-linux-scarthgap -m imx-6.6.36-2.1.0.xml                   $ repo sync            3. Changes:                                       Replaced the imx-boot with firmware_uuu.bin.          4. Build:             $ DISTRO=fsl-imx-wayland MACHINE=imx8mp-lpddr4-evk source imx-setup-release.sh -b             $ bitbake core-image-minimal   Refer: IMX_YOCTO_PROJECT_USERS_GUIDE.pdf    Built image will be avilable in  imx-yocto-bsp/Build/tmp/deploy/images/imx8mp-lpddr4-evk/core-image-minimal-imx8mp-lpddr4-evk.rootfs-20241106063508.wic.zst   # The disk layout of "wic" image  #  - ---------- -------------- -------------- # | | firmware_uuu.bin |     boot     |    rootfs    | #  - ---------- -------------- -------------- # ^ ^                                      ^                  ^                  ^ # | |                                          |                    |                   | # 0 |                                   8MiB          72MiB          72MiB + rootfs + IMAGE_EXTRA_SPACE (default 10MiB) #   ${IMX_BOOT_SEEK} 32 or 33kiB, see reference manual   Flash:   $ zstdcat /home/bpcg/imx-yocto-bsp/Build/tmp/deploy/images/imx8mp-lpddr4-evk/core-image-minimal-imx8mp-lpddr4-evk.rootfs-20241106063508.wic.zst | sudo dd of=/dev/sda bs=1M conv=fsync   Kernel arguments used: console=ttymxc1,921600 root=/dev/mmcblk1p2 rootwait rw   2. why are you need to change the boot flow? We modified the boot flow because our objective is to boot Linux using EDK2 (UEFI). Thanks, JP Re: Unable to boot Linux on imx8m plus evk HI @sjp  However, in our modified boot flow, U-Boot hands control over to the UEFI loader instead. The UEFI loader then takes on the responsibility of loading the device tree and kernel into memory before launching the system. >>> How did you "modified boot flow" you mentioned?  And why are you need to change the boot flow? B.R Re: Unable to boot Linux on imx8m plus evk Hi @pengyong, Any updates on this ? Re: Unable to boot Linux on imx8m plus evk Hi @pengyong_zhang  Ques:  1. What is your change about the code? We haven’t modified the existing code directly. In the default boot flow, U-Boot loads the device tree and kernel into memory and then launches the system. However, in our modified boot flow, U-Boot hands control over to the UEFI loader instead. The UEFI loader then takes on the responsibility of loading the device tree and kernel into memory before launching the system. 2. how did you compile the flash.bin file? The UEFI loader is built using the EDK2 framework. We used the mkimage tool for binary stitching, similar to how firmware is stitched in a Windows BSP. We provided the UEFI loader as a FIT image to U-Boot. Thanks, JP Re: Unable to boot Linux on imx8m plus evk hi @sjp  What is your change about the code? and how did you compile the falsh.bin file? B.R

S32K396 Change sampling & switching frequency Hello, I am using S32K396-BGA-DC1 board, with Simulink in matlab2024a. I am working on the S32K396_MBDT_BASED_MC_0_9_0 Motor Control Example Project. In my setup I have the nxp connected with a HIL-RT hardware emulating the power stage and a motor. I would like to change the sampling & switching frequency relationship. I found that the Fsam = 0.5 Fsw. So when I change the period on the pwm channel - Fsw (fig 1), Fsam change in the same way. Where can I set up this? I would like to be able to do Fsam = Fsw and Fsam = 2Fsw Moreover, modifying this, should I change the configuration somewhere for the resolver also? Thanks, Agustin. Re: S32K396 Change sampling & switching frequency Hi Agustin, In the demo, the MasterReload signal of the FlexPWM is used as the ADC trigger. For your requirement, please change the following item: For more details please refer to the Reference Manual, Chapter eFlexPWM, register Submodule a Control(SM0_CTRL-SM3_CTRL).  Thanks, Vincent

KW45 How does BLE client write data to BLE Server? I want to modify the SDK examples：temperature sensor and collector so that collector can write Characteristic Value，The sensor can print out the values written by the collector through UART. As shown in the picture, press the button of the sensor first, and the sensor sends the Notification. The collector triggers **GattNotificationCallback**, prints out the value "value_temperature", and then uses the API: GattClient_WriteCharacteristicValue Changes the value of value_temperature.The sensor triggers **GattServerCallback** to print the value of value_temperature.But collector can print value_temperature, sensor UART does not print, looking forward to your suggestions and guidance！ 我希望修改例程： temperature sensor 和 collector，可以使 collector 可以写 Characteristic Value，sensor 可以将 collector 写入的值通过 UART 出来， 如图片展示 先按下 sensor 的按键，sensor 发送 **Notification**，collector 触发**GattNotificationCallback**，打印出 “value_temperature”的值，之后使用GattClient_WriteCharacteristicValue 修改 “value_temperature”的值，sensor 端触发 **GattServerCallback** 打印出“value_temperature”的值。但是 collector可以打印出value_temperature， sensor 的UART没有打印，期待你的建议和指导 Protocol: Bluetooth Re: KW45 How does BLE client write data to BLE Server? Hello, With Wireless UART, even if the device is in central mode, the BleApp_ReceivedUartStream is called when receiving something from the peripheral. Regards, Ricardo Re: KW45 How does BLE client write data to BLE Server? thanks for your reply I think "temperature sensor and collector" is more appropriate，Of course I also can take the Wireless UART example as a base for your application.But I have a question about the Wireless UART example,From my understanding of W_UART, BLE printing data to serial terminal requires the use of BleApp_ReceivedUartStream, which is only used in BleApp_GattServerCallback.Can Central also use BleApp_GattServerCallback?If not, how does Central transfer data to UART. 我认为使用“ temperature sensor and collector ”更合适，当然我也可以用 Wireless UART example 作为应用程序的基础。但是对于Wireless UART example 我有疑问，向 UART输出数据需要使用到 BleApp_ReceivedUartStream 但它只在 BleApp_GattServerCallback 中被应用，BLE做为 Central 也能使用BleApp_GattServerCallback ？如果不能,Central是如何向UART传输数据的 Re: KW45 How does BLE client write data to BLE Server? Hello, Hope you are doing well. Is there any special consideration why the collector would need to write a characteristic to the sensor? If you want to receive on a serial terminal something "received" from Bluetooth, maybe you can take the Wireless UART example as a base for your application. This example already enables UART and bidirectional BLE communication. Best Regards, Ricardo

LS1046 PPS on GPIO I'm trying to connect a GPS 1PPS signal to a FRWY-LS1046 via a GPIO line. I've done the following: Kernel config: CONFIG_PPS=y CONFIG_PPS_CLIENT_GPIO=m CONFIG_PPS_DEBUG=y fsl-ls1046a.dtsi: pps { compatible = "pps-gpio"; gpios = <&gpio3 11 0>; assert-falling-edge; }; The kernel logs show pps1 fails to get setup: [ 941.608348] genirq: Setting trigger mode 1 for irq 83 failed (mpc8xxx_irq_set_type+0x0/0xf8) [ 941.616823] pps_core: unregistering pps1 [ 941.617053] pps_core: deallocating pps1 [ 941.617063] pps-gpio pps: failed to acquire IRQ 83 [ 941.621915] pps-gpio: probe of pps failed with error -22 Is there a problem with using GPIO3_11 (427) for this? Is it on a GPIO expander or something? I can read the PPS signal on the GPIO so I know I've got the correct pin. Re: LS1046 PPS on GPIO Apologies - I had made a mistake - my .dtsi looked like this when it failed: pps { compatible = "pps-gpio"; gpios = <&gpio3 11 0>; assert-rising-edge; }; This is evidently wrong - for rising edge you remove the assert-falling-edge line. It looks like pps1 is now registered.

LPC802 dev/evk board - where can I get the example application source code ? Hi, I'd like to work through the source code of the example application that the LPC802 dev kit has pre-installed. This is the app that reads the temperature sensor, potentiometer, etc and lights LED's in a face pattern. This source code would seem to be an excellent starting point as it's interfacing with most peripherals on the board. I have the SDK installed but it doesn't seem to contain the source code for this example app. Internet searches refer to example bundles, but I can't find one for LPC802 dev board. Where can I get the LPC802 dev/evk board example application source code ? Thanks in advance. LPC800 Re: LPC802 dev/evk board - where can I get the example application source code ? Hi Hang, Apologies for very late reply. Thank you very much for providing this. Re: LPC802 dev/evk board - where can I get the example application source code ? Hi @paulw2  The LPC802 dev/evk board example application source code is in the attachment. Please kindly check it. Hope this will help you. BR Hang

iMX93 Network Interface Hello, I believe this issue can be easily resolved from userspace. Currently, when booting up the iMX93 EVK using "NXP i.MX Release Distro 6.1-mickledore imx93evk," the left Ethernet port is labeled (ENET2) and the right Ethernet port is labeled (ENET1) on the board. However, upon booting into Linux, eth0 is assigned to ENET2 and eth1 to ENET1. [275870.178004] fec 42890000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off [275870.185699] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [275895.075584] imx-dwmac 428a0000.ethernet eth1: Link is Up - 1Gbps/Full - flow control off [275895.083801] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready What would be the best approach to ensure that upon Linux boot, ENET1 is eth0 and ENET2 is eth1? Should we consider changing the order in which drivers load, renaming the interface using systemd, or implementing a simple bash script? Any help will be highly appreciated.  Cheers, Nitesh   i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus Linux Yocto Project Re: iMX93 Network Interface Much appreciated for the solution. Re: iMX93 Network Interface @Chavira  Never mind... I see what you mean and I just noticed device tree "imx93-11x11-evk.dts" includes "#include "imx93.dtsi"".  Let me edit "imx93.dtsi" and test.  Cheers,  Nitesh Re: iMX93 Network Interface Hello @Chavira  Thank you for your prompt response.  For my prototype I'm using https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts#L386 device tree.  How can I modify the above dts? Cheers,  Nitesh Re: iMX93 Network Interface Hi @pilotnite! Thank you for contacting NXP Support!   I think that can be solved in the device tree.   By default is defined in the following way:   ethernet0 = &fec; ethernet1 = &eqos;   You have to change that with:   ethernet0 = &eqos; ethernet1 = &fec;   Please try it and share your results.   https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx93.dtsi#L33   Best Regards! Chavira

make sd card bootable fot ls1046ardb-pb Good moorning, I built an image with yocto real time edge project. My goal is to make a bootable sd card, so I want to start the board ls1046ardb-pb in SD boot mode. I can see in my /deploy/images/ls1046ardb folder that I have a .wic image. However that image contains only device tree, kernel and rootfs. How can I add rcw firmware and u-boot. Otherwise, Is there another method to format the SD card and deploy the different elements. Thank you Re: make sd card bootable fot ls1046ardb-pb I finally resolve my problem. It was only a problem of DIP switch ( see doc RTEDGEYOCTOUG_v2.7 chap 7.1). The image .wic generated by yocto real time edge contains already RCW and u-boot image. Thanks Re: make sd card bootable fot ls1046ardb-pb Please refer to Real-time Edge Software User Guide 7.2 Building eMMC images for Layerscape platform 7.4 Deploying eMMC images with separate images on Layerscape Platform You will find the path of RCW, U-boot and how to flash them. Thanks

AFIC901N 760 870 MH z circuit schematic Hello nxp team, Could you please provide correct schematic for AFIC901N application. Will be create if you show power source 7.5V lines VDD1 and VDD2( are these different source?). Thank you in advance Re: AFIC901N 760 870 MH z circuit schematic Hi DenysT Could you open a ticket on our platform? This component works differently than AFIC901N. I want to send you some additional documents and information. I think it is best for the community to stop here. Have a great day and good luck. Re: AFIC901N 760 870 MH z circuit schematic And next question about Vbias for MMZ09332BT1. Could we tune output power with DAC from MCU, connected to this pin? If MCU has power 3.3V could we reach 1W output power for our RF signal? thank you for help Re: AFIC901N 760 870 MH z circuit schematic Yes, Rafael, It is help. Thanks a lot Could you help with the MMZ09332BT1? It seems like a better option since it doesn’t require matching between stages. The question is essentially the same, as its datasheet specifies: VCC1 = VCC2 = VBIAS = 5 Vdc. Are these different sources or one? Also, what is Power Down Voltage? Is it an output or an input? The datasheet isn’t clear at all. Thank you for your help. (This datasheet is much better; at least it includes a schematic) Re: AFIC901N 760 870 MH z circuit schematic Hi DenysT I talked to a coworker and I noticed my mistake, it is not necessary to implement a second source, the transistors are connected in cascade so it is possible to power with the same source, sorry for the error, I hope this information helps you with your project. Have a great day and best of luck. Re: AFIC901N 760 870 MH z circuit schematic Hello Rafael, Thank you for answer. I have 2s(7.5V) battery. You mean that I need to buck-boost convert (7.5V output). First for VDD1, second for VDD2. Should I create some time delay for them? For example output from first through voltage divider goes to EN second? Maybe you know models converts what typically use with AFIC901? Thank you in advance Re: AFIC901N 760 870 MH z circuit schematic Hi DenysT Unfortunately, NXP documentation pack for this design does not include a schematic. It is our general practice since most RF designs are sensitive to board layout. Thus, the layout view plus BOM provides more reproducible results than a pure schematic. If you need, you can draw the schematic by yourself using layout and BOM. But in the datasheet you could see the BOM in different frequencies this information might help you. https://www.nxp.com/docs/en/data-sheet/AFIC901N.pdf Have a great day and best of luck.

制作 ls1046ardb-pb 的 SD 卡启动盘 晚安， 我使用 yocto 实时边缘项目构建了一个图像。 我的目标是制作一张可启动的 SD 卡，所以我想以 SD 启动模式启动主板 ls1046ardb-pb。 我可以在 /deploy/images/ls1046ardb 文件夹中看到我有一个 .wic图像。然而该图像仅包含设备树、内核和 rootfs。我如何添加 rcw 固件和 u-boot。 否则，是否有其他方法来格式化 SD 卡并部署不同的元素。 谢谢 回复：制作 ls1046ardb-pb 的 SD 卡可启动 我终于解决了我的问题。 这只是 DIP 开关的问题（参见文档 RTEDGEYOCTOUG_v2.7 第 7.1 章）。 图片 .wicyocto real time edge 生成的已经包含 RCW 和 u-boot 镜像。 谢谢！ 回复：制作 ls1046ardb-pb 的 SD 卡可启动 请参阅实时边缘软件用户指南 7.2 为 Layerscape 平台构建 eMMC 映像 7.4 在 Layerscape 平台上使用单独的映像部署 eMMC 映像 您将找到 RCW、U-boot 的路径以及如何刷新它们。 谢谢！

AFIC901N 760 870 MHz 电路原理图 你好，NXP团队， 您能否提供 AFIC901N 应用的正确原理图。如果您显示电源 7.5V 线 VDD1 和 VDD2（这些是不同的源吗？），则会创建。 先感谢您 回复：AFIC901N 760 870 MH z 电路原理图 下一个问题是关于 MMZ09332BT1 的 Vbias。我们可以使用连接到此引脚的 MCU 的 DAC 来调节输出功率吗？如果 MCU 的电源为 3.3V，我们的 RF 信号输出功率能否达到 1W？ 谢谢你的帮助 回复：AFIC901N 760 870 MH z 电路原理图 是的，拉斐尔，这是有帮助的。多谢 您能帮忙解决 MMZ09332BT1 吗？这似乎是一个更好的选择，因为它不需要阶段之间的匹配。问题本质上是相同的，因为其数据表指定：VCC1 = VCC2 = VBIAS = 5 Vdc。这些是不同的来源还是同一个来源？另外，什么是掉电电压？它是输出还是输入？数据表根本不清楚。感谢您的帮助。（这个数据表好多了；至少它包含一个原理图） 回复：AFIC901N 760 870 MH z 电路原理图 你好，拉斐尔， 謝謝您的回覆。 我有 2s(7.5V)电池。你的意思是我需要降压-升压转换（7.5V 输出）。 第一个为 VDD1，第二个为 VDD2。我应该为他们创造一些时间延迟吗？例如，从第一个分压器的输出到第二个 EN ？ 也许您知道模型转换通常与 AFIC901 一起使用吗？ 先感谢您

AFIC901N 760 870 MH z 回路図 こんにちはnxpチーム、 AFIC901Nアプリケーションの正しい回路図を提供していただけますか。電源7.5VラインVDD1とVDD2を表示すると作成されます(これらは異なるソースですか? よろしくお願いいたします Re:AFIC901N 760 870 MH z回路図 そして、次の質問はMMZ09332BT1のVbiasについてです。このピンに接続されたマイコンのDACで出力電力をチューニングできますか?MCUに3.3Vの電源がある場合、RF信号の出力電力は1Wに達する可能性がありますか? 助けてくれてありがとう Re:AFIC901N 760 870 MH z回路図 はい、ラファエル、それは助けです。どうもありがとうございます MMZ09332BT1を手伝ってもらえますか?ステージ間のマッチングを必要としないため、より良いオプションのようです。この質問は基本的に同じで、データシートにはVCC1 = VCC2 = VBIAS = 5 Vdcと明記されています。これらは異なる情報源ですか、それとも1つですか?また、パワーダウン電圧とは何ですか?それは出力ですか、それとも入力ですか?データシートはまったく明確ではありません。ご協力いただきありがとうございます。(このデータシートははるかに優れています。少なくとも回路図が含まれています) Re:AFIC901N 760 870 MH z回路図 こんにちはラファエル、 回答ありがとうございます。 私は2秒(7.5V)を持っています電池。あなたは私が昇降圧変換(7.5V出力)する必要があるということです。 1 つ目は VDD1 用、2 つ目は VDD2 用です。私は彼らのためにいくらかの時間遅延を作成する必要がありますか?たとえば、1 から分圧器を通した出力は EN 2 番目になりますか? たぶん、モデルは通常AFIC901で使用するものを変換することをご存知ですか? よろしくお願いいたします

SDカードをブート可能にするFOT LS1046ARDB-PB 良好な係留、 yocto real time edge projectでイメージを構築しました。 私の目標は起動可能なSDカードを作ることなので、ボードls1046ardb-pbをSDブートモードで起動したいと思います。 /deploy/images/ls1046ardbフォルダに.wicがあることがわかります画像。ただし、そのイメージにはデバイスツリー、カーネル、およびrootfsのみが含まれています。rcwファームウェアとu-bootを追加するにはどうすればよいですか。 そうでなければ、SDカードをフォーマットしてさまざまな要素を展開する別の方法はありますか。 よろしくお願い申し上げます。 日時:SDカードを起動可能なFOT ls1046ardb-pbにする ようやく問題が解決しました。 それはDIPスイッチの問題だけでした(doc RTEDGEYOCTOUG_v2.7 chap 7.1を参照)。 画像 .wicyocto Real Time Edgeによって生成されたものには、すでにRCWとu-bootイメージが含まれています。 ありがとうございます 日時:SDカードを起動可能なFOT ls1046ardb-pbにする Real-time Edge Software User Guideを参照してください。 7.2 Layerscapeプラットフォーム用のeMMCイメージの構築 7.4 eMMCイメージを別々のイメージでLayerscapeプラットフォームにデプロイする RCW、U-bootのパスとそれらをフラッシュする方法が見つかります。 ありがとうございます

88w8997 Bluetooth LE が Android 13 で動作しない こんにちはNXPチーム、私はRockchip rk3399 socを使用したプロジェクトを持っており、BT / wifiモジュールはAW-CM276MA-PURです。 Android 12ではうまく機能しましたが、Android 13にアップグレードした後、BLEが機能しなくなりました。 ペリフェラルサービスを開始したとき、非常に多くのエラーメッセージが表示されましたが、 この問題のトラブルシューティングを手伝ってもらえますか?感謝！

LPSPI SEND question. hi. i would like to use the send function of LPSPI0. (LPSPI_DRV_MasterTransferBlocking) but now there is no signal.(oscilloscope) Attachment 1. H/W circuit diagram. Attachment 2. config setting. Attachment 3. code init. i have a question here. Is transmisson possible even with only LPSPI0_OUT? Or should I connect another pin? (ex. LPSPI0_PCS1) only the send function is needed. what are the requirements for that feature? (i using 32K146) thank you. Re: LPSPI SEND question. Hi  As the Master, you should at least initialize the Serial Clock pin. Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------