将 MCSPTR2AK396 参考固件 (AMMCLIB/FreeMASTER) 适配到具有高侧传感器的定制硬件上 NXP社区的各位朋友，大家好！ 我目前正在使用S32K396 MCU开发一个电机控制应用程序，并通过FreeMASTER / AMMCLIB对其进行测试。首先，我使用MCSPTR2AK396 评估套件提供的参考固件。 然而，我的定制硬件设计与参考 EVK 板在三个主要方面存在显著差异： 当前传感拓扑结构： EVK板：低侧电流检测。 定制设计：高侧电流检测。 栅极驱动器配置： EVK 板：单个预驱动器（GD3000 / MC33937 型）。 定制设计：三个独立的栅极驱动器（每个相位一个专用的驱动器），具有直接高电平有效控制输入。 PWM极性： EVK 板：高侧 PWM 输入为低电平有效（反相）。 定制设计：高侧 PWM 输入为高电平有效（非反相）。 由于这些硬件差异，直接运行原装 MCSPTR2AK396 固件会导致故障和相位行为不正确。 请问修改 S32K396 初始化、PWM/eMIOS 配置、ADC 触发信号时序和 AMMCLIB 软件层，以便成功地从 EVK 设计迁移到我的自定义架构，最佳方法是什么？或者能否提供一份清单？ 任何指导、代码片段或配置方面的建议都将不胜感激。 谢谢你！ 问候， 埃萨基 Re: Adapting MCSPTR2AK396 reference firmware (AMMCLIB/FreeMASTER) for custom hardware with high-side 您好， 您所描述的变化（高侧电流检测、不同的栅极驱动器架构、PWM 极性变化以及相关的电机控制软件调整）与 MCSPTR2AK396 参考设计存在显著差异，需要对参考解决方案进行大量修改。 由于该项目的特殊性和复杂性，我们无法通过标准支持渠道提供完整的迁移指南。 如需获得将参考软件适配到您的定制硬件方面的专门帮助，请考虑联系恩智浦专业工程服务部门： 恩智浦工程服务 此致， 彼得

Access request for IW612 Zigbee DualPAN Host packages (ZBOSS / zb_mux) on FRDM-i.MX95 Hello NXP Community & Support Team, We are developing a commercial gateway product based on the NXP FRDM-i.MX95 evaluation board featuring the on-board IW612 tri-radio transceiver. Our host environment is Linux ARM64. Our architecture requires simultaneous Thread (Matter) and Zigbee Coordinator operation via the IW612 802.15.4 radio over SPI (/dev/spidev0.0) using the DualPAN architecture. While the OpenThread / OTBR side is well documented and accessible, the Zigbee Coordinator host components and multiplexer required for the IW612 DualPAN setup are restricted deliverables on nxp.com / Secure Files. Our company (Roth Elektronik GmbH) is a direct NXP customer, an active NDA is in place, and our NXP user account profile already shows "Granted" status for Zigbee entitlements. However, the download packages are not visible/accessible in our Secure Files dashboard. We opened support Case No: 01004667, but were redirected to local distributors. Since we procure our silicon and boards directly from NXP and already have the NDA and Zigbee access granted on our corporate account, this needs to be provisioned directly by the NXP software entitlement / product line team. Could an NXP representative or moderator please assist in escalating Case No: 01004667 internally so that the following deliverables are enabled for our account? 1. NXP-ZBOSS-HOST-RELEASE-*.zip (ZBOSS host stack binaries/headers for Linux ARM64, coordinator examples like dualpan_zc / simple_gw) 2. zigbee-rcp-sdk-IW612-*.tar 3. zb_mux host daemon / multiplexer binaries and documentation for IW612 SPI Thank you in advance for your support. Best regards, Mike Teschke Roth Elektronik GmbH Product: WiFi IW6XX Protocol: Zigbee Re: Access request for IW612 Zigbee DualPAN Host packages (ZBOSS / zb_mux) on FRDM-i.MX95 Hello, Hope you are doing well. For files that are under Secure Files: Secure Access Rights | NXP Semiconductors Could you please follow the process?  I would recommend checking the Secure Access Rights FAQs | NXP Semiconductors If you still have issues, I would recommend contacting one of our distributors available in the Distributor Network|NXP to help you with your request. Also, if you are working with any Module Maker, they could help you getting specific support for their module. Best Regards, Ricardo

Oscillator transconductance question of S32K144 Hello: In my application design, a 8MHz crystal is used and the SCG_SOSCCFG[RANGE] is set to 2b11, therefore the gmXOSC shall be 16mA/V minimum and 47mA/V maximum Stanley_Xu_0-1790056309153.png And I followed the equation gm_crit = 4 * (ESR + RS) * (2πF)^2 * (C0 + CL)^2 to calculate and compare 5*gm_crit to the datasheet value. Should I use 16mA/V or use 47mA/V ? I don't know if 16 ~47mA/V means part to part variation. If so, from WCCA perspective, I think I shall guarantee the 5*gm_crit < 16mA/V. However, what confused me is in the document AN5426 page 11. The given calculation example uses 47mA/V as criteria. Stanley_Xu_1-1790056639984.png Can some one help me to clarify? Thank you! Re: Oscillator transconductance question of S32K144 Hello @Stanley_Xu, Strictly for WCCA, use the minimum gmXOSC = 16 mA/V. The 16–47 mA/V range reflects combined process (part-to-part), voltage, and temperature variation — any given part will deliver a gmXOSC somewhere in that range. The datasheet criterion gmXOSC > 5 × gm_crit guarantees proper oscillation startup and 5x gm_crit can be considered as very safe, while 3x gm_crit is still safe. Regarding AN5426: the example uses 47 mA/V (max) for illustration, not as a WCCA. On the other hand, the datasheet also notes: "RS should be selected carefully to have appropriate oscillation amplitude for both protecting crystal or resonator device and satisfying proper oscillation startup condition." Regards, Daniel

FRDM-i.MX95上のIW612 Zigbee DualPANホストパッケージ(ZBOSS / zb_mux)へのアクセスリクエスト NXPコミュニティ&サポートチームの皆様、こんにちは。 私たちは、オンボードのIW612トライラジオトランシーバーを搭載したNXP FRDM-i.MX95評価ボードをベースにした商用ゲートウェイ製品を開発しています。ホスト環境はLinux ARM64です。 私たちのアーキテクチャでは、DualPANアーキテクチャを用いたIW612 802.15.4無線を介して、SPI(/dev/spidev0.0)を介してThread(Matter)とZigbeeコーディネーターの同時運用が必要です。 OpenThread / OTBR側はよくドキュメント化されアクセス可能ですが、IW612 DualPANセットアップに必要なZigbee Coordinatorのホストコンポーネントやマルチプレクサは、nxp.com/Secure Files上の限定的な納品物です。 私たちの会社(Roth Elektronik GmbH)はNXPの直接顧客であり、有効なNDAが成立しており、NXPのユーザーアカウントプロファイルにはすでにZigbeeの権利が「Granted」ステータスと表示されています。しかし、ダウンロードパッケージは当社のSecure Filesダッシュボードでは表示・アクセスできません。 私たちはサポートケース番号01004667を開設しましたが、地元の代理店にリダイレクトされました。シリコンと基板はNXPから直接調達しており、すでにNDAとZigBeeのアクセスが当社の企業情報アカウントで付与されているため、これらはNXPのソフトウェア権限付与/製品ラインチームが直接プロビジョニングする必要があります。 NXPの担当者またはモデレーターの方が、ケース番号:01004667を社内でエスカレーションし、以下の成果物が当アカウントで有効になるよう支援していただけませんか? 1. NXP-ZBOSS-HOST-RELEASE-*.zip(Linux ARM64用のZBOSSホストスタックバイナリ/ヘッダー、dualpan_zc/simple_gwなどのコーディネーター例) 2. zigbee-rcp-sdk-IW612-*.tar 3. zb_mux IW612 SPIのホストデーモン/多重化バイナリおよびドキュメント サポートにあらかじめ感謝いたします。 よろしくお願いします、 マイク・テシュケ Roth Elektronik GmbH 製品: WiFi IW6XX プロトコル：Zigbee Re: Access request for IW612 Zigbee DualPAN Host packages (ZBOSS / zb_mux) on FRDM-i.MX95 こんにちは、 あなたの調子が良いといいのですが。Secure Filesの項目にあるファイル: Secure Access Rights |NXPセミコンダクターズ その手順に従っていただけますか? Secure Access Rights FAQs(セキュリティアクセス権FAQ)をご確認することをおすすめします |NXPセミコンダクターズ それでも問題がある場合は、代理店ネットワーク 内の当社の代理店のいずれかにご連絡いただくことをお勧めします。NXPのお願いにご協力いただけると助かります。 また、モジュールメーカーを使っているなら、そのモジュールの具体的なサポートを手助けしてくれるかもしれません。 よろしくお願いいたします。 リカルド

Adapting MCSPTR2AK396 reference firmware (AMMCLIB/FreeMASTER) for custom hardware with high-side sen Hello NXP Community, I am currently developing a motor control application using the S32K396 MCU and testing it via FreeMASTER / AMMCLIB. As a starting point, I am using the reference firmware provided for the MCSPTR2AK396 evaluation kit. However, my custom hardware design differs significantly from the reference EVK board in three main areas: Current Sensing Topology: EVK Board: Low-side current sensing. Custom Design: High-side current sensing. Gate Driver Configuration: EVK Board: Single pre-driver (GD3000 / MC33937 type). Custom Design: Three separate, independent gate drivers (one dedicated driver per phase) with direct active-high control inputs. PWM Polarity: EVK Board: High-side PWM inputs are active-low (inverted). Custom Design: High-side PWM inputs are active-high (non-inverted). Because of these hardware discrepancies, running the original MCSPTR2AK396 firmware out-of-the-box results in faults and incorrect phase behavior. Could you please advise on the best approach or provide a checklist for modifying the S32K396 initialization, PWM/eMIOS configuration, ADC trigger timings, and AMMCLIB software layers to successfully migrate from the EVK design to my custom architecture? Any guidance, code snippets, or configuration pointers would be greatly appreciated. Thank you! Regards, Esakki Re: Adapting MCSPTR2AK396 reference firmware (AMMCLIB/FreeMASTER) for custom hardware with high-side Hi, The changes you described (high-side current sensing, different gate driver architecture, PWM polarity changes, and the associated motor-control software adaptations) represent a significant shift from the MCSPTR2AK396 reference design and require substantial modifications to the reference solution. Due to the project-specific nature and complexity of this work, we are unable to provide a complete migration guide through the standard support channel. For dedicated assistance with adapting the reference software to your custom hardware, please consider engaging NXP Professional Engineering Services: NXP Engineering Services Best regards, Petr

S32K3X4EVB-T172 无法使用 OpenSDA 进行编程 我有一块全新的S32K3X4EVB-T172评估板。S32处理器似乎运行的是出厂默认代码，但是当我尝试使用板载调试器（通过USB连接到我的电脑）进行调试/重新编程时，S32处理器和板载调试器都会进入复位状态。 我已按照S32K3X4EVB-T172快速入门指南中的说明，正确执行了开机/插电步骤。我也已安装了指南中提到的软件和插件。 我用同事的S32K3X4EVB-Q172 试了同样的方法，结果一切正常。 提前感谢！ 托比亚 Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 1. 请参阅讨论： S32K3X4EVB-T172 上的 PEmicro 连接助手问题。红色 LED 指示灯D15 (RST_OSDA) 和D3 (RESET_K3) 是常亮还是周期性闪烁？您的主板是否也遇到了与这位客户相同的问题？   2. FS26(U12) 是否热门？ 3. 你是否按照步骤“ 3.2 连接电源”和“3.3”进行操作？连接调试器电缆“？” 4. 插入 J40 micro-USB 连接线，观察D14状态 OSDA LED 指示灯。 如果D14橙色 LED 不亮：检查 USB 电缆是否为数据电缆，验证 PC 是否枚举 OpenSDA 设备，并确保 USB 端口和驱动程序正常工作。不建议通过 USB 集线器将 USB 线缆连接到电脑。 5. 板载调试器由 PEMicro 提供，建议 从“支持与下载”类别下的“ 多链路调试探针”页面下载最新的“ USB 多链路资源安装程序” 。安装完成后，打开 位于 C:\PEMicro\Multilink_Resources 目录下的 PEFirmwareConfig.exe 文件 ，查看固件版本。我的板载调试器固件版本为 10.98 。您的板载调试器固件版本是多少？如果版本过旧，建议更新。如果更新失败，建议联系 PEMicro 技术支持。 check the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.png检查 S32K3X4EVB-T172.png 上的固件版本 6. 请使用电压模式的万用表或示波器观察P3V3_SDA (J34 ) 的电压。 S32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.png 7. SDA_RST_TGTMCU由板载调试器 K26 的输出控制。如果SDA_RST_TGTMCU输出低电平，则红色 LED D15和D3都会亮起。 请使用示波器观察SDA_RST_TGTMCU (J36)电平。它一直都很低，还是会周期性地降低？ 通常情况下，当通过板载调试器下载程序或 RESET S32K3 时， SDA_RST_TGTMCU中应该观察到 10ms 的低电平，导致红色 LED D15和D3短暂亮起。 8. 是否可以通过 J12 连接外部调试器来调试板载 S32K3 芯片？ 此致敬礼， Robin Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 请检查跳线设置是否与“ 3.1 设置 S32K3X4EVB-T172 评估板中的跳线”中描述的设置相符。 J14的输入电压是12V吗？ 你调试的是哪个项目？您能否录制一段调试过程的视频并与我分享？ Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 如何确定示例项目的版本？ 我把J31换成了2-3。情况相同。 谢谢， 托比亚 Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 我不确定您目前正在测试的是哪个版本的 RTD Port_Example_S32K344 。 不过，我建议将J31设置为位置2-3 ，然后再试一次。 Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 跳线设置完全匹配。 J16 显示 12V（这似乎比直接测量插孔更容易）。 我正在使用快速入门指南中推荐的项目 Port_Example_S32K344。我觉得我可能无法录制视频。 托比亚 Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 你好，罗宾， 1. 当我尝试调试/编程时，两个 LED（D15 和 D3）都保持亮着。它们不会闪光。我认为我的主板遇到了与https://community.nxp.com/t5/S32K/PEmicro-Connection-Assistant-Issue-on-S32K3X4EVB-T172/mp/2252525 中客户相同的问题，但很遗憾，他似乎通过购买另一台EVB主机来绕过了这个问题。 2.否 3. 是的 4. 当我插入micro-USB数据线时，D14指示灯会亮起。设备管理器显示“OpenSDA - CDC 串行端口 ( http://www.pemicro.com/opensda )”。系统中没有USB集线器，我的电脑和连接线可以使用S32DS软件对其他S32K344 EVB进行编程。这个问题似乎只与这个电路板有关。 5-7. 请给我点时间把这些都过一遍。我会尽快回复。 8. 我还没有尝试直接使用 JTAG，因为我正在等待一个适配器，以便与 J12 连接。 感谢您的详细回复。 托比亚 Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 经过更多测试后： 5.我使用PEFirmwareConfig.exe成功更新了板载调试器固件。但是，当我尝试调试/编程时，情况仍然一样。 6. 当插入 USB 时，J34 电压为 3.25V。 7. J36 一直处于高电平，直到我尝试调试/编程。此时电压会降低，并保持低电压状态，直到 micro USB 连接断开为止。 还在等第8点的适配器。应该今天就能到。 谢谢！ 托比亚 Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 请将外部 12V 电源连接到 J14 并插入 USB 电缆后，拍摄 S32K3X4EVB-T172 板的照片；图像必须足够清晰，以显示跳线设置和哪些 LED 灯亮起。 请录制一段 S32DS 界面的视频，从您点击调试按钮开始，一直录制到出现错误屏幕为止。这样我就可以清楚地看到发生了什么，并有助于快速排除故障。如果您无法录制 S32DS 屏幕上操作的视频，能否截取一些屏幕截图来显示错误？ Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 终于找到一个能用于J12的JTAG适配器了。我可以使用外部调试器调试 S32K344 芯片。OpenSDA 仍然无法正常工作。 Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 早上好， 00_evb.jpg  ^ 上电并连接 USB 后电路板的初始状态 00_dashboard.png  ^ 项目仪表板示例 03_debug3.png 01_debug1.png 02_debug2.png 调试配置 04_error1.png  ^调试后的第一个错误 04_evb.jpg  ^ EVB 在尝试调试后出现错误（与上述错误同时发生） 05_error2.png 点击“中止”后出现错误  

S32K3X4EVB-T172 Unable to Program using OpenSDA I have a fresh-out-the-box S32K3X4EVB-T172 Eval board. The S32 processor seems to be running some factory default code, but when I try to debug/reprogram using the on-board debugger (connected to my computer using USB) both the S32 and the on-board debugger go into reset. I am using the correct Power On/Plug in procedure as described by the S32K3X4EVB-T172 quick start guide. I also have installed the software and addons described there as well. Tried same process with a co-worker's S32K3X4EVB-Q172 and it worked just fine.\ Thanks in advance, -Tobiah Re: S32K3X4EVB-T172 Unable to Program using OpenSDA 1. Please refer to the discussion: PEmicro Connection Assistant Issue on S32K3X4EVB-T172. Do the red LEDs D15(RST_OSDA) and D3(RESET_K3) remain lit, or do they flash periodically? Is your board experiencing the same issue as this customer?   2. Is FS26(U12) hot? 3. Did you follow the steps "3.2 Plug in the Power Supply" and then "3.3 Connect the Debugger Cable"? 4. Plug in the J40 micro-USB cable and observe the D14STATUS OSDA LED. If the D14 orange LED does not light up: Check whether the USB cable is a data cable, verify if the PC enumerates the OpenSDA device, and ensure the USB port and drivers are functioning correctly. Connecting the USB cable to the PC via a USB hub is not recommended. 5. The onboard debugger is provided by PEMicro, it is recommended to download the latest "USB Multilink Resources Installer" from the "Support & Downloads" category of the "Multilink Debug Probes". After installation, open PEFirmwareConfig.exe located in C:\PEMicro\Multilink_Resources to check the firmware version. My onboard debugger's firmware version is 10.98. What version is your board? If the version is too old, it is recommended to update. If the update fails, it is recommended to contact PEMicro technical support. check the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.pngcheck the version of firmware on S32K3X4EVB-T172.png 6. Please use a multimeter in voltage mode or an oscilloscope to observe the voltage of P3V3_SDA (J34). S32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.pngS32K3X4EVB-T172_PackRevB2_Schematic P3V3_SDA J34.png 7. The SDA_RST_TGTMCU is controlled by the output of the onboard debugger K26. If the SDA_RST_TGTMCU outputs a low level, both red LEDs D15 and D3 will light up. Please observe the SDA_RST_TGTMCU (J36) level using an oscilloscope. Is it always low, or is it periodically pulled low? Normally, when downloading a program or resetting the S32K3 via the onboard debugger, a 10ms low level should be observed in the SDA_RST_TGTMCU, causing red LEDs D15 and D3 to light up briefly. 8. Is it possible to debug the onboard S32K3 chip after connecting via J12 using an external debugger? Best Regards, Robin Re: S32K3X4EVB-T172 Unable to Program using OpenSDA I am not sure which version of the RTD Port_Example_S32K344 you are currently testing. However, I suggest setting J31 to positions 2-3 and trying again. Re: S32K3X4EVB-T172 Unable to Program using OpenSDA After some more testing: 5. I was able to update the onboard debugger firmware using the PEFirmwareConfig exe.  The behavior remains the same though when I try to debug/program. 6. J34 voltage is at 3.25V when USB is plugged in. 7. J36 is high until I try to debug/program. At which point it goes low and stays low until the micro USB is disconnected. Still waiting on an adapter for point 8.  It should arrive today. Thank you, -Tobiah Re: S32K3X4EVB-T172 Unable to Program using OpenSDA How can I determine what the version of the example project is? I switched J31 to 2-3. Same behavior. Thanks, -Tobiah Re: S32K3X4EVB-T172 Unable to Program using OpenSDA Please take a photo of the S32K3X4EVB-T172 board after connecting the external 12V power supply to J14 and plugging in the USB cable; the image must be clear enough to show the jumper settings and which LEDs are lit. Please record a video of the S32DS interface, starting from when you click the debug button and continuing until the error screen appears. This will allow me to see exactly what is happening and help troubleshoot the issue quickly. If you cannot record a video of the operations performed in S32DS on the screen, could you take a few screenshots to show the error? Re: S32K3X4EVB-T172 Unable to Program using OpenSDA Hello Robin, 1. Once I attempt to debug/program, both LEDs (D15 and and D3) remain lit. They do not flash.  I believe my board is experiencing the same issue as the customer in https://community.nxp.com/t5/S32K/PEmicro-Connection-Assistant-Issue-on-S32K3X4EVB-T172/m-p/2252525, but it seems he bypassed his issue by purchasing another EVB, which is unfortunate. 2. no 3. yes 4. D14 does light up when I plug in the micro-USB cable.  Device Manager shows "OpenSDA - CDC Serial Port (http://www.pemicro.com/opensda)".  There is no USB hub in the system, and my PC+cable can program other S32K344 EVBs using S32DS.  The issue seems tied specifically to this board. 5-7.  Give me some time to run these down.  I will respond shortly. 8. I have yet to try to JTAG directly as I am waiting on an adapter so I can interface with J12. Thank you for your detailed response, -Tobiah Re: S32K3X4EVB-T172 Unable to Program using OpenSDA Please check whether the jumper settings match those described in "3.1 Set Up Jumpers in the S32K3X4EVB-T172 Evaluation Board." Is the input voltage for J14 12V? Which project did you debug? Would it be possible for you to record a video of the debugging process and share it with me? Re: S32K3X4EVB-T172 Unable to Program using OpenSDA The jumper settings do match. J16 is showing 12V (seemed easier than measuring the jack directly). I am using the project Port_Example_S32K344 as recommended in the quick start guide.  I don't think I will be able to video. -Tobiah Re: S32K3X4EVB-T172 Unable to Program using OpenSDA Finally got a JTAG adapter that works for J12. I can debug the S32K344 chip using an external debugger. OpenSDA still doesn't work. Re: S32K3X4EVB-T172 Unable to Program using OpenSDA Good morning, 00_evb.jpg  ^ Initial state of board after power on and connection of USB 00_dashboard.png  ^ Example project dashboard 03_debug3.png 01_debug1.png 02_debug2.png    ^Debug configuration 04_error1.png  ^ first error after debug 04_evb.jpg  ^ EVB after attempted debug (happens at the same time as the above error) 05_error2.png  ^ error after clicking abort  

ハイサイドセンシングを備えたカスタムハードウェア向けにMCSPTR2AK396リファレンスファームウェア（AMMCLIB/FreeMASTER）を適応させる こんにちは、NXPコミュニティの皆さん、 現在、 S32K396 MCU を使ってモーター制御アプリケーションを開発し、 FreeMASTER / AMMCLIBを通じてテストしています。まず手始めに、 MCSPTR2AK396評価キットに付属のリファレンスファームウェアを使用します。 しかし、私のカスタムハードウェア設計は、主に3つの点でリファレンスEVKボードと大きく異なります。 電流検出トポロジー： EVKボード：ローサイド電流検出。 カスタムデザイン: ハイサイド電流検出。 ゲートドライバー構成: EVKボード: シングルプリドライバー(GD3000 / MC33937タイプ)。 カスタム設計: 3つの独立したゲートドライバ(各相に1つの専用ドライバ)を持ち、直接のアクティブハイ制御入力を備えています。 PWM極性： EVKボード：ハイサイドPWM入力はアクティブロー（反転）です。 カスタム設計: ハイサイドPWM入力はアクティブハイ(反逆なし)です。 これらのハードウェアの不一致により、オリジナルのMCSPTR2AK396ファームウェアをそのまま実行すると、不具合や位相動作の誤りが発生します。 EVK設計からカスタムアーキテクチャへの移行に成功させるために、S32K396初期化、PWM/eMIOS設定、ADCトリガータイミング、AMMCLIBソフトウェア層の変更に関する最適な方法やチェックリストを教えていただけませんか? 何かアドバイスやコードスニペット、設定のヒントがあれば大変ありがたいです。 ありがとう！ よろしくお願いいたします。 エサッキ Re: Adapting MCSPTR2AK396 reference firmware (AMMCLIB/FreeMASTER) for custom hardware with high-side こんにちは、 あなたが述べた変更点(ハイサイド電流検出、異なるゲートドライバアーキテクチャ、PWM極性の変更、そしてそれに伴うモータ制御ソフトウェアの適応)は、MCSPTR2AK396のリファレンス・デザインからの大きな変化を示しており、リファレンスソリューションに大幅な修正が必要です。 本作業はプロジェクト固有の性質と複雑さのため、標準サポートチャネルを通じて完全な移行ガイドを提供することはできません。 カスタムハードウェアにリファレンスソフトウェアを適応させるための専用サポートをご希望の方は、ぜひNXPプロフェッショナルエンジニアリングサービスにご相談ください。 NXPエンジニアリング・サービス よろしくお願いします、 ペトル

EtherCAT and 100Base T1 AtomDeng_0-1790068593516.jpeg AtomDeng_1-1790068718278.png It can be seen from this photo that it supports 100BASE-T1, but the actual situation is that the development board does not have this T1 interface. Board Design MCXC Re: EtherCAT and 100Base T1 Hi @AtomDeng , Thanks for your interest in NXP MIMXRT series! The diagram is an application-level system block diagram, not the hardware block diagram of the MIMXRT1180-EVK. It shows that the i.MX RT1180 Ethernet/EtherCAT interfaces can be connected to external TJA1103 PHYs to implement 100BASE-T1. The MIMXRT1180-EVK itself does not populate TJA1103 PHYs or 100BASE-T1 connectors. Its five onboard Ethernet ports use standard 10/100BASE-TX or 10/100/1000BASE-T PHYs with RJ45 connectors. Please check this diagram in <UM12021 MIMXRT1180-EVK Board User Manual >: Gavin_Jia_0-1790127234062.png Best regards, Gavin Re: EtherCAT and 100Base T1 "While the reference photo or documentation indicates support for 100BASE-T1, the physical connector is likely omitted on this specific board variant. This is common in development hardware where the underlying PHY chip or circuit traces may be present on the PCB, but the physical automotive connector is unpopulated to reduce costs, or the signals are routed to standard pin headers instead." 

EtherCAT and 100Base T1 AtomDeng_0-1790068593516.jpeg AtomDeng_1-1790068718278.png It can be seen from this photo that it supports 100BASE-T1, but the actual situation is that the development board does not have this T1 interface. Board Design MCXC Re: EtherCAT and 100Base T1 你好@AtomDeng ， 感谢您对 NXP MIMXRT 系列产品的关注！ 该图是应用级系统框图，而不是 MIMXRT1180-EVK 的硬件框图。它表明 i.MX RT1180 以太网/EtherCAT 接口可以连接到外部 TJA1103 PHY 以实现 100BASE-T1。 MIMXRT1180-EVK 本身不包含 TJA1103 PHY 或 100BASE-T1 连接器。其五个板载以太网端口采用标准的 10/100BASE-TX 或 10/100/1000BASE-T PHY，并带有 RJ45 连接器。 请查看《 UM12021 MIMXRT1180-EVK 开发板用户手册》中的这张图表： Gavin_Jia_0-1790127234062.png 此致， 加文 Re: EtherCAT and 100Base T1 “虽然参考照片或文档表明支持 100BASE-T1，但此特定电路板版本可能省略了物理连接器。”这在开发硬件中很常见，底层PHY芯片或电路走线可能已经位于PCB上，但为了降低成本，物理汽车连接器可能没有安装元件，或者信号被路由到标准针座上。

对 FRDM-i.MX95 上的 IW612 Zigbee DualPAN 主机软件包 (ZBOSS / zb_mux) 的访问请求 您好，NXP社区与支持团队， 我们正在开发一款基于 NXP FRDM-i.MX95 评估板的商用网关产品，该评估板配备了板载 IW612 三频收发器。我们的主机环境是Linux ARM64。 我们的架构需要通过 SPI (/dev/spidev0.0) 使用 DualPAN 架构的 IW612 802.15.4 无线电同时进行线程 (Matter) 和 Zigbee 协调器操作。 虽然 OpenThread / OTBR 方面有完善的文档和可访问的说明，但 IW612 DualPAN 设置所需的 Zigbee 协调器主机组件和多路复用器是 nxp.com / Secure Files 上的受限交付物。 我们公司（Roth Elektronik GmbH）是 NXP 的直接客户，我们已签署有效的保密协议，并且我们的 NXP 用户帐户配置文件已显示 Zigbee 授权的“已授予”状态。但是，这些下载包在我们的安全文件控制面板中不可见/无法访问。 我们提交了支持案例编号：01004667，但被转接到了当地代理商。由于我们直接从 NXP 采购芯片和电路板，并且我们的企业帐户已经获得了 NDA 和 Zigbee 访问权限，因此需要由 NXP 软件授权/产品线团队直接进行配置。 恩智浦代表或管理员能否协助将案件编号 01004667 上报至公司内部，以便为我们的账户启用以下交付成果？ 1. NXP-ZBOSS-HOST-版本-*.zip（适用于 Linux ARM64 的 ZBOSS 主机堆栈二进制文件/头文件，协调器示例，例如 dualpan_zc / simple_gw） 2. zigbee-rcp-sdk-IW612-*.tar 3. IW612 SPI 的 zb_mux 主机守护进程/多路复用器二进制文件和文档 感谢您提前给予的支持。 此致， 迈克·特施克 罗斯电子有限公司 产品：WiFi IW6XX 协议：Zigbee Re: Access request for IW612 Zigbee DualPAN Host packages (ZBOSS / zb_mux) on FRDM-i.MX95 你好， 希望你一切都好。对于受“安全文件”保护的文件：安全访问权限 | NXP 半导体 请您按照以下步骤操作好吗？ 我建议您查看恩智浦半导体 (NXP Semiconductors) 的“安全访问权限常见问题解答”。 如果您仍有疑问，我建议您联系我们代理商网络|NXP中的一位代理商，他们可以帮助您解决您的问题。 此外，如果您与任何模块制作商合作，他们可以帮助您获得针对其模块的特定支持。 顺祝商祺！ 里卡多

S32K144振荡器跨导问题 你好： 在我的应用设计中，使用了一个 8MHz 晶振，并将 SCG_SOSCCFG[RANGE] 设置为 2b11，因此 gmXOSC 的最小值应为 16mA/V，最大值应为 47mA/V。 Stanley_Xu_0-1790056309153.png 我按照公式 gm_crit = 4 * (ESR + RS) * (2πF)^2 * (C0 + CL)^2 计算并比较了 5*gm_crit 与数据表值。我应该使用 16mA/V 还是 47mA/V？ 我不知道 16 ~47mA/V 是否意味着零件间的差异。如果是这样，从 WCCA 的角度来看，我认为我应该保证 5*gm_crit < 16mA/V。然而，让我感到困惑的是文档 AN5426 第 11 页。给出的计算示例使用 47mA/V 作为标准。 Stanley_Xu_1-1790056639984.png 请问有人能帮我解释一下吗？谢谢你！ Re: Oscillator transconductance question of S32K144 你好@Stanley_Xu ， 严格来说，对于 WCCA，使用最小 gmXOSC = 16 mA/V。16–47 mA/V 的范围反映了工艺（部件之间）、电压和温度的综合变化——任何给定的部件都会在该范围内提供 gmXOSC。数据表标准 gmXOSC > 5 × gm_crit 保证了正确的振荡启动，5x gm_crit 可以被认为是非常安全的，而 3x gm_crit 仍然是安全的。 关于 AN5426：该示例使用 47 mA/V（最大值）进行说明，而不是作为 WCCA。 另一方面，数据手册还指出：“应仔细选择 RS，使其具有合适的振荡幅度，既能保护晶体或谐振器器件，又能满足适当的振荡启动条件。” 此致， 丹尼尔

S32K144の発振器相互コンダクタンスに関する質問 こんにちは： 私のアプリケーション設計では8MHzのクリスタルを使用し、SCG_SOSCCFG[範囲]は2b11に設定されているため、gmXOSCは最低16mA/V、最大47mA/Vとしています Stanley_Xu_0-1790056309153.png そして、gm_crit = 4 * (ESR + RS) * (2πF)^2 * (C0 + CL)^2 という式に従って、5*gm_crit を計算し、データシートの値と比較しました。16mA/Vを使うべきか、それとも47mA/Vを使うべきか？ 16～47mA/Vというのは、部品ごとのばらつきを意味するのかどうか分かりません。もしそうなら、WCCAの視点からは5星gm_crit <16mA/Vを保証しようと思います。しかし、私を混乱させたのは、文書AN5426の11ページです。提示された計算例では、基準値として47mA/Vを使用しています。 Stanley_Xu_1-1790056639984.png どなたか説明を手伝ってもらえますか?ありがとう！ Re: Oscillator transconductance question of S32K144 こんにちは、 @Stanley_Xu さん。 WCCAに限っては、最小gmXOSC = 16 mA/Vを使用してください。16～47 mA/Vの範囲は、製造プロセス（部品間）、電圧、温度の変動を総合的に反映したものであり、どの部品もこの範囲内のgmXOSC値を示す。データシートのクライテリオンGMXOSC > 5× gm_critは適切な発振起動を保証しており、5倍gm_critは非常に安全とみなせますが、3x gm_critも安全です。 AN5426に関して：この例では、WCCAとしてではなく、説明のために47 mA/V（最大）を使用しています。 一方、データシートには「RSは、水晶発振器や共振器デバイスを保護し、適切な発振開始条件を満たすために、適切な発振振幅を持つように慎重に選択する必要がある」とも記載されている。 よろしくお願いいたします。 ダニエル

8MPLUSLPD4-PEVK – 当前 eMMC 和 QSPI 内存配置 你好， 我想确认一下目前出货的 8MPLUSLPD4-PEVK 的内存配置。 NXP 当前的产品页面明确指出： 6 GB LPDDR4 16 GB eMMC 64 MB QSPI 然而，NXP 的 PEVK 快速入门指南明确指出： 6 GB LPDDR4 32 GB eMMC 32 MB QSPI NXP 在线聊天支持建议产品页面可能代表当前的硬件版本，而快速入门指南可能指的是早期版本，但建议与 i.MX 技术团队确认这一点。 NXP 的相关人员能否确认一下当前 8MPLUSLPD4-PEVK 硬件版本的 eMMC 和 QSPI 容量？ 谢谢！ Re: 8MPLUSLPD4-PEVK – current eMMC and QSPI memory configuration 您好， 感谢您对恩智浦半导体产品的关注， 我已经用我桌上的 8MPLUSLPD4-PEVK 确认过，其配置为 32GB eMMC 和 32MB QSPI。经审查最新原理图修订版，所有版本均未对内存进行重新配置，订购时应收到相同的内存。 我们的团队会审核产品页面，感谢您的分享。 此致

8MPLUSLPD4-PEVK – 現在のeMMCおよびQSPIメモリ構成 こんにちは、 現在出荷されている8MPLUSLPD4-PEVKのメモリ構成を確認させていただきたい。 現在のNXP製品ページには次のように記載されています: 6 GB LPDDR4 16GB eMMC 64 MB QSPI しかし、NXPのPEVKクイックスタートガイドには次のように記載されています。 6 GB LPDDR4 32GB eMMC 32 MB QSPI NXPのライブチャットサポートは、製品ページが現在のハードウェアリビジョンを表している可能性が高く、クイックスタートガイドは以前のバージョンを指している可能性があると示唆しましたが、i.MX 技術チームに確認することを勧めました。 NXPの方が現行の8MPLUSLPD4-PEVKハードウェアリビジョンのeMMCおよびQSPI容量を確認できますか? よろしくお願いします。 Re: 8MPLUSLPD4-PEVK – current eMMC and QSPI memory configuration こんにちは、 NXP Semiconductors製品にご関心いただきありがとうございます。 手元にある8MPLUSLPD4-PEVKで確認したところ、構成は32GBのeMMCと32MBのQSPIでした。最新の回路図リビジョンを確認したところ、どのリビジョンでもメモリの再構成は行われておらず、注文時に同じメモリが届くはずです。 私たちのチームが製品ページをレビューします。共有してくださりありがとうございます。 よろしくお願いします。

Ara Vision Examples Multi-Stream YOLOv8 Object Detection  This post shows a walkthrough of the ARA2 Vision Examples demo and its multi-stream YOLOv8 object detection application. The ara2-vision-examples demo provides vision AI examples for NXP i.MX platforms using Ara240 DNPU acceleration. It demonstrates real-time video processing with AI/ML inference capabilities such as object detection, classification, pose estimation, and semantic segmentation. This walkthrough focuses on the Go Point launch of the application, which uses GStreamer to process up to eight simultaneous video streams, run YOLOv8 object detection on each stream, and display the results in a single mosaic view.   Key Features Multi-stream video processing from 1 to 8 streams YOLOv8 object detection accelerated by Ara240 DNPU Support for YOLOv8n, YOLOv8s, YOLOv8m, YOLOv8l, and YOLOv8x models GStreamer-based video pipeline Mosaic display output with bounding boxes Runtime options for stream count, model selection, synchronization, and endpoint selection FPS and IPS performance overlay per stream   Running the Demo Run the application with the default settings: multistream_yolov8 Run with a specific number of streams: multistream_yolov8 -s 4 Select a different YOLOv8 model: multistream_yolov8 -s 4 --model yolov8s Run eight streams for maximum throughput: multistream_yolov8 -s 8 --sync false Enable synchronized playback: multistream_yolov8 -s 4 --sync true   Walkthrough Video In the attached video, it is shown how to launch the application from GoPoint, configure the number of streams, select different YOLOv8 models, and view the object detection results in the mosaic display.  This video is currently being processed. Please try again in a few minutes. (view in My Videos) Summary Ara-Vision-Examples is the reference application showcasing edge vision AI on the Ara240 Discrete NPU (DNPU). It runs real-time object detection, classification, pose estimation and semantic segmentation over single or multiple (up to eight) video streams, rendering bounding boxes, labels and confidence scores. Links ARA2 Vision Examples repository: https://github.com/nxp-imx-support/ara2-vision-examples Multi-stream YOLOv8 README: https://github.com/nxp-imx-support/ara2-vision-examples/blob/main/tasks/object-detection/yolov8n/multistream-gstreamer/README.md ARA2-M2-16G-GT ARA240 Hands-On Training

2-CH CAN HAT with FRDM-IMX93 Enabling a 2-Channel CAN HAT (MCP2515) on the NXP i.MX93 FRDM Board This article documents the process of adding hardware support for a 2-Channel CAN HAT from WaveShare using dual Microchip MCP2515 controllers over SPI on the NXP i.MX93 FRDM evaluation board. By default, the board exposes native FlexCAN interfaces, but utilizing a popular Raspberry Pi-compatible CAN HAT requires customizing the Linux device tree and kernel configuration. Prerequisites Hardware: NXP i.MX93 FRDM board, 2-Channel CAN HAT. Software: NXP Linux BSP (Tested in 6.18.y). Toolchain: Toolchain obtained from Yocto (Refer to the 4.5.12 How to build U-Boot and Kernel in standalone environment from i.MX Linux User's Guide). Step 1: Modify the Device Tree We need to edit the main board device tree file  arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts  to configure the SPI master, add the dual MCP2515 nodes, assign interrupt pins, and disable conflicting native interfaces. The key changes: Power Regulators: Ensured the expansion connectors ( VEXP_3V3 and VEXP_5V ) correctly pull up and preserve state using pinctrl-assert-gpios . Fixed Clock: Defined an external 16MHz clock element required by the MCP2515 crystal oscillators. FlexCAN Deactivation: Disabled conflicting native flexcan2 nodes sharing pins. LPSPI3 Configuration: Replaced the default spidev dummy node with two microchip,mcp2515 nodes, adding two distinct Chip Select (CS) pins ( GPIO2_IO08 and GPIO2_IO07 ) and mapping the respective hardware interrupts ( GPIO2_IO23 and GPIO2_IO25 ). Device Tree Git Diff: diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts index 18afe964e020..7b3af73f144f 100644 --- a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts @@ -134,6 +134,7 @@ reg_vexp_3v3: regulator-vexp-3v3 { compatible = "regulator-fixed"; regulator-name = "VEXP_3V3"; gpio = <&pcal6524 2 GPIO_ACTIVE_HIGH>; + pinctrl-assert-gpios = <&pcal6524 2 GPIO_ACTIVE_HIGH>; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; @@ -144,6 +145,7 @@ reg_vexp_5v: regulator-vexp-5v { compatible = "regulator-fixed"; regulator-name = "VEXP_5V"; gpio = <&pcal6524 8 GPIO_ACTIVE_HIGH>; + pinctrl-assert-gpios = <&pcal6524 8 GPIO_ACTIVE_HIGH>; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; @@ -269,6 +271,15 @@ K3: user_btn2 { interrupts = <6 IRQ_TYPE_EDGE_FALLING>; }; }; + + clocks { + clk16m: clk16m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <16000000>; + clock-output-names = "clk16m"; + }; + }; }; &adc1 { @@ -292,7 +303,7 @@ &flexcan2 { pinctrl-0 = <&pinctrl_flexcan2>; pinctrl-1 = <&pinctrl_flexcan2_sleep>; xceiver-supply = <&reg_can2_stby>; - status = "okay"; + status = "disabled"; }; &mu1 { @@ -620,15 +631,29 @@ typec1_dr_sw: endpoint { &lpspi3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lpspi3>; - cs-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; - pinctrl-assert-gpios = <&pcal6408 0 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>, <&gpio2 7 GPIO_ACTIVE_LOW>; + pinctrl-assert-gpios = <&pcal6408 0 GPIO_ACTIVE_LOW>; status = "okay"; - spidev0: spi@0 { + can0: can@0 { + compatible = "microchip,mcp2515"; reg = <0>; - compatible = "lwn,bk4"; - spi-max-frequency = <1000000>; + clocks = <&clk16m>; + interrupt-parent = <&gpio2>; + interrupts = <23 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <10000000>; }; + + can1: can@1 { + compatible = "microchip,mcp2515"; + reg = <1>; + clocks = <&clk16m>; + interrupt-parent = <&gpio2>; + interrupts = <25 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <10000000>; + }; + + }; &lpuart1 { /* console */ @@ -894,9 +919,12 @@ MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e pinctrl_lpspi3: lpspi3grp { fsl,pins = < MX93_PAD_GPIO_IO08__GPIO2_IO08 0x39e + MX93_PAD_GPIO_IO07__GPIO2_IO07 0x39e MX93_PAD_GPIO_IO09__LPSPI3_SIN 0x39e MX93_PAD_GPIO_IO10__LPSPI3_SOUT 0x39e MX93_PAD_GPIO_IO11__LPSPI3_SCK 0x39e + MX93_PAD_GPIO_IO23__GPIO2_IO23 0x39e + MX93_PAD_GPIO_IO25__GPIO2_IO25 0x39e >; }; After modifying the file, compile your device tree blobs (.dtb) and deploy them to your target boot partition. You can refer to the below post to know the process: How to compile Linux Kernel Image and device tree using Yocto SDK. Step 2: Enable Kernel Driver Support The MCP251x driver must be enabled within the Linux kernel configuration framework. Run the configuration tool: user@host:~/linux-imx$ make menuconfig Navigate through the menu to enable the driver either statically ( [*] ) or as a module ( [M] 😞 [*] Networking support <*> CAN bus subsystem support <*> Raw CAN Protocol (raw access with CAN-ID filtering)   <*> Broadcast Manager CAN Protocol (with content filtering) <*> CAN Gateway/Router (with netlink configuration) And: Device Drivers [*] Network device support <*> CAN Device Drivers CAN SPI interfaces <*> Microchip MCP251x and MCP25625 SPI CAN controllers <*> Microchip MCP251xFD SPI CAN controllers Save your configuration and compile your kernel/modules. Step 3: Initialize and Test Interfaces Once the board boots with the new device tree and kernel, you should see two new network interfaces listed under ip link show ( can0 and can1 ). Manuel_Salas_0-1790114307590.png Now, you can setup the CAN interfaces: $ sudo ip link set can0 up type can bitrate 1000000 $ sudo ip link set can1 up type can bitrate 1000000 $ sudo ifconfig can0 txqueuelen 65536 $ sudo ifconfig can1 txqueuelen 65536 Connect the HAT in loopback: Manuel_Salas_5-1790114793732.png From Interface can0: candump can0 From interface can1: cansend can1 000#11.22.33.44 Manuel_Salas_1-1790114548204.png Manuel_Salas_2-1790114560757.png Manuel_Salas_3-1790114583087.png Hope this can be helpful. Best regards, Salas. i.MX93

Smart Device Gateway Smart Device Gateway In this post, I want to share a quick walkthrough of Smart Device Gateway, a FastAPI-based demo server that allows connected devices to use local GenAI capabilities accelerated by the Ara240 DNPU. The idea behind this demo is to centralize AI intelligence in one gateway instead of adding powerful AI hardware to every device. A connected device only needs a microphone, speaker, and network connection to become a voice-enabled assistant.   What It Does Smart Device Gateway enables devices such as appliances or embedded clients to send audio to a local server, process the request using speech recognition, RAG, an LLM running on Ara240 DNPU, and text-to-speech, then stream the spoken response back to the client. The current demo showcases intelligent device assistants for a generic oven and coffee machine/barista use case, using device manuals as the knowledge base for contextual responses.   Architecture Overview The Smart Device Gateway receives audio from a client over WebSocket, converts speech to text, retrieves relevant context from a device knowledge base, sends the prompt to the LLM through the eIQ AAF Connector, converts the generated response back to speech, and streams the audio response to the client. At a high level, the flow is: Audio Input → STT → RAG → eIQ AAF Connector / LLM → TTS → Audio Output The LLM runs on the Ara240 DNPU, while the server runs on the FRDM i.MX platform.   Run the Server from Command Line Start the server: run_server_only --host 0.0.0.0 --port 8080 The server expects the eIQ AAF Connector to already be running on 0.0.0.0:8000 with Qwen2.5-7B-Instruct properly configured. Alternatively, the demo can start the server together with the connector: run_server --host 0.0.0.0 --port 8080   Host PC Client Example The demo includes a push_to_talk client that can run on a host PC. After copying the push_to_talk folder, run: python -m uv run push_to_talk.py --server_ip --port --device oven You can also use: python -m uv run push_to_talk.py --server_ip --port --device barista If no device name is provided, the RAG knowledge base is not used and the response is generated from the LLM’s general knowledge.   Walkthrough Video In the attached video, I show how to start the Smart Device Gateway server, connect a client, select a device profile such as oven or barista, ask a voice question, and receive a spoken response generated locally using Ara240 DNPU acceleration. This video is currently being processed. Please try again in a few minutes. (view in My Videos)   Summary Smart Device Gateway demonstrates how everyday devices can become voice-enabled assistants by connecting to a local AI gateway. By combining STT, RAG, LLM inference on Ara240 DNPU, and TTS, the demo provides a practical reference for building local, privacy-focused GenAI experiences on NXP i.MX platforms.   Link Smart Device Gateway repository ARA2-M2-16G-GT ARA240 Hands-On Training

VLM Edge Studio VLM Edge Studio In this post, I want to share a quick walkthrough of VLM Edge Studio, an NXP launcher application designed to interact with supported Vision-Language Models running locally on FRDM i.MX platforms with Ara240 DNPU acceleration. VLM Edge Studio provides a Qt/QML-based GUI for model selection, prompt input, and visual interaction with locally running VLMs at the edge. It communicates with the Ara240 Runtime SDK through the eIQ AAF Connector using a REST-based interface and streaming token responses.   Key Features Local Vision-Language Model inference on supported i.MX platforms Ara240 DNPU acceleration GUI-based model selection and prompt input Streaming token output Integration with eIQ AAF Connector and Ara240 Runtime SDK Support for camera-based visual input using a USB-C HD camera   Supported Model Qwen2.5-VL-7B-Instruct-Ara240 This model is provided as an Ara240-compatible model.dvm file and is intended for local execution on the target platform.   Running VLM Edge Studio Start the application with: run_vlm_edge_studio Before launching, make sure the Ara240 runtime service is running: systemctl status rt-sdk-ara2.service --no-pager -l Once the GUI appears, click LOAD to load the model. After the model is ready, enter a prompt and submit it to interact with the VLM locally on the i.MX platform.   Walkthrough Video In the attached video, I show how to launch VLM Edge Studio from GoPoint, load the supported Vision-Language Model, submit a prompt, and interact with the model running locally with Ara240 DNPU acceleration. (function() { var wrapper = document.getElementById('lia-vid-6405413539112w960h540r760'); var videoEl = wrapper ? wrapper.querySelector('video-js') : null; if (videoEl) { if (window.videojs) { window.videojs(videoEl).ready(function() { this.on('loadedmetadata', function() { this.el().querySelectorAll('.vjs-load-progress div[data-start]').forEach(function(bar) { bar.setAttribute('role', 'presentation'); bar.setAttribute('aria-hidden', 'true'); }); }); }); } }})(); (view in My Videos) Summary VLM Edge Studio is a useful tool for evaluating local Vision-Language Model inference on NXP i.MX platforms using Ara240 DNPU acceleration. It provides a simple workflow for loading the model, entering prompts, and interacting with visual-language AI directly at the edge.   Link VLM Edge Studio repository ARA2-M2-16G-GT ARA240 Hands-On Training

LLM Edge Studio LLM Edge Studio In this post, I want to share a quick walkthrough of LLM Edge Studio, an NXP launcher application designed to test supported Large Language Models running locally on i.MX platforms with Ara240 DNPU acceleration. LLM Edge Studio provides a simple GUI to select a model, load it, enter prompts, and interact with an LLM directly at the edge. It communicates with the Ara240 Runtime SDK through the eIQ AAF Connector, using a REST-based interface for prompt submission and streaming token responses.   Key Features Local LLM inference on supported i.MX platforms Ara240 DNPU acceleration GUI-based model selection and prompt input Streaming token output Integration with eIQ AAF Connector and Ara240 Runtime SDK   Supported Models Qwen2.5-coder-1.5B Qwen2.5-7B-Instruct These models are provided as Ara240-compatible model.dvm files and are intended for local execution on the target platform.   Running LLM Edge Studio Start the application with: run_llm_edge_studio Before launching, make sure the Ara240 runtime service is running: systemctl status rt-sdk-ara2.service --no-pager -l Once the GUI appears, click LOAD to load the selected model. After the model is ready, enter a prompt and submit it to start interacting with the LLM.   Walkthrough Video In the attached video, I show how to launch LLM Edge Studio from GoPoint, load a supported model, submit a prompt, and view the generated response running locally on the i.MX platform with Ara240 DNPU acceleration. (function() { var wrapper = document.getElementById('lia-vid-6405411704112w960h540r491'); var videoEl = wrapper ? wrapper.querySelector('video-js') : null; if (videoEl) { if (window.videojs) { window.videojs(videoEl).ready(function() { this.on('loadedmetadata', function() { this.el().querySelectorAll('.vjs-load-progress div[data-start]').forEach(function(bar) { bar.setAttribute('role', 'presentation'); bar.setAttribute('aria-hidden', 'true'); }); }); }); } }})(); (view in My Videos)   Summary LLM Edge Studio is a useful tool for quickly evaluating local LLM inference on NXP i.MX platforms using Ara240 DNPU acceleration. It provides a simple workflow for model loading, prompt testing, and observing token streaming directly at the edge. Link LLM Edge Studio repository: https://github.com/nxp-imx-support/llm-edge-studio ARA2-M2-16G-GT ARA240 Hands-On Training