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MCIMX6D6AVT10AD quadrature interface Is Quadrature channel available in "MCIMX6D6AVT10AD" processor to decode Rotary Encoder signals? Board Design Re: MCIMX6D6AVT10AD quadrature interface Thank you for you support Re: MCIMX6D6AVT10AD quadrature interface Hello,   The i.MX6D doesn't have a dedicated hardware to decode Rotary Encoder signals but you can use GPIO pins to do that task by software, here some information that could be used as reference:   Rotary encoder with GPIOs   rotary-encoder - a generic driver for GPIO connected devices   Best regards.
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タグレスポンスでのTaplinx iOSアプリのクラッシュ こんにちは、私は UG10045.pdfに従ってiOSアプリケーションを作成しました。私はApduExchangeWithByteArrayメソッドを作成し、その内容を実装しました。ただし、タグからtaplinxライブラリに応答を返すと、デバイスログから次のエントリでアプリケーションがクラッシュします。 Time Device Name Type PID Tag Message Nov 6 20:44:31 iPhone Notice 5223 MobileFacilityApp Command Set - 1 Nov 6 20:44:31 iPhone Notice 5223 MobileFacilityApp Command Set - Native Nov 6 20:44:31 iPhone Error 0 kernel(Sandbox) Sandbox: MobileFacilityApp(5223) deny(1) sysctl-read kern.bootargs Nov 6 20:44:38 iPhone Notice 5223 MobileFacilityApp(UIKitCore) Received memory warning. Nov 6 20:44:38 iPhone Notice 5223 MobileFacilityApp(UIKitCore) Received memory warning. Nov 6 20:44:40 iPhone Notice 0 kernel EXC_RESOURCE -> MobileFacilityApp[5223] exceeded mem limit: InactiveHard 3072 MB (fatal) Nov 6 20:44:40 iPhone Notice 0 kernel memorystatus: killing process 5223 [MobileFacilityApp] in high band FOREGROUND (100) - memorystatus_available_pages: 44859 空の応答をtaplinxライブラリに送り返すと(ResponseDataを設定せずにTL_TagAPDUResponse)、アプリはクラッシュせず、不完全な応答に関するエラーが発生します(これは予想されます)。私は何が間違っていますか? Re:タグ応答のTaplinx iOSのappcrashについて フォローアップ - 私が自分のものを提供する代わりに提供されたTapLinxApduHandlerを使用するように実装を変更したとき - その後、apduExchangeWithByteArrayはコントラクトに準拠します - (null許容 TL_TagAPDUResponse *)apduExchangeWithByteArray:(NSData *_Nonnull)apduData; Re:タグ応答のTaplinx iOSのappcrashについて @ukcas - Taplinx iOSライブラリのどのバージョンが「最新」ですか?私は2.0.0を持っており、 apduExchangeメソッドからTL_TagAPDUResponseを返すと間違いなくクラッシュするため、j2objcライブラリからの生のIOSByteArrayである必要があります。私はtaplinxライブラリにC#バインディングを使用していますが、この問題では問題ではありません。 Re:タグ応答のTaplinx iOSのappcrashについて こんにちは クラッシュは間違いなくTaplinxライブラリから来ています。 - (null 許容 TL_TagAPDUResponse *)apduExchangeWithByteArray:(NSData *_Nonnull)apduData; 実際には: - (null 許容 IOSByteArray*)apduExchangeWithByteArray:(IOSByteArray*_Nonnull)apduData; それは動き始めました Re:タグ応答のTaplinx iOSのappcrashについて こんにちは、ダミアン。 たぶん、エラーの原因は、TapLinxライブラリではなく、メモリ制限を超えていることですか? MobileFacilityApp[5223] exceeded mem limit: InactiveHard 3072 MB (fatal) TapLinxライブラリを統合したアプリケーションは、次のように使用できます(ApduExchangeを上に実装する必要はありません)。 代理オブジェクトを APDUHandler に設定する let reader = TL_IOSNFCReader(uid: tag.identifier, historicalBytes: tag.historicalBytes ?? Data()) handler = TapLinxApduHandler(reader: reader) handler.delegate = self libraryManager?.setApduHandlerWithApduHandler(handler) 次のステップは、アプリケーション内にプロトコルメソッドを実装することです func apduExchange(withByteArray apduData: Data) -> TL_TagAPDUResponse? { var tagAPDUResponse: TL_TagAPDUResponse? if connectedTag != nil { // Send Tag Type Native of ISO and the apdu as NFCISO7816APDU executeAPDUCommandOn7816Tag(tagType: tagtype, apdu: apdu) { data in let appendedData = data tagAPDUResponse = TL_TagAPDUResponse(responseData: appendedData, tag: self.currentTag) semaphore.signal() } let _ = semaphore.wait(timeout: .now() + 3.0) } else if connectedMifareTag != nil { let semaphore = DispatchSemaphore(value: 0) print("MIFARE CAPDU 📱->💳 \(apduData.hex)") executeAPDUCommandOnMIFARETag(apdu: apduData) { data in print("RAPDU 📱<-💳 Data: \(data.hex)") tagAPDUResponse = TL_TagAPDUResponse(responseData: data, tag: self.currentTag) semaphore.signal() } let _ = semaphore.wait(timeout: .now() + 3.0) } print("Tag Response \(String(describing: tagAPDUResponse))") return tagAPDUResponse } この単純化がお役に立てば幸いです。 よろしくお願いいたします。 TapLinxチーム Re:タグ応答のTaplinx iOSのappcrashについて もう 1 つ、apduData は実際には NSData ではなく IOSByteArray でもあります Re:タグ応答のTaplinx iOSのappcrashについて どうやらTapLinx-v2.0.0に含まれているヘッダーはすべて間違っているようです。TapLinxApduHandler.hには、宣言があります。 - (nullable TL_TagAPDUResponse *)apduExchangeWithByteArray:(NSData *_Nonnull)apduData; しかし、実際には IOSByteArray* を返す必要があります、そうでなければ、アプリは前述の症状でクラッシュします
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MCIMX6D6AVT10AD直交インターフェース 直交チャネルは「MCIMX6D6AVT10AD」プロセッサでロータリーエンコーダー信号をデコードするために使用できますか? ボード設計 Re:直交インターフェースMCIMX6D6AVT10AD ご支援いただきありがとうございます
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Taplinx iOS appcrash on tag response Hi, i followed UG10045.pdf and created ios application. I created ApduExchangeWithByteArray method and implemented its contents. However when send back response from tag back to taplinx library, application crashes with following entries from device log: Time Device Name Type PID Tag Message Nov 6 20:44:31 iPhone Notice 5223 MobileFacilityApp Command Set - 1 Nov 6 20:44:31 iPhone Notice 5223 MobileFacilityApp Command Set - Native Nov 6 20:44:31 iPhone Error 0 kernel(Sandbox) Sandbox: MobileFacilityApp(5223) deny(1) sysctl-read kern.bootargs Nov 6 20:44:38 iPhone Notice 5223 MobileFacilityApp(UIKitCore) Received memory warning. Nov 6 20:44:38 iPhone Notice 5223 MobileFacilityApp(UIKitCore) Received memory warning. Nov 6 20:44:40 iPhone Notice 0 kernel EXC_RESOURCE -> MobileFacilityApp[5223] exceeded mem limit: InactiveHard 3072 MB (fatal) Nov 6 20:44:40 iPhone Notice 0 kernel memorystatus: killing process 5223 [MobileFacilityApp] in high band FOREGROUND (100) - memorystatus_available_pages: 44859 When i sent back empty response back to taplinx library (just TL_TagAPDUResponse without setting ResponseData) - app does not crash and i get error about incomplete response (which is expected). What am i doing wrong?   Re: Taplinx iOS appcrash on tag response followup - when i changed my implementation to use provided TapLinxApduHandler instead of providing my own - then apduExchangeWithByteArray does conform to contract - (nullable TL_TagAPDUResponse *)apduExchangeWithByteArray:(NSData *_Nonnull)apduData; Re: Taplinx iOS appcrash on tag response @ukcas - what version of taplinx ios library is 'current'? Because i have 2.0.0 and it definitely crashes when i return TL_TagAPDUResponse from apduExchange method, it has to be raw IOSByteArray from j2objc library. I'm using c# bindings for taplinx library, but it does not matter in this problem. Re: Taplinx iOS appcrash on tag response hi the crash definietly comes from taplinx library because when i changed - (nullable TL_TagAPDUResponse *)apduExchangeWithByteArray:(NSData *_Nonnull)apduData; to actually: - (nullable IOSByteArray*)apduExchangeWithByteArray:(IOSByteArray*_Nonnull)apduData; It started working Re: Taplinx iOS appcrash on tag response Hello Damian, Maybe the cause of the error is some exceeding memory limit and not TapLinx library? MobileFacilityApp[5223] exceeded mem limit: InactiveHard 3072 MB (fatal) The application which integrates TapLinx Library can be used as following (no need for ApduExchange implementation on top) Set the delegate to the APDUHandler let reader = TL_IOSNFCReader(uid: tag.identifier, historicalBytes: tag.historicalBytes ?? Data()) handler = TapLinxApduHandler(reader: reader) handler.delegate = self libraryManager?.setApduHandlerWithApduHandler(handler) Next Step will be to implement the protocol method inside the application func apduExchange(withByteArray apduData: Data) -> TL_TagAPDUResponse? { var tagAPDUResponse: TL_TagAPDUResponse? if connectedTag != nil { // Send Tag Type Native of ISO and the apdu as NFCISO7816APDU executeAPDUCommandOn7816Tag(tagType: tagtype, apdu: apdu) { data in let appendedData = data tagAPDUResponse = TL_TagAPDUResponse(responseData: appendedData, tag: self.currentTag) semaphore.signal() } let _ = semaphore.wait(timeout: .now() + 3.0) } else if connectedMifareTag != nil { let semaphore = DispatchSemaphore(value: 0) print("MIFARE CAPDU 📱->💳 \(apduData.hex)") executeAPDUCommandOnMIFARETag(apdu: apduData) { data in print("RAPDU 📱<-💳 Data: \(data.hex)") tagAPDUResponse = TL_TagAPDUResponse(responseData: data, tag: self.currentTag) semaphore.signal() } let _ = semaphore.wait(timeout: .now() + 3.0) } print("Tag Response \(String(describing: tagAPDUResponse))") return tagAPDUResponse } Hope this simplification would help you. Best regards, TapLinx team Re: Taplinx iOS appcrash on tag response one more thing - apduData is really also IOSByteArray, not NSData Re: Taplinx iOS appcrash on tag response apparently included headers in TapLinx-v2.0.0 are all wrong. In TapLinxApduHandler.h we see declaration: - (nullable TL_TagAPDUResponse *)apduExchangeWithByteArray:(NSData *_Nonnull)apduData; but in reality we should return IOSByteArray*, otherwise app will crash with aforementioned symptoms
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IMX8MP - image capturing format for ISP Calibration Hello @joanxie  Need a clarity on capturing images for ISP Calibration of our own camera with imx662 sensor. 1. As per ISP Calibration Tool Suite User Guide, we need to capture images for each calibration steps in a particular image format. Some steps says raw12 some steps says .bgm .jpeg. So what is the format suits for all the steps and how can we capture images for ISP tuning? FYI, till now I am using tuning-client tool to capture the images for ISP tuning (output format will be either .raw12 or .yuv). Is this correct or do we have any other way to capture images in a particular format which isp Calibration demands? Also please mention how to capture images in .png/.JPEG format in IMX8MP? 2. Chapter 6 (lens shade correction)says , the test images must be black level corrected, but without any further processing. In my case I am using existing calibration files (ov2775) which is provided in samples folders. So how can I bypass further processing of ISP while capturing images for lens shade correction?  Basically what calibration XML files should be mentioned in run.sh while capturing images for ISP tuning? Can we capture images without adding any calibration.xml file? Thanks in advance Re: IMX8MP - image capturing format for ISP Calibration according to the private message, you can do this using the default calibration files Re: IMX8MP - image capturing format for ISP Calibration How Can I bypass the ISP (calibration files datas) while capturing images? Re: IMX8MP - image capturing format for ISP Calibration I'm not sure if I understand your question, the detailed steps were mentioned in the chapter 6.1.1 Setup for raw image capture already Re: IMX8MP - image capturing format for ISP Calibration @joanxie  kindly consider this in prior. thanks in advance. How to capture RAW images (bypassing ISP) for ISP tuning.
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LPC824 - SWM PINABLE0 assigns port pin to ADC at POR Hi.I've have an issue that a port pin 0.19 on the LPC824 is set to output, it will not respond to instruction to set HIGH or LOW. It seems that on POR, that the PINABLE0  register is clearing (which ENABLES) ADC_0, ADC_6, ADC_7 and ADC_9.  Other ADC bits are set to 1, which DISABLES the ADC link to the port pin. Data sheet states that the reset state should be 1 for all ADC port pins. I have tried this on an LPCXpresso824-MAX eval board. I'm using IAR EWARM, which if you start from the debug enviroment it works OK, but if you start the debug code without IAR, it goes wrong. I've started the the expresso board without IAR, it goes wrong, used the IAR connect to running target, inspected the PINENABLE0 register, which show the above register bits cleared. I've tried a simple code example which does the same. A fix is to put a few lines of code to set those bits to 1, but they shouldn't be 0 in the first place? So that extra code shouldn't be required. Is there something obvious I'm not doing as this would be seen by other folk, but not seen this mentioned on the forum. Thanks My test code u8 test_byte; void main(void) { SystemCoreClockUpdate(); //GPIO_INIT(); Chip_GPIO_Init(LPC_GPIO_PORT); Chip_GPIO_SetPinDIR(LPC_GPIO_PORT, PORT0, 20, GPIO_OUTPUT); Chip_GPIO_SetPinState(LPC_GPIO_PORT, PORT0, 20, HIGH); Chip_GPIO_SetPinDIR(LPC_GPIO_PORT, PORT0, 18, GPIO_OUTPUT); Chip_GPIO_SetPinState(LPC_GPIO_PORT, PORT0, 18, HIGH); Chip_GPIO_SetPinDIR(LPC_GPIO_PORT, PORT0, 19, GPIO_OUTPUT); Chip_GPIO_SetPinState(LPC_GPIO_PORT, PORT0, 19, HIGH); // This fixes the issue ! /* Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM); // Enable the clock to the Switch Matrix Chip_SWM_DisableFixedPin(SWM_FIXED_ADC0); //turn off ADC is on port Chip_SWM_DisableFixedPin(SWM_FIXED_ADC6); //turn off ADC Chip_SWM_DisableFixedPin(SWM_FIXED_ADC7); //turn off ADC Chip_SWM_DisableFixedPin(SWM_FIXED_ADC9); //turn off ADC Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM); // Disable the clock to the Switch Matrix to save power */ while (1) { if (test_byte == 0) { test_byte = 1; Chip_GPIO_SetPinState(LPC_GPIO_PORT, PORT0, 19, HIGH); // debug pulse Chip_GPIO_SetPinState(LPC_GPIO_PORT, PORT0, 18 , HIGH); Chip_GPIO_SetPinState(LPC_GPIO_PORT, PORT0, 20 , HIGH); } else { test_byte = 0; Chip_GPIO_SetPinState(LPC_GPIO_PORT, PORT0, 19, LOW); // debug pulse Chip_GPIO_SetPinState(LPC_GPIO_PORT, PORT0, 18 , LOW); Chip_GPIO_SetPinState(LPC_GPIO_PORT, PORT0, 20 , LOW); } } } // Set up and initialize hardware prior to call to main ------------------------ void SystemInit(void) { SCB->VTOR = VECTORS; } Re: LPC824 - SWM PINABLE0 assigns port pin to ADC at POR Hi Problem solved! Turned out to be a silly. Had some "hidden" bootloader code that got pulled in that fiddled with PINEABLE0 register. Thanks for your time. Re: LPC824 - SWM PINABLE0 assigns port pin to ADC at POR Hi Pavel. In my actual application, I want to use Port P0.19 as a straight forward port output. When I was testing my code the port pin wouldn't respond. As I investigated, it seems that that pin was assigned to ADC_7. I have not purposely assigned it to ADC_7. I did a simple test program, as posted previously, which did the same on a LPCXpresso824-MAX board using IAR EWARM 8.11 It seems that the PINENABLE0 register is (falsely?) enabling that port pin to the ADC_7 on POR. PINENABLE register, for bit 20 that controls ADC_7 at RESET should be SET to One. If set to One, this will DISABLE the link to ADC_7. My test’s indicate that bit is CLEARED to ZERO, which ENABLES ADC_7.   Documentation for PINEABLE0 states that at reset , that bit is SET to One. But my quick test program, when inspecting that register that bit is cleared to zero, which the documentation states it shouldn’t be?  I have done this by starting the application, connecting to the running target with IAR EWARM (a great feature), halting the program and inspecting the PINENABLE0 register, as previously shown. I have managed a “quick” work around by writing to the ENABLE0 register and setting that bit to One, BUT this should not need to be done. Why is it cleared to zero? Is there something obvious I am missing. Problem also affects ADC_0 , 6 and 9. I have concern that if register is not properly setting/ clearing the bits at POR, will other registers be doing wrong POR bit setting / clearing? Grab of NXP data sheet for PINEABLE0  Screen grab of what IAR EWARM is telling me of the status of PINENABLE0   So, I have not solved my issue as I don’t understand why those bits are not correct on POR. Thanks Re: LPC824 - SWM PINABLE0 assigns port pin to ADC at POR Hello, my name is Pavel, and I will be supporting our case I have some questions what is the mode you need to use GPIO or ADC? Could you elaborate further? Did you solve your issue?  Best regards, Pavel
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Taplinx iOS 应用程序在标签响应时崩溃 您好,我按照UG10045.pdf 的说明创建了 iOS 应用程序。我创建了 ApduExchangeWithByteArray 方法并实现了其内容。但是,当将标签的响应发送回 Taplinx 库时,应用程序崩溃了,设备日志中显示以下内容: Time Device Name Type PID Tag Message Nov 6 20:44:31 iPhone Notice 5223 MobileFacilityApp Command Set - 1 Nov 6 20:44:31 iPhone Notice 5223 MobileFacilityApp Command Set - Native Nov 6 20:44:31 iPhone Error 0 kernel(Sandbox) Sandbox: MobileFacilityApp(5223) deny(1) sysctl-read kern.bootargs Nov 6 20:44:38 iPhone Notice 5223 MobileFacilityApp(UIKitCore) Received memory warning. Nov 6 20:44:38 iPhone Notice 5223 MobileFacilityApp(UIKitCore) Received memory warning. Nov 6 20:44:40 iPhone Notice 0 kernel EXC_RESOURCE -> MobileFacilityApp[5223] exceeded mem limit: InactiveHard 3072 MB (fatal) Nov 6 20:44:40 iPhone Notice 0 kernel memorystatus: killing process 5223 [MobileFacilityApp] in high band FOREGROUND (100) - memorystatus_available_pages: 44859 当我将空响应发回 taplinx 库(仅 TL_TagAPDUResponse 而未设置 ResponseData)时 - 应用程序不会崩溃,并且我收到有关响应不完整的错误(这是预期的)。我做错了什么? 回复:Taplinx iOS 应用程序因标签响应而崩溃 后续 - 当我将我的实现更改为使用提供的 TapLinxApduHandler 而不是提供我自己的时 - 那么 apduExchangeWithByteArray 确实符合合同 - (nullable TL_TagAPDUResponse *)apduExchangeWithByteArray:(NSData *_Nonnull)apduData; 回复:Taplinx iOS 应用程序因标签响应而崩溃 @ukcas - taplinx ios 库的哪个版本是“当前”版本?因为我使用的是 2.0.0 版本,当我从 apduExchange 方法返回 TL_TagAPDUResponse 时,它肯定会崩溃,所以它必须是 j2objc 库中的原始 IOSByteArray。我正在使用 taplinx 库的 c# 绑定,但这在这个问题上无关紧要。 回复:Taplinx iOS 应用程序因标签响应而崩溃 你好 崩溃肯定来自 taplinx 库,因为当我更改 - (可空 TL_TagAPDUResponse *)apduExchangeWithByteArray:(NSData *_Nonnull)apduData; 实际上: - (可空的IOSByteArray *)apduExchangeWithByteArray:(IOSByteArray * _Nonnull)apduData; 它开始发挥作用 回复:Taplinx iOS 应用程序因标签响应而崩溃 你好,达米安, 也许错误的原因是由于超出了内存限制而不是 TapLinx 库? MobileFacilityApp[5223] exceeded mem limit: InactiveHard 3072 MB (fatal) 集成TapLinx库的应用程序可以按如下方式使用(无需在顶层实现ApduExchange) 将委托设置为 APDUHandler let reader = TL_IOSNFCReader(uid: tag.identifier, historicalBytes: tag.historicalBytes ?? Data()) handler = TapLinxApduHandler(reader: reader) handler.delegate = self libraryManager?.setApduHandlerWithApduHandler(handler) 下一步是在应用程序内部实现协议方法 func apduExchange(withByteArray apduData: Data) -> TL_TagAPDUResponse? { var tagAPDUResponse: TL_TagAPDUResponse? if connectedTag != nil { // Send Tag Type Native of ISO and the apdu as NFCISO7816APDU executeAPDUCommandOn7816Tag(tagType: tagtype, apdu: apdu) { data in let appendedData = data tagAPDUResponse = TL_TagAPDUResponse(responseData: appendedData, tag: self.currentTag) semaphore.signal() } let _ = semaphore.wait(timeout: .now() + 3.0) } else if connectedMifareTag != nil { let semaphore = DispatchSemaphore(value: 0) print("MIFARE CAPDU 📱->💳 \(apduData.hex)") executeAPDUCommandOnMIFARETag(apdu: apduData) { data in print("RAPDU 📱<-💳 Data: \(data.hex)") tagAPDUResponse = TL_TagAPDUResponse(responseData: data, tag: self.currentTag) semaphore.signal() } let _ = semaphore.wait(timeout: .now() + 3.0) } print("Tag Response \(String(describing: tagAPDUResponse))") return tagAPDUResponse } 希望这种简化能对您有所帮助。 顺祝商祺! TapLinx团队 回复:Taplinx iOS 应用程序因标签响应而崩溃 还有一件事 - apduData 实际上也是 IOSByteArray,而不是 NSData 回复:Taplinx iOS 应用程序因标签响应而崩溃 显然 TapLinx-v2.0.0 中包含的标题都是错误的。在TapLinxApduHandler.h中我们看到声明: - (nullable TL_TagAPDUResponse *)apduExchangeWithByteArray:(NSData *_Nonnull)apduData; 但实际上我们应该返回 IOSByteArray*,否则应用程序将崩溃并出现上述症状
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MPC5744P互換HSM みなさん。 MPC5744Pを使用しています。また、MCUにHSMがないことを確認します。 MPC5744P対応HSMを教えてください。 RSAやECCなどのデジタル署名を適用しようとしています。 Re:MPC5744P互換HSM 迅速な対応をありがとう。 また、NXPにアドオンHSMがあることも知りたいです。 アドオンとは、MCUに継承されず、MCUの外部に継承されることを意味します。 MCUを変更するのが難しいため、変更されている場合はHSMチップを追加したいと思います。 感謝 Re:MPC5744P互換HSM こんにちは @LCGSEMS  MPC57xxファミリの唯一のオプションは、HSMモジュールを含むMPC5748Gです。他の一部のMPC57xxデバイスには、SHE要件を満たすCSEモジュールのみがあります。そのため、RSA や ECC はサポートされていません。 ただし、HSM ファームウェアを搭載したMPC5748Gは、サポートが限られているため、承認されたお客様 (大量の注文を想定) にのみ提供されます。標準の MPC5748G デバイスには HSM ファームウェアがインストールされていないことに注意してください。HSEファームウェアを搭載したデバイスには、特別な部品番号があります。ご興味のある方は、お近くのNXP営業所までお問い合わせください。 いずれにせよ、HSEモジュールを搭載したS32K3デバイスに移行するのが、はるかに良い選択肢です。HSEファームウェアは、すべてのお客様が使用できます。RSA と ECC はサポートしています。 https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32k-auto-general-purpose-mcus/s32k3-microcontrollers-for-automotive-general-purpose:S32K3 また、新しいデバイスであるため、保証される可用性はより長くなります。 https://www.nxp.com/products/nxp-product-information/nxp-product-programs/product-longevity:PRDCT_LONGEVITY_HM よろしく ルーカス
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freeRTOS stack size configuration I am currently learning FreeRTOS on the LPC51U68 development board (OM40005). I have created 7 tasks for testing and am using the RTOS task list monitor provided by MCUXpresso IDE. I noticed that the stack sizes displayed in the task list don't match the configurations I set. Could this be related to memory alignment? Where can I check the rules for configuration differences? Below is the code I modified from the freertos_hello example. /* * Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright 2016-2017 NXP * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ /* FreeRTOS kernel includes. */ #include "FreeRTOS.h" #include "task.h" #include "queue.h" #include "timers.h" /* Freescale includes. */ #include "fsl_device_registers.h" #include "fsl_debug_console.h" #include "pin_mux.h" #include "board.h" #include /******************************************************************************* * Definitions ******************************************************************************/ /* Task priorities. */ #define hello_task_PRIORITY (configMAX_PRIORITIES - 1) /******************************************************************************* * Prototypes ******************************************************************************/ static void task1(void *pvParameters); static void task2(void *pvParameters); static void task3(void *pvParameters); static void task4(void *pvParameters); static void task5(void *pvParameters); static void task6(void *pvParameters); static void task7(void *pvParameters); /******************************************************************************* * Code ******************************************************************************/ /*! * @brief Application entry point. */ int main(void) { /* Init board hardware. */ /* attach 12 MHz clock to FLEXCOMM0 (debug console) */ CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH); BOARD_InitBootPins(); BOARD_InitBootClocks(); BOARD_InitDebugConsole(); if (xTaskCreate(task1, "task1", configMINIMAL_STACK_SIZE + 50, NULL, hello_task_PRIORITY, NULL) != pdPASS) { PRINTF("Task creation failed!.\r\n"); while (1) ; } if (xTaskCreate(task2, "task2", configMINIMAL_STACK_SIZE + 100, NULL, hello_task_PRIORITY, NULL) != pdPASS) { PRINTF("Task creation failed!.\r\n"); while (1) ; } if (xTaskCreate(task3, "task3", configMINIMAL_STACK_SIZE + 160, NULL, hello_task_PRIORITY, NULL) != pdPASS) { PRINTF("Task creation failed!.\r\n"); while (1) ; } if (xTaskCreate(task4, "task4", configMINIMAL_STACK_SIZE + 161, NULL, hello_task_PRIORITY, NULL) != pdPASS) { PRINTF("Task creation failed!.\r\n"); while (1) ; } if (xTaskCreate(task5, "task5", configMINIMAL_STACK_SIZE + 170, NULL, hello_task_PRIORITY, NULL) != pdPASS) { PRINTF("Task creation failed!.\r\n"); while (1) ; } if (xTaskCreate(task6, "task6", configMINIMAL_STACK_SIZE + 200, NULL, hello_task_PRIORITY, NULL) != pdPASS) { PRINTF("Task creation failed!.\r\n"); while (1) ; } if (xTaskCreate(task7, "task7", configMINIMAL_STACK_SIZE + 300, NULL, hello_task_PRIORITY, NULL) != pdPASS) { PRINTF("Task creation failed!.\r\n"); while (1) ; } vTaskStartScheduler(); for (;;) ; } /*! * @brief Task responsible for printing of "Hello world." message. */ static void task1(void *pvParameters) { for (;;) { PRINTF("Hello world.\r\n"); vTaskSuspend(NULL); } } static void task2(void *pvParameters) { for (;;) { PRINTF("H\r\n"); vTaskSuspend(NULL); } } static void task3(void *pvParameters) { for (;;) { PRINTF("H\r\n"); vTaskSuspend(NULL); } } static void task4(void *pvParameters) { for (;;) { PRINTF("H\r\n"); vTaskSuspend(NULL); } } static void task5(void *pvParameters) { for (;;) { PRINTF("H\r\n"); vTaskSuspend(NULL); } } static void task6(void *pvParameters) { for (;;) { PRINTF("H\r\n"); vTaskSuspend(NULL); } } static void task7(void *pvParameters) { for (;;) { PRINTF("H\r\n"); vTaskSuspend(NULL); } } Re: freeRTOS stack size configuration Hi @Relas  In FreeRTOS, the stack size specified in xTaskCreate() is measured in words (not bytes). For the LPC51U68, which uses a 32-bit word size, each word is 4 bytes. For instance, if you specify configMINIMAL_STACK_SIZE + 50, this translates to (configMINIMAL_STACK_SIZE + 50) * 4 bytes of stack space. The alignment adjustments by FreeRTOS or the compiler can cause discrepancies between the requested stack size and the actual allocated size. BR Hang
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MPC5744P compatible HSM Hello everyone. We are using MPC5744P. And we check the MCU does not have HSM. Please let me know what is the MPC5744P compatible HSM. We are trying to apply digital signature such as RSA or ECC. Re: MPC5744P compatible HSM I can't see suitable device for this. Have you considered SW emulation? There are libraries like Mbed TLS or wolfSSL which could help to implement it. That's the most cost-effective solution. Otherwise I think that S32K3 would be the best option. Regards, Lukas Re: MPC5744P compatible HSM Thanks for quick response. I also want to know NXP has add-on HSM. Add-on means that it is not inherited in MCU, but external to MCU. Because it is hard to change the MCU, we want to add the HSM chip if it is. Thanks Re: MPC5744P compatible HSM Hi @LCGSEMS  The only option in MPC57xx family is MPC5748G which contains HSM module. Some other MPC57xx devices has CSE module only which meets SHE requirements. So, there's no support for RSA or ECC. However, MPC5748G with HSM firmware is provided only to approved customers (expecting large ordering quantity) due to limited support. Notice that standard MPC5748G devices does NOT have HSM firmware installed. Devices with HSE firmware has special part numbers. If you are interested, please contact local NXP sales office. Anyway, much better option is to migrate to S32K3 devices which has HSE module. HSE firmware can be used by all customers. It does support RSA and ECC. https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32k-auto-general-purpose-mcus/s32k3-microcontrollers-for-automotive-general-purpose:S32K3 It's also newer device, so guaranteed availability is longer: https://www.nxp.com/products/nxp-product-information/nxp-product-programs/product-longevity:PRDCT_LONGEVITY_HM Regards, Lukas
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MPC5744P兼容HSM 大家好。 我们正在使用MPC5744P。我们检查 MCU 没有 HSM。 请告诉我什么是与 MPC5744P 兼容的 HSM。 我们正在尝试应用 RSA 或 ECC 等数字签名。 回复:MPC5744P兼容HSM 感谢您的快速回复。 我还想知道 NXP 是否有附加 HSM。 Add-on 指的是它不是继承于 MCU 内部,而是位于 MCU 外部。 因为 MCU 很难更换,所以如果可以的话我们想添加 HSM 芯片。 谢谢 回复:MPC5744P兼容HSM 你好@LCGSEMS MPC57xx 系列中唯一的选择是包含 HSM 模块的 MPC5748G。一些其他 MPC57xx 设备仅具有满足 SHE 要求的 CSE 模块。因此,不支持 RSA 或 ECC。 然而,由于支持有限,带有 HSM 固件的 MPC5748G 仅提供给获得批准的客户(预计订购数量较大)。请注意,标准 MPC5748G 设备没有安装 HSM 固件。带有 HSE 固件的设备有特殊的零件编号。如果您有兴趣,请联系当地的恩智浦销售办事处。 无论如何,更好的选择是迁移到具有 HSE 模块的 S32K3 设备。所有客户都可以使用 HSE 固件。它确实支持 RSA 和 ECC。 https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32k-auto-general-purpose-mcus/s32k3-microcontrollers-for-automotive-general-purpose:S32K3 这也是一种较新的设备,因此保证的可用性更长: https://www.nxp.com/products/nxp-product-information/nxp-product-programs/product-longevity:PRDCT_LONGEVITY_HM 问候, 卢卡斯
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i.MX8MのROMイベント i.MX8MN上で動作するRTOSアプリケーションでROMイベントを取得したいです。 i.MX8MシリーズのROMイベントはどのように入手できますか? AN12853を読んだのですが、i.MX8Mに当てはまるものがどれなのかわからなかった。 i.MX8MのROMイベントについて 返信ありがとうございます。 ログを確認することができました。 パラメータの詳細が記載されたドキュメントはありますか? HAB を試行しているところ、ROM イベント ID 定義バージョン 2 に 0xA0:Image 認証結果のログが見つかりましたが、その Parameter0 値が何を意味するのか知りたいです。 現在私が知っているのは、それが0xF0ではなく、通過しないことだけです。
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ROM Event on i.MX8M I want to get ROM Event on an RTOS application running on i.MX8MN. How can I get ROM Event of i.MX8M series? I read AN12853, but I couldn't figure out which one applies to i.MX8M. Re: ROM Event on i.MX8M Thanks for clarifying! Could successfully read from 0x0090E558 and the value there seem to make sense. Kind regards, Markus Re: ROM Event on i.MX8M Hi, Check the OCRAM starting from address 0x90E558. You should find the ROM event buffer there. The OCRAM address pointed to by 0x9E0 should correspond to the ROM event buffer. Regards, Re: ROM Event on i.MX8M Hi, I'm currently trying to get mainline u-boot v2025.01 running on an i.MX8MM on a custom board. However, we're stuck in the boot loader and don't get output via serial interface. So, I connected a J-Link base and read out the registers. Found out that SPL obviously returns to Boot ROM (as the PC is in the Boot ROM range when halting the Cortex-A53), so I wanted to read out the ROM event log buffer to get more info. Having found this post, I tried also with 0x9E0 as address, but the output doesn't seem to make sense: --- Cortex-A53 identified. J-Link>halt PC = 00000000000160C4 CPSR = 600003CD (AArch64, EL3h (SP_EL3) mode, IRQ masked, FIQ masked) SP = 0000000000901F40 ELR_EL1 = 2280006102140688 ELR_EL2 = A700010002088A08 ELR_EL3 = 0000000000016390 SP_EL0 = 01C0000202200002 SP_EL1 = 030C001080440040 SP_EL2 = 000000002002F0F3 SP_EL3 = 0000000000901F40 R0 = 000000000090CC90, R1 = 0000000000000006 R2 = 0000000000901DFB, R3 = 0000000000000000 R4 = 000000000000C1DC, R5 = 0000000000901DFC R6 = 0000000000000000, R7 = 0000000000000000 R8 = 0000000000000000, R9 = 0000000000000180 R10 = 0000000000000047, R11 = 0000000000000000 R12 = 000000000090B5E0, R13 = 000000000090B528 R14 = 0000000000004000, R15 = 000000000090B5E0 R16 = 0000000000000000, R17 = 0000000000000000 R18 = 0000000000000000, R19 = 0000000030350480 R20 = 000000000000000F, R21 = 000000000090E6D8 R22 = 000000000090C000, R23 = 0000000030350480 R24 = 0000000000000002, R25 = 0000000000910000 R26 = 0000000030390070, R27 = 0000000072000000 R28 = 0000000000000000, R29 = 0000000000901F40 R30 = 00000000000160C4, R31 = 0000000000000000 JMISC = 0000000000000008 J-Link>mem32 0x9E0 4 000009E0 = 0090E558 00000000 0090E6D8 00000000 J-Link> --- Is 0x9E0 the correct buffer address also for ixm8m Mini (not only for Nano)? AN12853 is not very clear in this regard... If this is correct, the read data doesn't make sense to me since the first 8 bits should be the ROM event ID (starting with 0x01), but were read as 0x00? Or did I make some mistake in interpreting here? Kind regards, Markus Re: ROM Event on i.MX8M Thanks for the reply. I was able to check the logs. Is there any documentation with details of the parameters? I am trying HAB and I found a log of 0xA0:Image authentication result in the ROM Event ID definition version 2, but I would like to know what that Parameter0 value means. Currently I only know that it is not 0xF0 and that it does not pass. Re: ROM Event on i.MX8M Hello @spthx  I hope you are doing very well. As you can see on the AN12853, the ROM event log buffer is located at a fixed address in the on-chip RAM: Please refer to the Mscale Series. Best regards, Salas.
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i.MX8M 上的 ROM 事件 我想在 i.MX8MN 上运行的 RTOS 应用程序上获取 ROM 事件。 如何获取i.MX8M系列的ROM事件? 我读过 AN12853,但我不知道哪一个适用于 i.MX8M。 回复:i.MX8M 上的 ROM 事件 谢谢您的回复。 我能够检查日志。 是否有包含参数详细信息的文档? 我正在尝试 HAB,并且在 ROM 事件 ID 定义版本 2 中发现了 0xA0:图像认证结果的日志,但我想知道 Parameter0 值的含义。 目前只知道不是0xF0,不通过。
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LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Dear NXP community, I'm currently encountering an issue when I try to send a CAN frame via the BCAN0 of the S32G2 LLCE module. I'm using the demoboard S32G-VNP-RDB2 Rev.E. I've seen via the emulator that everything performs well when I pop the BLROUT FIFO to get the index of the Tx Transmit table, after that I fill the message in the shared memory and then I send back the index via the BLRIN FIFO. The issue is that nothing happens on the CAN bus. So after popping the index 15, the BLROUT returns 0xFFFFFFFF. Is there any configuration that we should set in order to enable the BCANs ? FYI, the firmware responds well to the commands I send and I've correctly configured the SIUL2 to configure the Tx and Rx pins of the LLCE_CAN_0. We have also observed that transceiver of the BCAN0 (U17) did not change the logic level of LLCECAN0H and LLCECAN0L when we drive the LLCE_CAN0_TXD signal. We have also checked that the signal LLCE_CAN01_EN is in the high logic level. Thank you for your support. Best regards, Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi @Daniel-Aguirre , As discussed in the support ticket, the problem is solved. It was due to the fact that the SIUL2 was not correctly configured for LLCE_CAN0_RX. Thanks for your support. Best regards, Re: @Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi @Daniel-Aguirre , Yes, I can confirm you that after building the example project (can_loopback.elf) with "Make" and program it to the board, I've been able to see Tx transfers. So It seems that the issue of the STARTED state is really software on my side and not hardware. Yes the CAN log tool that I use contains a PHY. BR, Re: @Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi, Thanks for your feedback. On regards of the CAN log tool, does it contain a CAN PHY? Or is it only a logic analyzer? Also, can you help us confirm that using NXP packages you are able to see the correct outcome? Since it is the intended implementation to install LLCE on top of RTD. You should be able to use the available LLCE examples which do not make usage of external tools and use the same S32G to create the CANbus. Please, let us know. Re: @Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Yes, I was mistaken, I have actually 2 nodes, the second one is the CAN log tool. Best regards, Re: @Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi, Thanks for your feedback. Given the previous comment: "Regarding the number of nodes on the CAN bus, we have only one which is the BCAN0." CANBus standard specifies that the minimum CAN nodes that need to be available under the bus should be 2. We understand that you only have 1, which is not correct. If there is still only 1 node available under your CANbus, then the minimum conditions are not met, hence it is not starting. Please, let us know. @Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi @Daniel-Aguirre , Thanks for your reply. I've found out that the issue of not being able to transmit was due to the fact that the controller stays in the START_PENDING state instead of being in the STARTED state. The conditions "Bus sync" and "BCAN exit freeze" seem not to be satisfied to pass to the STARTED state. Can this be related to the baudrate configuration that can be wrong ? Best regards, Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi, All examples available for RTD+LLCE should be available under S32DS once the packages are installed. As for the Makefile, under the sample application of LLCE a makefile is provided for each of the examples (or a single one for all of them) in which the different steps in order to build an application are provided: Again, this is with the NXP RTD package being used as a base. Still, if you are looking for NXP to provide it directly, we can recommend either contacting your local NXP FAE/DFAE/representative or opening a ticket under the NXP online services, since it is not a common practice to share files through the public community, we do apologize. Please, let us know. Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi @Daniel-Aguirre , Is it possible to provide us a sample application executable (elf) that we can test on our side ? Otherwise what arguments should be specified in the command Make in order to build the application ? The Readme file does not specify it. Thank you. Best regards, Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi, Thanks for your feedback. We understand that the LLCE v1.0.7 was tested on top of RTD v4.0.2, as told under the Release Notes fro LLCE v1.0.7: "This package was tested on top of the S32G RTD (Real Time Drivers) SW32_RTD_4.4_4.0.2_D2306 product for the generic stubs and platform dependencies (Base, Platform, Resource, Det, Dem, Ecum, EcuC, RTE, MCU, Os, CanIf, LinIf, FrIf)." Can you help us confirm that using NXP packages you are able to see the correct outcome? As for the following comments, below will be some information from our side: "Regarding the number of nodes on the CAN bus, we have only one which is the BCAN0." CANBus standard specifies that the minimum CAN nodes that need to be available under the bus should be 2. We understand that you only have 1, which is not correct. I noticed that when I send the command LLCE_CAN_CMD_INIT_HSE the firmware returns "command not supported". Is this command mandatory for using the BCANs ? We understand that HSE+LLCE is only available under the LLCE FDK (premium software). If you are working with the LLCE FDK, help us contacting your local NXP FAE/DFAE/representative, given it is a premium software. Please, let us now. Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi @Daniel-Aguirre , I'm using the LLCE FW version 1.0.7 but I do not use the NXP's RTD. We are developing our own drivers. So for testing the BCAN I followed the examples given by NXP. Regarding the number of nodes on the CAN bus, we have only one which is the BCAN0. I noticed that when I send the command LLCE_CAN_CMD_INIT_HSE the firmware returns "command not supported". Is this command mandatory for using the BCANs ? Maybe it is due to the fact that we have not provisioned the HSE FW into the demoboard. We are not making use of the HSE, so I think we can get rid of this command. Thanks. Best regards, Re: LLCE CAN transmission issue on S32G VNP RDB2 Rev.E Hi, Can you let us know which RTD/LLCE version are you using? Below will be some comments on regards of your questions: Q > Is there any configuration that we should set in order to enable the BCANs ? [DA]: As for enabling the BCAN, you should have previously configured the respective pins to be able to use it. As for LLCE, all should be done within the NXP API if configured correctly under Config Tools. How many nodes do you have connected to your CAN Bus? Are you using any NXP examples? Please, let us know.
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S32G wdog and standby mode Hi NXP,       My device is S32G-VNP-RDB3. I have a question that I would like you to answer. If i do not disable the PMIC watchdog when my device in STANDBY mode, what will happen on my device, reset or nothing?.  Whether it is necessary to disable the watchdog before entering low power mode. Re: S32G wdog and standby mode Hi @LIU_HAO, It depends on the configuration of the PMIC (if applicable), in your case you can review the AN12952: S32Gx Power Saving Techniques Application Note there is mentioned at the chapter 4.3 Standby mode entry processes, that you need to configure the PMIC's Standby Window Counter prior to the Standby entry to make it start counting for this particular case of the S32G-VNP-RDB3 that use the VR5510. If this configuration is not done the device will reset. [page 25, AN12952: S32Gx Power Saving Techniques Application Note, Rev. 2, 07/2021] Also, you can review the demo: S32G: M kernel Standby demo and how to porting to Mcal  Let me know if you have any question. 
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After lpddr4 initialization in Imx8m mini global variable doesn't have zero Hi, I am initialized spl lpddr4 after that further global variable doesn't have zero at initial time. Where it is causing issue for global variable, global structure and static variable. Re: After lpddr4 initialization in Imx8m mini global variable doesn't have zero The issue was resolved. Thank you for your response Re: After lpddr4 initialization in Imx8m mini global variable doesn't have zero Hello @Hariharan1  Could you please share more details to try to replicate by my side? (BSP, steps, etc.) Best regards. Salas.
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S32G VNP RDB2 Rev.E 上的 LLCE CAN 传输问题 尊敬的恩智浦社区成员: 当我尝试通过 S32G2 LLCE 模块的 BCAN0 发送 CAN 帧时,我遇到了一个问题。我正在使用演示板 S32G-VNP-RDB2 Rev.E。 我已经通过模拟器看到,当我弹出 BLROUT FIFO 以获取 Tx 传输表的索引时,一切都运行良好,之后我将消息填充到共享内存中,然后通过 BLRIN FIFO 发回索引。 问题是 CAN 总线上没有任何反应。因此,弹出索引 15 后,BLROUT 返回 0xFFFFFFFF。 为了启用 BCAN,我们需要设置什么配置吗? 仅供参考,固件对我发送的命令响应良好,并且我已正确配置 SIUL2 来配置 LLCE_CAN_0 的 Tx 和 Rx 引脚。 我们还观察到,当我们驱动 LLCE_CAN0_TXD 信号时,BCAN0(U17)的收发器并没有改变 LLCECAN0H 和 LLCECAN0L 的逻辑电平。我们还检查了信号LLCE_CAN01_EN处于高逻辑电平。 感谢您的支持。 顺祝商祺! 回复:@Re: S32G VNP RDB2 Rev.E 上的 LLCE CAN 传输问题 是的,我错了,我实际上有2个节点,第二个是CAN日志工具。 此致,
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chromium could not play video on network on imx93evk Hi experts:   I found that the chromium could not play video on network on platfrom imx93evk, yocto: LF 6.1.55.  No log print out,  just show "network could not connect" on wed.  Does any knows why ?    Thanks  Best Regards Linux Multimedia Yocto Project Re: chromium could not play video on network on imx93evk HI Bio_TICFS: Thanks . I't's not the problem of ethernet, but the problem of no hardware decoder in imx93. I have fixed the problem,  it need to add config to chromium to build h264 software decoder. Best Regards Re: chromium could not play video on network on imx93evk Hello, Please send us the log file, is this your custom board or is EVK? I have the MX93EVK and everything works well on ethernet. Regards Re: chromium could not play video on network on imx93evk Hi Bio_TICFSL: I have upgraded  to LF.6.6.36, but the issue still remain.  Any suggestion ?  Re: chromium could not play video on network on imx93evk Hello, Try the latest BSP, chromium has some bugs in the version you are playing. Regards
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Debug problems with FlexSPI2 on i.MX RT1171 Hello, iMX RT1171 SDK v2.15.1 was used for the linker, startup, and driver files. External Flash is connected with FlexSPI2 - A pins. For this reason, the flash base address in the linker has been updated to 0x60000000. FLEXSPI_INSTANCE is set to 2 with the help of GPIO pins. FLEXSPI_PIN_GROUP_SEL = 1 and FLASH_CONNECTION_SEL = 0 efuses are set. At this stage, I have no problem writing to external flash. When I read it after writing, it was seen that there were spi configurations at 0x60000400. However, when I start debugging, it branches to different unknown points. What could be my problem here? Can you explain the steps I should check? Should I burn fuses like FLEXSPI_PIN_GROUP_SEL and FLASH_CONNECTION_SEL to help set up FlexSPI-2? Is there a place I need to update in the linker and startup in imx1171 SDK v2.15.1? Re: Debug problems with FlexSPI2 on i.MX RT1171 Hi @BrK_ , There are technical sharing on this topic, please kindly refer to the following links for details. https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/i-MX-RT-FLEXSPI-booting-guide/ta-p/1669262 https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/RT1170-flexSPI1-secondary-QSPI-flash-debug-flashdriver/ta-p/1761851  Hope that helps, Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: Debug problems with FlexSPI2 on i.MX RT1171 Hi @Kan_Li, The external flash I use is different from the eval-board external flash. For this reason, I need to change the settings in the flexspi_nor_config file. Can you give me flexspi_nor_config.c configurations or documentation that explains how to configure according to my external flash? Re: Debug problems with FlexSPI2 on i.MX RT1171 Hi @Kan_Li, If I were to give information about my latest situation: I can now work in debug mode. I made some edits to the Flexspi_nor_config.c file; I activated QEN and set serialclkfreq to 50mhz. I set the gpio to FLEXSPI INSTANCE 2. I set the FLEXSPI_PIN_GROUP_SEL bit of the 0x9a0 flexspi nor efuse and burnt it. I defined XIP_BOOT_HEADER_ENABLE=1. I updated the flash base addresses in the linker to start from 0x60000000. I am working in internal boot mode. In this case, I expect it to work in XIP mode and now I can debug it. But my current problem is that when I turn the power of my microcontroller off and on, my code does not run. I observed it with the debug LED I put in the code. I think the problem here may be that it goes into serial downloader mode due to an error during the rom bootloader. What should I check or is there a fuse I should use or a flexspi configuration I should change? Re: Debug problems with FlexSPI2 on i.MX RT1171 Hi @BrK_ , If I understand correctly , your application can run standalone without any issue but failed to debug with it, right? Was the application running in XIP mode or not? Was the boot mode configure by GPIO or eFuse? Please kindly clarify. Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
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