Are there any simple examples on how to use smw security middleware? I attempted to write a program to just do a hash-2 512.  This results in the smw_hash() function calling exit(1).  We also would like to do AES 256 with this library which will require key generation and storage. Are there any example programs I could look at?  I realize there is a test program, which does work, but it is much more complicated than what I would like to do. Here is a trace of what I see, just calling smw_hash: #0 __GI__exit (status=status@entry=1) at /usr/src/debug/glibc/2.39+git/sysdeps/unix/sysv/linux/_exit.c:27 #1 0x0000fffff7d8e0e0 in __run_exit_handlers (status=status@entry=1, listp=0xfffff7ef0660 <__exit_funcs>, run_list_atexit=run_list_atexit@entry=true, run_dtors=run_dtors@entry=true) at exit.c:131 #2 0x0000fffff7d8e1f0 in __GI_exit (status=status@entry=1) at exit.c:138 #3 0x0000fffff7f90e88 in config_db_mutex_lock () at /usr/src/debug/smw/git/core/config/database.c:66 #4 0x0000fffff7f916fc in smw_config_select_subsystem (operation_id=OPERATION_ID_HASH, args=0xfffffffff958, subsystem_id=subsystem_id@entry=0xfffffffff94c) at /usr/src/debug/smw/git/core/config/database.c:560 #5 0x0000fffff7f7beb8 in smw_utils_execute_common (operation_id=operation_id@entry=OPERATION_ID_HASH, args=args@entry=0xfffffffff958, subsystem_id= , op_step=op_step@entry=SMW_OP_STEP_ONESHOT, implicit=implicit@entry=false) at /usr/src/debug/smw/git/core/utils/exec.c:38 #6 0x0000fffff7f7bf04 in smw_utils_execute_operation (operation_id=operation_id@entry=OPERATION_ID_HASH, args=args@entry=0xfffffffff958, subsystem_id= ) at /usr/src/debug/smw/git/core/utils/exec.c:89 #7 0x0000fffff7f88728 in smw_hash (args=args@entry=0xfffffffff9b8) at /usr/src/debug/smw/git/core/crypto/hash.c:115 #8 0x0000aaaaaaaa0a84 in main () at simplehash.c:38 This appears to be the cause of the EXIT: SMW_DBG_ASSERT(ctx); In my code, I did this prior to calling smw_hash, and it is not getting an error: memset(&ctx_args, 0, sizeof(ctx_args)); ctx_args.subsystem_name = SMW_SUBSYSTEM_NAME_ELE; // Allocate context smw_result = smw_allocate_context(&ctx_args); if (smw_result != SMW_STATUS_OK) { printf("Failed to allocate context: %d\n", smw_result); return -1; }  I am using IMX91 with  FRDM board, and am building with imx-6.6.36-2.1.0.xml. FRDM-Training Re: Are there any simple examples on how to use smw security middleware? Hello, There is no library to play with this Middleware, and the current just support smw_hash at 64KB. Sorry in this case you can search some solution on the web or wait until next release to see if developers add more space to smw_hash. Regards Re: Are there any simple examples on how to use smw security middleware? I found out that if I called smw_osal_lib_init() first, I could get the smw_hash() to work. However smw_hash() would not work with files much over 64K Bytes. If I want to hash 100MB, how do I do this? I don't think any of the test examples hash large files?

有没有简单的例子介绍如何使用 smw 安全中间件？ 我尝试编写一个程序来执行 hash-2 512。这导致 smw_hash() 函数调用 exit(1)。我们还想用这个库来实现 AES 256，这将需要密钥生成和存储。 有没有我可以看看的示例程序？我知道有一个测试程序，它确实可以工作，但它比我想要做的要复杂得多。 这是我所看到的痕迹，只是调用 smw_hash： #0 __GI__exit (status=status@entry=1) at /usr/src/debug/glibc/2.39+git/sysdeps/unix/sysv/linux/_exit.c:27 #1 0x0000fffff7d8e0e0 in __run_exit_handlers (status=status@entry=1, listp=0xfffff7ef0660 <__exit_funcs>, run_list_atexit=run_list_atexit@entry=true, run_dtors=run_dtors@entry=true) at exit.c:131 #2 0x0000fffff7d8e1f0 in __GI_exit (status=status@entry=1) at exit.c:138 #3 0x0000fffff7f90e88 in config_db_mutex_lock () at /usr/src/debug/smw/git/core/config/database.c:66 #4 0x0000fffff7f916fc in smw_config_select_subsystem (operation_id=OPERATION_ID_HASH, args=0xfffffffff958, subsystem_id=subsystem_id@entry=0xfffffffff94c) at /usr/src/debug/smw/git/core/config/database.c:560 #5 0x0000fffff7f7beb8 in smw_utils_execute_common (operation_id=operation_id@entry=OPERATION_ID_HASH, args=args@entry=0xfffffffff958, subsystem_id= , op_step=op_step@entry=SMW_OP_STEP_ONESHOT, implicit=implicit@entry=false) at /usr/src/debug/smw/git/core/utils/exec.c:38 #6 0x0000fffff7f7bf04 in smw_utils_execute_operation (operation_id=operation_id@entry=OPERATION_ID_HASH, args=args@entry=0xfffffffff958, subsystem_id= ) at /usr/src/debug/smw/git/core/utils/exec.c:89 #7 0x0000fffff7f88728 in smw_hash (args=args@entry=0xfffffffff9b8) at /usr/src/debug/smw/git/core/crypto/hash.c:115 #8 0x0000aaaaaaaa0a84 in main () at simplehash.c:38 这似乎是 EXIT 的原因： SMW_DBG_ASSERT(ctx); 在我的代码中，我在调用 smw_hash 之前执行了此操作，并且没有出现错误： memset(&ctx_args, 0, sizeof(ctx_args)); ctx_args.subsystem_name = SMW_SUBSYSTEM_NAME_ELE; // Allocate context smw_result = smw_allocate_context(&ctx_args); if (smw_result != SMW_STATUS_OK) { printf("Failed to allocate context: %d\n", smw_result); return -1; } 我正在使用带有 FRDM 板的 IMX91，并使用 imx-6.6.36-2.1.0.xml 进行构建。 FRDM 培训 回复：有没有关于如何使用 smw 安全中间件的简单示例？ 我发现如果我先调用 smw_osal_lib_init()，我就可以让 smw_hash() 工作。但是 smw_hash() 不适用于超过 64K 字节的文件。如果我想对 100MB 进行哈希处理，我该怎么做？我认为没有任何测试示例可以对大文件进行哈希处理？

Migrating console from LPUART1 to LPUART8 in imx93 Hi team,                 I need to migrate console from lpuart1(default) to lpuart8 in iMX93-11x11EVK  board and test from pins 32&33 in J1001. The change done in below files: Enabled LPUART8 node in u-boot & linux-imx(kernel). Added node in imx93-11x11-evk-uboot.dtsi file. Added lines related to uart8 in imx93_evk.c(const uart_pads) changed default base address in platform_def.h file. Please guide me any more changes need be done apart from above. Thanks  Robbi. Re: Migrating console from LPUART1 to LPUART8 in imx93 Is this correct approach for SD changes making DAT3 as cd. Re: Migrating console from LPUART1 to LPUART8 in imx93 Thanks @Manuel_Salas ,                                It is working now. And I need solution for the issue as our custom-board is having SD-CARD with slight difference from EVK. we removed GPIO for card detection. So by default DATA3 is used a card detection?. The modifications done only in u-boot-imx: &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; //cd-gpios = <&gpio3 06 GPIO_ACTIVE_LOW>; vmmc-supply = <&reg_usdhc2_vmmc>; bus-width = <4>; broken-cd; status = "okay"; no-sdio; no-mmc; }; Removed cd-gpios by comment & added broken-cd. But after boot SPL was unable to boot from SD. Please go through the log.txt file.     Thanks  Robbi Re: Migrating console from LPUART1 to LPUART8 in imx93 Hello @Robbi  I hope you are doing very well. Please try the attached patches. Then, you should be able to run ATF and U-boot on the LPUART8. Best regards, Salas.

P2020: PCIe PME Link Down Detection (LDD) Interrupt Hello, I'm using the P2020 PCIe controller as a host. I try to get an interrupt if a connected device resets itself so that I can re-initialize it. As far as I understand theLDD flag in the PEX_PME_MES_DR, that should be more or less exactly what I search: It detects if the link goes down. In my test case, I can also see that the LDD flag is set in that register. But I don't seem to get an interrupt. The PEX_PME_MES_DISR[LDDD] is set to 0. I don't really need a message but I don't really care if one is sent either. The PEX_PME_MES_IER[LDDIE] is set to 1. I would have expected that with this some interrupt is generated. I would have expected that the PCI Express interrupt is triggered (PIC Internal Interrupt number 8 to 10 for PEX3 to 1). But I don't receive that. So I checked all of the other interrupt configuration registers and there doesn't seem to be any active flag set (A bit in the *IVPR*). What is necessary that the interrupt is generated? Is this kind of interrupt signaled as a MSI so that I need MSI support for it? Is there some other mask or gate for that interrupt that I might have missed? With kind regards Christian Mauderer QorIQ P2 Devices Re: P2020: PCIe PME Link Down Detection (LDD) Interrupt I found a problem with the interrupt configuration. So the problem is solved now.

IMX93 - Poky - Error on U-Boot configuration fspi Hello NXP experts, I am following "UG10164, i.MX Yocto Project User's Guide,  Rev. LF6.12.3_1.0.0 — 31 March 2025". I have to configure u-boot with uboot_config_imx93evk="sd fspi" as showed in chapter "5.5 U-Boot configuration". As suggested i runned the command: echo "UBOOT_CONFIG = \"sd fspi\"" >> conf/local.conf and after i runned bitbake core-image-minimal. An error is raised during the bitbake: ERROR: Nothing PROVIDES 'virtual/bootloader' (but /home/imx-yocto-bsp/sources/poky/meta/recipes-core/images/core-image-minimal.bb DEPENDS on or otherwise requires it) u-boot-qoriq PROVIDES virtual/bootloader but was skipped: incompatible with machine imx93-11x11-lpddr4x-evk (not in COMPATIBLE_MACHINE) u-boot PROVIDES virtual/bootloader but was skipped: The selected UBOOT_CONFIG key ['sd', 'fspi'] has no match in dict_keys(['sd', 'ecc', 'ld']). u-boot-fslc PROVIDES virtual/bootloader but was skipped: The selected UBOOT_CONFIG key ['sd', 'fspi'] has no match in dict_keys(['sd', 'ecc', 'ld']). u-boot-imx PROVIDES virtual/bootloader but was skipped: The selected UBOOT_CONFIG key ['sd', 'fspi'] has no match in dict_keys(['sd', 'ecc', 'ld']). edk2-firmware PROVIDES virtual/bootloader but was skipped: incompatible with machine imx93-11x11-lpddr4x-evk (not in COMPATIBLE_MACHINE) u-boot-variscite PROVIDES virtual/bootloader but was skipped: incompatible with machine imx93-11x11-lpddr4x-evk (not in COMPATIBLE_MACHINE) u-boot-toradex PROVIDES virtual/bootloader but was skipped: incompatible with machine imx93-11x11-lpddr4x-evk (not in COMPATIBLE_MACHINE) u-boot-imx PROVIDES virtual/bootloader but was skipped: The selected UBOOT_CONFIG key ['sd', 'fspi'] has no match in dict_keys(['sd', 'ecc', 'ld']). u-boot-kontron PROVIDES virtual/bootloader but was skipped: incompatible with machine imx93-11x11-lpddr4x-evk (not in COMPATIBLE_MACHINE) u-boot-qoriq PROVIDES virtual/bootloader but was skipped: incompatible with machine imx93-11x11-lpddr4x-evk (not in COMPATIBLE_MACHINE) u-boot-boundary PROVIDES virtual/bootloader but was skipped: incompatible with machine imx93-11x11-lpddr4x-evk (not in COMPATIBLE_MACHINE) edk2-firmware PROVIDES virtual/bootloader but was skipped: incompatible with machine imx93-11x11-lpddr4x-evk (not in COMPATIBLE_MACHINE) ERROR: Required build target 'core-image-minimal' has no buildable providers. Missing or unbuildable dependency chain was: ['core-image-minimal', 'virtual/bootloader']. This is my local.conf file: MACHINE ??= 'imx93-11x11-lpddr4x-evk' DISTRO ?= 'fsl-imx-wayland' EXTRA_IMAGE_FEATURES ?= "debug-tweaks" USER_CLASSES ?= "buildstats" PATCHRESOLVE = "noop" BB_DISKMON_DIRS ??= "\ STOPTASKS,${TMPDIR},1G,100K \ STOPTASKS,${DL_DIR},1G,100K \ STOPTASKS,${SSTATE_DIR},1G,100K \ STOPTASKS,/tmp,100M,100K \ HALT,${TMPDIR},100M,1K \ HALT,${DL_DIR},100M,1K \ HALT,${SSTATE_DIR},100M,1K \ HALT,/tmp,10M,1K" PACKAGECONFIG:append:pn-qemu-system-native = " sdl" CONF_VERSION = "2" DL_DIR ?= "${BSPDIR}/downloads/" ACCEPT_FSL_EULA = "1" # Switch to Debian packaging and include package-management in the image PACKAGE_CLASSES = "package_deb" EXTRA_IMAGE_FEATURES += "package-management" UBOOT_CONFIG = "sd fspi" What am I missing? Regards, Alessandro Yocto Project Re: IMX93 - Poky - Error on U-Boot configuration fspi thanks for the support! Re: IMX93 - Poky - Error on U-Boot configuration fspi HI @il_ciancio! By default is not possible you should do some modifications and we can't validate the image due to the evk board doesn't have fspi installed. Best Regards! Chavira Re: IMX93 - Poky - Error on U-Boot configuration fspi Ciao @Chavira. I have a question, maybe I am misunderstanding something. I am working with a custom board without eMMC or SD card and It has only a SPI NOR FLASH, the goal is to boot starting from data inside the SPI memory on target IMX93. There is also this ticket:  all(bootloader, device tree, Linux kernel, rootfs) all(bootloader, device tree, Linux kernel, rootfs) in spi nor demo imx8qxpc0 mek - NXP Community It is made a custom UUU script in order to flash data in SPI memory: uboot; dtb; kernel; rootfs; the flash goes well because it is checked raw data read from spi memory. After the boot, It is read data from SPI and putted in ram (like a bridge), some env vars are setted and after with the command booti: booti ${loadaddr} ${initrd_addr} ${fdt_addr} the kernel should boot. Why did you write "then use the rootfs flashed in eMMC or SD card."? Is it mandatory that rootfs must be in sd/emmc? I hope that I am clear. Thanks a lot! Re: IMX93 - Poky - Error on U-Boot configuration fspi Hi @il_ciancio! You can't flash the rootfs in the flash memory. You can boot from fspi and then use the rootfs flashed in eMMC or SD card. Best Regards! Chavira Re: IMX93 - Poky - Error on U-Boot configuration fspi Hi @Chavira , congratulation, great job! Now the bitabake is finished and i have u-boot*fspi files in my deploy directory. Just for clarification, which are the kernel/rootfs image "compatible" with fspi? It is always the *.wic file? thanks a lot and again great work! Re: IMX93 - Poky - Error on U-Boot configuration fspi Hi @il_ciancio! I found the problem! For some reason the fspi configuration is not included. You have to add the next lines in the imx93-11x11-lpddr4x-evk.conf file. UBOOT_CONFIG[fspi] = "${UBOOT_CONFIG_BASENAME}_defconfig" IMXBOOT_TARGETS_FSPI = "flash_singleboot_flexspi" IMXBOOT_TARGETS = "${@bb.utils.contains('UBOOT_CONFIG', 'fspi', '${IMXBOOT_TARGETS_FSPI}', 'flash_singleboot', d)}" after that you can maintain the line UBOOT_CONFIG = "sd fspi"  in local.conf file to deploy both images. Best Regards! Chavira Re: IMX93 - Poky - Error on U-Boot configuration fspi Hi @Chavira, with UBOOT_CONFIG ??= "sd fspi" the bitbake is finished, but in the output folder there is *.wic file but there isn't a Flex-SPI u-boot binary image. Is there something else? How is the result of your build? Re: IMX93 - Poky - Error on U-Boot configuration fspi Hi @il_ciancio! Thank you for contacting NXP Support! I am compiling now. Try changing UBOOT_CONFIG = "sd fspi" to UBOOT_CONFIG ??= "sd fspi" in the local.conf file. Best Regards! Chavira

smwセキュリティミドルウェアの使用方法に関する簡単な例はありますか? 私はただhash-2 512を行うプログラムを書こうと試みました。この結果、smw_hash() 関数は exit(1) を呼び出します。また、このライブラリでAES 256を実行したいと考えていますが、これにはキーの生成と保存が必要です。 私が見ることができるサンプルプログラムはありますか?テストプログラムがあり、それは確かに機能しますが、私がやりたいことよりもはるかに複雑です。 以下は、私が見ているものの痕跡で、ただsmw_hashと呼んでいます。 #0 __GI__exit (status=status@entry=1) at /usr/src/debug/glibc/2.39+git/sysdeps/unix/sysv/linux/_exit.c:27 #1 0x0000fffff7d8e0e0 in __run_exit_handlers (status=status@entry=1, listp=0xfffff7ef0660 <__exit_funcs>, run_list_atexit=run_list_atexit@entry=true, run_dtors=run_dtors@entry=true) at exit.c:131 #2 0x0000fffff7d8e1f0 in __GI_exit (status=status@entry=1) at exit.c:138 #3 0x0000fffff7f90e88 in config_db_mutex_lock () at /usr/src/debug/smw/git/core/config/database.c:66 #4 0x0000fffff7f916fc in smw_config_select_subsystem (operation_id=OPERATION_ID_HASH, args=0xfffffffff958, subsystem_id=subsystem_id@entry=0xfffffffff94c) at /usr/src/debug/smw/git/core/config/database.c:560 #5 0x0000fffff7f7beb8 in smw_utils_execute_common (operation_id=operation_id@entry=OPERATION_ID_HASH, args=args@entry=0xfffffffff958, subsystem_id= , op_step=op_step@entry=SMW_OP_STEP_ONESHOT, implicit=implicit@entry=false) at /usr/src/debug/smw/git/core/utils/exec.c:38 #6 0x0000fffff7f7bf04 in smw_utils_execute_operation (operation_id=operation_id@entry=OPERATION_ID_HASH, args=args@entry=0xfffffffff958, subsystem_id= ) at /usr/src/debug/smw/git/core/utils/exec.c:89 #7 0x0000fffff7f88728 in smw_hash (args=args@entry=0xfffffffff9b8) at /usr/src/debug/smw/git/core/crypto/hash.c:115 #8 0x0000aaaaaaaa0a84 in main () at simplehash.c:38 これがEXITの原因のようです。 SMW_DBG_ASSERT(CTX); 私のコードでは、smw_hashを呼び出す前にこれを行いましたが、エラーは発生しません。 memset(&ctx_args, 0, sizeof(ctx_args)); ctx_args.subsystem_name = SMW_SUBSYSTEM_NAME_ELE; // Allocate context smw_result = smw_allocate_context(&ctx_args); if (smw_result != SMW_STATUS_OK) { printf("Failed to allocate context: %d\n", smw_result); return -1; } 私はFRDMボードでIMX91を使用しており、imx-6.36-2.1.0.xmlでビルドしています。 FRDMトレーニング Re: smw セキュリティミドルウェアの使用方法に関する簡単な例はありますか? 最初にsmw_osal_lib_init()を呼び出すと、smw_hash()を機能させることができることがわかりました。ただし、smw_hash() は 64K バイトを超えるファイルでは機能しません。100MBをハッシュ化したい場合、どうすればいいですか?テスト例のどれも大きなファイルをハッシュしていないと思いますか?

SPI-1 CS引脚在S32K312上无法工作 你好，NXP：我尝试通过 SPI1 接口进行通信，并且时钟/MOSI 引脚可以输出我需要的数据，但 CS 引脚始终处于高位。您能帮帮我吗？引脚和 SPI 驱动程序之间的设置哪里错误，谢谢。环境描述：MCU：S32K312/100pin S32DS 产品：3.5.0.202207261815RTD S32KXX:RTD5.0.0.202407261948SW32K3_FreeRTOS_11.1.0_5.0.0_CD1_D2409_示例项目附件说明：20250407-SPI1_CS_issue.png 20250407-FreeRTOS_S32K312_SPI_test.7z BR Nelson 回复：S32K312的SPI-1 CS引脚无法工作 我发现我们的电路板存在一个问题，其 CS 引脚上的上拉电阻为 4.7K，我将通知硬件工程部门讨论这个问题。再次感谢Robin_Shen 。

MIMXRT1170-EVK: FreeRTOS Generic cm7 example run-time error I am receiving the following run-time error while trying to run the FreeRTOS Generic example on an MIMXRT1170-EVK with the linkServer Program received signal SIGINT, Interrupt. vApplicationIdleHook () at ../source/freertos_generic.c:386 386 xFreeStackSpace = xPortGetFreeHeapSize(); appears to hang from this point.  Any suggestions on why it appears to hang?  Thanks Re: MIMXRT1170-EVK: FreeRTOS Generic cm7 example run-time error solved, wrong serial port

SPI-1 CS pin can't work about S32K312 Hi NXP: Im try to communicate by SPI1 interface and Clock/MOSI pins can output what I need data, but CS pin always high.Could you please help me? where is wrong setting beween pins and SPI driver,thanks. environment description: MCU:S32K312/100pin S32DS Product:3.5.0.202207261815 RTD S32KXX:RTD5.0.0.202407261948 SW32K3_FreeRTOS_11.1.0_5.0.0_CD1_D2409_Example Project attachment description: 20250407-SPI1_CS_issue.png 20250407-FreeRTOS_S32K312_SPI_test.7z BR Nelson Re: SPI-1 CS pin can't work about S32K312 I found issue about our board which has pull-up resister 4.7K located at CS pin, and I will inform hardware engineering for discussing this issue. many thanks again for Robin_Shen. Re: SPI-1 CS pin can't work about S32K312 Hi Nelson, I downloaded your program to S32K312EVB-Q172, and I can observe that the chip select signal is pulled low at PTB17 pin. Since your S32K312 package is 100 HDQFP, please check whether PTB17 pin63 is correctly connected to the logic analyzer. Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: SPI-1 CS pin can't work about S32K312 Hi NXP: Im try to communicate by SPI1 interface and Clock/MOSI pins can output what I need data, but CS pin always high.Could you please help me? where is wrong setting beween pins and SPI driver,thanks. environment description: MCU:S32K312/100pin S32DS Product:3.5.0.202207261815 RTD S32KXX:RTD5.0.0.202407261948 SW32K3_FreeRTOS_11.1.0_5.0.0_CD1_D2409_Example Project attachment description: 20250407-SPI1_CS_issue.png 20250407-FreeRTOS_S32K312_SPI_test.7z BR Nelson

MIMXRT1170-EVK：FreeRTOS 通用 cm7 示例运行时错误 当我尝试在 MIMXRT1170-EVK 上使用 linkServer 运行 FreeRTOS 通用示例时，我收到以下运行时错误 程序收到信号SIGINT，中断。 vApplicationIdleHook（）位于../source/freertos_generic.c:386 386 xFreeStackSpace = xPortGetFreeHeapSize(); 似乎从这一点开始就悬而未决。关于它为什么会挂起，有什么建议吗？谢谢 回复：MIMXRT1170-EVK：FreeRTOS 通用 cm7 示例运行时错误 已解决，串口错误

IMX.93 LVDS シングルチャネル、4レーン あいさつ IMX93は、LVDSレーンが4つ未満の構成をサポートしていますか? 使用したい LVDS から RGB デバイスがありますが、1 レーン (D0)、2 レーン (D0 と D1)、または 3 レーン (D0、D1、D2) の 3 レーン構成しかサポートしておらず、4 レーン構成はサポートされていません。 よろしくお願いいたします。 ケン 日時:IMX.93 LVDSシングルチャンネル、4レーン ケン、ありがとう

IMX.93 LVDS 单通道，四车道 问候， IMX93 是否支持少于四条 LVDS 通道的配置？ 我有一个我们想使用的 LVDS 到 RGB 设备，但它仅支持三通道配置，单通道（D0）、双通道（D0 和 D1）或三通道（D0、D1 和 D2），但不支持四通道配置。 提前感谢！ 肯 回复：IMX.93 LVDS 单通道，四通道 谢谢 肯

IMX.93 LVDS single channel, four lanes Greetings, Does the IMX93 support a configuration which has less than four LVDS lanes? I have an LVDS to RGB  device which we would like to use, but it only supports three lane configurations, single lane (D0), two lanes (D0 and D1), or three lanes (D0, D1 and D2), but no four lane configuration. Thanks in advance, Ken Re: IMX.93 LVDS single channel, four lanes Thank you Ken Re: IMX.93 LVDS single channel, four lanes Hello @ken_carlson  I hope you are doing very well. Unfortunately there is not way to configure the Data-Lanes on the LVDS or LDB control registers of i.MX93. Best regards, Salas.

iMX93 - 在 PCM 模式下使用 SAI（无外部编解码器） 大家好， 我正在研究基于 i.MX93 的电路板，并尝试使用PCM 模式下的其中一个 SAI 接口（特别是SAI3 ）直接连接到Quectel GSM 模块。 该模块公开 PCM 线路（DIN、DOUT、CLK、SYNC）以及 I2C 接口以便与外部编解码器通信。根据Quectel的文档，音频可以直接通过PCM传输，而无需外部音频编解码器，该模块应该已经具有内部编解码器。 我的目标是通过 PCM 直接将呼叫音频路由到模块/从模块路由出呼叫音频。 我想问一下： 在没有编解码器的情况下，是否可以在 PCM 模式下使用 i.MX93 SAI 接口？ 是否有人已经在 i.MX93（或类似的 NXP SoC）上完成过这种设置？ 对于这种直接 PCM 连接（SAI <-> MODULE），推荐的设备树配置是什么？ 即使没有编解码器，设备树中是否仍然需要音频卡节点？ 如能提供任何建议或示例指示，我们将不胜感激！ 提前致谢， 斯特凡诺 回复：iMX93 - 在 PCM 模式下使用 SAI（无外部编解码器） 太感谢了！ 在使用虚拟编解码器并更改 Quectel 模块中的某些配置后，我终于使其工作正常（也使用 i2s 而不是 pcm） 回复：iMX93 - 在 PCM 模式下使用 SAI（无外部编解码器） 你好， 您可以查看 ALSA 邮件列表中的这个帖子： https://www.spinics.net/linux/fedora/linux-sound/msg22016.html 除了上述讨论之外，您还可以尝试使用虚拟编解码器（不推荐，不被社区接受，但您可以出于测试目的尝试一下）。 像这样： DTS 文件： + 编解码器测试：编解码器测试 { + #sound-dai-cells = <0>; +兼容=“linux，snd-soc-dummy”； + }; + + 声音测试 { +兼容=“简单音频卡”； +简单音频卡，名称=“sai音频卡”； +简单音频卡，格式=“left_j”； +简单音频卡，位时钟主控=<&sai_cpu>； +简单音频卡，帧主控=<&sai_cpu>； +状态=“已禁用”； + sai_cpu：简单音频卡，cpu { + 声音-dai = <&sai1>; + dai-tdm-slot-num = <2>; + dai-tdm 时隙宽度 = <32>; + }; + 简单音频卡，编解码器 { +声音-dai = <&codec_test>; + }; + }; + --- a/sound/soc/soc-utils.c +++b/sound/soc/soc-utils.c +静态 const struct of_device_id soc_dummy_ids[] = { + { .兼容=“linux，snd-soc-dummy”，}， + { }, +}; + 静态结构平台驱动程序 soc_dummy_driver = { 。司机= { 。姓名=“snd-soc-dummy”， + .匹配表= of_match_ptr（soc_dummy_ids）， }, 。探测= snd_soc_dummy_probe， };

iMX93 - Using SAI in PCM mode (no external codec) Hi everyone, I'm working on an i.MX93-based board and I'm trying to use one of the SAI interfaces (specifically SAI3) in PCM mode to connect directly to a Quectel GSM module. The module exposes PCM lines (DIN, DOUT, CLK, SYNC) and also an I2C interface to communicate with an external codec. According to Quectel's documentation, audio can be transmitted directly over PCM without the need for an external audio codec, the module already should have an internal codec. My goal is to route call audio to/from the module directly via PCM. I’d like to ask: Is it possible to use the i.MX93 SAI interface in PCM mode without a codec? Has anyone already done this kind of setup on i.MX93 (or similar NXP SoCs)? What is the recommended Device Tree configuration for this kind of direct PCM connection (SAI <-> MODULE)? Is an audio-card node still needed in the device tree even if there's no codec? Any advice or pointers to examples would be greatly appreciated! Thanks in advance, Stefano Re: iMX93 - Using SAI in PCM mode (no external codec) Thank you so much! After using a dummy codec and after changing some configuration in Quectel module, I finally made it working (also using i2s instead of pcm) Re: iMX93 - Using SAI in PCM mode (no external codec) Hello, You can have a look at this thread from ALSA mailing list: https://www.spinics.net/linux/fedora/linux-sound/msg22016.html Besides the discussion above you can try to use the dummy codec (not recommended, not accepted by the community, but you can have it a try for testing purposes). Something like this: DTS file: + codec_test: codec_test { + #sound-dai-cells = <0>; + compatible = "linux,snd-soc-dummy"; + }; + + sound-test { + compatible = "simple-audio-card"; + simple-audio-card,name = "sai-audio-card"; + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&sai_cpu>; + simple-audio-card,frame-master = <&sai_cpu>; + status = "disabled"; + sai_cpu: simple-audio-card,cpu { + sound-dai = <&sai1>; + dai-tdm-slot-num = <2>; + dai-tdm-slot-width = <32>; + }; + simple-audio-card,codec { + sound-dai = <&codec_test>; + }; + }; + --- a/sound/soc/soc-utils.c +++ b/sound/soc/soc-utils.c +static const struct of_device_id soc_dummy_ids[] = { + { .compatible = "linux,snd-soc-dummy", }, + { }, +}; + static struct platform_driver soc_dummy_driver = { .driver = { .name = "snd-soc-dummy", + .of_match_table = of_match_ptr(soc_dummy_ids), }, .probe = snd_soc_dummy_probe, };

Flag terminate compute operation Hello, I am using the frdm-mcuxc242 board and I would like to know how I can know if a certain operation has been performed. For example:  If I have to do the sum between two variables A and B and it gives me result C (A+B=C) how can I know if the operation has been performed and finished before reading the result of the variable C? Is there a computational operation performed interrupt flag? Or can I know how many clock cycles my operation takes?  Thank you. Regards Re: Flag terminate compute operation Hi @Transidico., Analyzing the code you share, one option that could be happening is that ADC has not finish the conversion when the calculation is being made, what I recommend you is to check the SDK example for ADC, adc16_interrupt and adc16_polling, in this examples it shows two options in order to wait the ADC to finish the conversion. In this way you can assure that the ADC has the value of the current voltage on the pin. Best Regards, Pablo Re: Flag terminate compute operation Good morning pablo, thank you for your reply and the documentation sent. I found how many clock cycles my instruction takes. I am sampling an input signal from pin A0 of the adc at 1ms and I noticed that if I don't put a delay of about 100uS, as you can see in the attached program, the first calculations I get are not accurate. I don't know if I have to put a delay every time I perform an operation, I don't think so because it would affect the timing. I don't know if the delay I am putting in is correct and there is a better way to put it in. Also, I have seen that it is possible to use MSDK_EnableCpuCycleCounter() and MSDK_GetCpuCycleCount() to read the number of cycles the program is doing, but if I implement them in my code it gives me an error. Could you give me some advice? Re: Flag terminate compute operation Hi @Transidico, You can calculate the clock cycles required for the operation with the assembly instruction. MCUXpresso has the option to see the assembly instruction required for each line in C The instruction will appear while debugging. On the core documentation you should be able to find the number of cycles spend on each instruction. Cortex-M0+ Technical Reference Manual r0p1 However, I suggest you double check directly with ARM to ensure performance on each instruction. Best Regards, Pablo

iMX93 - PCM モードで SAI を使用する (外部コーデックなし) ねえ皆さん i.MX93ベースのボードで作業しており、PCMモードでSAIインターフェイスの1つ(特にSAI3)を使用してQuectel GSMモジュールに直接接続しようとしています。 このモジュールは、PCMライン (DIN、DOUT、CLK、SYNC) と、外部コーデックと通信するためのI2Cインターフェイスを公開します。Quectelのドキュメンテーションによると、オーディオは外部オーディオコーデックを必要とせずにPCM経由で直接送信でき、モジュールにはすでに内部コーデックがあるはずだ。 私の目標は、PCMを介してモジュールとの間で直接通話オーディオをルーティングすることです。 私は尋ねたいです: i.MX93 SAIインターフェースをコーデックなしでPCMモードで使用できますか？ i.MX93(または同様のNXP SoC)でこの種のセットアップをすでに行った人はいますか? この種の直接PCM接続(SAI <->モジュール)に推奨されるデバイスツリー構成は何ですか? オーディオ カード ノードは、コーデックがない場合でもデバイス ツリーに必要ですか? アドバイスや例を示していただければ幸いです！ よろしくお願いします。 ステファノ Re: iMX93 - PCMモードでSAIを使用する(外部コーデックなし) どうもありがとうございます！ ダミーコーデックを使用し、Quectelモジュールのいくつかの設定を変更した後、ついに動作させました(pcmの代わりにi2sも使用) Re: iMX93 - PCMモードでSAIを使用する(外部コーデックなし) こんにちは ALSAメーリングリストのこのスレッドを見ることができます https://www.spinics.net/linux/fedora/linux-sound/msg22016.html 上記の議論以外にも、ダミーコーデックを使用してみることができます(推奨されておらず、コミュニティには受け入れられていませんが、テスト目的で試してみることができます)。 このようなものです。 DTS ファイル: + codec_test: codec_test { + #sound-dai-cells = <0>; + compatible = "Linux,snd-soc-dummy"; + }; + + サウンドテスト { + compatible = "シンプルオーディオカード"; + simple-audio-card,name = "sai-audio-card"; + simple-audio-card,format = "left_j"; + シンプルオーディオカード、ビットクロックマスター = <&sai_cpu>; + シンプルオーディオカード、フレームマスター = <&sai_cpu>; + ステータス = "無効"; + sai_cpu: simple-audio-card,cpu { + サウンドダイ = <&sai1>; + dai-tdm-slot-num = <2>; + dai-tdm-slot-width = <32>; + }; + シンプルオーディオカード、コーデック { + サウンドダイ = <&codec_test>; + }; + }; + --- a/sound/soc/soc-utils.c +++ b/サウンド/soc/soc-utils.c +_device_id の静的定数構造体 soc_dummy_ids [] = {+ {.compatible = " linux, snd-soc-dummy ",}, + {}, + {}, + 静的構造体 platform_driver soc_dummy_driver = {.driver = { .名前= " snd-soc-dummy "、+ .of_match_table = of_match_ptr (soc_dummy_ids)、}、.probe = snd_soc_dummy_probe、};

imx8mp内存控制器的BoardDataBusConfig修改是否必须？ i.MX8X内存配置与测试应用手册里提到： i.MX8QXP 的内存控制器允许 BYTE 内交换，为了 Layout 方便，一般会进行 BYTE 内交换， 所以要根据实际原理图设计来配置 BoardDataBusConfig 一页，根据原理图设计如下： 比如说：i.MX8QXP 的 DDR_DR00 连接到了 LPDDR4 的 DQ2_A 上，所以如下每二行，红字 的部分，DRAM data bus 2 例对应的是 MX8QX data bus(User Input)的值是 0。以此类推： 而在我们的imx8mp的LPDDR4 Layout时也有做调整，如下： 请问我们是否必须要在MX8M_Plus_DDR4_RPA_v9.xlsx里的BoardDataBusConfig里的做相应的调整？ 目前我们出货的设备都没调整BoardDataBusConfig(默认值如下)，但进行memtester测试都是pass的，请问是否有其它风险？ Re: imx8mp内存控制器的BoardDataBusConfig修改是否必须？ MX8M_Plus_DDR4_RPA_v9.xlsx里的BoardDataBusConfig里的做相应的调整？ A:对的，是要做调整的，i.MX8MP的内存控制器允许 BYTE 内交换，为了 Layout 方便，一般会进行 BYTE 内交换，这里要在data bus里按照实际的布线来填写。 我帮你检查了一下，你这边的配置是正确的，是根据你的硬件连接调整过的，如果不对会报错的，你这边是已经调整好了的，没有问题。

MCUXpreso 无法通过 J-Link 或 CMSIS-DAP 连接到 MIMXRT1060-EVKB 板 这是我第一次尝试使用 MIMXRT1060-EVKB。我尝试运行示例“helo word”，但无法上传程序。J-Link 和 CMSIS-DAP 也不连接到 MIMXRT1060-EVKB。我不知道下一步该做什么。请帮助我做我能做的事情。

imxrt1052 32bit pwm can i use pwm with 32it count? 回复： imxrt1052 32bit pwm Hi @ccc_clive , Thanks for your interest in NXP MIMXRT series! PWM only provides 16 bit counter, we can't do a 32bit counter using hardware alone. Please refer to this post: 已解决: i.MX.RT1052 - Is it possible to create a 32bit PWM module using 2 quad timers? - NXP Community Maybe you can design the software to realize, eg, when the counter 16 bit is overflowed, then in the overflowed interrupt, you use a software count flag to record it. when the 16 bit overflow 0xffff times, it means the counter 32 bit is reached. Besides this, actually, PIT is the 32bit counter, maybe you can use the PIT associate with the GPIO to realize the PWM generation. Wish it helps you! Best regards, Gavin