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S32K142W FTM0 PWM Modulation Hello, My team is attempting to apply spread spectrum to a 3-phase BLDC motor via PWM outputs, which are driven through the FTM0 peripheral. We are investigating the PWM modulation option to achieve this as mentioned in the reference manual: It is still unclear to us the exact affect the modulation will have on the PWM output. Ideally, we are looking for something that will sweep(oscillate) the PWM frequency between a low limit (say 20KHz), and a high limit (say 22KHz). We would look into dithering as another option, but unfortunately we need to used FTM0 for our layout, and dithering is not supported on FTM0. Can someone please explain how the PWM would behave if we applied a modulation of 2Khz on FTM0? Would it jump from 20KHz to 22KHz every few period cycles? Or will it randomly run at a frequency in between that range? Any clarification would be appreciated. We have attempted to model this ourselves, but the instructions for setting up modulation are a bit unclear. I enabled the SIM->FTMOPT1 register to apply modulation on each of the 3 output channels I also set up FTM1 channel 1 to output a PWM at 50% duty cycle at a frequency of 22KHz (2KHz higher than the FTM0 pwms). I applied a 10 tick deadtime and 1/16 deadtime pre-scale to match the FTM0 driver. This is the results I am getting (Yellow is the PWM output on FTM0, blue is the FTM1 output): Here are the configurations for each FTM module: FTM0 /* Fault configuration structure for FTM0 */ ftm_pwm_fault_param_t flexTimer_pwm0_FaultConfig = { false, /* Output pin state on fault */ false, /* PWM fault interrupt state */ 20U, /* Fault filter value */ FTM_FAULT_CONTROL_MAN_ALL, /* Fault mode */ { { false, /* Fault channel state (Enabled/Disabled) */ false, /* Fault channel filter state (Enabled/Disabled) */ FTM_POLARITY_LOW, /* Channel output state on fault */ }, { false, /* Fault channel state (Enabled/Disabled) */ false, /* Fault channel filter state (Enabled/Disabled) */ FTM_POLARITY_LOW, /* Channel output state on fault */ }, { true, /* Fault channel state (Enabled/Disabled) */ true, /* Fault channel filter state (Enabled/Disabled) */ FTM_POLARITY_LOW, /* Channel output state on fault */ }, { false, /* Fault channel state (Enabled/Disabled) */ false, /* Fault channel filter state (Enabled/Disabled) */ FTM_POLARITY_LOW, /* Channel output state on fault */ }, } }; /* Independent channels configuration structure for flexTimer_pwm0 */ ftm_independent_ch_param_t flexTimer_pwm0_IndependentChannelsConfig[3] = { { 0U, /* hwChannelId */ FTM_POLARITY_HIGH, /* Edge mode */ 0U, /* Duty cycle percent 0-0x8000 */ false, /* External Trigger */ FTM_LOW_STATE, /* The selection of the channel (n) mode */ true, /* Enabled/disabled the channel (n+1) output */ FTM_MAIN_INVERTED, /* Select channel (n+1) output relative to channel (n) */ true, /* Dead time enabled/disabled */ }, { 2U, /* hwChannelId */ FTM_POLARITY_HIGH, /* Edge mode */ 0U, /* Duty cycle percent 0-0x8000 */ false, /* External Trigger */ FTM_LOW_STATE, /* The selection of the channel (n) mode */ true, /* Enabled/disabled the channel (n+1) output */ FTM_MAIN_INVERTED, /* Select channel (n+1) output relative to channel (n) */ true, /* Dead time enabled/disabled */ }, { 4U, /* hwChannelId */ FTM_POLARITY_HIGH, /* Edge mode */ 0U, /* Duty cycle percent 0-0x8000 */ false, /* External Trigger */ FTM_LOW_STATE, /* The selection of the channel (n) mode */ true, /* Enabled/disabled the channel (n+1) output */ FTM_MAIN_INVERTED, /* Select channel (n+1) output relative to channel (n) */ true, /* Dead time enabled/disabled */ }, }; /* PWM configuration for flexTimer_pwm0 */ ftm_pwm_param_t flexTimer_pwm0_PwmConfig = { 3U, /* Number of independent PWM channels */ 0U, /* Number of combined PWM channels */ FTM_MODE_CEN_ALIGNED_PWM, /* PWM mode */ 10U, /* Dead time value */ FTM_DEADTIME_DIVID_BY_16, /* Dead time prescaler */ 20000U, /* PWM frequency */ flexTimer_pwm0_IndependentChannelsConfig, /* Independent PWM channels configuration structure */ NULL, /* Combined PWM channels configuration structure */ &flexTimer_pwm0_FaultConfig /* PWM fault configuration structure */ }; /* Global configuration of flexTimer_pwm0 */ ftm_user_config_t flexTimer_pwm0_InitConfig = { { true, /* Software trigger state */ false, /* Hardware trigger 1 state */ false, /* Hardware trigger 2 state */ false, /* Hardware trigger 3 state */ false, /* Max loading point state */ true, /* Min loading point state */ FTM_PWM_SYNC, /* Update mode for INVCTRL register */ FTM_PWM_SYNC, /* Update mode for SWOCTRL register */ FTM_PWM_SYNC, /* Update mode for OUTMASK register */ FTM_PWM_SYNC, /* Update mode for CNTIN register */ true, /* Automatic clear of the trigger*/ FTM_WAIT_LOADING_POINTS, /* Synchronization point */ }, FTM_MODE_CEN_ALIGNED_PWM, /* Mode of operation for FTM */ FTM_CLOCK_DIVID_BY_1, /* FTM clock prescaler */ FTM_CLOCK_SOURCE_SYSTEMCLK, /* FTM clock source */ FTM_BDM_MODE_00, /* FTM debug mode */ false, /* Interrupt state */ false /* Initialization trigger */ }; FTM1 /* Global configuration of flexTimer_pwm_1 InitConfig */ ftm_user_config_t flexTimer_pwm_MOD_InitConfig = { { true, /* Software trigger state */ false, /* Hardware trigger 1 state */ false, /* Hardware trigger 2 state */ false, /* Hardware trigger 3 state */ false, /* Max loading point state */ true, /* Min loading point state */ FTM_PWM_SYNC, /* Update mode for INVCTRL register */ FTM_PWM_SYNC, /* Update mode for SWOCTRL register */ FTM_PWM_SYNC, /* Update mode for OUTMASK register */ FTM_PWM_SYNC, /* Update mode for CNTIN register */ true, /* Automatic clear of the trigger*/ FTM_WAIT_LOADING_POINTS, /* Synchronization point */ }, FTM_MODE_CEN_ALIGNED_PWM, /* Mode of operation for FTM */ FTM_CLOCK_DIVID_BY_1, /* FTM clock prescaler */ FTM_CLOCK_SOURCE_SYSTEMCLK, /* FTM clock source */ FTM_BDM_MODE_00, /* FTM debug mode */ false, /* Interrupt state */ false /* Initialization trigger */ }; /* Fault configuration structure for flexTimer_pwm_1*/ ftm_pwm_fault_param_t flexTimer_pwm_MOD_FaultConfig = { false, /* Output pin state on fault */ false, /* PWM fault interrupt state */ 0U, /* Fault filter value */ FTM_FAULT_CONTROL_DISABLED, /* Fault mode */ { { false, /* Fault channel state (Enabled/Disabled) */ false, /* Fault channel filter state (Enabled/Disabled) */ FTM_POLARITY_LOW, /* Fault channel state (Enabled/Disabled) */ }, { false, /* Fault channel state (Enabled/Disabled) */ false, /* Fault channel filter state (Enabled/Disabled) */ FTM_POLARITY_LOW, /* Fault channel state (Enabled/Disabled) */ }, { false, /* Fault channel state (Enabled/Disabled) */ false, /* Fault channel filter state (Enabled/Disabled) */ FTM_POLARITY_LOW, /* Fault channel state (Enabled/Disabled) */ }, { false, /* Fault channel state (Enabled/Disabled) */ false, /* Fault channel filter state (Enabled/Disabled) */ FTM_POLARITY_LOW, /* Fault channel state (Enabled/Disabled) */ }, } }; /* The independent channels configuration structure for flexTimer_pwm_1_IndependentChannelsConfig */ ftm_independent_ch_param_t flexTimer_pwm_MOD_IndependentChannelsConfig[1] = { { 1, /* Hardware channel Id */ FTM_POLARITY_HIGH, /* Polarity of the PWM signal */ 16384U, /* Duty cycle percent 0-0x8000 */ false, /* External Trigger */ FTM_LOW_STATE, /* Safe state of the PWM channel when faults are detected */ false, /* Enabled/disabled the channel (n+1) output */ FTM_MAIN_INVERTED, /* Select channel (n+1) output relative to channel (n) */ true, /* Dead time enabled/disabled */ } }; /* PWM configuration for flexTimer_pwm_1 */ ftm_pwm_param_t flexTimer_pwm_MOD_PwmConfig = { 1U, /* Number of independent PWM channels */ 0U, /* Number of combined PWM channels */ FTM_MODE_CEN_ALIGNED_PWM, /* PWM mode */ 10U, /* Dead time value */ FTM_DEADTIME_DIVID_BY_16, /* Dead time prescale */ 22000U, /* PWM frequency */ flexTimer_pwm_MOD_IndependentChannelsConfig, /* The independent PWM channels configuration structure */ NULL, /* Combined PWM channels configuration structure */ &flexTimer_pwm_MOD_FaultConfig /* PWM fault configuration structure */ }; I set the FTMOPT1 register before initializing the FTM peripherals using the following lines of code: SIM_Type * simeBase = SIM_BASE_PTRS; simeBase->FTMOPT1 |= SIM_FTMOPT1_FTM0_OUTSEL(0x2A); /* 0b101010 channels 1, 3, and 5 */ Is there something I am initializing incorrectly? This behavior does not seem correct. I would expect a consistent duty cycle each period with alternating frequencies in the range of 20kHz-22kHz. To clarify, I am using an S32K142W MCU with the SDK RTM v4.0.3. Thanks. Re: S32K142W FTM0 PWM Modulation Hi, Thank you so much for your interest in our products and for using our community. The FTM Modulation Implementation for PWM mode using FTM0_OUTSEL register looks like this. Without modulation: Modulation with FTM1_CH1: At the moment I only have on hand a S32K144-Q100 to test but it should be equal for the S32K142W. I attach the project using S32 Design Studio for S32 Platform v.3.5 and RTD for S32K1 and S32M24x version 2.0.0 including patch P01. Another way to perform modulation is using FAULT input signals, for more detail please refer to the following community posts: https://community.nxp.com/t5/S32K/Modulated-PWM-waveform-Generation/m-p/656233 https://community.nxp.com/t5/S32K/FTM2-Output-Modulation/m-p/1056029 Hope it helps you. Have a nice day!
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摩托罗拉 SHQ1917H 我正在寻找摩托罗拉 SHQ1917H。 该产品仍由 NXP 生产吗? 回复:摩托罗拉 SHQ1917H 谢谢您的回复。 回复:摩托罗拉 SHQ1917H SHQ1917H在 NXP 数据库中不存在。看来这部分从未成为 NXP。
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dio 的频道 ID 错误 你好,NXP团队, 我们正在尝试使用 dio 外设启用PTD17引脚高电平 端口名称: PTD_H Dio 端口 ID: 7 Dio 频道 ID:1 如何检查我设置的频道ID是否正确? 现在这个引脚还没有变高。 热修复
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MPC5746C Mode Entry Help Greetings! I am trying to follow the steps in the TRM to properly initialize my controller with the Mode Entry module. I have some Mode Entry module code written in main.c that I believe closely resembles the instructions from the manual, but when my program tries to execute the second write to the MC_ME_MCTL register, it just hangs. Also, according to the MC_ME_GS register, the controller appears to start a mode transition but it never completes.  Can you please take a look at my project (attached) and help me identify what the problem is? My end goal is to get the ADC1 module operational: configure the ADC registers and then read from the ADC. You will notice that I haven't enabled any clocks for other peripherals, and that is the reason. Thank you for your time! Paul Re: MPC5746C Mode Entry Help Thanks Peter. The issue was incorrectly configured clocks, as you suggested. Once I got that right I ended up just using the clock_manager inside Processor Expert to configure everything and initialized by calling the two functions below, which I learned about through some of the examples in the S32 SDK (the functions are in clock_MPC57xx.c). Just using the CLOCK_DRV_Init processor expert function was not enough. Re: MPC5746C Mode Entry Help Hello, there is a clock configuration guide: https://www.nxp.com/products/processors-and-microcontrollers/power-architecture/mpc5xxx-microcontrollers/ultra-reliable-mpc57xx-mcus/ultra-reliable-mpc574xb-c-g-mcus-for-automotive-and-industrial-control-and-gateway:MPC574xB-C-G Such will ease your work with clocks and their configuration. https://www.nxp.com/docs/en/application-note/AN5392.pdf best regards, Peter Re: MPC5746C Mode Entry Help @petervlna  Thanks for your reply. I am looking at example MPC5746C PIT ISR GHS614 and trying to mimic Mode Entry steps from that. I am still having same issue but I will keep trying. Question: Can I alternatively use the clock_manager component inside Processor Expert to do the Mode Entry work for me? Will it work standalone or do I still need supplement the clock_manager component with code to get everything working just right? Paul Re: MPC5746C Mode Entry Help Hello, but when my program tries to execute the second write to the MC_ME_MCTL register, it just hangs. not sure what prevents you from transition, there could be following reasons: 1. You have incorrectly configured clocks 2. you have peripherals which clock is still active. For example CAN module, PWM module, etc.. is still running from clock source which will be changed in target mode. I suggest to have a look at very basic examples either community ones or S32DS ones: https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/MPC5-software-example-list/ta-p/1102445#MPC5746C Best regards, Peter
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モトローラSHQ1917H モトローラのSHQ1917Hを探しています。 この製品はまだNXPによって製造されていますか? 日時:モトローラSHQ1917H 返信ありがとうございます。 日時:モトローラSHQ1917H SHQ1917H NXP データベースに存在しません。この部分はNXPにはならなかったようです。
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iMXRT117x: Linking errors during build smart_lock app for SLN-VIZN3D-IOTDG board Hi, We have a customer is trying to build the smart-lock application for SLN-VIZN3D-IOTDG board. They followed the instructions in the reference manual:  SLN-VIZN3D-IOT SW Developer Guide (nxp.com) When building the smart_lock main application, they get the following errors: What is the resolutions for the above errors, Here are some old tickets related to same issue: How to solve gcc linker error (.ARM.exidx+0x0): relocation truncated to fit: R_ARM_PREL31: followup - NXP Community Re: RT1064: How to solve gcc linker error (.ARM.exidx+0x0): relocation truncated to fit: R_ARM_PREL31 - NXP Community Thanks. Ayman Sydhom Re: iMXRT117x: Linking errors during build smart_lock app for SLN-VIZN3D-IOTDG board Hi Kerry, The customer confirmed that the app builds fine after downgraded the MCUXpresso. Thanks. Ayman Re: iMXRT117x: Linking errors during build smart_lock app for SLN-VIZN3D-IOTDG board Hi @asydhom ,   You are welcome!   I already test both two IDE versions, so, I am sure of this solution.    Yes, after your end customer also make it works, please help me to mark the correct answer, just to close this case, thanks. Any new issues, welcome to create the new case. Best Regards, kerry Re: iMXRT117x: Linking errors during build smart_lock app for SLN-VIZN3D-IOTDG board Thanks Kerry. Will communicate the resolution to our customer and let you know if this solved the issue or not. Regards. Ayman Re: iMXRT117x: Linking errors during build smart_lock app for SLN-VIZN3D-IOTDG board Hi @asydhom ,   Thank you for your interest in the NXP MIMXRT product, I would like to provide service for you. I know your failed issues reason, your used IDE version is high, as I also test it on my side, my MCUXpresso IDE is the v11.9.0, then same build result to you.   So, I download the older MCUXPresso IDE Version to : V11.4.1, as the get start also mentioned: You can download it from this linker: https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/mcuxpresso-integrated-development-environment-ide:MCUXpresso-IDE Download the previous version: Then, you need to download the SLN-VIZN3D-IOT SDK https://mcuxpresso.nxp.com/en/builder?hw=SLN-VIZN3D-IOT You need to add it to the MCUXPresso IDE  Now, build your project again, you will find it is OK to use: Please try my method on your side. If you still have question about it, please kindly let me know. If your question is solved, please help me to mark the correct answer, just to close this case, thanks. Any new issues, welcome to create the new case. Best Regards, Kerry
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Doubt regarding configuration Hello everyone!!! I am using MK22FN512VLL12 Controller in my project i have configured all the pins and peripherals according to my requirement and generated code successfully.  But, I have found something fishy that in project explorer window next to my project name there is   please find the attached....... May I know the reason that why it is showing like that. and will it cause any effect to my project?? and how can i remove it. Thank you!!! regards, ANIL. Please checkPlease check Freedom Development Platform Kinetis K Series MCUs Re: Doubt regarding configuration Hi @yoursanil3 , The message next to the project name is related to the building of the project, the default building in MCUXpresso is Debug but, you can change this in the arrow next to the hammer of building This will not cause any effect to your project. If you want to know more about this, you can see section 3.1 A note about Launch Configuration files of the MCUXpresso IDE - User Guide Hope it helps you!
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安装新的 SDK 会导致自动化项目迁移 我有 S32 DS 3.5 和 S32K344 micro。 原本是用SDK/RTD V2.0.0设置的 有必要添加 SDK 4.0.0,这样,一个项目将迁移到 4.0.0,而另一个项目仍保留在 2.0.0 SDK 4.0.0 已正确安装,并且两个 SDK 都出现在项目设置下。 我希望通过附加/分离 SDK,我可以控制当前项目将使用哪个 SDK。 然而那些“附加/分离”复选框似乎没有效果。 尽管如此,所有项目都会使用 4.0.0,并且不可能让一个项目继续使用 2.0.0 有没有什么办法可以避免这种情况? 回复:安装新的 SDK 会导致自动化项目迁移 有效,谢谢
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DIO のチャネル ID エラー こんにちはnxpチーム、 DIO ペリフェラルで PTD17 ピンを High にしようとしています ポート名: PTD_H Dio ポート ID: 7 Dio チャネル ID: 1 設定したチャネルIDが正しいかどうかを確認するにはどうすればよいですか? 現在、このピンは高くなっていません。 ホットフィックス
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Removing DFU from u-boot-imx in Yocto for i.MX8MM We are using Yocto (kirkstone 4.0.4) to build U-Boot for imx8mm_evk. We wish to remove DFU from U-Boot completely. We know how to configure U-Boot with configuration fragments, we already do that successfully for other options. But for some reason, this simple configuration fragment does not work: CONFIG_DFU=n CONFIG_CMD_DFU=n I have verified from do_configure logs that the fragments are taken into use: Value of CONFIG_DFU is redefined by fragment remove_dfu.cfg: Previous value: CONFIG_DFU=y New value: CONFIG_DFU=n Value of CONFIG_CMD_DFU is redefined by fragment remove_dfu.cfg: Previous value: # CONFIG_CMD_DFU is not set New value: CONFIG_CMD_DFU=n I have also verified that no other fragments override these changes. However, after do_configure is finished, the final .configure file has CONFIG_DFU=y (CONFIG_CMD_DFU is still off). For some reason, when the recipe runs "make oldconfig", the value reverts. Why does the configure want to seemingly force DFU on? I am able to remove it by forcing the change with a do_configure:append, but that is a very nasty hack and I would prefer another solution. Re: Removing DFU from u-boot-imx in Yocto for i.MX8MM I will answer my own question: going through all the Kconfig files I found out that CONFIG_EFI_CAPSULE_FIRMWARE_FIT and CONFIG_EFI_CAPSULE_FIRMWARE_RAW were forcing DFU to be enabled. When I disabled the EFI loader, I was also able to disable DFU the normal way. Re: Removing DFU from u-boot-imx in Yocto for i.MX8MM That does not work. as I explained in my original post, running "oe_runmake oldconfig" for some reason sets "CONFIG_DFU=y" even if it is disabled in the config file. I am trying to understand why. Re: Removing DFU from u-boot-imx in Yocto for i.MX8MM Hello @Sampo  One can try to add oe_runmake oldconfig on the do_compile, for example: do_configure:append() { echo "CONFIG_DFU=n" >> ${B}/.config echo "CONFIG_CMD_DFU=n" >> ${B}/.config oe_runmake oldconfig } Best regards, --... ...-- Salas. 
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IIO ADC example code for kernel driver I am trying to set up several IIO ADC input channels through my kernel driver on a S32G2. I was wondering if there might be an example that I could follow? I am not sure if I need to use the consumer functions under the 'include/linux/iio" directory to request and setup channels for the ADC? Once the channels are set up, I would like to capture values on a regular bases through either polling or an interrupt and then write the values to my sysfs driver nodes. Note, I could not find any examples for the S32G in any of the NXP Community forums or in the kernel documentation (kernel version 5.15). Thanks for any assistance. Re: IIO ADC example code for kernel driver As per the suggestion, I decided to implement some of the ADC code from NXP's "s32cc_adc.c" Linux driver into my new driver. Re: IIO ADC example code for kernel driver Hi, We apologize for the delay. We have received the following update: " I don't see such example in our reference bsp and I think such dts configuration is not required in our design. Please reference to S32G reference manual on SAR ADC to see that channels mapping to ADCs are fixed which we only need to configure corresponding register to enable/consume the data. In bsp user manual, from the SAR-ADC chapter, you can also see the operation through sysfs to enable each channel and read through its corresponding ADC buffer. And those ADC_CH_# are not multi-function pins for dts configure either. Customer can reference to our kernel driver "s32cc_adc.c" to implement their driver (or hook to it) if needed. " Please, let us know. Re: IIO ADC example code for kernel driver Hi, Thanks for your feedback. Overall, we understand that there are no examples on regards of kernel driver modifications, just the ones available under the BSP39.0 User Manual. We will confirm with the related team if there is any information we might be missing. We apologize for any delay from our side. Please, let us know. Re: IIO ADC example code for kernel driver Thanks for the update and the example, but this is from sysfs user space and not for a kernel driver.  I am looking for an example that utilizes the dts file and references to obtaining data within the kernel driver.  For reference, this is what I have tried without success: In myboard.dts   Using this as a ROOT node?     &adc0 {      #io-channel-cells = <1>;      status = "okay";      adc0_capture {status = "okay";      compatible = "my-adc-driver";      io-channels = <&adc0 3>; };   Or using the following as a SOC node?   iio_map {            ch0 {                   nxp,adc-channel-number = <0x0>;                   nxp,adc-consumer-device = "adc-input.1";                   nxpi,adc-consumer-channel = "vin1";             };               ch1 {                  nxp,adc-channel-number = <0x1>;                  nxp,adc-consumer-device = "adc-input.2";                  nxp,adc-consumer-channel = "vin2";             }; };     In my_adc_driver.c:   // Get the instance of the channel from iio_map? iio_channel *adc_vin1= iio_channel_get(&pdev->dev, "ch0");   // Read ADC value ret = iio_read_channel_raw(adc_vin1, &value); I'm not sure if I need a ROOT or a SOC node in myboard.dts file, and how to setup either? So, I am looking for an example on either, both for the dts and in the kernel driver file. Thanks again for any additional assistance. Re: IIO ADC example code for kernel driver Hi, Thanks for your feedback. On regards of the specific IIO topic, we understand that the default dts should be good enough. As for ADC itself, the available examples are provided under the BSP39.0 User Manual for S32G2 platforms [BSP39.0 User Manual for S32G2 platforms]: Please, let us know. Re: IIO ADC example code for kernel driver I am using BSP 39.0 with a custom board. Also, looking through some of the documentation, in order to obtain an iio_channel, there needs to be an established iio_map? Is the iio_map already generated in Yocto, or is this something that is required to be setup in the board dts file? Re: IIO ADC example code for kernel driver Hi, Can you let us know which BSP version are you working with? Also, are you using any NXP reference board? Or is this a custom board? Please, let us know.
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Yocto 5.0 kernel 6.6.23 Yocto compiler fail in imx8mp. Hi NXP Follow nxp github readme.  Yocto 5.0 kernel 6.6.23 Yocto compiler fail in imx8mp. https://github.com/nxp-imx/imx-manifest/tree/imx-linux-scarthgap MACHINE=imx8mp-lpddr4-evk DISTRO=fsl-imx-xwayland source ./imx-setup-release.sh -b imx8mp-lpddr4-evk bitbake imx-image-full Do you have any advice? i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: Yocto 5.0 kernel 6.6.23 Yocto compiler fail in imx8mp. Hi @charleshuang , Good news it works, could you share the method to us, so that met the some issue ones can refer to it. Great thanks. Wish you have a nice day Best Regards Rita Re: Yocto 5.0 kernel 6.6.23 Yocto compiler fail in imx8mp. Hi  @Rita_Wang  Our ubuntu is 20.04, we user the docker. We have solutions about fixed the nnshark fail issue. Thanks for your help. Re: Yocto 5.0 kernel 6.6.23 Yocto compiler fail in imx8mp. What is the Ubuntu version are you using? It is the host machine configure root for the compile failed, in our side, we do not met the issue. Here recommend you to check and install all the Yocto Project host packages in the IMX_YOCTO_PROJECT_USERS_GUIDE Re: Yocto 5.0 kernel 6.6.23 Yocto compiler fail in imx8mp. Hello @Rita_Wang  I got the other Error shark "nnshark_2023.11.imx.bb:do_configure failed ...." Since the Yocto 3.3, we and our customer always get the fail message about nnshark. Please provide the nnshark on downloads for Yocto 5.0. Thanks. Re: Yocto 5.0 kernel 6.6.23 Yocto compiler fail in imx8mp. You can refer to the document we released, if question still tell us. Any questions contact us freely
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Implementing Runtime Validation for Custom Application on I.MX6DL Linux Platform Hi, I am planning to run Linux on the I.MX6DL platform and add my own application. For security reasons, I want to implement a validation mechanism: the application will perform a verification during runtime. If the verification succeeds, the application will run normally; if it fails, the application will not proceed further. Could anyone suggest a good approach to achieve this? Thank you! Best wish! i.MX6DL Linux Security Re: Implementing Runtime Validation for Custom Application on I.MX6DL Linux Platform Hope this can be helpful for you, such as fs-verity: read-only file-based authenticity protection — The Linux Kernel documentation Regards Harvey
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Error using Config Tool via MCUXpresso for VS Code I converted a project from the MCUXpresso IDE to MCUXpresso for VS code. The project is for a custom board that uses the MIMXRT1062CVL5B processor. The project compiles using the MCUXpresso IDE. I'm using MCUXpresso Config Tools Version 15.0 I'm using Visual Studio Code Version 1.90.2 with Version 1.9 of MCUXpresso for VS Code extension After importing the project into VScode (and manually modifying a couple of things that didn't convert properly), it now compiles in VScode. I configured the project pins and peripherals using the Config Tool in MCUXpresso IDE. When I open the Config Tool via VScode, I get errors stating that some drivers are not found in the toolchain/IDE project.    These errors don't show up when using the IDE version. Yet the drivers are there and the code compiles! Right-clicking over the error simply pops up a "Problem Details" box that "The SDK component is required by the generated code from the tool.  If it is not included in the toolchain project, the source code will not be compilable." I'd like to clear these errors, but am out of ideas of things to try...   The project does compile though! In a related issue, I no longer need a peripheral and removed it using the Config Tool, but the drivers still show up in the Project Explorer.   Do these have to be removed manually, or is there a way to have the tool remove all of the appropriate files? Thanks!! Re: Error using Config Tool via MCUXpresso for VS Code I solved this...    The MCUXpresso for VScode "import" function put in a custom toolchain path (of simply "armgcc").    Browsing to the project folder for project toolchain path fixed this. The import function also duplicated some of the flags (which caused errors), so these had to be manually fixed...
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通过 MCUXpresso 使用 VS Code 配置工具时出错 我将一个项目从 MCUXpresso IDE 转换为 MCUXpresso for VS 代码。 该项目适用于使用 MIMXRT1062CVL5B 处理器的定制板。 该项目使用 MCUXpresso IDE 进行编译。 我正在使用 MCUXpresso 配置工具版本 15.0 我正在使用 Visual Studio Code 版本 1.90.2 和 MCUXpresso 版本 1.9 进行 VS Code 扩展 将项目导入 VScode 后(并手动修改一些未正确转换的内容),它现在可以在 VScode 中进行编译。 我使用 MCUXpresso IDE 中的配置工具配置了项目引脚和外围设备。 当我通过 VScode 打开配置工具时,出现错误,提示在工具链/IDE 项目中未找到某些驱动程序。使用 IDE 版本时不会出现这些错误。 但驱动程序就在那里,代码可以编译! 右键单击错误只会弹出“问题详细信息”框,其中显示“该工具生成的代码需要 SDK 组件。如果它没有包含在工具链项目中,源代码将无法编译。” 我想清除这些错误,但我不知道该尝试什么...但项目确实可以编译! 在相关问题中,我不再需要外围设备并使用配置工具将其删除,但驱动程序仍然显示在项目资源管理器中。是否必须手动删除这些文件,或者是否有办法让工具删除所有相应的文件? 谢谢!! 回复:通过 MCUXpresso 使用 VS Code 配置工具时出错 我解决了这个问题……MCUXpresso for VScode 的“导入”功能添加了自定义工具链路径(简称为“armgcc”)。浏览项目文件夹查找项目工具链路径解决了这个问题。 导入功能还重复了一些标志(导致错误),因此必须手动修复这些问题......
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S32K312 HSE FW Lost Hello, I have been installed the HSE FW, and read HSE FW version succeed.  But when I program demo app again, I got a programming error as shown below picture, than I found the HSE installation state lost.  there are a total of 3 ECU with same problem.  I don't know why. Is it possible for the HSE FW to be lost? update to fix unclear picture Re: S32K312 HSE FW Lost I am using HSE_DEMOAPP_S32K3XX_0_2_6_0 for first install ,and update the fw to the latest HSE_DEMOAPP_S32K3XX_0_2_40_0 succeed. because SBAF programming during chip EOL, so we don't want to update it. Re: S32K312 HSE FW Lost It looks like your S32K312's current SBAF Version(0x4039C020) is 01 0D 00 00 00 09 00 01. To make it fully compatible with SBAF, it is recommended to install HSE FW version 00 0D 00 00 02 06 00 00 or higher. Which HSE_DEMOAPP are you using? HSE_DEMOAPP_S32K3XX_0_2_6_0 or the latest HSE_DEMOAPP_S32K3XX_0_2_40_0? BTW, S32K312 SBAF 0.15.0 RTM Release is the latest version. Re: S32K312 HSE FW Lost Thank you Robin, I am sorry for unclear picture. I have been update it. Re: S32K312 HSE FW Lost Hi Sorry, there may be something wrong with the method you uploaded the picture, so I can't see the content of the picture clearly. Please click Insert Photo or attach those pictures. Have you referred to MU Restore FW_EN.pdf in S32K312 HSE strange problem? Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
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VS Code の MCUXpresso を介した Config ツールの使用中にエラーが発生しました VSコード用にMCUXpresso IDEからMCUXpressoにプロジェクトを変換しました。 このプロジェクトは、MIMXRT1062CVL5B プロセッサを使用するカスタム ボード用です。 プロジェクトは MCUXpresso IDE を使用してコンパイルされます。 MCUXpresso Config Tools Version 15.0 を使用しています Visual Studio Codeバージョン1.90.2とVS Code拡張機能用のMCUXpressoのバージョン1.9を使用しています プロジェクトをVScodeにインポートした後(そして、正しく変換されなかったいくつかのものを手動で変更した後)、VScodeでコンパイルされるようになりました。 MCUXpresso IDEのConfigツールを使用して、プロジェクトのピンとペリフェラルを構成しました。 VScode経由でConfigツールを開くと、ツールチェーン/ IDEプロジェクトに一部のドライバーが見つからないというエラーが表示されます。これらのエラーは、IDE バージョンを使用している場合には表示されません。 それでも、ドライバーはそこにあり、コードはコンパイルされます! エラーを右クリックすると、「SDKコンポーネントはツールから生成されたコードに必要です」という「問題の詳細」ボックスがポップアップ表示されます。ツールチェーンプロジェクトに含まれていない場合、ソースコードはコンパイルできません。 これらのエラーをクリアしたいのですが、試してみるべきことが思いつきません...  ただし、プロジェクトはコンパイルされます。 関連する問題として、ペリフェラルが不要になり、Config Toolを使用して削除しましたが、ドライバーはProject Explorerに引き続き表示されます。これらは手動で削除する必要がありますか、それともツールに適切なファイルをすべて削除させる方法はありますか? ありがとうございました。 Re:VS CodeのMCUXpressoを介してConfigツールを使用したエラー 私はこれを解決しました...   VScodeのMCUXpressoの「インポート」機能は、カスタムツールチェーンパス(単に「armgcc」)に入れます。   プロジェクト・ツールチェーン・パスのプロジェクト・フォルダを参照すると、この問題が修正されました。 インポート関数では、一部のフラグも重複していたため(エラーの原因となっていました)、これらは手動で修正する必要がありました...
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S32K396和S32K376是pin to pin兼容吗? Hi all, 请问S32K396和S32K376是pin to pin兼容吗?RM手册附件的IO 相关资料全都是S32K396的描述; Are S32K396 and S32K376 Pin-to-PIN compatible?  The IO related materials attached to the RM manual are all descriptions of S32K396;  Re: S32K396和S32K376是pin to pin兼容吗? 嗨@chen Huang , 是的,它们是软件和引脚兼容的。 Best regards, Julián 
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从 Yocto 中为 i.MX8MM 移除 u-boot-imx 的 DFU 我们正在使用 Yocto(kirkstone 4.0.4)为 imx8mm_evk 构建 U-Boot。我们希望从 U-Boot 中彻底删除 DFU。 我们知道如何使用配置片段来配置 U-Boot,我们已经成功地为其他选项完成了配置。但由于某种原因,这个简单的配置片段不起作用: CONFIG_DFU=n CONFIG_CMD_DFU=n 我已经从 do_configure 日志中验证了这些片段已被投入使用: CONFIG_DFU 的值由片段 remove_dfu.cfg 重新定义: 先前的值:CONFIG_DFU=y 新值:CONFIG_DFU=n CONFIG_CMD_DFU 的值由片段 remove_dfu.cfg 重新定义: 先前的值:#CONFIG_CMD_DFU 未设置 新值:CONFIG_CMD_DFU=n 我还验证了没有其他片段覆盖这些更改。然而,在 do_configure 完成后,最终的 .configure文件具有 CONFIG_DFU=y(CONFIG_CMD_DFU 仍然关闭)。由于某种原因,当配方运行“make oldconfig”时,值会恢复。 为什么配置似乎要强制开启 DFU?我可以通过使用 do_configure:append 强制更改来删除它,但这是一个非常讨厌的黑客行为,我更喜欢另一种解决方案。 回复:从 Yocto 中的 u-boot-imx 中删除 i.MX8MM 的 DFU 我将回答我自己的问题:查看所有 Kconfig 文件,我发现 CONFIG_EFI_CAPSULE_FIRMWARE_FIT 和 CONFIG_EFI_CAPSULE_FIRMWARE_RAW 强制启用 DFU。当我禁用 EFI 加载器时,我也能够以正常方式禁用 DFU。 回复:从 Yocto 中的 u-boot-imx 中删除 i.MX8MM 的 DFU 那是行不通的。正如我在原始帖子中解释的那样,即使配置文件中禁用了“oe_runmake oldconfig”,由于某种原因运行“oe_runmake oldconfig”也会设置“CONFIG_DFU=y”。我试图理解为什么。
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S32K3xx FOTA sample code Hello, Are there any FOTA sample code or example for S32K3xx? Thank you, Kody Re: S32K3xx FOTA sample code @VaneB  Thank you for the quick response.  Re: S32K3xx FOTA sample code Hi @kodyw  The example code can be downloaded from S32K3 Reference Software > Automotive SW - S32K3 - OTA Demo. Also, there are some training videos related to this topic, check them they might be useful for you. Automotive Security and Over-the-Air (OTA) solution with S32K3 MCU Automotive MCU Security and OTA Solution with Cost-Optimized S32K1xx and S32K3xx Automotive MCUs B.R. VaneB
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