Register access protection Hello, Regarding access protection registers (PCNS, PCNP, ICNS, and ICNP) for the MCX A microcontroller, they are mentioned in the user manual, but not described. Would it be available a description for these registers? Thanks! MCXA Re: Register access protection OK. Thanks! Re: Register access protection Hello JosG, Update: As TrustZone is not present on this device, these registers are not used. We will request to correct RM Thanks, Jun Zhang

S32K144 Can·t go to sleep Hi:       When I was using the power management module to put the MCU into sleep, I found that when I turned on the ADC module, or used UART_SendDataBlockinig, the mcu can`t go to sleep. The attachment is my project, I hope to get your help。  IDE:S32DS SDK：RTM4.01 Re: S32K144 Can·t go to sleep Re: S32K144 Can·t go to sleep Hi@ChenPeng3 This is expected, you should disconnect the debugger before MCU into any low power mode. Re: S32K144 Can·t go to sleep Hi@Senlent:            Thank you for your reply, I tried again without debugging and found that the result was correct.but I couldn't get into STOP1 mode when I connected the emulator.This problem is still solved, thank you。 Re: S32K144 Can·t go to sleep Hi@Chenpeng3 You are right, the picture is the result of my attempt to use PTB13 wake-up test. In fact, I tested your demo and after entering STOP1 mode（connect PTB13 to ground, make sure the wake up pin is in a stable state）, the LPUART module does not output anything. Re: S32K144 Can·t go to sleep Hi,@Senlent:     when call POWER_SYS_SetMode(STOP1, POWER_MANAGER_POLICY_AGREEMENT); mcu should stop in standby, but lpuart send "Core frequency" message.you can connect PB13 to VCC or GND, if mcu go to sleep, lpuart should`t have message. thank you Re: S32K144 Can·t go to sleep Hi@ChenPeng3 I have tested your project and it works fine on myside. (I have connect PTB13 to ground.)

如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ 我是 NXP 主板的新手。 我安装了 MCUXpresso IDE，但现在我没有电路板。我安装了 SDK 并为主板创建了项目“hello world”。我建立了我的项目。如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ 我可以在 IDE 中创建一个简单的 C/C++ 项目，构建并运行它吗？ 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ @Alex_Wang 我还有一个问题。我是否可以使用 MIMXRT1060-EVKB 在 tflm_cifar10 中运行 Opencv（我想在 Opencv 中使用一些调整大小的方法）。如果可以，请帮我配置它。谢谢。 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ @Alex_Wang 更改内存映射后，错误不再发生。但模拟运行的时间更长，并没有输出任何东西。也许 Keil/MDK 中 MIMXRT-1060 EVKB 的模拟出了问题。 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ @Alex_Wang 我遵循了您的指南，但是在使用模拟器调试时，出现了与“写入”权限相关的错误，如下所示。 *** 警告：使用 ARM Cortex-M4 模拟器。ARM Cortex-M7 特定功能未建模！ 运行时代码大小限制：32K 加载“ram_0x1400_release\\hello_world.out” *** 错误 65：0xFFFFFFF4 处访问冲突：没有“写入”权限 我创建了 .ini文件来修复它在 0xFFFFFFF4 处的访问冲突 - Keil 论坛 - 支持论坛 - Arm 社区，但它不起作用。 你对我有什么建议吗？谢谢。 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ @Alex_Wang 感谢您的快速回复。我将按照以下步骤检查它是否有效。 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ @Alex_Wang 谢谢。您是否有关于在 Keil uvision 模拟器中运行 SDK 示例的教程？ 据我了解，首先我需要下载适用于 Keil/MDK 的 MCUXpresso SDK，然后在 Keil（模拟器）中以调试模式运行。是吗？ 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ @Alex_Wang 我可能是看了MIMXRT1060-EVK 的教程，里面提到了 SW7。它使用 SW7 来设置启动模式。MIMXRT1060 -EVK 入门 | 恩智浦半导体 当然，谢谢。对于 MIMXRT1060-EVKB，我们需要使用 SW4。 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ @Alex_Wang 感谢您提供详细信息。 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ @Alex_Wang 谢谢。我们正在购买 Mimrt1060。我不记得该董事会的具体名称。我看到 mimrt1060 有两个版本：evk 和 evkb。MIMXRT1060-EVK / EVKB 之间有什么区别？ 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ @ErichStyger谢谢你的帮助。 @Alex_Wang谢谢。我还有一个问题。当我通过微型 USB 电缆将开发板连接到 PC 进行调试时（具体来说，我将运行 TF Lite 模型），我是否需要通过 DC IN 5V 为开发板供电？据我了解，调试时不需要通过 DC IN 5V 为电路板供电。它仅适用于电路板的独立工作。 回复：如何在不连接开发板的情况下在 IDE 中运行“hello world”应用程序演示？ 是的，您可以这样做（但当然不能使用 NXP SDK，因为它适用于目标板/设备）。 您可以使用主机 GNU gcc 编译器/调试器（单独安装）并使用 IDE 构建和调试应用程序，就像任何其他 Eclipse 发行版一样。事实是，您不是在进行交叉开发，而是在进行原生开发。 对于“真正的嵌入式”开发，您需要一个开发板或模拟器，例如QUEMU（ https://www.qemu.org/ ）。

ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? 私はNXPボードの初心者です。 MCUXpresso IDEをインストールしましたが、ボードがありません。SDKをインストールし、ボード用のプロジェクト「hello world」を作成しました。私は自分のプロジェクトを構築しました。ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? IDEで単純なC / C ++プロジェクトを作成し、ビルドして実行できますか? Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? @Alex_Wang  もう一つ質問があります。MIMXRT1060-EVKBとtflm_cifar10でOpencvを実行できるかどうか(Opencvでいくつかのサイズ変更方法を使用したい)。もしそうなら、私がそれを設定するのを手伝ってください。ありがとうございます。 Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? @Alex_Wang  メモリマップを変更した後、エラーは発生しなかった。しかし、シミュレーションの実行時間が長くなり、何も出力されませんでした。Keil/MDKのMIMXRT-1060 EVKBのシミュレーションに何か問題があったのかもしれません。 Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? @Alex_Wang  私はあなたのガイドに従いましたが、シミュレータでデバッグすると、次のように「書き込み」権限に関連するエラーが発生しました。 警告: ARM Cortex-M4シミュレータを使用しています。ARM Cortex-M7固有の機能はモデル化されていません! コードサイズ制限付きでの実行: 32K "ram_0x1400_release\\hello_world.out"を読み込みます エラー 65: 0xFFFFFFF4 でのアクセス違反 : 'write' アクセス許可がありません .iniを作成しましたそれを修正するためのファイル - Keilフォーラム - サポートフォーラム - Armコミュニティでアクセス0xFFFFFFF4違反 - しかし、それは機能しません。 何かおすすめはありますか?感謝。 Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? @Alex_Wang  迅速な対応ありがとうございました。これらの手順に従って、機能するかどうかを確認します。 Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? @Alex_Wang  感謝。SDKからのサンプルをKeil uvisionでエミュレータとして実行するためのチュートリアルはありますか? 私の理解では、まずKeil / MDK用のMCUXpresso SDKをダウンロードしてから、Keil(エミュレータ)でデバッグモードで実行する必要があります。そうなんですか。 Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? @Alex_Wang  MIMXRT1060-EVKのチュートリアルを見たかもしれませんが、このチュートリアルではSW7について言及しています。SW7 でブートモードの設定に使用します。MIMXRT1060-EVK入門 |NXPセミコンダクターズ  もちろん、よろしくお願いいたします。MIMXRT1060-EVKBの場合、SW4を使用する必要があります。 Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? @Alex_Wang  詳細な情報をありがとうございます。 Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? @Alex_Wang  感謝。Mimrt1060を購入しています。ボードの正確な名前は覚えていません。mimrt1060には、evkとevkbの2つのバージョンがあるようです。MIMXRT1060-EVK / EVKBの違いは何ですか? Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? @ErichStygerご協力いただきありがとうございます。 @Alex_Wang感謝。もう一つ質問があります。デバッグのためにマイクロUSBケーブルでボードをPCに接続する場合(具体的にはTF Liteモデルを実行します)、DC IN 5Vでボードに電力を供給する必要がありますか?私の理解では、デバッグのためにDC IN 5Vでボードに電力を供給する必要はありません。これは、ボードのスタンドアロン作業専用です。 Re:ボードに接続せずにIDEで「hello world」アプリのデモを実行するにはどうすればよいですか? はい、これを行うことができます(ただし、ターゲットボード/デバイスの場合と同様に、NXP SDKは使用しません)。 ホストの GNU gcc コンパイラ/デバッガ (別途インストール) を使用し、他の Eclipse ディストリビューションと同様に、IDE でアプリケーションをビルドおよびデバッグできます。問題は、クロス開発ではなく、ネイティブ開発を行っているということです。 「実際の組み込み」開発には、ボードまたはシミュレータが必要になります。QUEMU (https://www.qemu.org/).

eMIOS PWM output disable（OPWMB MODE） hello experts: when (OPWMB mode)PWM dutycylce is 100%, it can not be output disabled by ODIS register. But if the dutycycle <100%,the (OPWMB mode) PWM can be disabled output by ODIS register.Such as the dutycle is 99% the PWM(OPWMB mode) can be disable by ODIS register. And if the PWM mode is OPWFMB,it can be disbled by ODIS when it's dutycle is 100%. why?And have any method to solve？ Re: eMIOS PWM output disable（OPWMB MODE） thanks，it works。i knew how to do。 Re: eMIOS PWM output disable（OPWMB MODE）  I used the demo but not solved problem？ I toggled gpio_34 pin and connect gpio_34 with PTB4(TRGMUX_in,1).when the pwm dutycle is 50%.it can be disabled by ODIS. when the pwm dutycle is 100%.it still can not be disable. Re: eMIOS PWM output disable（OPWMB MODE） Hi@FRIDAY618 This is a test demo i made before and please have a try.

CAN rxフィルタの設定方法 KW38の使用 CAN RXフィルタを作りたい 例: 0x18FFB034 ~ 0x18FFB534 , 0x19FFB028 どうか私を導いてください。 ありがとうございます 日時:CAN rxフィルターの設定方法 [シェルフ解決済み] レジスタに向かって1ビットシフトが必要です。 ベース>RXFGMASK = 0x10FFB034<<1;

usb wake-up Imx93 can't wake up after standby. What should I do to wake up with usb? Re: usb wake-up before enter suspend mode, use the command like echo enabled > /sys/class/tty/ttyLP0/power/wakeup

CLOCK MHZ S32K312 IN CLOCKING OPTION (UNDER HARDWARE SETTINGS ) I AM HAVING 0 MHZ , BUT I HAVE CONFIGURED IT TO S32K312 BOARD  Re: CLOCK MHZ S32K312 Hi, @paul_ephraim_13, The problem you are facing seems to be caused by the non-compliant setting of the configuration project. In the Hardware tab you will find the link from the Configuration Template section, make sure it points to the correct configuration project. After you correctly set the path to the configuration project, the frequency of 120 Mhz should be displayed correctly. Let us know how the check went. Best regards, Dragos

如何设置 CAN 接收过滤器 使用KW38 我想制作一个 CAN RX 过滤器 例如：0x18FFB034 ~ 0x18FFB534 , 0x19FFB028 请指导我。 谢谢！ 回复：如何设置 CAN 接收过滤器 [货架已解决] 需要向寄存器移动 1 位。 基址->RXFGMASK = 0x10FFB034<<1;

How to set CAN rx filter Using KW38 I want to make a CAN RX filter ex: 0x18FFB034 ~ 0x18FFB534 , 0x19FFB028 Please Guide me. Thanks Re: How to set CAN rx filter [Shelf Solved] need 1bit shift toward register. base->RXFGMASK = 0x10FFB034<<1; Re: How to set CAN rx filter Hello @JungkyuHan1 CAN controller affiliated with each node implements a filter that checks the arbitration ID of a broadcast message and either accepts messages when the arbitration ID is within a particular range, or ignores messages outside of that range. Matching to a range of IDs should be possible by using ID acceptance masks. FlexCAN supports individual masking per MB (IRMQ bit set) or global masking scheme (IRMQ cleared).  Although there may not be specific documentation for this scenario, I will recommend you checking the MCUXpresso SDK API Reference Manual_MKW38 included in KW38 SDK documentation > docs folder. Chapter 14 describes the peripheral driver for FlexCAN module; please refer to "Configuration" APIs. Just for reference, you can take a look at the Controller Area Network (CAN) standard - NXP Community. Regards, Eduardo.

nxpimage: how to accept input file on command line instead of config entry Hi, .bd file has the following entry: sources { elfFile = extern(0); } doing this nxpimage expects the name of the input file on the command line. How can I achieve the same behavior using .yaml files? regards Max Re: nxpimage: how to accept input file on command line instead of config entry Hi @mastupristi , The nxpimage -> hab application supports both bd files and YAML configuration files. The bd file support is primarily intended as a backward compatibility solution for customers transitioning from elftosb to spsdk. I recommend using YAML configurations, as this is the standard format across all spsdk applications. Unfortunately, passing the input image via the command line when using YAML configuration is not currently supported. However, we are exploring the possibility of allowing users to override any configuration parameter across all spsdk applications. If implemented, this would enable you to specify the elfFile as a command line parameter when using a YAML file. Please note that this feature has not yet been developed. Let me know if you need any further adjustments!

i.MX93 lcdif. XRGB8888 framebuffer to bus format RGB888 Hello, I observe some flickering and others glitches when trying to setup a parallel LCD with imx93. I attached a picture of the output of the fb-test command. In the yellow rectangles there are glitches around pixels set to print text "GREEN" and "RED". In the yellow circle there is a glitch, as if lines where pixels were set (for the text) were shifted left. fb-test outputfb-test output The framebuffer is configured as XRGB8888 (bpp 32), size 800x480. The bus format is configured as rgb888. The output of the fbset command is : mode "800x480-0" # 😧 0.000 MHz, H: 0.000 kHz, V: 0.000 Hz geometry 800 480 800 480 32 timings 0 0 0 0 0 0 0 accel true rgba 8/16,8/8,8/0,0/0 endmode Device tree node for bus format (MEDIA_BUS_FMT_RGB888_1X24) : &parallel_disp_fmt { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcdif>; fsl,interface-pix-fmt = "rgb888"; status = "okay"; ports { port@1 { reg = <1>; display_out: endpoint { remote-endpoint = <&panel_in>; }; }; }; };   Panel configuration : panel { compatible = "panel-dpi"; power-supply = <&reg_vdd_3v3>; backlight = <&backlight>; panel-timing { clock-frequency = <33260000>; hactive = <800>; vactive = <480>; hfront-porch = <40>; hback-porch = <88>; hsync-len = <128>; vfront-porch = <35>; vback-porch = <8>; vsync-len = <2>; de-active = <1>; pixelclk-active = <1>; }; port { panel_in: endpoint { remote-endpoint = <&display_out>; }; }; }; &lcdif { status = "okay"; }; As far as I know I configured things the right way, but maybe I missed something. Could you please advise ? The driver used is lcdifv3, from linux 6.1.55. Re: i.MX93 lcdif. XRGB8888 framebuffer to bus format RGB888 Hello, I guess this issue is due to clock frequency check your clock. Regards

LVDS not working as per datasheet timing-parameter with TechNexion EDM-G-IMX8MM and WB baseboard Hello to NXP Community,  i am trying to Bring-up  Digiwise's 13-070WMLBIAG1- C  7" display with TechNexion EDM-G-IMX8MM and WB baseboard  custom board.  The changes i did in .dts and panel-simple.c as per datasheet mentioned here. The source code is Android - 11 by https://github.com/technexion-android/. DTS file : ... / dts/freescale/overlays/imx8mm-edm-g-wb-sn65dsi84-vl10112880-overlay.dts fragment@1 { target = <&mipi_dsi>; __overlay__ { status = "okay"; #address-cells = <1>; #size-cells = <0>; panel@0 { reg = <0>; compatible = "tn,dsi2lvds-panel"; backlight = <&lvds_backlight>; power-supply = <&reg_lvds_pwr>; dsi,flags = <0x0007>; dsi,format = <2>; dsi,lanes = <4>; panel-width-mm = <152>; panel-height-mm = <91>; bus-format = <0x1009>; /* MEDIA_BUS_FMT_RGB666_1X18 */ bus-flags = <1>; refresh-rate = <60>; rotate = <0>; /* horz-flip; */ /* vert-flip; */ panel-timing { clock-frequency = <33300000>; hactive = <800>; vactive = <480>; hfront-porch = <204>; hsync-len = <6>; hback-porch = <46>; vfront-porch = <22>; vsync-len = <3>; vback-porch = <23>; /* flags = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH */ vsync-active = <1>; hsync-active = <1>; }; }; }; };   And in .... / drivers/gpu/drm/panel/panel-simple.c static const struct display_timing dsi2lvds_panel_timing = { .pixelclock = { 26400000, 33300000, 46800000}, .hactive = { 800, 800, 800}, .hfront_porch = { 16, 204, 354 }, .hback_porch = { 46, 46, 46 }, .hsync_len = { 1, 6, 40 }, .vactive = { 480, 480, 480 }, .vfront_porch = { 7, 22, 147 }, .vback_porch = { 23, 23, 23 }, .vsync_len = { 1, 3, 20 }, .flags = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH, }; /* * @modes: Pointer to array of fixed modes appropriate for this panel. If * only one mode then this can just be the address of this the mode. * NOTE: cannot be used with "timings" and also if this is specified * then you cannot override the mode in the device tree. * @num_modes: Number of elements in modes array. * @timings: Pointer to array of display timings. NOTE: cannot be used with * "modes" and also these will be used to validate a device tree * override if one is present. * @num_timings: Number of elements in timings array. * @bpc: Bits per color. * @size: Structure containing the physical size of this panel. * @delay: Structure containing various delay values for this panel. * @bus_format: See MEDIA_BUS_FMT_... defines. * @bus_flags: See DRM_BUS_FLAG_... defines. * @refresh_rate: Refresh rate, e.g. 60MHz * @rotate: Rotation, e.g. 0, 90, 180, 270 degrees * @hflip: Horizontal flip, e.g. flip horizontally * @vflip: Vertical flip, e.g. flip vertically */ static const struct panel_desc_dsi dsi2lvds_panel = { .desc = { .timings = &dsi2lvds_panel_timing, .num_timings = 1, .bpc = 6, .size = { .width = 152, .height = 91,}, .bus_flags = DRM_BUS_FLAG_DE_LOW, }, .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS, .format = MIPI_DSI_FMT_RGB666, .lanes = 4, }; in result adb shell  >> dmesg  edm_g_imx8mm:/ # dmesg | grep -i dsi [ 0.625461] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to get blk_ctl [ 0.625627] imx_sec_dsim_drv 32e10000.mipi_dsi: version number is 0x1060200 [ 0.625913] imx_sec_dsim_drv 32e10000.mipi_dsi: Failed to attach bridge: 32e10000.mipi_dsi [ 0.634275] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to bind sec dsim bridge: -517 [ 0.916209] sn65dsi84 0-002d: Valid sn65dsi84 chip id [ 0.952430] sn65dsi84 0-002d: Soft reset to default [ 1.080725] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to get blk_ctl [ 1.080853] imx_sec_dsim_drv 32e10000.mipi_dsi: version number is 0x1060200 [ 1.081031] panel-simple-dsi 32e10000.mipi_dsi.0: >>>>Initial DSI config: flags = 1025, format = 1, lanes = 4 [ 1.081040] panel-simple-dsi 32e10000.mipi_dsi.0: >>>>Final DSI config: flags = 7, format = 2, lanes = 4 [ 1.081045] panel-simple-dsi 32e10000.mipi_dsi.0: panel-desc-dsi setting overridden from dt [ 1.081057] panel-simple-dsi 32e10000.mipi_dsi.0: panel-desc setting overridden from dt [ 1.081187] panel-simple-dsi 32e10000.mipi_dsi.0: Found suitable override. [ 1.081251] imx-drm soc@0:bus@32c00000:display-subsystem: bound 32e10000.mipi_dsi (ops imx_sec_dsim_ops) [ 1.084469] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 1.084479] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 [ 1.106707] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 1.106713] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 [ 14.191421] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 14.191432] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 [ 15.078433] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 15.078442] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 [ 15.528918] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 15.528927] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 and here is screenshot :  * >>> However below mentioned changes in  panel-simple.c  :  static const struct panel_desc_dsi dsi2lvds_panel = { .desc = { .timings = &dsi2lvds_panel_timing, .num_timings = 1, .bpc = 8, .size = { .width = 165, .height = 105, .width = 152, .height = 91, }, .bus_flags = DRM_BUS_FLAG_DE_LOW, }, static const struct panel_desc_dsi dsi2lvds_panel = { .format = MIPI_DSI_FMT_RGB888, .lanes = 4, }; i got this result :  Despite this, I am facing issues with display initialization, and the panel does not seem to power up as expected. Could someone please assist me in reviewing the device tree configuration or suggest any required changes in the driver code (panel-simple.c) or other areas to help resolve this issue?  Additionally, any insights on changes that may be required in the SN65DSI84 bridge configuration or the DRM driver (panel-simple.c) would be appreciated. Thank you for your support! Best regards,  Ajaysinh.  Android Graphics & Display HW-Open-Source i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Linux Re: LVDS not working as per datasheet timing-parameter with TechNexion EDM-G-IMX8MM and WB baseboard The display issue was resolved by configuring the pixel format to RGB888 and setting the SN65DSI84 bridge register at 0x18 to a value of 0x72. This setup aligned the display's colour depth and timing parameters correctly, providing stable and accurate display output. thanks to @ Chavira for look at this ticket.  Re: LVDS not working as per datasheet timing-parameter with TechNexion EDM-G-IMX8MM and WB baseboard Hi @ajaysinh9484! Thank you for contacting NXP Support! For this case I recommend to contacting Technexion support they should have a patch or device tree using that display. Best Regards! Alejandro

PN7160 devkit power(?) issue I'm working with a PN7160 devkit, the OM27160A1HN (I2C version), connected to a Karo QS93 which features an i.mx93 processor. The issue I'm encountering has to do with the two voltage inputs of the devkit (screenshot from the devkit user manual): It can be seen that both VDD(PAD) and VDD(UP)/VBAT are supposed to work with a 3.3V input. But the issue I'm running into, is that the devkit can't detect a tag, when using this 3.3V input voltage. ONLY when providing VDD(UP)/VBAT with 5V from the Karo QS93, the devkit will actually detect the tag and can successfully read its data. When providing this pin with 3.3V the tag CAN NOT be detected. Regarding the software: I use the libnfc-nci library and the provided nfcDemoApp to verify the devkit. Link to the library: https://github.com/NXPNFCLinux/linux_libnfc-nci I run the demoApp with the 'poll' argument, and the tag is only detected and read out successfully, when using 5v for VDD(UP)/VBAT. With 3.3V, nothing happens, whatever I try. The demoAPP is just stuck on "waiting for tag" in that case. I've read through all the related documentation and have not been able to find any remarks that address this issue. So for now I'm a bit stuck on this, any help would be greatly appreciated! Re: PN7160 devkit power(?) issue Disabling the TXLDO check indeed resolved the issue. Thanks alot! Re: PN7160 devkit power(?) issue Hi @kowalski_analysis  There is a very similar issue described in AN13892.   It could happen that PN7160 can not generate an RF field due to bad power supply on VUP/TVDD or a bad power configuration.  Typically happens once 3.3V as the VUP has been used.  https://www.nxp.com/docs/en/application-note/AN13892.pdf -> 9 TXLDO check   Can you try to disable the TXLDO check?  Regards Daniel

TJA1145 SPI read/write in S32G LLCE_CAN Dear NXP fellows, In our development board based on S32G399ARDB3 we are using 6 TJA1145ATK/FD CAN transceiver connected to DSPI1 pins of the S32G399A microcontroller: We are using the LLCE_CAN interface for accessing these CAN transceivers. Differently from the original TJA1153, the TJA1145 uses SPI communication for Partial Networking state transition (OFF - STANDBY - SLEEP - ACTIVE modes): But what I don't understand is how to use SPI to control these state changes. Do I need to provide a Linux driver for TJA1145? Can someone provide me a basic walkthrough on how to enable this CAN transceiver on S32G399A LLCE_CAN interface? Thank you very much for the support. Best regards, Guilherme Re: TJA1145 SPI read/write in S32G LLCE_CAN Hello, Just to update. I found the Linux kernel patches for supporting TJA1145 here: https://github.com/sitec-systems/meta-sitec-s4/tree/19de081f9539abeab060afb8787a99399cf3c535/meta-sitec-s4/recipes-kernel/linux/files And that allowed me to build the tja1145.c into the Kernel (5.15.153-rt). Added the following line to the drivers/net/can/Makefile: obj-$(CONFIG_TJA1145) += tja1145.o Added the following entry to drivers/net/can/Kconfig: config TJA1145 tristate "TJA1145 CAN-Transceiver driver" select REGMAP_SPI depends on SPI_MASTER help Say Y here if you want to use the TJA1145 CAN Transceiver. TODO advanced description. Added the following entry to arch/arm64/configs/s32cc_defconfig: CONFIG_TJA1145=y Added the following Device Tree node to arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtsi &spi1 { pinctrl-names = "default"; pinctrl-0 = <&dspi1_pins>; #address-cells = <1>; #size-cells = <0>; status = "okay"; spidev0: spidev@0 { spi-max-frequency = <1000000>; reg = <0>; spi-cpha; compatible = "nxp,tja1145"; }; }; And then I successfully enabled CAN communication with the TJA1145. Thanks for your support, Best regards, Guilherme Re: TJA1145 SPI read/write in S32G LLCE_CAN Hello, @GuilhermeS32G  You are welcome. If any other issues, welcome to submit new ticket on the board, we are happy to support. BR Chenyin Re: TJA1145 SPI read/write in S32G LLCE_CAN Hello @chenyin_h , Ok, I understand now. Thank you for clarifying. Best regards, Guilherme Re: TJA1145 SPI read/write in S32G LLCE_CAN Hello, @GuilhermeS32G  Sorry that I do not think there are document related since it is very specific case and should be disigned by the user. What I mean for the sequence is that you may need to put a spi operation before loading the LLCE-CAN driver according to your own requirements, when resuming from STR, you may have to also confirm that the SPI operation is done before reloading the LLCE driver. Again, thanks for @XD 's valuable input. BR Chenyin Re: TJA1145 SPI read/write in S32G LLCE_CAN Hello @chenyin_h , Thank you for the feedback. In this case, what is the correct way of configuring the driver loading sequence? Is there a document that specifies this operation? Best regards, Guilherme Re: TJA1145 SPI read/write in S32G LLCE_CAN Hi @XD , Thank you for your help. Following your advice, I have enabled spidev on the spi1 interface and now I can see that /dev/spidev1.0 is available. The next step is to write this user-space program for accessing the correct registers and writing the required changes to the specific addresses. I will be working on it. Best regards, Guilherme Re: TJA1145 SPI read/write in S32G LLCE_CAN Hello, @GuilhermeS32G  Thanks for sharing the schematic, I could understand your point. You may use the spi to firstly switch the state, and then to load the llce-can driver, but you may be careful with the driver loading sequence while the system resumed from STR. I agree with @XD 's valuable input, the spidev interface is useful for accessing the spi devices in Linux. BR Chenyin Re: TJA1145 SPI read/write in S32G LLCE_CAN Hi @GuilhermeS32G , Our customized board uses a similar partial network transceiver but from a different vendor. Unfortunately, the board hasn’t returned yet, so I haven’t been able to verify this process. Here’s what I plan to do, just for your reference: Device Tree Entry: Add your CAN transceiver to the device tree under the relevant DSPI entry. For SPI access, you can use compatible = "spidev"; This should allow you to interact with the transceiver via /dev/spidevX.X, where X.X is the SPI bus and chip select. Driver Requirement: You may not need a dedicated kernel driver. Instead, you can control the CAN transceiver directly from user space. For example, you can modify the transceiver's registers to switch its mode from standby to normal using a simple user-space program. You can refer to tools/spi/spidev_test.c in the kernel source as an example for how to interact with SPI devices. Thanks, XD Re: TJA1145 SPI read/write in S32G LLCE_CAN Hello @chenyin_h , Thank you for your response, So, just for clarifying. Our board has 16 CAN transceivers in total, being: 10x TJA1057; 6x TJA1145. All 16 transceivers are using LLCE_CAN interfaces. I was able to enable LLCE_CAN feature and include all the required firmware files in the built Yocto image. What happens is that the TJA1057 is a simple CAN transceiver, it does not support standby or sleep mode, so the communication on these transceiver is occurring normally. However, the TJA1145 supports Partial Networking, and it required the SPI communication for state transition. Whenever I try to set any of these llcecan interfaces connected to TJA1145 up, I get an error: Failed the transition to LLCE_CAN_T_START state This is due to the lack of a driver for controlling the state changes via SPI. Here is a picture of one of these CAN transceivers from our schematic: As you can see, the RXD and TXD are connected to LLCE_CAN3, and the pins concerning state transition are connected to DSPI1. Does that mean that if I can provide a driver for TJA1145 it may work properly? Is there any specific change to be made in LLCE_CAN configuration? Thank you for the support, Best regards, Guilherme Re: TJA1145 SPI read/write in S32G LLCE_CAN Hello, @GuilhermeS32G  Thanks for your post. From my experience, if so, a Linux device driver may be needed(whether it is a kenel driver or user space driver). I do not see such reference code from the latest BSP, but I ever know that someone has done something with a iMX platform via socketcan: https://community.nxp.com/t5/i-MX-Processors/SocketCAN-and-TJA1145-Transceiver/m-p/1008601 However, the link from this thread is invalid. The TJA1145 connected to the board via SPI, not LLCE-CAN, for using the LLCE-CAN from Linux, it is detailed described under chapter 11 of BSP41 UM, you may directly use the llce-canx interface to send/receive frames once finished the settings. BR Chenyin

PCF85263 RTC I2C Communication Issue - All Registers Returning 0x00 Hi, I'm configuring the PCF85263 RTC and encountering an issue where all registers return 0x00 when I attempt to read them via I2C. Here’s my setup and the steps I’ve followed: HW setup: - PCF85263 rtc connected to a Quectel BG95-m3 module. - pull-up resistors are present Issue: - I have tried to write different commands to different registers but when verifying the registers state they all return as 0x00 Steps I have taken: - I have confirmed that the rtc gets 1.8v on VDD, SDA and SCL using a multimeter. - Tested on two separate devices. My code is in the attached file(set_alarm function gets called). Is there some step I'm missing in the configuration? Thanks in advance. Re: PCF85263 RTC I2C Communication Issue - All Registers Returning 0x00 Thank you, forgot to answer... Got a logic analyzer and looking at the addresses I found out that I had to use the 0x51 address as is. Our other sensors required the R/W bit included in the address so I thought this one also needed. Re: PCF85263 RTC I2C Communication Issue - All Registers Returning 0x00 Hi Oscar, If you have a logic analyzer or an oscilloscope, could you please share some screenshots to check what is going on the bus? It should also help us to verify each I2C operation's acknowledgment. If a command is not acknowledged, subsequent operations could fail. Looking at your code, the I2C device address being used is correct. Just verify if the I2C library expects this 7-bit address (0x51) and automatically handles the read/write bit. BRs, Tomas

UART3 overrun error occurs RT1020 Hi, I'm using uart3 interrupt of RT1020 ,i'm using uart3 for rs-485 communication and its speed is 3MBps. Also, I'm using LPSPI4 CMSIS driver handler for other communication . Individually uart3 works fine but after adding spi handler , it will start occurring Overrun. Still im clearing overrun flag but why this flag is getting set . Also ,one query when this flag set ,in this case will i receive all data or lost   ? i.MXRT 102x Re: UART3 overrun error occurs RT1020 Hi @hanmant  Thanks for your reply.  According to NXP's policy, I can not send you the source code directly . My verification code is based on MIMXRT1020-EVK and MIMXER1064-EVK board, I do not think my verification code suitable for your customized board. Also, I have sent you a screenshot of the critical code about your question.  I merge the following three project into my verification project. For MIMXRT1020-EVK board: 1: evkmimxrt1020_pit 2: evkmimxrt1020_lpi2c_edma_b2b_transfer_master 3:evkmimxrt1020_lpuart_edma_transfer For MIMXRT1064-EVK board: 1: evkmimxrt1064_lpi2c_edma_b2b_transfer_slave If your I2C program still doesn't work properly, I suspect that there might be some issues with your I2C program. I suggest you disable other functions and test the I2C alone to see if it works normally. I think the current issue I have solved. Please tell me to close this case. If you still have problem, Please create a new case, thanks. BR mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu, Thanks for your valuable suggest. Can you please share your code with me. Re: UART3 overrun error occurs RT1020 Hi @hanmant , I use MIMXRT1020-EVK board  as edma_b2b_transfer_master, MIMXRT1064-EVK board as edma_b2b_transfer_slave.   I create a project based on  MIMXRT1020-EVK board, I set this board as I2C master, add UART TX, UART RX, totally using 4 DMA channels.   I modify some code  both of MIMXRT1020-EVK project  and MIMXRT1064-EVK project.  The result is both projects run Okay. So please check your code, the critical code I have shown you bellow.  Please try it, and tell me to close this case. If you still have question, Please create a new case. BR mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu , Thanks for reply. I'm using bare matel not freeRTOS. Please bare board project and check. Re: UART3 overrun error occurs RT1020 Hi @hanmant , Thanks for your reply, I will try do it on my side. Please let me know if your project is using the FreeRTOS operating system or using a bare board. I will try to create a project as you do and validate , It is very import. Please keep patience,thanks. BR mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu, Thank for reply. Can you simulate these things at your side by just adding Two DMA's one is UART and another is I2C and check priority get conflicts or not Re: UART3 overrun error occurs RT1020 Hi @hanmant , Thanks for the reply. If you do not mind, Please create a new case because current case list too much item. If you want your modules work well with DMA, especially some modules need to be processed in a timely manner, you should consider the prioritization of all DMA channels used. I do not know your project and DMA priority configuration. So please send me your code if it is convenient. If not convenient, I suggest you consider this two function, double check the parameters. void EDMA_SetChannelPreemptionConfig(DMA_Type *base, uint32_t channel, const edma_channel_Preemption_config_t *config) NVIC_SetPriority Wish it helps you. If you still have question about it, please kindly let me know. BR  mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu, Thank for reply. Can please tell me how to resolve this issue. Still I'm facing this DMA priority issue. Re: UART3 overrun error occurs RT1020 Hi @hanmant , Thanks for your update. I rechecked your reply, I think you are right. Most likely, it is because conflicting priority between I2C DMA and UART DMA. Wish it helps you. If you still have question about it, please kindly let me know. Best Regards mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu, Thank for update, My custom board RT1020 is i2c master and it is connected with slave DAC and it is works fine. But my problem is when i'm tried to add the channel priority(EDMA_SetChannelPreemptionConfig) config code then the code will stuck into i2c dma. Re: UART3 overrun error occurs RT1020 Hi @hanmant , Thanks for your update. The reason of your Application got stuck  is the I2C master node of your development board needs to be connected to the I2C slave node. I verified it with my development board, and if I don't connect to the I2C slave node, I get an error  as you. If I use two development board, one is "lpi2c_edma_b2b_transfer_master", the other is "lpi2c_edma_b2b_transfer_slave". connect two boards correctly, the program run well.   You can create a "lpi2c_edma_b2b_transfer_master" project and don't add any other code to validate. Best Regards mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu, This is "lpi2c_edma_b2b_transfer_master" my whole project name under this name i have added all modules like uart dma ,spi and i2c dma etc. When i removed priority related then application works fine Re: UART3 overrun error occurs RT1020 Hi @hanmant , I do not think this problem related with current case subject" UART3 overrun error occurs RT1020". I import SDK demo as you do, I find that this demo "lpi2c_edma_b2b_transfer_master" need  lpi2c instance on the other board as slave. Because of no I2C slave,  lpi2c_master_callback can not be called, so you application got stuck. BR mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu1  Thanks for update. it is getting stuck into I2c DMA. here i have one question : Is it conflicting priority between I2C DMA and UART DMA  but in I2C DMA i have not set the Priority. Re: UART3 overrun error occurs RT1020 Dear @hanmant , Thanks for the update.  you said your whole application got stuck when you add the functions. Can you tell me the detail information when your whole application got stuck. 1: where your application got stuck, Please tell me which function. 2: when your application got stuck, Please read your RT1020 Registers, Faults, Peripherals status, check whether something unusual. The following Fig is just a demo to help you check the problem. Wish it helps you! Best Regards mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu This piece of code is not working ,means when i add this lines code in my code then whole application got stuck const edma_channel_Preemption_config_t Channel_preemption_config = { .enableChannelPreemption = false, .enablePreemptAbility = true, .channelPriority = 15U }; const edma_channel_Preemption_config_t Channel14_preemption_config = { .enableChannelPreemption = false, .enablePreemptAbility = true, .channelPriority = 14U }; EDMA_SetChannelPreemptionConfig(EXAMPLE_LPUART_DMA_BASEADDR,LPUART_TX_DMA_CHANNEL, &Channel_preemption_config); EDMA_SetChannelPreemptionConfig(EXAMPLE_LPUART_DMA_BASEADDR, LPUART_RX_DMA_CHANNEL, &Channel14_preemption_config); Note: with this uart DMA there is another i2c DMA also there but i have not set priority of i2c DMA Re: UART3 overrun error occurs RT1020 Dear @hanmant , I wish you success, and also I have a little advice. It is better put NVIC_SetPriority function after LPUART_TransferCreateHandleEDMA function. I'm waiting for your good news. Best Regards mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu, Thank you for reply lpuart_config_t lpuartConfig; lpuart_transfer_t sendXfer; lpuart_transfer_t receiveXfer; edma_config_t userConfig = {0}; uint32_t uiCnt = 0; /* Initialize the LPUART. */ /* * lpuartConfig.baudRate_Bps = 115200U; * lpuartConfig.parityMode = kLPUART_ParityDisabled; * lpuartConfig.stopBitCount = kLPUART_OneStopBit; * lpuartConfig.txFifoWatermark = 0; * lpuartConfig.rxFifoWatermark = 0; * lpuartConfig.enableTx = false; * lpuartConfig.enableRx = false; */ LPUART_GetDefaultConfig(&lpuartConfig); lpuartConfig.baudRate_Bps = UART3_BAUDRATE; lpuartConfig.enableTx = true; lpuartConfig.enableRx = true; LPUART_Init(DEMO_LPUART, &lpuartConfig, DEMO_LPUART_CLK_FREQ); // Set NVIC priority for the DMA interrupt to highest priority NVIC_SetPriority(DMA0_DMA16_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0)); // Highest priority for DMA0 interrupt // DMA1_DMA17_IRQn #if defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT /* Init DMAMUX */ DMAMUX_Init(EXAMPLE_LPUART_DMAMUX_BASEADDR); /* Set channel for LPUART */ DMAMUX_SetSource(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_TX_DMA_CHANNEL, LPUART_TX_DMA_REQUEST); DMAMUX_SetSource(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_RX_DMA_CHANNEL, LPUART_RX_DMA_REQUEST); DMAMUX_EnableChannel(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_TX_DMA_CHANNEL); DMAMUX_EnableChannel(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_RX_DMA_CHANNEL); #endif /* Init the EDMA module */ EDMA_GetDefaultConfig(&userConfig); #if defined(BOARD_GetEDMAConfig) BOARD_GetEDMAConfig(userConfig); #endif EDMA_Init(EXAMPLE_LPUART_DMA_BASEADDR, &userConfig); EDMA_CreateHandle(&g_lpuartTxEdmaHandle, EXAMPLE_LPUART_DMA_BASEADDR, LPUART_TX_DMA_CHANNEL); EDMA_CreateHandle(&g_lpuartRxEdmaHandle, EXAMPLE_LPUART_DMA_BASEADDR, LPUART_RX_DMA_CHANNEL); #if defined(FSL_FEATURE_EDMA_HAS_CHANNEL_MUX) && FSL_FEATURE_EDMA_HAS_CHANNEL_MUX EDMA_SetChannelMux(EXAMPLE_LPUART_DMA_BASEADDR, LPUART_TX_DMA_CHANNEL, DEMO_LPUART_TX_EDMA_CHANNEL); EDMA_SetChannelMux(EXAMPLE_LPUART_DMA_BASEADDR, LPUART_RX_DMA_CHANNEL, DEMO_LPUART_RX_EDMA_CHANNEL); #endif // Set DMA channel priorities // EXAMPLE_LPUART_DMA_BASEADDR->DCHPRI[LPUART_TX_DMA_CHANNEL] = (EXAMPLE_LPUART_DMA_BASEADDR->DCHPRI[LPUART_TX_DMA_CHANNEL] & ~DMA_DCHPRI_CHPRI_MASK) | DMA_DCHPRI_CHPRI(15); // EXAMPLE_LPUART_DMA_BASEADDR->DCHPRI[LPUART_RX_DMA_CHANNEL] = (EXAMPLE_LPUART_DMA_BASEADDR->DCHPRI[LPUART_RX_DMA_CHANNEL] & ~DMA_DCHPRI_CHPRI_MASK) | DMA_DCHPRI_CHPRI(15); // EXAMPLE_LPUART_DMA_BASEADDR->DCHPRI0 const edma_channel_Preemption_config_t Channel_preemption_config = { .enableChannelPreemption = false, .enablePreemptAbility = true, .channelPriority = 14U }; const edma_channel_Preemption_config_t Channel14_preemption_config = { .enableChannelPreemption = false, .enablePreemptAbility = true, .channelPriority = 15U }; EDMA_SetChannelPreemptionConfig(EXAMPLE_LPUART_DMA_BASEADDR,LPUART_TX_DMA_CHANNEL, &Channel_preemption_config); EDMA_SetChannelPreemptionConfig(EXAMPLE_LPUART_DMA_BASEADDR, LPUART_RX_DMA_CHANNEL, &Channel14_preemption_config); /* Create LPUART DMA handle. */ LPUART_TransferCreateHandleEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, LPUART_UserCallback, NULL, &g_lpuartTxEdmaHandle, &g_lpuartRxEdmaHandle); Im thinking to use this way . Re: UART3 overrun error occurs RT1020 Hi @hanmant , Please review the differences between the following definitions and use them according to your needs. EDMA_SetChannelPreemptionConfig: It is primarily used to configure the preemption priority of DMA channels, ensuring the most important task can be processed first, when multiple DMA tasks happened at the same time. NVIC_SetPriority:  It is used to set the priority of interrupts, ensuring that high-priority interrupts can be responded to and processed by the CPU first when multiple interrupts happened at the same time. Best Regards mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu, I'm thinking add this way, const edma_channel_Preemption_config_t Channel_preemption_config = { .enableChannelPreemption = false, .enablePreemptAbility = true, .channelPriority = 14U }; const edma_channel_Preemption_config_t Channel14_preemption_config = { .enableChannelPreemption = false, .enablePreemptAbility = true, .channelPriority = 15U }; EDMA_SetChannelPreemptionConfig(EXAMPLE_LPUART_DMA_BASEADDR,LPUART_TX_DMA_CHANNEL, &Channel_preemption_config); EDMA_SetChannelPreemptionConfig(EXAMPLE_LPUART_DMA_BASEADDR, LPUART_RX_DMA_CHANNEL, &Channel14_preemption_config); is it correct or not. please confirm Re: UART3 overrun error occurs RT1020 Hi @hanmant ， Thank you for your updated information. I suggest you can use NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)function. 1: The first parameter is IRQn_Type: It depends on your design, if UART3 using DMA channel 0(#define LPUART_TX_DMA_CHANNEL 0U), then the first parameter is DMA0_DMA16_IRQn. 2:The second parameter is priority, The lower value, the greater the priority  of the corresponding interrupt. Best Regards mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu, Can you please tell me how to set Highest the Priority to DMA controller over CPU. Also in DMA i want set the highest priority to UART receive and TX than SPI. Please tell me the process and API's or any examples. Re: UART3 overrun error occurs RT1020 Hi @hanmant  Just add a delay function, I have shown to you.  SDK_DelayAtLeastUs(100000, CLOCK_GetFreq(kCLOCK_CpuClk)); 1：In addition, I suggest you check whether the data format for UART sending and receiving is consistent. 2：Please confirm whether your NXP development board and TI development board share a common ground. 3：Please confirm whether the connection between UART transmission and reception is secure. BR  mayliu Re: UART3 overrun error occurs RT1020 Thanks for reply. Can you please share your source code files. Re: UART3 overrun error occurs RT1020 Hi @hanmant  I think I know the reason of the problem. Continuous data transmission in your program can cause Ti board UART receiver overrun, resulting in abnormal data transfer. I suggest adding a delay after sending 52 bytes UART data, Please try it. I have tested and verified this 100 times on my end, and the data sending and receiving are consistent.  Wish it helps you. If you still have question about it, please kindly let me know. Re: UART3 overrun error occurs RT1020 Hi @mayliu1 , Thanks for reply. As of now im not using uart receiver . whatever i shared with is only uart transmit only (size 52 buffer)but i dont receive correct data on my Ti board using dma. Re: UART3 overrun error occurs RT1020 Hi @hanmant  Thank you for your updated information. As you said, if you only send UART data, why you ask me UART overrun error happened. UART overrun error is related with UART receive. and if you want to send UART data, It is very simple, just call LPUART_SendEDMA. BR mayliu Re: UART3 overrun error occurs RT1020 Thanks for reply. In this project i only send the data using DMA uart . So the my receiver is Ti processor device. I think priority does not matter in this example because here only DMA Uart is running. I have tried to send 2 bytes of data but still same issue . Give me solid solution to work this because this simple uart DMA transmission . Re: UART3 overrun error occurs RT1020 Hi @hanmant  Thank you for your updated information. Can you tell me when and where you call the DMA UART receive function interface? "In the source files(lpuart_edma_transfer.c) you sent, I didn't see any calls to the DMA UART data receive interface." Please try to verify it according to the steps shown below. 1: Set the DMA_UART interrupt priority to be higher than other modules. 2: Use ping pong buffer to receive UART data. Wish it helps you. If you still have question about it, please kindly let me know. Best Regards mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu1 , As per your suggestion i configured uart in DMA but still see the losses. I can see clear losses at receiver side(my receiver is another device comport). Re: UART3 overrun error occurs RT1020 Hi @hanmant  I highly recommend you using the DMA UART , especially when UART baud rate is particularly high. BR mayliu Re: UART3 overrun error occurs RT1020 So , I have to implement DMA uart then? Re: UART3 overrun error occurs RT1020 Hi @hanmant  Question: This overrun problem is coming after inclusion of spi cmsis handler. Answer: Due to the addition of spi cmsis handler, the entry of UART interrupt will be delayed and the UART data cannot be received in time. BR mayliu Re: UART3 overrun error occurs RT1020 Thanks for reply . This overrun problem is coming after inclusion of spi cmsis handler. Re: UART3 overrun error occurs RT1020 Hi @hanmant  Thanks for your update information. If you use UART interrupt to send and receive UART data, every UART byte will trigger a UART interrupt. Your UART baud rate is very high(3MBps) and will cause frequent entry UART interrupt, which is unreasonable.  I don't recommend you to use the UART interrupt when the UART baud rate is so high. Best Regards mayliu Re: UART3 overrun error occurs RT1020 Hi @mayliu1 , Please Note Currently im not using DMA uart. I'm using uart interrupt. Re: UART3 overrun error occurs RT1020 Hi @mayliu1 , Thanks for reply. Currently im using DMA uart. I'm using uart interrupt. Please see below code snippet. Re: UART3 overrun error occurs RT1020 Hi @hanmant  Thank you so much for your interest in our products and for using our community. Usually, there are various causes of UART overrun errors, and it is necessary to consider various aspects such as data processing speed and interrupt processing. In order to better help you solve the problem, please reply to the question below. First, Please tell me which DMA_UART interface function you call to receive UART data Second, Please tell me where and when you call DMA_UART interface function. I have a few suggestions for you. 1: Set the DMA_UART interrupt priority to be higher than other modules. 2: Use ping pong buffer to receive UART data. Wish it helps you. If you still have question about it, please kindly let me know. Wish you a nice day!   Best Regards mayliu

[IMX8MP] rpmsg vqueue 割り込みが発生しない こんにちは、私はLinuxとベアメタルM7ファームウェア間の通信で私が持っているいくつかの奇妙な動作を理解しようとしています。 私はrpmsgエンドポイントとchardeviceを実装するカーネルモジュールを持っています。ユーザースペースアプリケーションは ioctls 呼び出しを行い、モジュールはリクエストを rpmsg メッセージに変換します。 M7コードでは、単純なリングバッファを使用してenv-queue-*コードを実装しました。 システムは動作しますが、ユーザー空間がメッセージを送信する速度が速すぎると、バッファが最終的にいっぱいになり、システムは 15 秒間フリーズします。カーネルのrpmsgコードを調べると、15sは空きtxバッファを待機するタイムアウトであることがわかりました。しかし、uartロギングが有効になっていても、私のM7はバッファを空にする数ミリ秒でキューに入れられたすべての操作を実行しています。 Linux側では、15秒の期間に「wait_event_interruptible_timeout」で待たされたイベントが上がらないようです...そのため、VirtualQueueコールバックが呼び出されていません。 これを修正する方法がわかりません。 助けてくれてありがとう Re: [IMX8MP] rpmsg vqueue 割り込みが発生しない 問題を見つけました。デフォルトの設定ファイルでRL_ALLOW_CONSUMED_BUFFERS_NOTIFICATIONが1と等しいと定義されていないことを見逃していました サポートに感謝します

FreeRTOS to Azure RTOS? Hello,  I am using a MIMXRT1170-EVKB with a m.2 Bluetooth and WIFI module. I was looking at the Edgefast Bluetooth examples and I notice that they all use FreeRTOS. I was hoping to use AzureRTOS. Is there a way to port in AzureRTOS into the Edgefast Bluetooth examples instead of FreeRTOS? Any suggestions and help would be great! 回复： FreeRTOS to Azure RTOS? Hi @MNNgyn , Thanks for your interest in NXP MIMXRT series! The Edgefast BT project for the RT1170 is built on FreeRTOS, which for some historical reasons is currently the most widely supported RTOS in NXP's SDK. Additionally, some  AzureRTOS examples are provided for users to learn from and use. Howerver there is no clear guidance document on how to migrate from FreeRTOS to AzureRTOS. There are some documents about AzureRTOS in the SDK that may be helpful for you to understand it, you can find them here:SDK_2_15_000_MIMXRT1170-EVK\docs\AzureRTOS Sorry for any inconvenience, and you're welcome to raise specific needs and considerations that require such a migration, and we'll help you get the voice of the customer back internally. Best regards, Gavin

[IMX8MP] rpmsg vqueue interrupt not firing Hi, I'm trying to figure out some strange behaviors I'm having with the communication between Linux and bare-metal M7 firmware.  I have a kernel module implementing an rpmsg endpoint and a chardevice. The userspace application makes ioctls calls and the module translates the requests into rpmsg messages.  On the M7 code, I have implemented the env-queue-* code using a simple ring buffer.  The system works, but if the user space sends messages too fast the buffer eventually fills, and the system freezes for 15 seconds. Looking into the rpmsg code in the kernel I found 15s is the timeout waiting for a free tx buffer. But, even with uart logging enabled, my M7 is performing all the queued operations in some milliseconds emptying the buffer. It looks like, on the Linux side, the event waited with "wait_event_interruptible_timeout" is not raised during the 15s period... so the virtualqueue callback is not getting called. I can't figure out how to fix this. Thanks for the help Re: [IMX8MP] rpmsg vqueue interrupt not firing I found the issue. I was missing that RL_ALLOW_CONSUMED_BUFFERS_NOTIFICATION wasn't defined as equal to 1 in the default config file Thanks for the support Re: [IMX8MP] rpmsg vqueue interrupt not firing I'm using the rpmsg-lite framework. I have implemented my ring buffer in env_create_queue, env_delete_queue, env_put_queue, env_get_queue, and env_get_current_queue_size functions in rpmsg_env_bm.c In kernel code, in virtio_rpmsg_bus.c, I tried to remove the event waiting and insert a busy loop This way it will not freeze, but this means there something that's not working in the waking mechanism Re: [IMX8MP] rpmsg vqueue interrupt not firing Hi @Airbus_A320  Looks like your simple ring buffer framework clean the buffer, but you don't let kernel know this. You need notify kernel that you have already released this buffer. You can use rpmsg-lite framework or refer it's code. https://github.com/nxp-mcuxpresso/rpmsg-lite