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使用 TRIGMUX+eMIOS 进行 BLDC 电机方向测量 描述:我正在使用 NXP 推荐的 6 步换向解决方案来驱动我的 BLDC 电机。 根据应用笔记“ https://community.nxp.com/t5/S32M-Knowledge-Base/S32M276-Hall-sensor-based-6-step-BLDC-motor-control/ta-p/2035021#jump_PwmAndTriggers ” 霍尔传感器的输出信号送至 TRIGMUX,然后送至 LCU 进行换向,并用于计算速度信号。本文并未提及如何测量电机旋转方向。 NXP是否有测量电机方向的解决方案?我的理解是,要测量方向,我们需要使用输入采集单元捕获所有 3 个霍尔传感器的输出。 我的 eMIOS 通道是否可以按如下方式配置? CH0 - 输入捕获模式,通过 TRIGMUX 从 LCU 接收速度信号。 CH1 - 输入捕获模式,用于接收 Hall1。 CH2 - 输入捕获模式,用于接收 Hall2。 CH3 - 输入捕获模式,用于接收 Hall3。 请提供一些说明。
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NTAG X DNA AES-128 转 AES-256 AppMasterKey ChangeKey 返回 0x917E 你好, 我正在使用NTAG X DNA开发板,搭配树莓派4B和Adafruit PN532开发板。我正在尝试使用 ChangeKey 在经过身份验证的 EV2 安全消息会话下,将应用程序 AppMasterKey 从出厂默认的 AES-128 全零密钥更改为 AES-256 密钥。 根据数据表修订版,AppMasterKey 的预期更新如下: 使用 AuthenticateEV2First 和 AppMasterKey 0x00 进行身份验证 在 CommMode.Full 模式下发送 ChangeKey 将 KeyNo[7:6] 设置为 11b,密钥类型为 AES256 Encrypt KeyData = NewKey || KeyVer (因为目标密钥是 AppMasterKey )。这应该是一个 32 字节的 AES256 密钥 + 1 字节版本 应用 ISO/IEC 9797-1 方法 2 填充:33 字节纯文本 -> 48 字节 附加 EV2 CMAC 的 8 个偶数字节。 APDU 包含预期的 57 字节数据字段,但标签返回 0x917e 错误,即长度错误 (LENGTH_ERROR)。 我们尝试将 AppMasterKey 从出厂默认的 AES128 密钥更改为非零值,并且成功了。这似乎也不是 PN532 的传输大小限制,因为它能够验证有效负载高达 100 字节的 CryptoRequest 命令,并且验证成功。此外,在ChangeKey命令失败之前,相互认证和EV2会话密钥派生均已成功。 最后,该标签通过 GetVersion 命令将自身标识为 NTAG X DNA。请问最佳方案是什么?将 NTAG X DNA 系列的密钥更改为 AES256 是否存在任何限制或已知问题? 提前致谢。 此致, 否 Re: NTAG X DNA AES-128 to AES-256 AppMasterKey ChangeKey returns  0x917E 您好, 请您使用 Lc 和 Le 的扩展长度字段重复测试吗? 例如:90 C4 00 00 00 00 39 C0<48-byte encrypted data><8-byte CMAC> 00 00 问候, 爱德华多。 Re: NTAG X DNA AES-128 to AES-256 AppMasterKey ChangeKey returns  0x917E 你好@EduardoZamora , 非常感谢您的及时回复。 我们尝试发送的 APDU 为:90c4000039c054d419618197a659d7346b7f7869b0a9972216d077258b6a58320d65019663e3695d16e265f93f594d131818ee9d889c7feb8ac85cb442b400 我们只是想把 K0 从全零 AES128 改为全零 AES256。 希望这能帮到你。如果您需要任何其他信息,请告诉我。 再次感谢。 此致, 否 Re: NTAG X DNA AES-128 to AES-256 AppMasterKey ChangeKey returns  0x917E 你好@n_s 希望你一切都好。 整个流程看起来不错。 不过,完整的原始 APDU 文件仍然很重要;能否请您分享一下您想要发送的完整帧? 问候, 爱德华多。
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NTAG X DNA AES-128からAES-256へのAppMasterKey ChangeKeyの返0x917E こんにちは、 私はNtag X DNAにRaspberry Pi 4BとAdafruit PN532を使っています。認証済みEV2のセキュアメッセージングセッション下で、ChangeKeyを使って、AppMasterKeyの工場出荷時のAES-128オールゼロキーからAES-256キーに変更しようとしています。 データシートの改訂によると、AppMasterKeyの予定されているアップデートは以下のとおりです。 AuthenticateEV2Firstを使用してAppMasterKey 0x00で認証します。 通信モードをフルに設定してChangeKeyを送信します。 KeyType.AES256 の KeyNo[7:6] を 11b に設定します。 KeyData = NewKey || KeyVer を暗号化します(ターゲットキーは AppMasterKey であるため)。これは32バイトのAES256キーと1バイトのバージョンで構成されるはずです。 ISO/IEC 9797-1方法2の適用:33バイト平文-> 48バイト EV2 CMACの偶数バイト8個を追加する APDUには期待通りの57バイトのデータフィールドが含まれているが、タグは0x917eエラー(LENGTH_ERROR)を返した。 AppMasterKeyを工場出荷時のデフォルトキーであるAES128からゼロ以外の値に変更してみたところ、成功しました。また、PN532の転送サイズ制限が原因ではないようです。なぜなら、最大100バイトのペイロードを持つCryptoRequestコマンドの認証に成功しているからです。さらに、相互認証とEV2セッション鍵の導出は、失敗したChangeKeyコマンドよりも先に成功します。 最後に、タグはGetVersionコマンドを通じてNTAG X DNAとして自己認識します。この件について最善の方法についてアドバイスいただけますか?NTAG X DNAシリーズのキーをAES256に変更することに制限や既知の問題はありますか? 前もって感謝します。 よろしくお願いいたします。 N Re: NTAG X DNA AES-128 to AES-256 AppMasterKey ChangeKey returns  0x917E こんにちは、 LicとLeの拡張長フィールドを使ってテストをもう一度行ってもらえますか? 例:90 C4 00 00 00 00 39 C0<48-byte encrypted data><8-byte CMAC> 00 00 よろしくお願いいたします。 エドゥアルド。 Re: NTAG X DNA AES-128 to AES-256 AppMasterKey ChangeKey returns  0x917E こんにちは@n_s あなたの調子が良いといいのですが。 全体的な手順は良好に見える。 それでも、完全な生のAPDUは重要です。送ろうとしているフルフレームをぜひ共有していただけますか? よろしくお願いいたします。 エドゥアルド。 Re: NTAG X DNA AES-128 to AES-256 AppMasterKey ChangeKey returns  0x917E こんにちは、 @EduardoZamora さん、 迅速なご返信、ありがとうございました。 送信しようとしている APDU は次のとおりです: 90c4000039c054d419618197a659d7346b7f7869b0a9972216d077258b6a58320d65019663e3695d16e265f93f594d131818ee9d889c7feb8ac85cb442b400 私たちは、K0をすべてゼロのAES128からすべてゼロのAES256に変更しようとしています。 お役に立てば幸いです。他に何か情報が必要な場合はお知らせください。 再度、感謝します。 よろしくお願いいたします。 N
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S32 Design Studioのライセンスが切れました こんにちは、NXPサポートの皆さん。このメッセージがあなたの元に無事届くことを願っています。私のS32DSライセンスが期限切れになり、現在の開発作業が妨げられています。延長を手伝ってもらえますか? 私の認証ID: 406C-B408-57DB-0C62 製品:ARM v2.2用のS32 Design Studio。 ご返信よろしくお願いします。 SDK
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S32 Design Studio License Expired Hello NXP Support, I hope this message finds you well. My S32DS license has expired, and it’s blocking my current development work. Could you kindly help extend it? My Activation ID : 406C-B408-57DB-0C62.  Product : S32 Design Studio for ARM v2.2. Thank you very much. SDKs
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S32 设计工作室许可证已过期 您好,NXP技术支持,希望您一切安好。我的 S32DS 许可证已过期,这阻碍了我目前的开发工作。您能否帮忙延长一下? 我的激活 ID: 406C-B408-57DB-0C62 。 产品:S32 Design Studio for ARM v2.2。 非常感谢。 SDK
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NCJ29D5 的供电电压容差 你好, 我想知道 NCJ29D5L 的供电电压及其容差,以及数据手册的链接(我在 NXP 网站上找不到)。 多谢 Re: supply voltage with tolerance for ncj29d5 你好, 希望你一切都好。很抱歉给您带来不便,但由于该产品的信息受保密协议(NDA)约束,因此不对外公开。这不是分享该设备任何信息的安全渠道,出于同样的原因,我也没有相关数据。 因此,我建议您联系我们代理商网络|NXP中的一家代理商。或者,如果您有直接联系人曾帮助您了解该产品的信息或最初帮助您获得集成电路,请直接与他/她联系。 由此给您带来的不便,我深表歉意。 顺祝商祺! 里卡多
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supply voltage with tolerance for ncj29d5 hello, I would like to know the supply voltage, including its tolerances, for NCJ29D5L as well as the link to the datasheet (I could not find it on the NXP website). Thanks a lot  Re: supply voltage with tolerance for ncj29d5 Hello, Hope you are doing well. Sorry for the inconvenience this might cause you but as the information of this product it's under NDA (Non-Disclosure Agreement) the information it's not public, this is not a secure channel to share any information of this device, and I do not have the data as well for the same reason. For this reason, I recommend you contacting one of our distributors available in the Distributor Network|NXP. Or if you have a direct contact who helped you with information about this product or getting the IC in a first place, please communicate directly with him/her. I apologize for the inconveniences this might cause you. Best Regards, Ricardo
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ncj29d5の許容範囲付き供給電圧 こんにちは、 NCJ29D5Lの電源電圧とその許容範囲、そしてデータシートのリンク(NXPのウェブサイトでは見つかりませんでした)を知りたいです。 どうもありがとう Re: supply voltage with tolerance for ncj29d5 こんにちは、 あなたの調子が良いといいのですが。ご不便をおかけして申し訳ありませんが、この製品の情報はNDA(秘密保持契約)に基づいており、公開されていません。この情報を共有する安全なチャネルではなく、同じ理由で私もデータを持っていません。 このため、代理店ネットワークに掲載されている当社の代理店のいずれかにご連絡いただくことをお勧めします。NXP。また、この製品やIC取得の際に直接のお問い合わせがいれば、直接連絡を取ってください。 ご迷惑をおかけして申し訳ございません。 よろしくお願いいたします。 リカルド
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S32K328 HyperRAMの低温時の読み書きエラー こんにちは、NXPコミュニティの皆さん、 私たちは、QuadSPIインターフェースを通じてコネクテッドされた64Mbit HyperRAMを搭載したNXP S32K328 S27KL0642DPBHB023を使用しています。 インターフェースは以下の基本構成で動作します:   HyperRAMの電圧 = 3.3V   QuadSPIクロック = 120MHz   インターフェースモード = オクタルDDR   クロックモード = シングルエンドCK   読み取りデータストローブ = 外部RWDS   レイテンシモード = 固定レイテンシ   通常メモリアクセス = メモリマッピングされたAHB 室温ではHyperRAMインターフェースは正常に動作しているようです。 低温、具体的には-40℃までの温度では、読み書き比較エラーが発生することが確認されました。この問題は主にS32K328の温度に関連しているようです。S32K328を冷却すれば誤りを再現できますが、HyperRAMを冷却するだけでは効果ははるかに小さいです。 S32K328 QuadSPIの関連設定は以下のとおりです。 DDR_EN = 1   DQS_EN = 1   外部DQS/RWDS = 選択済み   DQS_OUT_EN = 1   VAR_LAT_EN = 0   FLSHCR.TCSS = 4   FLSHCR.TCSH = 7   FLSHCR.TDH = 1 現在のDLL構成は以下のとおりです。   SLV_DLL_BYPASS = 0   SLAVE_AUTO_UPDT = 1   SLV_EN = 1   SLV_DLY_COARSE = 0   頻度 = 1   DLL_CDL8 = 0   DLLRES = 8   DLL_REFCNTR = 2   SMPR.FSPHS = 0   SMPR.FSDLY = 0   SMPR.DLLFSMPFA = 0 以下のすべての組み合わせをテストしました。   SLV_DLY_OFFSET = 0~7   SLV_FINE_OFFSET = 0~15 低温環境では、テストしたすべてのDLL構成において不具合が発生する。このスイープテストでは、構成間の違いは明らかになるものの、完全にエラーのない動作範囲や、明確に最適なDLLパラメータセットが得られるわけではない。 したがって、この問題がDLL構成自体によるものなのか、それともS32K328 QuadSPIインターフェースの温度依存の別の部分によるものかは現時点では確信が持てません。 以下の質問にご協力いただけますか? 上記に示したS32K328 QuadSPI構成は、120MHzでのHyperRAM動作に適していますか? 選択されたDLLパラメータは、この周波数および全温度範囲に対して適切ですか? 120 MHz の場合、FREQEN、DLL_CDL8、DLLRES、DLL_REFCNTR にはどの値を使用すべきですか? DLLの動作が正しいことを確認するために、どのステータスフラグを監視すべきでしょうか? HyperRAMにアクセスする前にDLLA_LOCKとSLVA_LOCKの両方を確認するべきでしょうか? DLLA_RANGE_ERRまたはFINE_UNDERFLOWはどのように処理すべきですか? QuadSPI DLLや外部DQS経路は低温時に有効範囲外で動作可能でしょうか? DLLの設定は読み取りデータサンプリングのみに影響を与えるのでしょうか、それとも書き込みタイミングにも影響しますか? FLSHCR.TCSS = 4、FLSHCR.TCSH = 7、FLSHCR.TDH = 1 は、120 MHz HyperRAM の動作に適していますか? 120MHzオクタルDDRにおいて、CK、CS#、DQ[7:0]、RWDSに推奨されるパッド設定はどれですか? S32K328に関して、QuadSPI、外部DQS、または低温動作に関連する既知の不具合やRTDの問題はありますか? 120MHz動作に対応した、検証済みのS32K328 HyperRAM初期化例またはレジスタ構成はありますか? S32K328のレジスタやステータス情報の中で、他に確認すべき項目があれば、ご教示いただけると大変助かります。 よろしくお願いします。
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DSP56F807PY80E: ADC reading differs from expected 2048 counts at 1.6 V input Hello NXP Community, I am troubleshooting an ADC offset issue on a board using the DSP56F807PY80E. The following voltages are measured at the device pins: Pins Function Measured voltage 102–109 ANA0–ANA7 inputs 1.60 V 99 and 110 VREF and VREF2 3.20 V 88, 100 and 111 VDDA 3.30 V For a single-ended conversion with no offset correction, I expect approximately 2048 counts, since the input voltage is half the reference voltage: ADC count = (1.60 / 3.20) × 4096 = 2048 However, the ADC readings differ from this expected value. Could someone please advise: Which ADC configuration and offset registers should I check? Could the difference be related to how the ADC result register is read or shifted? What is the recommended procedure to reset or reinitialize the ADC and verify its offset? Any guidance or example initialization code would be appreciated. Thank you for your support. Re: DSP56F807PY80E: ADC reading differs from expected 2048 counts at 1.6 V input Hello @Hari0369 , Thanks for the detailed information. Your calculation is correct for an ideal 12-bit conversion. With a 1.60 V input and a 3.20 V reference, the expected result is about 2048 counts. The first thing I suggest checking is how the ADC result is read. On the DSP56F807, the 12-bit ADC result is stored in ADRSLT bits 14–3. With no offset applied, 2048 counts would appear as about 0x4000 in the raw ADRSLT register. So please shift the raw result right by 3 bits before comparing it with 2048: ADC value = ADRSLTn >> 3 For your test condition, you should see approximately: Raw ADRSLT value : 0x4000 After >> 3       : 0x0800 = 2048 I also suggest checking the following ADC settings: - Check ADLST1/ADLST2 and make sure the correct analog input is selected. - Check ADCR1.CHNCFG and make sure single-ended operation is selected. - Check ADSDIS and make sure the sample slot you are using is enabled. - Check the corresponding ADOFS register. For this test, please set the offset to 0x0000. - Check ADCR2 and make sure the ADC clock and sampling configuration are correct. - Make sure the ADRSLT register you read matches the sample slot you configured.   For a clean test, I suggest using only one ADC channel. First, stop the ADC and wait until ADSTAT.CIP indicates that the ADC is idle. Then disable the unused sample slots and configure one known channel. Set the corresponding ADOFS register to 0x0000 and enable only the sample slot you want to test. After that, start one conversion and save the raw ADRSLT value. Then shift this value right by 3 bits and compare the result with the expected ADC count.   If the result is still different from expected, could you please send us the following values? - ADCR1 - ADCR2 - ADLST1/ADLST2 - ADSDIS - The corresponding ADOFS value - The raw ADRSLT value These values should help us determine whether the difference comes from the result format, ADC configuration, offset setting, or the analog input path. Hope it helps. BR Celeste
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i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12.23 Title: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12.23 Hello NXP Team, I am debugging WiFi initialization on the following setup: Board: NXP i.MX95 19x19 EVK WiFi module: u-blox JODY-W263-00B Android build: AOSP 15 (Android property verification pending) Running kernel: 6.12.23-android16-5-maybe-dirty-4k Exact NXP Android BSP release/tag: not yet confirmed WiFi driver: mlan/moal (MWLAN) Selected firmware: sduart8987_combo.bin SDIO device: mmc2:0001:1 Running kernel information: The SDIO device is detected, and the driver reports “FW download over”. However, the firmware does not become active within the timeout, and the WiFi SDIO probe fails. Relevant boo$ adb shell uname -a Linux localhost 6.12.23-android16-5-maybe-dirty-4k #1 SMP PREEMPT Thu Jan 1 00:00:00 UTC 1970 aarch64 Toybox t logs: [ 10.845985] mlan: loading out-of-tree module taints kernel. [ 10.961712] wlan: Loading MWLAN driver [ 10.973277] wlan: Register to Bus Driver... [ 11.016613] Attach moal handle ops, card interface type: 0x105 [ 11.070275] sta_name=wlan [ 11.086277] uap_name=wlan [ 11.086294] fw_name=sduart8987_combo.bin [ 11.168031] Enable moal_recv_amsdu_packet [ 11.168086] Attach mlan adapter operations.card_type is 0x105. [ 11.257673] wlan: Enable TX SG mode [ 11.257679] wlan: mpa_tx.buf_size=65280 [ 11.257682] wlan: Enable RX SG mode [ 12.226020] Wlan: FW download over, firmwarelen=628200 downloaded 619156 [ 17.279039] FW failed to be active in time! [ 17.286246] wlan_dnld_fw fail ret=0xffffffff [ 17.296825] WLAN: Fail download FW with nowwait: 0 [ 17.502477] woal_request_fw failed [ 17.537460] wlan_sdio mmc2:0001:1: probe with driver wlan_sdio failed with error -1 [ 17.547534] wlan: Register to Bus Driver Done [ 17.553159] wlan: Driver loaded successfully After unloading and reloading the driver, I also observed: [ 4051.080660] fw_name=sduart8987_combo.bin [ 4051.159940] Wlan: FW download over, firmwarelen=628200 downloaded 0 [ 4056.079262] FW failed to be active in time! [ 4056.084697] wlan_dnld_fw fail ret=0xffffffff [ 4056.089909] WLAN: Fail download FW with nowwait: 0 [ 4056.250548] woal_request_fw failed [ 4056.273119] wlan_sdio mmc2:0001:1: probe with driver wlan_sdio failed with error -1 I found this related community discussion: https://community.nxp.com/t5/Wi-Fi-Bluetooth-802-15-4/88W8801-LILY-W131-WiFI-SDIO-chip-not-responding-after-FW/m-p/1986943 The discussion concerns 88W8801 on Nvidia AGX Orin, so it is a different module/platform. The author reported improvement after removing no-sd and changing bus-width from 4 to 1, followed by successful operation with the original configuration. I have not yet tested these changes on my board. Could you please help clarify: Is sduart8987_combo.bin the correct firmware for JODY-W263-00B? Which firmware release and mlan/moal driver revision are recommended for this Android/kernel combination? What are the recommended SDIO device-tree settings for this module on the i.MX95 19x19 EVK, particularly bus width, maximum frequency, pinctrl, power supplies, reset GPIO, and power-sequence delays? Would testing bus-width = <1> or a lower SDIO clock help diagnose this timeout? Is removing no-sd relevant or recommended for this platform? What could cause the firmware activation timeout after the driver reports firmware download completion? Does downloaded 0 after driver reload indicate that a full module power cycle or hardware reset is needed before retrying? Are there known issues or required patches for this board/module/kernel combination? Which additional debug settings, SDIO register dumps, or logs should I collect to distinguish firmware/driver compatibility issues from SDIO communication or power/reset sequencing issues? I can provide the full boot log, relevant device-tree nodes, wifi_mod_para.conf, and exact BSP/driver revisions once confirmed. Thank you. Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hello NXP Team, We have collected further diagnostic evidence for the firmware activation timeout on i.MX95 19x19 EVK with JODY-W263-00B. Hardware mode verification Both register reads succeed: WIFI_DIAG: magic_reg=0xf0 magic_raw=0x24 read_ret=0 WIFI_DIAG: strap_reg=0xf4 strap_raw=0xd2 read_ret=0 WIFI_DIAG: magic=0x24 strap=0x0 WIFI_DIAG: explicit fw_name=sduart8987_combo.bin; skipping automatic selection The masked strap indicates SD-UART mode according to our driver source, consistent with the configured firmware name. Download-loop exit confirmed WIFI_DL_DIAG: exit=zero_request offset=619156 firmwarelen=628200 tries=100 max_tries=100 WIFI_DL_DIAG: base0_reg=0xf8 base0=0x0 base1_reg=0xf9 base1=0x0 last_txlen=16 Wlan: FW download over, firmwarelen=628200 downloaded 619156 Fail to poll firmware status: firmwarestat=0xf005 FW failed to be active in time! The requested-length registers remain zero throughout 100 polling attempts, causing the download loop to exit. Firmware binary inspection Using the source’s 16-byte FWHeader layout and command-length rules, offline parsing identifies a CMD4 record at offset 619140, ending at 619156—exactly matching the download counter. The source defines CMD4 as FW_HAS_LAST_BLOCK. There are 9044 bytes after this record. We have not established their purpose or confirmed that these parsing rules fully describe the SDIO bootloader format. We therefore do not consider the counter difference alone proof of an incomplete download. Additional details: MOAL/MLAN version: 537.p9 Embedded firmware string: w8987o-V0, RF878X, FP92, 16.92.21.p151.4 Firmware size: 628200 bytes SHA-256: db9e2ef58aba5778cddd7b7fbc84a34884bebef076052186e8b0d036e68d9f34 Actual 1-bit SDIO operation was previously verified at 50 MHz, with the same timeout. The latest diagnostic test runs at 4-bit, 50 MHz. Expected firmware READY status is 0xfedc; observed status remains 0xf005. No Wi-Fi network interface is created. Exact NXP BSP release/tag is still being confirmed. Could you please clarify: Is stopping at the CMD4 boundary, offset 619156, expected for this specific image? What is the purpose of the remaining 9044 bytes? What does 0xf005 indicate during SD8987 firmware activation? Is firmware containing version string 16.92.21.p151.4 supported with driver 537.p9 for JODY-W263-00B? Which BSP and firmware/driver package should we use? Which module power/reset timing, supply and reference-clock checks are recommended for this failure? Which additional registers or diagnostics would distinguish a firmware startup failure from a communication or hardware initialization issue? The firmware binary remains unchanged. Our source modifications add diagnostic logging, and full boot logs and source diffs are available. Thank you. Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 One important clarification about the failure stage: The processor detects the SD8987 Wi-Fi device over SDIO, and the firmware download routine reports “FW download over”. However, during the subsequent activation check, the driver expects SDIO_FIRMWARE_READY = 0xfedc, while the reported status is 0xf005. Firmware initialization and the SDIO probe therefore fail, and no Wi-Fi network interface is created. This remains unchanged after verifying actual 1-bit SDIO operation at 50 MHz. Could you please explain what 0xf005 indicates for SD8987 at this stage and which additional register values or logs would help identify why the firmware does not reach READY status? Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hello NXP Team, Following up on my original report, we have completed additional checks and a controlled SDIO bus-width experiment. Wi-Fi initialization still fails at the firmware activation stage. 1. Confirmed device and software details Board/module: i.MX95 19x19 EVK with JODY-W263-00B Android fingerprint: Android/evk_95_car/evk_95:15/BP1A.250505.005/eng.nisar:userdebug/dev-keys Kernel: 6.12.23-android16-5-maybe-dirty-4k Exact NXP BSP release/tag: still being confirmed SDIO device: mmc2:0001:1 SDIO ID: 02DF:9149, mapped to SD8987 in the driver source Host controller: USDHC3, mmc@428b0000 Both moal and mlan report version 537.p9 MOAL srcversion: 358C14898F4DDF4EB40AB03 Source repository revisions: nxp-mwifiex: 9630752ea1d9e28d9956adf27c652f40399e85ad imx-firmware: 34faa4b3008bf9c6f814b5767cacbc3857cdc49b Both commits have the subject “MA-23689-1 [Android-15]WCS Q2 release patch integrate”. Mapping these source revisions to the installed module build is still being verified. 2. Firmware identity verified The selected firmware is /vendor/firmware/sduart8987_combo.bin, size 628200 bytes. The source copy and installed board copy have the same SHA-256: db9e2ef58aba5778cddd7b7fbc84a34884bebef076052186e8b0d036e68d9f34 This confirms that the copies match; firmware compatibility with the module still needs confirmation. 3. Actual 1-bit SDIO test completed Initially, the live Device Tree reported bus-width = <1>, but /sys/kernel/debug/mmc2/ios still showed 4-bit operation. In our source, mmc_of_parse() does not clear an existing 4-bit capability for bus-width = <1>, while generic SDHCI setup adds MMC_CAP_4_BIT_DATA unless SDHCI_QUIRK_FORCE_1_BIT_DATA is set. We therefore added a diagnostic block in sdhci-esdhc-imx.c, immediately after the mmc_of_parse() error check: { u32 bus_width; if (!of_property_read_u32(np, "bus-width", &bus_width) && bus_width == 1) { host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA; host->mmc->caps &= ~(MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA); } } After rebuilding and deploying the modified kernel and DT configuration, we verified: Live DT bus-width: 00 00 00 01 clock: 50000000 Hz bus width: 0 (1 bits) timing spec: 2 (sd high-speed) signal voltage: 0 (3.30 V) However, the same failure remained: Request firmware: sduart8987_combo.bin Wlan: FW download over, firmwarelen=628200 downloaded 619156 Fail to poll firmware status: firmwarestat=0xf005 FW failed to be active in time! Firmware Init Failed wlan_sdio mmc2:0001:1: probe with driver wlan_sdio failed with error -1 No Wi-Fi network interface appears. The configured maximum frequency is 100 MHz, but actual operation remained at 50 MHz. We have therefore not completed a lower-clock test. Also, no-sd was absent from the reviewed USDHC3 configuration, so no removal was performed. 4. WLAN-only firmware reload test We temporarily bind-mounted sd8987_wlan.bin over the configured firmware path and reloaded MOAL. The driver read the alternative file size, but reported: firmwarelen=416836 downloaded 0 firmwarestat=0xf005 FW failed to be active in time! Because this was a reload after an earlier failed initialization, we consider the result inconclusive. It does not establish WLAN-only firmware compatibility or successful transfer. A reboot removed the temporary bind mount, and the original 628200-byte combo firmware was verified again. 5. Current investigation We are preparing diagnostic logging in moal_sdio_mmc.c to capture: Raw chip magic and host strap register values. Return status of both register reads. Masked magic and strap values. The source defines CHIP_MAGIC_VALUE = 0x24 and CARD_TYPE_SD_UART = 0. The existing boot log did not expose these values. This logging change has not yet been deployed. The exact meaning of firmwarestat=0xf005 and the repeated 9044-byte difference between firmware size and download counter remain unresolved. We are not treating the completion message as proof that firmware is active. Could you please advise on the following? Is this firmware/driver package appropriate for JODY-W263-00B on this BSP/kernel? How can we identify the exact firmware release from the binary or package? Is downloaded 619156 for a 628200-byte combo image expected for this firmware format, or does it indicate premature termination? What does firmware status 0xf005 mean for SD8987 during initialization? Is the diagnostic host-driver change above appropriate for enforcing a 1-bit test, or is there a preferred BSP mechanism? Which registers/logging should we collect to verify strap-based firmware selection, and does an explicit fw_name override that selection? What power/reset sequence is required before retrying after this failure? Would you recommend a lower-clock test or another targeted experiment next? We can provide the full boot logs, DT/overlay changes, host-driver diff, and wifi_mod_para.conf. Thank you. Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Dear @Rakesh_Kumar-Thakur , Thanks for your Inquiry. I saw you are using uSDHC3 interface for your WiFi module,  i.MX95-EVK supports the uSDHC3 on M.2 KEY E connector, so I assume you are using M.2 WiFi module, JODY-W263-00B based on 88W8987. We need to clarify the following steps when enabling SDIO WiFi on M.2 KEY E connector. -- uSDHC3 IO level is determined by NVCC_WAKEUP NVCC_WAKEUP is 1.8V (from VDD_1V8_S). --M.2 Power,VCC_KE_3V3 is disabled by default The power is generated by NX5P2924DUK, M2_KE_PWREN is controlling it's enablement. 3. What software will do (1) Adding uSDHC3 node to imx95-19x19-evk.dts There is no uSDHC3 node by default, it should be added manually. [Note] You can refer to imx95-15x15-evk.dts's usdhc3 code to add it. please pay attention to different GPIOs. --Enabling power GPIO --Pull up W_DISABLE1# and W_DISABLE2 pins of M.2 --SDIO_WAKE# & SDIO_RST# pins (3)Android 15 SDIO WiFi Power Enablement Check haredBoardConfig.mk files for i.MX95 and confirm if pwrseq_simple.ko has been supported, if not , add it, please.  maybe like below: ...... $(KERNEL_OUT)/net/wireless/cfg80211.ko \ $(KERNEL_OUT)/drivers/mmc/core/pwrseq_simple.ko \ ...... (3) Enabling imx95-19x19_gki.fragment (Maybe different name, confirm it , please.) ...... CONFIG_PWRSEQ_SIMPLE=m ...... (4) Disabling pcie1 node (in imx95-19x19-evk.dts) ...... &pcie1 { pinctrl-0 = <&pinctrl_pcie1>; pinctrl-names = "default"; reset-gpio = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; vpcie-supply = <&reg_slot_pwr>; status = "disabled"; }; ...... (5) BoardConfig.mk can support 8987 directly You can change default WiFi firmware files' name to 88W8987's. OK, try it, please. Thanks, Regards, Weidong Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hi Weidong, Thank you for your guidance. I tested the following configuration updates, but firmware initialization still fails: Disabled pcie1 in imx95-19x19-evk.dts. The existing uSDHC3 configuration was retained. Updated the Wi-Fi configuration labels and module-parameter filename in BoardConfig.mk and SharedBoardConfig.mk. Updated the firmware configuration destination name in evk_95.mk. Found CONFIG_PWRSEQ_SIMPLE=m already present in the kernel fragments. Runtime loading of pwrseq_simple.ko and the DTS power-sequence connection still need verification. The latest boot uses: moal.mod_para=wifi_mod_para_sd8987.conf The module is reported as JODY-W263-00B, based on NXP 88W8987, and the Wi-Fi driver version is 537.p9. Current firmware: Path: /vendor/firmware/sduart8987_combo.bin Size: 628200 bytes SHA-256: db9e2ef58aba5778cddd7b7fbc84a34884bebef076052186e8b0d036e68d9f34 Boot logs: SD8987: init module param from usr cfg card_type: SD8987, config block: 0 fw_name=sduart8987_combo.bin Request firmware: sduart8987_combo.bin Wlan: FW download over, firmwarelen=628200 downloaded 619156 Fail to poll firmware status: firmwarestat=0xf005 FW failed to be active in time! Firmware Init Failed wlan_sdio mmc2:0001:1: probe with driver wlan_sdio failed with error -1 Previously, I also tested a replacement firmware from branch lf-6.18.20_2.0.0: Size: 644352 bytes SHA-256: ccaff1bc0a0232fb59111bb01f27cd28ba985d9a0bcb79beca61cde5e67ca823 Its deployed hash was verified, but it produced the same firmwarestat=0xf005 activation failure. Could you please provide or point me to a validated sduart8987_combo.bin for JODY-W263-00B / 88W8987 compatible with driver 537.p9? Please include the firmware version, repository commit/tag, SHA-256 and recommended module parameters. If another driver release is required, please specify the matching driver–firmware pair. For reference, our source revisions are: Driver: 9630752ea1d9e28d9956adf27c652f40399e85ad Original firmware repository: 34faa4b3008bf9c6f814b5767cacbc3857cdc49b Please also advise what 0xf005 indicates and which additional status-register captures or power/reset checks would help identify the cause. Electrical measurements and complete reset-sequence verification are still pending. Regards, Rakesh Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Dear @Rakesh_Kumar-Thakur , Thanks for your update. >>Regarding 0xf005  code 0xf005 means that the driver did not observe the firmware reaching the Ready/Active state within the polling timeout. It is a firmware activation status, not a specific hardware-fault code. However, hardware issues such as SDIO communication, power, reset, or clock problems may still cause this status. >>Regarding switching to the lf-6.18.20_2.0.0 branch: The correct approach is to use the complete, matching Wi-Fi driver and firmware from that branch. We should not replace only the firmware, because the driver and firmware versions must be compatible and kept in sync. So you can try to update Wi-Fi driver & firmware to the latest branch. I have one question and one suggestion: Do you have to use Android 15? Since the i.MX95 is relatively new, it would be better to use the latest BSP version. You could use Android 16.0.0_2.0.0 with the L6.18.20_2.0.0 BSP. I suggest first verifying the Wi-Fi hardware, driver, and firmware on the Linux BSP. Once the Wi-Fi module works properly on Linux, you can migrate the solution to Android 16. This approach can reduce the complexity of Android-specific configuration and make debugging more efficient. Thanks, Regards, Weidong Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hi Weidong, Thank you for the clarification. We must retain AOSP 15 with kernel 6.12.23; upgrading to Android 16 is not an option. Could you please recommend a supported Wi-Fi driver–firmware pair for this setup with JODY-W263-00B / 88W8987? Our current driver is reported as 537.p9. If you recommend the pair from lf-6.18.20_2.0.0, please confirm whether that driver supports kernel 6.12.23 and whether any integration patches are required. Please provide the exact driver and firmware commits/tags, the matching sduart8987_combo.bin version/checksum, and recommended module parameters. Regards, Rakesh Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hi Weidong, While reviewing Android Automotive Release Notes (RN00227), Rev. automotive-15.0.0_2.1.0, dated 14 October 2025, I noticed that Section 4, Table 2 — Connectivity Wi-Fi lists PCIe9098 / u-blox JODY-W3 for i.MX95. I have attached a screenshot of this entry. Our setup uses: Board: i.MX95 19×19 EVK Module: u-blox JODY-W263-00B / 88W8987 over uSDHC3 SDIO BSP: Android Automotive 15.0.0_2.1.0 Kernel: 6.12.23 The SDIO device is detected and firmware transfer completion is reported, but firmware activation fails with firmwarestat=0xf005. Could you please clarify: Has JODY-W263-00B / SDIO8987 been validated on this BSP, or does it require additional integration beyond the previously recommended changes? If supported, could you provide the matching driver–firmware revisions and required DTS, power/reset and module-parameter configuration? Is JODY-W3 / PCIe9098 the recommended module for this release? If replacement is recommended, please specify the exact module/carrier part number and required board configuration. We must retain Android 15 and kernel 6.12.23. Please advise the supported path for this setup. Regards, Rakesh Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Dear @Rakesh_Kumar-Thakur , i.mx95 is designed for automotive applicaiton. Wi-Fi module, AW693 & PCIe 88Q9098 is supported by automotive android, I have tested AW693 module, no problem. I am building L6.12.49 linux bsp , I want to test 88W8987 on i.mx95. Best Reards, Weidong Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hi Weidong, Thank you for the detailed explanation. We understand that 0xf005 means the driver did not observe the firmware reaching the Ready/Active state within the polling timeout, and that it is not a specific hardware-fault code. On our i.MX95 19x19 EVK with the u-blox JODY-W263-00B (88W8987), SDIO detection and firmware download complete, but activation still times out with status 0xf005. Our current platform is Android 15 with kernel 6.12.23 and MOAL/MLAN driver 537.p9. The software power/reset checks and boot-time reset sequencing changes are complete, but the issue remains. Physical voltage, reset and clock measurements are pending. Following your recommendation, we plan to validate Wi-Fi on Linux first using a complete, matching driver and firmware pair. We are checking internally whether migration to Android 16 is possible. If Android 15 remains mandatory, we will evaluate backporting the matching pair while retaining kernel 6.12.23. Could you please confirm the following? Earlier test result: What was the outcome of your L6.12.49 test with JODY-W263-00B on i.MX95? Validated release: Has this exact module been validated on the i.MX95 19x19 EVK with L6.18.20_2.0.0 and Android 16.0.0_2.0.0? Linux setup: Please provide the manifest branch and XML filename, MACHINE, DISTRO, image name, and official build/flashing instructions. Matching Wi-Fi pair: Please provide the driver repository and pinned revision, firmware package and revision, correct firmware filename, and required module configuration. Is sduart8987_combo.bin correct for this module’s SD-UART configuration? Android setup: Please confirm the corresponding Android release and manifest, including the Automotive variant if applicable. Additional diagnostics: Are any specific Device Tree settings, power/reset timings, patches or register dumps required to investigate this activation timeout? After Linux validation, we will share the boot logs, driver/firmware versions, firmware SHA-256 and available hardware measurements. Best regards, Rakesh Thakur Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hi Weidong, Thank you for the update. We will wait for your test results next week. Could you please confirm that your test setup uses the u-blox JODY-W263-00B / NXP 88W8987 module with Wi-Fi over SDIO? When sharing the results, please include the exact BSP version, driver revision, firmware version/file and required board configuration. If the test succeeds, please also share where we can obtain the same driver–firmware pair. This will help us reproduce your working setup and compare it with our Android 15 / kernel 6.12.23 integration. Thanks and best regards, Rakesh Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Hello Weidong, Following your recommendation, we integrated a matching Wi-Fi driver and firmware pair from lf-6.18.20_2.0.0. However, the firmware activation failure remains. Before proceeding with further changes, we need confirmation of the supported driver–firmware package for our exact installed Wi-Fi module, along with its download source and support ownership. 1. Hardware and software setup Component Details Board NXP i.MX95 19×19 EVK Installed Wi-Fi module u-blox JODY-W263-00B Wi-Fi chipset NXP 88W8987 Wi-Fi interface SDIO Intended Bluetooth interface UART Android BSP Automotive Android 15.0.0_2.1.0 Kernel base 6.12.23 Detected SDIO device mmc2:0001:1 Our installed module uses SDIO for Wi-Fi, rather than the PCIe Wi-Fi configuration discussed for the default EVK setup. Please base your recommendation specifically on JODY-W263-00B / 88W8987 in SD-UART mode. 2. Original and updated driver–firmware pairs Component Original setup Updated setup Driver version 537.p9 543.p18 Firmware embedded version 16.92.21.p151.4 16.92.21.p156.2 Firmware filename sduart8987_combo.bin sduart8987_combo.bin Firmware size 628200 bytes 644352 bytes Result Activation timeout, 0xf005 Same activation timeout, 0xf005 The updated pair was selected from lf-6.18.20_2.0.0 and backported into our existing Android 15 / kernel 6.12.23 environment. We have not performed a full Android 16 / Linux 6.18 BSP migration. Selected reference revisions: Driver: 2e481212d262758cbd4d0fc7ea95a2ad5f704bc3 Firmware: cc78ca8b1ee28ff741bcc160246f61b008f6c89f 3. Integration and deployment evidence Updated driver compilation and MODPOST passed. Image packaging and local AVB verification passed. After flashing, the loaded driver version was verified as 543.p18. Board module and firmware hashes matched the packaged artifacts. SDIO enumeration succeeded. The same activation failure occurred on the first post-flash boot and during a cold-power test. The updated firmware in the integrated source was also inspected directly: Filename: sduart8987_combo.bin Size: 644352 bytes Embedded identification: $Id: w8987o-V0, RF878X, FP92, 16.92.21.p156.2 $ SHA-256: ccaff1bc0a0232fb59111bb01f27cd28ba985d9a0bcb79beca61cde5e67ca823 4. Failure evidence Original pair: SD8987: init module param from usr cfg card_type: SD8987, config block: 0 fw_name=sduart8987_combo.bin Request firmware: sduart8987_combo.bin Wlan: FW download over, firmwarelen=628200 downloaded 619156 Fail to poll firmware status: firmwarestat=0xf005 FW failed to be active in time! Firmware Init Failed wlan_sdio mmc2:0001:1: probe with driver wlan_sdio failed with error -1 Updated pair: Wlan: FW download over, firmwarelen=644352 downloaded 635356 Fail to poll firmware status: firmwarestat=0xf005 Firmware Init Failed probe with driver wlan_sdio failed with error -1 The driver detects the module and reports firmware transfer completion, but firmware activation fails. This does not currently point to an obvious detection or firmware-file-loading failure. However, we are not claiming that the driver is fully validated or that firmware incompatibility is the confirmed root cause. 5. Specific confirmation and package request Please answer the following points for JODY-W263-00B / 88W8987: Are both driver–firmware pairs listed above supported for this exact module in SD-UART mode? Please confirm each pair separately. Is either existing driver suitable, with only a different firmware required, or must we obtain a different matching driver–firmware pair? Please identify the exact supported combination. Where can we obtain that package? Please provide the official download link, repository/branch and commits, or the process for requesting access. Who is responsible for supplying and confirming it—NXP or u-blox? If this requires u-blox support, please identify the appropriate support route and the package information we should request. Is the generic NXP 88W8987 firmware suitable for JODY-W263-00B, or does this module require a u-blox-qualified package or additional module-specific files/configuration? Can the confirmed pair operate on Android 15 / kernel 6.12.23? If additional patches are required, please identify them. If this platform is unsupported, please specify a supported BSP and known working configuration for this exact module. What was the specific basis for recommending the driver update? Was there a known issue with 537.p9 and firmware 16.92.21.p151.4, or was the recommendation intended to establish a consistent release baseline? When can we expect compatibility confirmation and access to the recommended package? If engineering review is required, please provide an estimated response timeline. If the updated pair is already correct for this module, please state that explicitly and identify the next targeted diagnostic check for the 0xf005 activation failure. A separate Binder module packaging mismatch has also been corrected locally; those corrected images still require board retesting. Its relationship to the Wi-Fi failure has not been established. Our immediate request is a module-specific confirmation of the correct driver and firmware, their official source, the responsible supplier, and an expected timeline, so that further testing proceeds from a verified baseline. Thank you. Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hi Weidong, Following your recommendation, we have now integrated and tested the complete matching Wi-Fi driver and firmware pair from lf-6.18.20_2.0.0 on our i.MX95 19×19 EVK with JODY-W263-00B / 88W8987. Android 15 and kernel 6.12.23 must be retained. Integrated revisions: Driver: 2e481212d262758cbd4d0fc7ea95a2ad5f704bc3 Firmware: cc78ca8b1ee28ff741bcc160246f61b008f6c89f Loaded MLAN/MOAL version: 543.p18 Firmware: sduart8987_combo.bin, 644352 bytes Compilation and image packaging passed. On the board, we verified the intended kernel, loaded driver version, and module/firmware hashes against the packaged artifacts. Android boot and SDIO enumeration succeeded. However, both the first post-flash boot and a cold-power test produced the same activation failure: Wlan: FW download over, firmwarelen=644352 downloaded 635356 Fail to poll firmware status: firmwarestat=0xf005 Firmware Init Failed probe with driver wlan_sdio failed with error -1 No WLAN interface was created. Therefore, updating the matching pair from 537.p9 to 543.p18 has not resolved the failure. Software power/reset sequencing changes are in place. Physical supply, reset and clock measurements remain pending. An earlier verified 1-bit SDIO test at 50 MHz also produced the same timeout. Separately, we identified a kernel/system-module mismatch affecting rust_binder and rebuilt the images with matching modules. Board retesting of that corrected image set is pending; its relationship to the Wi-Fi failure has not been established. Could you please help us prioritize the next steps? Your Linux test: What is the result of your planned L6.12.49 test with 88W8987 on i.MX95? Please confirm the exact module/carrier, driver–firmware revisions and DTS configuration used. Android 15 support: Is this 543.p18 pair suitable for kernel 6.12.23? Are any compatibility patches required, or do you recommend another validated pair? Targeted diagnostics: We understand that 0xf005 indicates failure to reach READY. Can your Wi-Fi team interpret this specific SD8987 status and provide the exact registers, addresses and capture procedure needed to investigate startup failure? Next controlled experiment: Given that matching-pair integration and 1-bit testing have already been completed, which single software experiment should we perform next, with what settings and expected result? Hardware validation: Please provide the required supply levels, reset timing, clock requirements and confirmed measurement points for this board/module combination. If JODY-W263-00B has not been validated on this Android release, please state that explicitly and recommend the supported integration or replacement path. Full boot logs, source diffs, hashes and image verification records are available. Regards, Rakesh Thakur Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Please confirm whether driver 537.p9 + firmware 16.92.21.p151.4, and driver 543.p18 + firmware 16.92.21.p156.2, are supported combinations for JODY-W263-00B / 88W8987 in SD-UART mode. For the second pair, please also confirm support on Android 15 / kernel 6.12.23, including required patches or configuration. Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Dear @Rakesh_Kumar-Thakur , Please don't worry about it for now. The Yocto BSP is still being built, and the server is a bit slow. I expect to have some test results next week.     Thanks, Best Regards, Weidong Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hi Weidong, We have now completed the following three tests on the i.MX95 19×19 EVK with JODY-W263-00B / 88W8987: Original setup: Automotive Android 15.0.0_2.1.0, kernel 6.12.23, driver 537.p9 and firmware 16.92.21.p151.4. The same activation failure remained after applying your suggested DTS and power/reset configuration changes. Backported setup: Integrated the matching driver 543.p18 and firmware 16.92.21.p156.2 from Linux release lf-6.18.20_2.0.0, retaining Android 15 and kernel 6.12.23. The same failure persisted. Linux validation: Built, flashed and tested Linux BSP L6.18.20_2.0.0, running kernel 6.18.20-2.0.0-g88cb92741827. The same failure occurred. In all three setups, firmware activation times out with firmwarestat=0xf005, and no WLAN interface is created. The attached screenshot shows the Linux result. We have therefore tried both the matching driver–firmware update and Linux BSP validation you recommended. Could you please suggest the next targeted debugging approach and share the result of your planned L6.12.49 test? Physical power/reset/clock measurements remain pending.   Regards, Rakesh Re: Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Hi Weidong, Thank you for sharing the successful W603C test and the DTS. We use u-blox JODY-W263-00B (88W8987) on the i.MX95 19×19 EVK. Firmware download completes, but activation fails with 0xf005. Our final target is Android 15.0.0_2.1.0 / kernel 6.12.23. Before testing your changes, could you please clarify: Does this configuration also apply to JODY-W263-00B? Is W603C a required replacement, or simply the module used for your test? The description mentions P0_5, whereas the DTS uses offset 4 (P0_4), GPIO_ACTIVE_HIGH. Please confirm the correct GPIO and required physical levels during reset and normal operation, particularly for W_DISABLE2#. Please share the driver revision, firmware binary/hash, wifi_mod_para.conf, and exact BSP manifest/build configuration used. We plan to compare your DTS with our setup and test the applicable changes on our existing JODY module. Best regards, Rakesh Re: Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Dear @Rakesh_Kumar-Thakur , I enabled 88W8987 M.2 module on linux platform. --L6.12.49_2.2.0 --Module: Amphenol W603C (Base on 88W8987) 0. Control flow on i.MX95-EVK hardware. =================================================== 1. Wi‑Fi Loading Mechanism on linux platform. So Wi-Fi driver will be loaded during Linux boot. 2. Tunning device tree - Adding usdhc3 node and related GPIO Control. (1) PCAL6524HEAZ.P2_4 -- Output High -- Enable VCC_KE_3V3, supported by imx95-19x19-evk.dts by default. reg_m2_pwr: regulator-m2-pwr { compatible = "regulator-fixed"; regulator-name = "M.2-power"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&i2c7_pcal6524 20 GPIO_ACTIVE_HIGH>; enable-active-high; /* * M.2 device only can be enabled(W_DISABLE1#) after all Power * Rails reach their minimum operating voltage (PCI Express M.2 * Specification r5.1 3.1.4 Power-up Timing). * Set a delay equal to the max value of Tsettle here. */ startup-delay-us = <5000>; }; (2) Pull up SDIO_RST# pin PCAL6524HEAZ.P2_3 & P0_5 - Output High - Enable Wi-Fi/Bluetooth Module. Loaded by 'mmc-pwrseq' of usdch3 node directly.   usdhc3_pwrseq: usdhc3_pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; reset-gpios = <&i2c7_pcal6524 19 GPIO_ACTIVE_LOW>, <&i2c7_pcal6524 4 GPIO_ACTIVE_HIGH>; /* W_DISABLE2# */ }; (3)Pull-up W_DISABLE1# PIN to Enable WiFi PCAL6524HEAZ.P0_6 - Output High - Enable Wi-Fi. Loaded by ‘vmmc-supply’ of usdch3 node directly. reg_usdhc3_vmmc: regulator-usdhc3 { compatible = "regulator-fixed"; regulator-name = "WLAN_EN"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&reg_m2_pwr>; gpio = <&i2c7_pcal6524 6 GPIO_ACTIVE_HIGH>; /* * IW612 wifi chip needs more delay than other wifi chips to complete * the host interface initialization after power up, otherwise the * internal state of IW612 may be unstable, resulting in the failure of * the SDIO3.0 switch voltage. */ startup-delay-us = <20000>; enable-active-high; }; (4) usdhc3 pin control pinctrl_usdhc3: usdhc3grp { fsl,pins = < IMX95_PAD_SD3_CLK__USDHC3_CLK 0x158e IMX95_PAD_SD3_CMD__USDHC3_CMD 0x138e IMX95_PAD_SD3_DATA0__USDHC3_DATA0 0x138e IMX95_PAD_SD3_DATA1__USDHC3_DATA1 0x138e IMX95_PAD_SD3_DATA2__USDHC3_DATA2 0x138e IMX95_PAD_SD3_DATA3__USDHC3_DATA3 0x138e >; }; pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { fsl,pins = < IMX95_PAD_SD3_CLK__USDHC3_CLK 0x158e IMX95_PAD_SD3_CMD__USDHC3_CMD 0x138e IMX95_PAD_SD3_DATA0__USDHC3_DATA0 0x138e IMX95_PAD_SD3_DATA1__USDHC3_DATA1 0x138e IMX95_PAD_SD3_DATA2__USDHC3_DATA2 0x138e IMX95_PAD_SD3_DATA3__USDHC3_DATA3 0x138e >; }; pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { fsl,pins = < IMX95_PAD_SD3_CLK__USDHC3_CLK 0x15fe IMX95_PAD_SD3_CMD__USDHC3_CMD 0x13fe IMX95_PAD_SD3_DATA0__USDHC3_DATA0 0x13fe IMX95_PAD_SD3_DATA1__USDHC3_DATA1 0x13fe IMX95_PAD_SD3_DATA2__USDHC3_DATA2 0x13fe IMX95_PAD_SD3_DATA3__USDHC3_DATA3 0x13fe >; }; (5)Disable pcie0 on M.2 (Optional, since not using it, disable it) &pcie0 { pinctrl-0 = <&pinctrl_pcie0>; pinctrl-names = "default"; reset-gpio = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>; vpcie-supply = <&reg_pcie0>; supports-clkreq; status = "disabled"; }; (6) Adding usdhc3 node &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; pinctrl-3 = <&pinctrl_usdhc3>; mmc-pwrseq = <&usdhc3_pwrseq>; vmmc-supply = <&reg_usdhc3_vmmc>; bus-width = <4>; keep-power-in-suspend; non-removable; wakeup-source; status = "okay"; }; 3. Running Linux BSP and getting message of Wi-Fi This indicates that, from a hardware platform perspective, the M.2 SDIO interface on the i.MX95-EVK fully supports SDIO Wi‑Fi devices without any issues.   Attachment is the dts I am using. share it with you here. Test it, please.   Thanks, Best Regards, Weidong Re: Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Dear @Rakesh_Kumar-Thakur , Thanks for your update. >>Does this configuration also apply to JODY-W263-00B? Is W603C a required replacement, or simply the module used for your test? --Does this configuration also apply to JODY-W263-00B? Yes. fully same. Because M.2 Key E is a standard spec for Wi-Fi card. --Is W603C a required replacement, or simply the module used for your test? No need. Because current test result only can indicate i.mx95-evk M.2 is no problem for SDIO Wi-Fi. It doesn't mean JODY-W263-00B has issues. >>The description mentions P0_5, whereas the DTS uses offset 4 (P0_4), GPIO_ACTIVE_HIGH. Please confirm the correct GPIO and required physical levels during reset and normal operation, particularly for W_DISABLE2#. Yes, it should be P0_4, my mistake. >>Please share the driver revision, firmware binary/hash, wifi_mod_para.conf, and exact BSP manifest/build configuration used. here is the link for driver branch. https://github.com/nxp-imx/mwifiex/tree/lf-6.12.49_2.2.0 BUT just remind you, the issue you encountered is not caused by driver. don't try to change wifi driver. no help. Next week, I will prepare android 15 source code and try to enable it.  the android bsp you are using is automotive version or standard android bsp? Thanks, Best Regards, Weidong Re: Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Hi Weidong, Thank you for confirming that the configuration applies to JODY-W263-00B, that no W603C replacement is required, and that the correct GPIO is P0_4. We are using the Automotive Android BSP, with the following baseline: Board: i.MX95 19×19 EVK Module: u-blox JODY-W263-00B / 88W8987, SDIO BSP: Automotive Android 15.0.0_2.1.0 Manifest: imx-automotive-15.0.0_2.1.0.xml Build target: evk_95_car-nxp_stable-userdebug Kernel: 6.12.23 Our final requirement is to enable this module on the above Android 15 / kernel 6.12.23 baseline. We have completed the planned multimeter and oscilloscope checks covering the module supply, reset, W_DISABLE1#/PDn, and SDIO CLK/CMD/DATA0–3. The measurements and waveform captures have been documented. Firmware download still completes, followed by the same activation timeout, firmwarestat=0xf005. Following your advice, we will stop further driver-version changes and focus on the remaining configuration and sequencing checks. We also reviewed the driver branch you shared. It identifies the driver release as 540.p33, with the current branch HEAD at 84ca65c9ff935d7f2999af100a82531c22c65234. The repository contains firmware filename references, but not the firmware binaries, actual module-parameter configuration or board DTS. Could you please help with the following? P0_4 / W_DISABLE2# sequencing: Please confirm the required physical HIGH/LOW levels during power-up, reset assertion, reset release and normal operation. Your DTS includes P0_4 in reset-gpios as GPIO_ACTIVE_HIGH, alongside P2_3 / offset 19 as GPIO_ACTIVE_LOW. Is this combination intentional for JODY-W263-00B, and what physical level should each pin have after the power sequence completes? Tested firmware and parameters: Please share the exact firmware binary used in your successful W603C test, including its filename, version and SHA-256 hash, or its download link and exact repository commit. Please confirm whether the same firmware should be used with JODY-W263-00B. Please also share the actual wifi_mod_para.conf used, or the exact module-loading command and parameters if no configuration file was used. Successful Linux reference: Please confirm whether your test used the driver commit identified above and whether any additional driver patches were applied. To reproduce your L6.12.49_2.2.0 test with our existing JODY module, please share the final board DTS/patch and exact BSP manifest, MACHINE, DISTRO and image configuration. Would you recommend this comparison before your Android test? A suitable prebuilt image, if available, would also help. Planned Android 15 test: Could you please use Automotive Android 15.0.0_2.1.0 / kernel 6.12.23, matching our baseline? Please also confirm whether you will test with W603C or JODY-W263-00B. Once available, please share the enablement patches, firmware details and initialization logs so we can reproduce the result. We can provide our hardware-validation report, waveform captures, current DTS and complete boot/driver logs for comparison. Please let us know if you need any additional targeted measurement or register dump. I am currently working dedicatedly on this bring-up, and your clarification on the remaining points will help me proceed with the next tests. If possible, I would appreciate an early response, particularly on the GPIO sequencing and tested firmware/configuration, so I can continue validation while you prepare the Android 15 setup. Thank you for your continued support. Best regards, Rakesh Re: Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Dear @Rakesh_Kumar-Thakur , Actually, as long as it's based on the NXP 88Q9098, AW693 M.2 Key E module, it will work. So, your choice of the u-blox module is fine. I have modified the code for Auto Android 15_2.1.0 for 88W8987, and there will be test results this week. If your application is designed for automotive use, you indeed need to use the NXP 88Q9098, AW693 Wi-Fi chips, which are designed specifically for the automotive domain.   Thanks, Best Regards, Weidong Re: Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Hi Weidong, Before purchasing a supported Wi-Fi card, could you please confirm the exact manufacturer and complete M.2 ordering part number tested on i.MX95 19×19 EVK with Automotive Android 15.0.0_2.1.0 / kernel 6.12.23? We are considering: M2-JODY-W377-00C — NXP 9098-based, PCIe Wi-Fi / UART Bluetooth M2-JODY-W683-00C — NXP AW693-based Please confirm which exact card you recommend, its chipset number, and whether it works with the released BSP or requires additional patches/configuration. If possible, please share a purchase link. Best regards, Rakesh Re: Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Hi Weidong, Could the firmware size difference be related to our initialization failure? The firmware file size is 628,200 bytes, but the driver reports only 619,156 bytes downloaded—a difference of 9,044 bytes. Our diagnostic logs show that the device stops requesting further data at offset 619,156. Offline parsing identified a last-block record ending at the same offset, but the purpose of the remaining bytes is still unconfirmed. Is this expected for this firmware image, or could it indicate an incomplete transfer related to the subsequent 0xf005 activation timeout? We are using JODY-W263-00B / 88W8987 with driver 537.p9 and firmware 16.92.21.p151.4 on Automotive Android 15.0.0_2.1.0 / kernel 6.12.23. Best regards, Rakesh Re: Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Hi Weidong, Thank you for confirming the default support for 88Q9098 and AW693. We checked DigiKey and Mouser for these M.2 cards, but neither is currently in stock: M2-JODY-W377-00C — 9098-based M2-JODY-W683-00C — AW693-based We have a one-week deadline to demonstrate Wi-Fi operation on our i.MX95 19×19 EVK with Automotive Android 15.0.0_2.1.0 / kernel 6.12.23. Could you suggest another supplier, purchase link, or an available supported M.2 card? An evaluation sample would also help. Have any other Wi-Fi modules been tested successfully on i.MX95 with Android Automotive 15, Android 16, or another BSP release? If so, please share the exact M.2 card part number, chipset, tested BSP/kernel version, and purchase source. Our final target remains Android 15 / kernel 6.12.23, so please clarify whether those alternatives would require additional integration for our target. Meanwhile, our existing JODY-W263-00B / 88W8987 still fails firmware activation with 0xf005. Could you prioritize assistance and share any available enablement patches, matching driver–firmware package, and the results of your Linux and Android tests? You mentioned that we could send you our module for testing. Our office is in Pune, Maharashtra, India. Could you help arrange joint debugging with the NXP team in Noida? Alternatively, if NXP has an office or a suitable technical support team in Pune, please let us know. I can visit with the module and, if required, our EVK this week, preferably by Thursday, 29 October, subject to the team’s availability. Your coordination and continued involvement would help the local team build on the investigation already completed. Please let us know whether this can be arranged and whom we should contact. If local testing is not possible, please advise how we can arrange to send the module to you. Best regards, Rakesh Re: Request for confirmed driver–firmware package for JODY-W263-00B / 88W8987 on i.MX95 — activ Dear @Rakesh_Kumar-Thakur , Thanks for you detailed information. >>P0_4 / W_DISABLE2# sequencing:  The pin should be pulled up to HIGH. which is used to enable Bluetooth. No problem to pull it up to HIGH using external pull-up resistor. Some M.2 modules use the PIN to control Bluetooth software reset, But some modules don't use it. W603C uses it.   >>JODY-W263-00B. I don't have the M.2 module on my hand, but I have AW-CM358-SUR (M.2 module), I will also test it tomorrow on linux platform. >>Enable it on auto android 15-2.1.0. Yes, I have planned to enable the 8987 module under the version of bsp. you know it needs long time to repo sync android source code. So I need some time.  By default, auto android bsp only supports 88Q9098 and AW693, which are automotive Wi-Fi products. For other Wi-Fi chips, we should do some extra work to enable it. [Note] If W603C or AW-CM358-SUR M.2 module can normally work on my side, and JODY-W263-00B still can not work yet, you can consider send one JODY-W263-00B to me, let me try it on my platform. Thanks, Best Regards, Weidong Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Dear @Rakesh_Kumar-Thakur , When I tried to enable AW-CM358MA module based on 88W8987 , I encountered the same issue as yours. ================================= Fail to poll firmware status: firmwarestat=0xf005 SDIO Func0: 43 03 02 02 03 00 00 02 03 00 SDIO Func1: (0x5c) 0d (0x60) 01 (0x64) 10 SDIO Func1: 05 f0 00 00 00 00 00 00 24 14 70 ... ================================= Let us resolve the issue following the steps: 1. 88W8987 GPIO[8] pin.(See datasheet) The pin has 2 functions: clock configuration & UART_SOUT. when starting 88W8987, the pin should be LOW to select 38.4MHz clock. BUT if HOST UART_RXD pin is configured as Pull Up,  88W8987 UART_SOUT will also be pulled up. It means 26MHz clock is select, not 38.4MHz. Actually most modules use 38.4MHz clock. So we should change LPUART5_RXD PAD configuration to Pull Down. 2. Changing LPUART5_RXD PAD configuration ...... IMX95_PAD_DAP_TDI__LPUART5_RX 0x51e ...... 3. Sharing my full device tree with you. See attachment, please. Try it, please. Best Regards, Weidong Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Dear @Rakesh_Kumar-Thakur , I have enabled AW-CM358MA module on i.mx95-evk & auto android 15_2.1.0 bsp. Let me share steps with you. ========================================== 1. android_build/device/nxp/imx9/evk_95/evk_95.mk # nxp 9098 wifi and bluetooth combo Firmware PRODUCT_COPY_FILES += \ vendor/nxp/imx-firmware/nxp/FwImage_IW416_SD/sduartiw416_combo.bin:vendor/firmware/sduartiw416_combo.bin \ vendor/nxp/imx-firmware/nxp/FwImage_9098_PCIE/pcieuart9098_combo_v1.bin:vendor/firmware/pcieuart9098_combo_v1.bin \ vendor/nxp/imx-firmware/nxp/FwImage_IW612_SD/sduart_nw61x_v1.bin.se:vendor/firmware/sduart_nw61x_v1.bin.se \ vendor/nxp/imx-firmware/nxp/FwImage_AW693_PCIE/pcieuartaw693_combo_v1.bin.se:vendor/firmware/pcieuartaw693_combo_v1.bin.se \ vendor/nxp/imx-firmware/nxp/FwImage_8987/sduart8987_combo.bin:vendor/firmware/sduart8987_combo.bin \ vendor/nxp/imx-firmware/nxp/android_wifi_mod_para.conf:vendor/firmware/wifi_mod_para.conf \ hardware/nxp/libbt/conf/nxp/evk_95/bt_vendor.conf:/vendor/etc/bluetooth/bt_vendor.conf 2. android_build/hardware/nxp/libbt/conf/nxp/evk_95/bt_vendor.conf # disable default settings #mchar_port = /dev/ttyLP4 #baudrate_fw_init = 3000000 # # Change settings to 88W8987 Bluetooth mchar_port = /dev/ttyLP4 baudrate_dl_image = 115200 iSecondBaudrate = 3000000 baudrate_fw_init = 115200 baudrate_bt = 3000000 3. android_build/vendor/nxp-opensource/kernel_imx/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts LPUART5_RX pin  /*set it to pull down (connected to GPIO[8]/UART_SOUT of 88W8987) GPIO[8] is used to select main clock, 0--38.4M, 1--26M, most modules use 38.4MHz cystal*/ pinctrl_uart5: uart5grp { fsl,pins = < IMX95_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e IMX95_PAD_DAP_TDI__LPUART5_RX 0x51e IMX95_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e IMX95_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e >; }; Adding GPIO control on M.2 connector /* M.2 Module Power Enable */ reg_m2_pwr: regulator-m2-pwr { compatible = "regulator-fixed"; regulator-name = "M.2-power"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&i2c7_pcal6524 20 GPIO_ACTIVE_HIGH>; enable-active-high; startup-delay-us = <5000>; }; /* SD3 on M.2 Enable,SDIO RESET# pin, PCAL6524HEAZ.P2_3 & PCAL6524HEAZ.P0_4 - Output High, Consumed by 'mmc-pwrseq' of usdch3 node */ usdhc3_pwrseq: usdhc3_pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; reset-gpios = <&i2c7_pcal6524 19 GPIO_ACTIVE_LOW>, <&i2c7_pcal6524 4 GPIO_ACTIVE_HIGH>; /* W_DISABLE2# */ }; /* Pull-up W_DISABLE1# PIN to Enable WiFi, PCAL6524HEAZ.P0_6 - Output High */ reg_usdhc3_vmmc: regulator-usdhc3 { compatible = "regulator-fixed"; regulator-name = "WLAN_EN"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&reg_m2_pwr>; gpio = <&i2c7_pcal6524 6 GPIO_ACTIVE_HIGH>; /* * IW612 wifi chip needs more delay than other wifi chips to complete * the host interface initialization after power up, otherwise the * internal state of IW612 may be unstable, resulting in the failure of * the SDIO3.0 switch voltage. */ startup-delay-us = <20000>; enable-active-high; }; Adding usdhc3 node and pin control /* Adding uSDHC3 Pinctrl */ pinctrl_usdhc3: usdhc3grp { fsl,pins = < IMX95_PAD_SD3_CLK__USDHC3_CLK 0x158e IMX95_PAD_SD3_CMD__USDHC3_CMD 0x138e IMX95_PAD_SD3_DATA0__USDHC3_DATA0 0x138e IMX95_PAD_SD3_DATA1__USDHC3_DATA1 0x138e IMX95_PAD_SD3_DATA2__USDHC3_DATA2 0x138e IMX95_PAD_SD3_DATA3__USDHC3_DATA3 0x138e >; }; pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { fsl,pins = < IMX95_PAD_SD3_CLK__USDHC3_CLK 0x158e IMX95_PAD_SD3_CMD__USDHC3_CMD 0x138e IMX95_PAD_SD3_DATA0__USDHC3_DATA0 0x138e IMX95_PAD_SD3_DATA1__USDHC3_DATA1 0x138e IMX95_PAD_SD3_DATA2__USDHC3_DATA2 0x138e IMX95_PAD_SD3_DATA3__USDHC3_DATA3 0x138e >; }; pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { fsl,pins = < IMX95_PAD_SD3_CLK__USDHC3_CLK 0x15fe IMX95_PAD_SD3_CMD__USDHC3_CMD 0x13fe IMX95_PAD_SD3_DATA0__USDHC3_DATA0 0x13fe IMX95_PAD_SD3_DATA1__USDHC3_DATA1 0x13fe IMX95_PAD_SD3_DATA2__USDHC3_DATA2 0x13fe IMX95_PAD_SD3_DATA3__USDHC3_DATA3 0x13fe >; }; /* Adding usdhc3 node */ &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; pinctrl-3 = <&pinctrl_usdhc3>; mmc-pwrseq = <&usdhc3_pwrseq>; vmmc-supply = <&reg_usdhc3_vmmc>; bus-width = <4>; keep-power-in-suspend; non-removable; wakeup-source; status = "okay"; }; Disabling pcie0 node /* Disable pcie0 on M.2 - only use SDIO Wi-Fi */ &pcie0 { pinctrl-0 = <&pinctrl_pcie0>; pinctrl-names = "default"; reset-gpio = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>; vpcie-supply = <&reg_pcie0>; status = "disabled"; }; 4. Test result ============================================= Thanks, Best Regards, Weidong Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hi Weidong, Thank you for sharing the successful AW-CM358MA test and Android enablement steps. To reproduce your setup and clarify our module selection, could you please confirm these four points? Tested modules and BSP versions Your earlier Linux test used Amphenol W603C on L6.12.49_2.2.0, and your latest Automotive Android 15.0.0_2.1.0 test used AW-CM358MA. Please confirm the manufacturer, complete M.2 card part number, chipset and actual kernel version for each test. Earlier you also mentioned AW-CM358-SUR; is this the same card or a different variant? Matching software package For the successful Android test, please share the exact BSP manifest/tag, driver revision, firmware version/hash and wifi_mod_para.conf. Was kernel 6.12.23 used, and are there any changes beyond those in your latest reply? Applying the solution to JODY-W263-00B Can we apply these changes using the released BSP driver and firmware for our JODY-W263-00B? Please confirm whether the LPUART5_RX pull-down change to 0x51e is sufficient for the clock strap, or whether any external resistor modification is required. Also, should P0_4/W_DISABLE2# remain physically HIGH after the power sequence? Alternative cards For M2-JODY-W377-00C and M2-JODY-W683-00C, please distinguish general compatibility from actual validation. Which exact Linux and Automotive Android BSP/kernel versions have these cards been tested on by NXP or a module partner? Please share any available reference and confirm whether additional patches are needed for our target. Our required baseline remains i.MX95 19×19 EVK B0, Automotive Android 15.0.0_2.1.0 and kernel 6.12.23. Best regards, Rakesh Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Dear @Rakesh_Kumar-Thakur , See below, please. >>1. Tested modules and BSP versions --Android 15.0.0_2.1.0 bsp, same as yours.  --Default Wi-Fi driver in the version of bsp. I didn't use other wifi driver. https://www.nxp.com/design/design-center/software/embedded-software/i-mx-software/android-automotive-os-for-i-mx-applications-processors:ANDROID-AUTO >>2. Matching software package From above screenshot, the version if android bsp uses LF_v6.12.20 BSP, The Android 15.0.0_2.1.0 bsp we released did NOT use L6.12.23.  >>3. Applying the solution to JODY-W263-00B yes, I think so. Because I can reproduce the same issue as yours when using AW-CM358MA. I believe the JODY-W263-00B can be used. The i.MX95 LPUART5_RXD pin just needs to be configured with a pull-down in the DTS. >>4. Alternative cards M2-JODY-W377-00C and M2-JODY-W683-00C, they are respectively based on 9098 and AW693, yes, you can select them for you application. [Note] I suggest following my steps to get the JODY-W263-00B up and running.     Thanks, Regards, weidong Re: i.MX95 19x19 EVK with JODY-W263-00B: WiFi firmware activation timeout on Android 15 / Linux 6.12 Hi Weidong, Thank you for sharing the AW-CM358MA enablement steps. We applied the corresponding changes to our i.MX95 19×19 EVK with the u-blox JODY-W263-00B (88W8987), running Automotive Android 15.0.0_2.1.0 / kernel 6.12.23. We verified the following in the live device tree: LPUART5_RX pad configuration: 0x51e. Reset GPIOs: 19 ACTIVE_LOW and 4 ACTIVE_HIGH. M.2/WLAN enable delays: 5 ms and 20 ms. SDIO pinctrl states and wakeup-source. PCIe0 and PCIe1 disabled. The Bluetooth settings were also updated. After reflashing the corrected image set, mlan and moal load automatically. SDIO enumerates in SDR104 mode, but firmware activation still fails: Wlan: FW download over, firmwarelen=628200 downloaded 619156 Fail to poll firmware status: firmwarestat=0xf005 FW failed to be active in time! Firmware Init Failed Could you please clarify the next steps? Did your successful setup require any hardware changes, resistor population/removal, jumper changes, or UART/JTAG DIP-switch settings? Please share the exact settings and component references. Does JODY-W263-00B require any different setup from your tested AW-CM358MA, particularly for W_DISABLE1#, W_DISABLE2#, power/reset sequencing, or clock selection? For the GPIO[8]/UART_SOUT clock strap, when is the level sampled? Is the Linux DTS pull-down sufficient, or is an earlier U-Boot/power-on configuration required? Please confirm the expected startup voltage and an accessible measurement point for this strap. We have verified the DTS configuration, but have not yet confirmed the physical strap level at sampling time. Please share your exact tested driver revision, firmware version/SHA-256 and wifi_mod_para.conf, along with any reference startup waveforms. Please advise which measurement or controlled test you recommend first. We can provide the complete dmesg and live device tree. Regards, Rakesh
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IMX8QXP OTA update: Feasibility of Partition Creation and Resizing Through OTA Update Hi Team, IMX8QXP - Scarthgap  - L 6.6.52   Is it possible to create new partitions and resize existing partitions as part of the software update (OTA) process when the current software target has a slightly different partition layout compared to the OTA package? We would like to understand whether the OTA update mechanism can handle partition layout changes dynamically, including partition creation, resizing, and updating the corresponding partition information, without requiring manual intervention. Please share your inputs on the feasibility, limitations, and recommended approach. Thanks & regards, VKS i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus Linux Yocto Project
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Looking for DDR2 Register Parameter Architecture (RPA) Calculator for PQ2 Pro (MPC830x) The MPC830x pages here at NXP have a number of design documents, but I've been led to believe there is some sort of calculator (spreadsheet?) which helps with computing DDR2 register settings, possibly named: MPC830x_DDR2_RPA.xls or some variation of that.  Even if it's for some other PowerQuicc 2 (i.e. not exactly MPC830x) that used DDR2, it might be useful. Any chance it's stored away in an archive or with an eval board collateral? Thank you! Re: Looking for DDR2 Register Parameter Architecture (RPA) Calculator for PQ2 Pro (MPC830x) Hi @mrand , As the MPC830x family has been EOL for over three years, the requested file or download link is no longer available. Please refer to AN3369 for DDR register-programming guidance. Thank you.   Best Regards, June
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BLDC Motor Direction measurement using TRIGMUX+eMIOS Description : I am using NXP recommended solution for 6 step commutation to drive my BLDC motor. As per the App note "https://community.nxp.com/t5/S32M-Knowledge-Base/S32M276-Hall-sensor-based-6-step-BLDC-motor-control/ta-p/2035021#jump_PwmAndTriggers" Hall Sensor output is going to TRIGMUX and then LCU for commutation and also for calculating the speed signal. This article does not mention how the motor direction can be measured. Is there any NXP solution to measure motor direction? My understanding is that to measure direction we need to capture all the 3 Hall sensor outputs using an input capture unit. Is it feasible to configure my eMIOS channels as follows. CH0 - Input capture mode to receive Speed signal from LCU via TRIGMUX. CH1 - Input capture mode to receive Hall1. CH2 - Input capture mode to receive Hall2. CH3 - Input capture mode to receive Hall3. Please provide some clarification.
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S32DSはS32G399Aに対してPCFS ClockSourceFrequency = 0を生成します。 こんにちは、 S32 Design Studioでクロック設定を生成すると、MCUコンポーネント(画像添付)が正しい値を示しているにもかかわらず、PCFSのソース周波数が0に設定されていることに気づきました。これにより、無効なレジスタがプログラムされることになる。 「クロック」タブで「Clock_Ip_ _PBcfg.c」のプレビューを見ると、期待値を確認しました。 /* PCFS initialization. */ { #if CLOCK_IP_PCFS_NO > 0U { CORE_PLL_DFS1_CLK, 50U, 1U, XBAR_2X_CLK, 800000000U, }, #endif #if CLOCK_IP_PCFS_NO > 1U { ACCEL_PLL_PHI1_CLK, 50U, 1U, PFE_PE_CLK, 300000000U, }, #endif { RESERVED_CLK, 0U, 0U, RESERVED_CLK, 0U, }, }, しかし、実際に「コードの更新」でコードを生成すると、次の出力が表示されます。 /* PCFS initialization. */ { #if CLOCK_IP_PCFS_NO > 0U { CORE_PLL_DFS1_CLK, 50U, 1U, XBAR_2X_CLK, 0U, }, #endif #if CLOCK_IP_PCFS_NO > 1U { ACCEL_PLL_PHI1_CLK, 50U, 1U, PFE_PE_CLK, 0U, }, #endif { RESERVED_CLK, 0U, 0U, RESERVED_CLK, 0U, }, }, 800000000Uと300000000Uが0に設定されている点にご注意ください。ファイルの残りの部分は同じです。これらの値が設定されていないため、クロックの立ち上がりが期待どおりに行われず、デバッガーが切断されるという問題が発生しています。生成されたコードを修正して値を元に戻すようにすると、問題なく動作します。 これは既知の問題ですか?ファイルを手動で修正することなく、生成されたコードに値を組み込む方法はありますか? バージョン: S32 Design Studio 3.6.0(ビルド 3.6.0.202411280511) S32 Configuration Tools 1.8.0(クロック14.0、ペリフェラル15.0) RTD 5.0.0(S32_RTD_5_0_0_D2410)、構成データPlatformSDK_S32XX_4_0_0 S32G399A、CortexM7_0 ありがとうございます! Re: S32DS generates PCFS ClockSourceFrequency = 0 for S32G399A こんにちは、 @cpearson 投稿ありがとうございます。 1.RTD5.0.0については、リリースノートに記載されている通り、S32 Design Studioのアップデートサイトとして提供されています。「S32 Design Studio IDE 3.5 - Update 13」と設定コンポーネントは「S32 Design Studio IDE 3.5 - Update 13」を使って開発されました。問題があるかどうか、S32DS3.5.13以降のバージョンでもテストされたことはありますか? 2. 3.5.13でも問題が表示される場合、トリガーとなる手順について、より詳細な説明をいただけますか?(RTDの既存のサンプルプロジェクト、またはカスタマイズされたプロジェクトなどを用いて)。私はそれを再現して調査するつもりです。 BR チェイン Re: S32DS generates PCFS ClockSourceFrequency = 0 for S32G399A こんにちは、チェンインさん ご返信ありがとうございます。 1. 3.5.13 ではテストしていません。弊社では S32DS 3.6.0 を使用しています。RTD 5.0.0 は 3.6.0 をサポートしていますか? 3.6.0 のリリースアナウンスによると、サポートされているようです。 2. 3.6.0でも問題を再現できますRTD 5.0.0 サンプルプロジェクト Mcu_Example_S32G399A_M7 を使用 - クロックツールで、クロック構成Config1を選択します。MC_CGM_0_MUX_0で「MCU制御下でPCFS12をクロックする」を有効に設定してください。 - ペリフェラルツールで、Mcu_1 > McuModuleConfiguration > McuClockSettingConfig > 1 > McuCgm0SettingConfig > McuCgm0PcsConfig を選択します。「MCU制御下のMCUクロックPCFS」PCFS_12を確認してください。ソース周波数は800000000と表示されるはずです。 その後、ClocksツールのClock_Ip_PBcfg.cのコードプレビューが表示されます。clock_Cfg_1 PCFSエントリは{ CORE_PLL_DFS1_CLK, 50U, 1U, XBAR_2X_CLK, 800000000U }として表示されるはずです。 「Update Code」を実行した後、generate/src/Clock_Ip_PBcfg.c には clock_Cfg_1 PCFS エントリが { CORE_PLL_DFS1_CLK, 50U, 1U, XBAR_2X_CLK, 0U } と表示されるはずです。 再現手順についてさらに詳しい説明が必要な場合はお知らせください。 よろしくお願いします、 カーター
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IMX8QXP OTAアップデート:OTAアップデートによるパーティションの作成とサイズ変更の実現可能性 チームの皆さん、こんにちは。 IMX8QXP - スカースギャップ - L 6.6.52   現在のソフトウェアターゲットのパーティションレイアウトがOTAパッケージと少し異なる場合、ソフトウェアアップデート(OTA)プロセスの一環として新しいパーティションを作成し、既存のパーティションのサイズを変更することは可能でしょうか? OTAの更新メカニズムが、パーティションのレイアウト変更を手動で処理し、パーティション作成、サイズ変更、対応するパーティション情報の更新を手動で行うことが可能かどうかを理解したいです。 実現可能性、制約、推奨されるアプローチについて、ご意見をお聞かせください。 ありがとうございます。 VKS i.MX 8ファミリ | i.MX 8QuadMax (8QM) | 8QuadPlus Linux Yocto Project
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DSP56F807PY80E:在 1.6V 输入电压下,ADC 读数与预期的 2048 个计数不符 NXP社区的各位朋友,大家好! 我正在排查一块使用DSP56F807PY80E的电路板上的 ADC 偏移问题。在设备引脚上测得的电压如下: 引脚功能测量电压 102–109 ANA0–ANA7 输入 1.60伏 99 和 110 VREF 和 VREF2 3.20伏 88、100 和 111 VDDA 3.30伏 对于没有偏移校正的单端转换,我预计计数约为 2048 ,因为输入电压是参考电压的一半: ADC计数 = (1.60 / 3.20) × 4096 = 2048 然而,ADC读数与预期值有所不同。 请问有人能提供一些建议吗? 我应该检查哪些ADC配置和偏移寄存器? 这种差异是否与 ADC 结果寄存器的读取或移位方式有关? RESET或重新初始化ADC并验证其偏移的推荐步骤是什么? 任何指导或初始化代码示例都将不胜感激。 感谢您的支持。 Re: DSP56F807PY80E: ADC reading differs from expected 2048 counts at 1.6 V input 你好@Hari0369 , 感谢您提供如此详细的信息。 对于理想的 12 位转换,您的计算是正确的。输入电压为 1.60 V,参考电压为 3.20 V,预期结果约为 2048 个计数。 我建议首先检查的是如何读取ADC结果。 在 DSP56F807 上,12 位 ADC 结果存储在 ADRSLT 位 14-3 中。如果没有应用偏移量,2048 个计数在原始 ADRSLT 寄存器中将显示为大约 0x4000。 所以,请先将原始结果右移 3 位,然后再与 2048 进行比较: ADC 值 = ADRSLTn > 3 根据您的测试条件,您应该看到大致如下: 原始 ADRSLT 值:0x4000 之后 > 3 : 0x0800 = 2048 我还建议检查以下ADC设置: - 检查 ADLST1/ADLST2,确保已选择正确的模拟输入。 - 检查 ADCR1.CHNCFG 并确保已选择单端操作。 - 检查 ADSDIS 并确保您使用的采样槽已启用。 - 检查相应的 ADOFS 寄存器。本次测试请将偏移量设置为 0x0000。 - 检查 ADCR2,确保 ADC 时钟和采样配置正确。 - 确保您读取的 ADRSLT 寄存器与您配置的采样槽相匹配。   为了获得清晰的测试结果,我建议只使用一个ADC通道。 首先,停止 ADC,并等待 ADSTAT.CIP 指示 ADC 处于空闲状态。然后禁用未使用的采样槽,并配置一个已知的通道。将相应的 ADOFS 寄存器设置为 0x0000,并仅启用要测试的采样槽。 之后,开始一次转换并保存原始 ADRSLT 值。然后将此值右移 3 位,并将结果与预期的 ADC 计数进行比较。   如果结果仍然与预期不符,请您提供以下数值? - ADCR1 - ADCR2 - ADLST1/ADLST2 - ADSDIS - 相应的 ADOFS 值 - 原始 ADRSLT 值 这些值应该有助于我们确定差异是来自结果格式、ADC 配置、偏移设置还是模拟输入路径。 希望对您有所帮助。 BR 塞莱斯特
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DSP56F807PY80E: 1.6V入力時のADC読み取り値が期待される2048カウントと異なる こんにちは、NXPコミュニティの皆さん、 DSP56F807PY80E を搭載したボードで、ADC オフセットの問題をトラブルシューティングしています 。デバイスのピンで測定された電圧は以下のとおりです。 ピンの機能 測定電圧 102~109 ANA0~ANA7入力 1.60V 99と110 VREFとVREF2 3.20V 88、100、111 VDDA 3.30V オフセット補正のないシングルエンド変換の場合、 入力電圧が基準電圧の半分であるため、 約 2048カウントになると 予想されます。 ADCカウント = (1.60 / 3.20) × 4096 = 2048 しかし、ADCの測定値はこの予想値とは異なっている。 どなたかアドバイスをいただけませんか: どのADC設定レジスタとオフセットレジスタを確認すればよいですか? この違いは、ADCの結果レジスタの読み込みやシフトの仕方に関係しているのでしょうか? ADCをリセットまたは再初期化し、オフセットを確認するための推奨手順は何ですか? 何かご指導や初期化コードの例があれば幸いです。 再開まで今しばらくお待ちください。 Re: DSP56F807PY80E: ADC reading differs from expected 2048 counts at 1.6 V input こんにちは、 @Hari0369 さん。 詳細な情報ありがとうございます。 理想的な12ビット変換の場合、あなたの計算は正しいです。入力電圧が1.60V、基準電圧が3.20Vの場合、予想される結果は約2048カウントです。 まず最初に確認すべきことは、ADCの結果がどのように読み取られるかということです。 DSP56F807では、12ビットADCの結果はADRSLTビット14~13に格納されます。オフセットを適用しない場合、2048カウントは生のADRSLTレジスタでは約0x4000として表示されます。 ですので、2048と比較する前に生の結果を右に3ビットシフトしてください: ADC値 = ADRSLTn > 3 テスト条件では、おおよそ以下の値が表示されるはずです。 生のADRSLT値:0x4000 3 の後 : 0x0800 = 2048 また、以下のADC設定も確認することをお勧めします。 - ADLST1/ADLST2を確認し、正しいアナログ入力が選択されているか確認してください。 - ADCR1.CHNCFG を確認し、シングルエンド動作が選択されていることを確認してください。 - ADSDISを確認し、使用しているサンプルスロットが有効になっていることを確認してください。 - 対応するADOFSレジスタを確認してください。このテストでは、オフセットを0x0000に設定してください。 - ADCR2を確認し、ADCクロックとサンプリング構成が正しいことを確認してください。 - 読み取ったADRSLTレジスタが、設定したサンプルスロットと一致していることを確認してください。   クリーンなテストには、ADCチャネルを1つだけ使うことをおすすめします。 まず、ADCを停止し、ADSTAT.CIPがADCがアイドル状態であることを示すまで待ちます。次に、使われていないサンプルスロットを無効にし、既知のチャネルを1つ設定します。対応するADOFSレジスタを0x0000に設定し、テストしたいサンプルスロットのみを有効にしてください。 その後、変換を1つ開始し、生のADRSLT値を保存します。次に、この値を3ビット右にシフトし、その結果を期待されるADCカウントと比較します。   それでも結果が予想と異なる場合は、以下の値を教えていただければ幸いです。 - ADCR1 - ADCR2 - ADLST1/ADLST2 - ADSDIS - 対応するADOFS値 - 生のADRSLT値 これらの値は、結果フォーマット、ADC構成、オフセット設定、またはアナログ入力経路による差を判断するのに役立ちます。 お役に立てば幸いです。 BR セレステ
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S32DS 为 S32G399A 生成 PCFS ClockSourceFrequency = 0 你好, 在 S32 Design Studio 中生成时钟配置时,我注意到它将 PCFS 源频率设置为 0,即使 Mcu 元器件显示正确的值(附图)。这会导致无效寄存器被编程。 当我在“时钟”选项卡中查看 Clock_Ip_ _PBcfg.c 的预览时,我看到了预期值: /* PCFS initialization. */ { #if CLOCK_IP_PCFS_NO > 0U { CORE_PLL_DFS1_CLK, 50U, 1U, XBAR_2X_CLK, 800000000U, }, #endif #if CLOCK_IP_PCFS_NO > 1U { ACCEL_PLL_PHI1_CLK, 50U, 1U, PFE_PE_CLK, 300000000U, }, #endif { RESERVED_CLK, 0U, 0U, RESERVED_CLK, 0U, }, }, 但是,当实际通过“更新代码”生成代码时,我看到以下输出: /* PCFS initialization. */ { #if CLOCK_IP_PCFS_NO > 0U { CORE_PLL_DFS1_CLK, 50U, 1U, XBAR_2X_CLK, 0U, }, #endif #if CLOCK_IP_PCFS_NO > 1U { ACCEL_PLL_PHI1_CLK, 50U, 1U, PFE_PE_CLK, 0U, }, #endif { RESERVED_CLK, 0U, 0U, RESERVED_CLK, 0U, }, }, 注意,800000000U 和 300000000U 被设置为 0,文件的其余部分保持不变。由于这些值未设置,我遇到了调试器断开连接的问题,因为时钟斜坡没有按预期发生。如果我尝试修改生成的代码,将这些值添加回去,它就能正常工作。 这是已知问题吗?有没有办法在不手动修改文件的情况下,将这些值传递到生成的代码中? 版本: S32 设计工作室 3.6.0(版本 3.6.0.202411280511) S32 配置工具 1.8.0(时钟 14.0,外设 15.0) RTD 5.0.0 (S32_RTD_5_0_0_D2410),配置数据 PlatformSDK_S32XX_4_0_0 S32G399A,Cortex-M7_0 谢谢你! Re: S32DS generates PCFS ClockSourceFrequency = 0 for S32G399A 你好, @cpearson 感谢分享。 1.对于 RTD5.0.0,正如其版本说明中所述,它是作为 S32 Design Studio 的更新站点“S32 Design Studio IDE 3.5 - Update 13”提供的,并且配置元器件是使用“S32 Design Studio IDE 3.5 - Update 13”开发的。请问您是否也在 S32DS3.5.13 或更高版本的 3.5.x 上进行过测试,以确认该问题是否存在? 2. 如果该问题也出现在 3.5.13 版本中,您能否详细介绍一下触发信号该功能的步骤(可以通过RTD中现有的示例项目或自定义项目来实现)?我会重现并调查此事。 BR 陈银 Re: S32DS generates PCFS ClockSourceFrequency = 0 for S32G399A 陈银你好, 谢谢你的回复。 1. 我没有在 3.5.13 版本上测试过,我们使用的是 S32DS 3.6.0。RTD 5.0.0 是否支持 3.6.0 版本?根据 3.6.0 版本的发布公告来看,应该是支持的。 2. 我可以在 3.6.0 版本上重现这个问题。使用 RTD 5.0.0 示例项目 Mcu_Example_S32G399A_M7 - 在时钟工具中,选择时钟配置 Config1。在 MC_CGM_0_MUX_0 上,将“MCU 控制下的时钟 PCFS12”设置为启用。 在“外设”工具中,依次选择“Mcu_1 > McuModuleConfiguration > McuClockSettingConfig > 选择 1 > McuCgm0SettingConfig > McuCgm0PcsConfig”。检查“MCU 控制下的 PCFS 时钟”是否为 PCFS_12。源频率应显示为 800000000。 之后,时钟工具对 Clock_Ip_PBcfg.c 文件进行了代码预览。应显示 clock_Cfg_1 PCFS 条目为 { CORE_PLL_DFS1_CLK, 50U, 1U, XBAR_2X_CLK, 800000000U }。 运行“更新代码”后,generate/src/Clock_Ip_PBcfg.c 应显示 clock_Cfg_1 PCFS 条目为 { CORE_PLL_DFS1_CLK, 50U, 1U, XBAR_2X_CLK, 0U }。 如果您需要更多重现步骤的说明,请告诉我。 此致, 卡特
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