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******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * start both Z7 cores, interrupts initialization, blinking three LED by interrupts, * initializes and display notice via UART terminal and then terminal ECHO. * Each core serves one interrupt and one LED. * * The example configures the device for maximum performance by initialization of * instruction/data cache and enabling of branch prediction for each core * (startup.s files). * * ------------------------------------------------------------------------------ * Test HW: MPC5775K-356DS, MPC57xx Motherboard * MCU: PPC5775KMMY3A 0N38M * Terminal: 19200-8-no parity-1 stop bit-no flow control on LINFlexD_0 * Fsys: PLL0 266MHz * Z4 Core 133MHz * Both Z7 Cores 266MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: internal_FLASH (debug mode, release mode) * EVB connection: USER LED1 connected to P19.0, LED2 connected to P19.5 * LED3 connected to P19.8 * For correct UART functionality connect: * J14.2 to P12.6 * J13.2 to P12.7 * ********************************************************************************

******************************************************************************** * Detailed Description: * * Simple LINFlex UART mode transmit and receive without interrupts (polled UART) * TXFIFO and RXFIFO macro is used to select between buffer and FIFO mode * * PIT channel 0 is also used to generate 1sec interrupt where PA0 pin is toggled. * * EVB connection: * * Motherboard * J14 - SCI_RX OFF * J13 - SCI_TX OFF * J25 - SCI_PWR ON * * See results on PC terminal (19200, 8N1, None). * ------------------------------------------------------------------------------ * Test HW: MPC5777M, MPC57xx Motherboard + MPC5777M_512DS minimodule * Maskset: 0N78H * Target : RAM, internal_FLASH * Fsys: 600 MHz PLL1 with 40 MHz crystal reference, * core2 at 200MHz generated from PPL1 * Terminal: 19200, 8N1 ********************************************************************************

******************************************************************************** * Detailed Description: * Purpose of the example is to show how to generate Multi-bit or Single-bit * ECC error in internal FLASH (user must choose it in the option at the end of * main function). * Flash over-programming is used to generate a non-correctable (or single-bit) * ECC error in FLASH. The bad data is accessed then, so the IVOR1 exception (or * ERM combined interrupt service routine) is generated and handled. * Example also offers useful macros for EIM and ERM modules. * The example displays notices in the terminal window (USBtoUART bridge J21) * (19200-8-no parity-1 stop bit-no flow control on eSCI_A). * No other external connection is required. * * ------------------------------------------------------------------------------ * Test HW: MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU: PPC5777CMM03 2N45H CTZZS1521A * Fsys: PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger: Lauterbach Trace32 * Target: internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: eSCI_A is USBtoUART bridge (connector J21) * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows, how to use interrupt hardware vector mode. In the example * PIT0 interrupt and external interrupt source 1 are implemented. PIT interrupt * toggle LED every second, external interrupt causes IVOR1 exception. * * This example also shows, how to use exceptions, while HW vector mode is used. * After SW1 button is pressed, uninitialized RAM is read and IVOR1 exception is * reached. In IVOR1, only endless loop is implemented and micro has to be reset * externally if you want to get out from this loop. * * * For correct HW vector mode setup, following files was added to the project: * * - exceptions.s * - handlers_vle.s * - HW_vector.c * * * Following files was modified (all changes are marked by comment): * * - mem.ld * - sections.ld * - Vector.c * - MPC57xx__Interrupt_Init.c * * * Following files was removed from project (files are still place in project, but * not compiled and linked) * * - intc_sw_handlers.S * - intc_SW_mode_isr_vectors_MPC5744P.c * * * * Test HW: X-MPC5744P-144DC, MPC57xx motherboard * MCU: PPC5744PFMLQ8 0N15P * Fsys: 200 MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: internal_FLASH (debug mode, release mode) * EVB connection: User LED 1 connected to A0 (P8.0), * User switch SW1 connected to A1 (P8.1) * * * ------------------------------------------------------------------------------ * ********************************************************************************

******************************************************************************** * Detailed Description: * This SW provides the example of clearing of FCCU faults. * * ------------------------------------------------------------------------------ * Test HW: MPC57xx * Maskset: 1N65H * Target : internal_FLASH * Fsys: 200 MHz PLL with 40 MHz crystal reference + FCCU fault clearing example code. * ******************************************************************************** Revision History: 1.0 Jan-05-2016 nxa13250(Vlna Peter) Initial Version *******************************************************************************/

This document shows, how to use CRC gen utility in CodeWarrior for MCU IDE. 1) Create new project in CodeWarrior. 2) Create a file calc_crc.crc in the Project/Project_Settings/Linker_File directory. 3) Open project settings, choose C/C++ Build ->Settings and add the following command to Post-build steps: "${MCU_TOOLS_HOME}/bin/crcgen.exe" "${BuildLocation}/${BuildArtifactFileName}" -crc "${ProjDirPath}/Project_Settings/Linker_Files/calc_crc.crc" -srec "${BuildLocation}/${BuildArtifactFileName}.crc.mot" 26 4) Open calc_crc.crc and configure required parameters. Meaning of single lines is described in CodeWarrior reference manual called Targeting_Microcontrollers I used following code (it is only example) 5) Build your project. 6) File MPC5604B-CRCTest.elf.crc.mot was created Now you have s-record, which contains CRC and which could be loaded to microcontroller.

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed * frequency * * * Mode transition to LPU_STOP is executed. CAN_0 is configured to wake up from * LPU_STOP to LPU_RUN using message with standard IDE = 0 as a wake up * preselected matching criteria. After wake up from LPU_STOP, user * LED1 is blinking. * * Modified files: mem.ld, sections.ld, startup.s, added file z2_restart.s * * * ------------------------------------------------------------------------------ * Test HW: MPC5748G-324DS, MPC574xG Motherboard * MCU: PPC5748GMMN6A 1N81M * Fsys: PLL0 160MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: internal_FLASH (debug mode, release mode) * EVB connection: Default * * * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, * initializes and display notice via UART terminal and then terminals ECHO. * * * Test HW: X-MPC5744PE257DC, MPC57xx motherboard * MCU: PPC5744PFMMM8 1N65H * Terminal: 19200-8-no parity-1 stop bit-no flow control on LINFlexD_0 * Fsys: 200 MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: internal_FLASH (debug mode, release mode) * EVB connection: User LED 1 connected to A0 (P8.0), * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, initializes interrupts, blinking * one LED by Core0, second by Core1 (by interrupt), initializes and display * notice via UART terminal and then terminal ECHO. * * ------------------------------------------------------------------------------ * Test HW: MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU: PPC5777CMM03 2N45H CTZZS1521A * Fsys: PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger: Lauterbach Trace32 * Target: internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) * ETPUA31 (PortP P23-14) --> USER_LED_2 (P7-2) * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows, how to initialize FlexCAN modules for simple transmission * and reception using RX interrupt. Both modules are configured for 100kbit/s * bit rate. CAN_0 module transmits message using MB0. CAN_1 module receives * message using interrupt via MB0. * * * ------------------------------------------------------------------------------ * Test HW: MPC5748G-324DS, MPC574XG - Motherboard * MCU: PPC5748GMMN6A 1N81M * Fsys: PLL0 160MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: internal_FLASH (debug mode, release mode) * EVB connection: Connect jumpers J15 and J16 on motherboard * Connect P14 H to P15 H * Connect P14 L to P15 L * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * start both Z7 cores, interrupts initialization, blinking three LED by interrupts, * initializes and display notice via UART terminal and then terminal ECHO. * Each core serves one interrupt and one LED. * * The example configures the device for maximum performance by initialization of * instruction/data cache and enabling of branch prediction for each core * (startup.s files). * * ------------------------------------------------------------------------------ * Test HW: MPC5777M-512DS, MPC57xx Motherboard * MCU: PPC5777MQMVA8 0N78H * Terminal: 19200-8-no parity-1 stop bit-no flow control on LINFlexD_2 * Fsys: 600MHz * * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: internal_FLASH (debug mode, release mode) * EVB connection: USER LED1 connected to P8.0, LED2 connected to P8.1 * LED3 connected to P8.2 * ********************************************************************************

******************************************************************************** * Detailed Description: * Example dimmes LED1 according on board potentiometr. LED2 and LED3 demostrates * ADC watchdog functionality. LED2 is turned on when signal level is below LOW * threshold, LED3 is turned on when signal is above HIGH threshold. * Example also displays coverted results to the terminal window. * ------------------------------------------------------------------------------ * Test HW: XPC560B 100LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU: PPC5604BE MLL 1M27V * Terminal: 19200-8-no parity-1 stop bit-no flow control on LINFLEX_0 * Fsys: 64/48 MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: RAM, internal_FLASH * EVB connection: - initialize PB[8] as ANS0: connect potentiometer to PB[8] pin, remove J30 jumper and connect J30.2 with P2.9 - header J8 (LED_EN) fully fitted ********************************************************************************

******************************************************************************** * Detailed Description: * Purpose of the example is to show how to generate Multi-bit or Single-bit * ECC error in internal FLASH (user must choose it in the option at the end of * main function). * Flash over-programming is used to generate a non-correctable (or single-bit) * ECC error in FLASH. The bad data is accessed then what's generate IVOR1 * exception or FCCU_Alarm_Interrupt. Both function calls MEMU handler. * Example also offers useful macros for MEMU module. * The example displays notices in the terminal window (connector J19 on * MPC57xx_Motherboard)(19200-8-no parity-1 stop bit-no flow control on eSCI_A). * No other external connection is required. * ------------------------------------------------------------------------------ * Test HW: MPC57xx_Motherboard + MPC5744P-144DC * MCU: PPC5744PFMLQ8,0N15P,QQAA1515N, Rev2.1B * Fsys: 200 MHz PLL with 40 MHz crystal reference * Debugger: Lauterbach Trace32 * Target: internal_FLASH, RAM * Terminal: 19200-8-no parity-1 stop bit-no flow control * EVB connection: default ********************************************************************************

******************************************************************************** * Detailed Description: * * * This example demonstrate functionality of XBIC_0 error injection * capability on XBAR_0. The fault is generated on Core access to SRAM. * After fault generation it is propagated to FCCU unit as NCF[38]. * * ------------------------------------------------------------------------------ * Test HW: MPC57xx * Maskset: 1N65H * Target : internal_FLASH * Fsys: 16MHz IRC * ********************************************************************************

******************************************************************************** * Detailed Description: * * Example gives possible implementation of input signal period/freq measurement. * eTimer channel capture 1 and 2 features are used. CAPT1/CAPT2 capture counter * value on rising/falling edge of input signal. The FIFO is set to 2 entries * and ICF2 is monitored. Free-running mode is used here. * * eTimer channel 0-1 are cascaded to achieve 1sec/1Hz measuring with 32bit counter. * * DMA is used to read CAPT1/2 registers and form 32bit values used in calculation. * * EVB connection: * P8.2 - A[1] .. eTimer0 channel1 input signal * P8.1 - A[0] .. GPIO output, used to show measurement period * * Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver * Daughtercard: * J17.11–12 ON .. Connect LINFlexD_0 TXD (PB2) to main board. * J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board. * * Motherboard * J14 - SCI_RX ON * J13 - SCI_TX ON * J25 - SCI_PWR ON * * connect pulse signal to the P8.2. * See results on PC terminal (19200, 8N1, None). * Change freq/duty of input signal. * * ------------------------------------------------------------------------------ * Test HW: MPC5744P * Maskset: 1N65H * Target : internal_FLASH * Fsys: 200 MHz PLL with 40 MHz crystal reference * Terminal: 19200, 8N1, None ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals. * * This example shows, how to use some of ETimer modes. Channel 0 is set to * Fixed-Frequency PWM Mode and generates PWM signal with approximate frequency * 507Hz. This signal is routed to the UserLED1. * * Channel 1 is set to Count mode and generates 0,25 second interrupt. * In the interrupt service routine, duty cycle is increased from 0% to 100% * with step 6.25%. This shows for example, how can be controlled the brightness * of the LED. * * Channel 2 is set to Variable-Frequency PWM Mode and generates PWM signal with * frequency 10KHz. This signal is routed to the UserLED2. * * ------------------------------------------------------------------------------ * Test HW: MPC5775K-356DS, MPC57xx Motherboard * MCU: PPC5775KMMY3A 0N76P * Terminal: * Fsys: PLL0 266MHz * Z4 Core 133MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: internal_FLASH (debug mode, release mode) * EVB connection: UserLED1 connected to P19.0 * UserLED2 connected to P19.2 * * ********************************************************************************

******************************************************************************** * Detailed Description: * Read attached document "How to use Register Protection on MPC5748G.pdf" * for detailed explanation. * This example shows how to lock and unlock register MC_ME.RUN_MC[3].R. * One option is to write directly to memory via pointers, second option is * to use macros from header file reg_prot.h. * ------------------------------------------------------------------------------ * Test HW: MPC574XG-324DS Rev.A + MPC574XG-MB Rev.C * MCU: PPC5748GMMN6A 1N81M * Fsys: 160 MHz PLL * Debugger: Lauterbach Trace32 * Target: internal_FLASH * ********************************************************************************

******************************************************************************** * Detailed Description: * This example demonstrates basic functionality of SARADC (10-bit ADC0 and 12-bit ADC1) in one-shot conversion mode. ******************************************************************************** * Test HW: MPC57xx * Maskset: 1N81M * Target : SRAM * Fsys: 160 MHz PLL ******************************************************************************** Revision History: 1.0 Oct-29-2014 b21190(Vlna Peter) Initial Version 1.1 Nov-20-2014 b21190(Vlna Peter) Modified for Cut2.0 1.2 Nov-20-2014 b21190(Vlna Peter) Added SWT_0 dissabling in startup 1.3 Mar-10-2016 b21190(Vlna Peter) Fixed clock configuraion for PLL 1.4 Mar-10-2016 b21190(Vlna Peter) Added ADC driver *******************************************************************************/