Trusted Firmware for Cortex-A (TF-A) is an implementation of EL3 secure firmware. TF-A replaces PPA in secure firmware role. In LS2088ARDB, Boot option switching between parallel NOR boot and QSPI NOR boot cannot be performed using commands. Boot option switching can be done by adjusting DIP switch settings and jumper settings on the Reference Design Board. For details, see Layerscape Software Development Kit User Guide.                        To migrate to the TF-A boot flow from the previous boot flow (with PPA), you need to compile the TF-A binaries, bl2_<boot_mode>.pbl and fip.bin, and flash these binaries on the specific boot medium on the board. For QSPI NOR flash boot, you need to compile the following TF-A binaries. TF-A binary name Components bl2_qspi.pbl BL2 binary: Platform initialization binary RCW binary for QSPI NOR flash fip.bin BL31: Secure runtime firmware BL32: Trusted OS, for example, OPTEE (optional) BL33: U-Boot/UEFI image Follow these steps to compile and deploy TF-A  binaries (bl2_qspi.pbl and fip.bin) in QSPI NOR flash. Compile RCW binary  Compile U-Boot binary [Optional] Compile OPTEE binary  Compile TF-A binaries (bl2_qspi.pbl and fip.bin) for QSPI NOR flash Program TF-A binaries to QSPI NOR flash Step 1: Compile RCW binary You need to compile the rcw_2000_qspi.bin binary to build the bl2_qspi.pbl binary. Clone the  rcw repository and compile the PBL binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw $ cd rcw $ git checkout -b <new branch name> <LSDK tag>. For example, $ git checkout -b LSDK-19.09 LSDK-19.09  $ cd ls2088ardb If required, make changes to the rcw files. $ make The compiled PBL binary for QSPI NOR flash on LS2088ARDB, rcw_2000_qspi.bin, is available at  rcw/ls2088ardb/FFFFFFFF_PP_HH_0x2a_0x41 See the rcw/ls2088ardb/README file for an explanation of the naming convention for the directories that contain the RCW source and binary files. Step 2: Compile U-Boot binary You need to compile the u-boot.bin binary to build the fip.bin binary. Clone the u-boot repository and compile the U-Boot binary for TF-A. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot.git $ cd u-boot $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.09 LSDK-19.09  $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- $ make distclean $ make ls2088ardb_tfa_defconfig $ make If the make command shows the error "*** Your GCC is older than 6.0 and is not supported", ensure that you are using Ubuntu 18.04 64-bit version for building LSDK 18.12 and onwards U-Boot binary.  The compiled U-Boot image, u-boot.bin, is available at u-boot/. Step 3: [Optional] Compile OP-TEE binary You need to compile the tee.bin binary to build fip.bin with OPTEE. However, OPTEE is optional, you can skip the procedure to compile OPTEE if you want to build the FIP binary without OPTEE. Clone the optee_os repository and build the OPTEE binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/optee_os $ cd optee_os $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.09 LSDK-19.09 $ export ARCH=arm $ export CROSS_COMPILE=aarch64-linux-gnu- $ make CFG_ARM64_core=y PLATFORM=ls-ls2088ardb $ aarch64-linux-gnu-objcopy -v -O binary out/arm-plat-ls/core/tee.elf out/arm-plat-ls/core/tee.bin The compiled OPTEE image, tee.bin, is available at optee_os/out/arm-plat-ls/core/. Step 4: Compile TF-A binaries for QSPI NOR flash Clone the atf repository and compile the TF-A binaries, bl2_qspi.pbl and fip.bin. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/atf $ cd atf $  git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.09 LSDK-19.09 $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- Build BL2 binary with OPTEE. $ make PLAT=ls2088ardb bl2 SPD=opteed BOOT_MODE=qspi BL32=<path_to_optee_binary>/tee.bin pbl RCW=<path_to_rcw_binary>/rcw_2000_qspi.bin The compiled BL2 binaries, bl2.bin and bl2_qspi.pbl are available at atf/build/ls2088ardb/release/. For any update in the BL2 source code or RCW binary, the bl2_qspi.pbl binary needs to be recompiled. To compile the BL2 binary without OPTEE: make PLAT=ls2088ardb bl2 BOOT_MODE=qspi pbl RCW=<path_to_rcw_binary>/rcw_2000_qspi.bin               Build FIP binary with OPTEE and without trusted board boot. $ make PLAT=ls2088ardb fip BL33=<path_to_u-boot_binary>/u-boot.bin SPD=opteed BL32=<path_to_optee_binary>/tee.bin The compiled BL31 and FIP binaries, bl31.bin, fip.bin, are available at atf/build/ls2088ardb/release/. For any update in the BL31, BL32, or BL33 binaries, the fip.bin binary needs to be recompiled. To compile the FIP binary without OPTEE and without trusted board boot: make PLAT=ls2088ardb fip BOOT_MODE=sd BL33=<path_to_u-boot_binary>/u-boot.bin To compile the FIP binary with trusted board boot, refer the read me at <atf repository>/plat/nxp/README.TRUSTED_BOOT Step 5: Program TF-A binaries to QSPI NOR flash Boot LS2088ARDB from QSPI. Ensure that the switches and jumpers are set to boot the board from QSPI. For booting from QSPI: SW5[1:8] = 1111 1111 SW3[1:8] = 0011 0001 SW4[1:8] = 0011 1111 SW6[1:8] = 1111 1111 SW7[1:8] = 0100 1010 SW9[1:8] = 0100 0100 SW8[1:8] = 0111 1111 In addition to the above switch settings, make sure the following jumper settings are correct (for RDB Rev E and later).  J8 = 1-2 for QSPI boot, via onboard QSPI flash J8 = 2-3 for QSPI boot, via QSPI emulator J14 = 2-3, for QSPI boot For LS2088ARDB, in boot log, you'll see: Board: LS2088AE Rev1.1-RDB, Board Arch: V0, Board version: A, boot from vBank: 0 TF-A binaries can be loaded to LS2088ARDB from a TFTP server or from a mass storage device (SD, USB, or SATA). Option 1: Load TF-A binaries from the TFTP server Set up Ethernet connection When board boots up, U-Boot prints a list of enabled Ethernet interfaces. DPMAC1@xgmii, DPMAC2@xgmii, DPMAC3@xgmii, DPMAC4@xgmii, DPMAC5@xgmii, DPMAC6@xgmii, DPMAC7@xgmii, DPMAC8@xgmii Set server IP address to the IP address of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the ethernet interface connected to the TFTP server. See LS2088ARDB Ethernet port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux.                         => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime DPMAC3@xgmii => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact DPMAC3@xgmii Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command.  Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> => setenv gatewayip <gateway addr> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using DPMAC3@xgmii device host 192.168.1.1 is alive Load TF-A binaries from the TFTP server For details about the flash image layout for TF-A binaries, refer LSDK memory layout for TF-A boot flow. Program QSPI NOR flash: => sf probe 0:0 Flash bl2_qspi.pbl: => tftp 0xa0000000 bl2_qspi.pbl => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize  Flash fip.bin: => tftp 0xa0000000 fip.bin => sf erase 0x100000 +$filesize && sf write 0xa0000000 0x100000 $filesize Boot from QSPI NOR flash: => reset LS2088ARDB will boot with TF-A. In the boot log, you will see: => NOTICE: UDIMM 18ASF1G72AZ-2G3B1 NOTICE: 16 GB DDR4, 64-bit, CL=15, ECC on, 256B, CS0+CS1 NOTICE: UDIMM 18ASF1G72AZ-2G3B1 NOTICE: 4 GB DDR4, 32-bit, CL=11, ECC on, CS0+CS1 NOTICE: BL2: v1.5(release):LSDK-19.09 NOTICE: BL2: Built : 15:19:13, Nov 11 2019 NOTICE: BL31: v1.5(release):LSDK-19.09 NOTICE: BL31: Built : 15:21:14, Nov 11 2019 NOTICE: Welcome to LS2088 BL31 Phase U-Boot 2019.04 (Nov 11 2019 - 15:12:53 +0530) SoC: LS2088AE Rev1.1 (0x87090011) Clock Configuration: CPU0(A72):2000 MHz CPU1(A72):2000 MHz CPU2(A72):2000 MHz CPU3(A72):2000 MHz CPU4(A72):2000 MHz CPU5(A72):2000 MHz CPU6(A72):2000 MHz CPU7(A72):2000 MHz Bus: 800 MHz DDR: 2133.333 MT/s DP-DDR: 1600 MT/s Reset Configuration Word (RCW): 00000000: 503040c0 50500050 00000000 00000000 00000010: 00000000 00000000 00a00000 00000000 00000020: 01e01180 00002581 00000000 00000000 00000030: 00400c0b 00000000 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 00000000 00000000 00000060: 00000000 00000000 00027000 00000000 00000070: 412a0000 00040000 Model: Freescale Layerscape 2080a RDB Board Board: LS2088AE Rev1.1-RDB, Board Arch: V0, Board version: A, boot from vBank: 0 Option 2: Load image from partition on mass storage device (SD, USB, or SATA) Select mass storage device to use. => mmc rescan => mmc info Or => usb start => usb info Or => scsi scan => scsi info Optional – List files on storage device => ls mmc <device:partition> For example: => ls mmc 0:2 Or => ls usb <device:partition> For example: => ls usb 0:1 Or => ls scsi <device:partition> For example: => ls scsi 0:2 If the ls command fails to run, check that U-Boot in QSPI NOR flash supports the command by typing ls at the U-Boot prompt: => ls ls - Lists files in a directory (default) Usage: ls <interface> [<dev[:part]> [directory]] - Lists files in directory [directory] of partition [part] on device type [interface] and instance [dev]. If U-Boot does not support this command, then update the composite firmware image in QSPI NOR flash. For steps to update composite firmware image in QSPI NOR flash, see Layerscape Software Development Kit User Guide . Use the following command if the SD card is formatted/created using LSDK flex-installer command: => load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]] For example: => load mmc 0:2 $load_addr bl2_qspi.pbl Use the following command if the SD card is formatted/created on a Windows PC: => fatload <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]] For example: => fatload mmc 0:2 $load_addr bl2_qspi.pbl Use the following command if the SD card is formatted/created on a Linux PC: => ext2load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]] For example: => ext2load mmc 0:2 $load_addr bl2_qspi.pbl Also note that LSDK flex-installer command puts the images on the IInd partition, so 0:2 is used in the load command. If the SD card is formatted on Windows PC or Linux PC for single partition only, then 0 should be used instead of 0:2 in the fatload/ext2load command. Load bl2_qspi.pbl image from the storage device => load mmc 0:2 0xa0000000 <image name> => print filesize For example: => load mmc 0:2 0xa0000000 bl2_qspi.pbl => print filesize filesize=14379 Or => load usb 0:2 0xa0000000 <image name> => print filesize Or => load scsi 0:2 0xa0000000 <image name> => print filesize Program bl2_qspi.pbl to QSPI NOR flash: => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize  Load fip.bin image from the storage device => load mmc 0:2 0xa0000000 <image name> => print filesize For example: => load mmc 0:2 0xa0000000 fip.bin => print filesize filesize=131510 Or => load usb 0:2 0xa0000000 <image name> => print filesize Or => load scsi 0:2 0xa0000000 <image name> => print filesize Program fip.bin to QSPI NOR flash: => sf erase 0x100000 +$filesize && sf write 0xa0000000 0x100000 $filesize Boot from QSPI NOR flash: => reset LS2088ARDB will boot with TF-A.

This how-to topic is applicable only for LSDK 18.09 and older releases.  For LSDK 18.12 and newer releases, refer LS1088ARDB-PB - How to deploy TF-A binaries in QSPI NOR flash. Follow these steps to update the PBL/RCW binary in QSPI NOR flash.  qixis_reset boots the board from QSPI NOR flash0 and qixis_reset altbank boots the board from QSPI NOR flash1. sf probe 0:1 means that the alternate bank will be written to. So, if the board boots from QSPI NOR flash0 and sf probe 0:1 is entered at the U-Boot prompt, the commands that follow will program QSPI NOR flash1.   Compiling PBL binary from RCW source file (optional) If user already has a PBL binary, this step can be skipped.   Clone the rcw repository and compile the PBL binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw $ cd rcw $ git checkout -b <new branch name> <LSDK tag>. For example, $ git checkout -b LSDK-18.09 LSDK-18.09  $ cd ls1088ardb If required, make changes to the rcw files. $ make The default PBL binary for QSPI NOR flash on LS1088ARDB/LS1088ARDB-PB, rcw_1600_qspi.bin, is available at rcw/ls1088ardb/FCQQQQQQQQ_PPP_H_0x1d_0x0d/. See the rcw/ls1088ardb/README file for an explanation of the naming convention for the directories that contain the RCW source and binary files. Flashing PBL binary to QSPI NOR flash Boot LS1088ARDB/LS1088ARDB-PB from QSPI. Ensure that the switches are set to boot the board from QSPI. For booting from QSPI, SW1[1:8] + SW2[1] = 0011_0001_X Boot from QSPI NOR flash0: => qixis_reset For example: For LS1088ARDB, in boot log, you’ll see: Board: LS1088A-RDB, Board Arch: V1, Board version: C, boot from QSPI:0 For LS1088ARDB-PB, in boot log, you'll see: Board: LS1088ARDB-PB, Board Arch: V1, Board version: A, boot from QSPI:0 PBL binary can be loaded to LS1088ARDB/LS1088ARDB-PB from a TFTP server or from a mass storage device (SD, USB, or SATA). Option 1: Load image from a TFTP server Set up Ethernet connection When board boots up, U-Boot prints a list of enabled Ethernet interfaces. DPMAC1@xgmii, DPMAC2@xgmii, DPMAC3@qsgmii, DPMAC4@qsgmii, DPMAC5@qsgmii, DPMAC6@qsgmii, DPMAC7@qsgmii, DPMAC8@qsgmii, DPMAC9@qsgmii, DPMAC10@qsgmii Set server IP address to the IP address of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the Ethernet interface connected to the TFTP server. See LS1088ARDB/LS1088RDB-PB Ethernet port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux. => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime DPMAC3@qsgmii => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact DPMAC3@qsgmii Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command. Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using DPMAC3@qsgmii device host 192.168.1.1 is alive Load PBL binary from the TFTP server Program QSPI NOR flash1: => sf probe 0:1 TFTP PBL binary from the server to the DDR and write image to QSPI NOR flash1: => tftp 0xa0000000 <pbl binary> => print filesize filesize=b4 => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize  Address 0x0 is the location of PBL in QSPI NOR flash.  For the complete flash memory layout for the PPA boot flow, refer Flash layout for old boot flow with PPA. Boot from QSPI NOR flash1: => qixis_reset altbank For LS1088ARDB, in boot log, you’ll see: Board: LS1088A-RDB, Board Arch: V1, Board version: C, boot from QSPI:1 For LS1088ARDB-PB, in boot log, you'll see: Board: LS1088ARDB-PB, Board Arch: V1, Board version: A, boot from QSPI:1 Ensure that SD card, USB flash drive, or SCSI hard disk installed with LSDK Ubuntu distribution is plugged into the board to boot the board to Ubuntu. If U-Boot does not find LSDK on a mass storage device, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored in QSPI NOR flash. Option 2: Load image from partition on mass storage device (SD, USB, or SATA) Select mass storage device to use. => mmc rescan => mmc info Or => usb start => usb info Or => scsi scan => scsi info Optional – List files on the storage device. => ls mmc <device:partition> For example: => ls mmc 0:2 Or => ls usb <device:partition> For example: => ls usb 0:1 Or => ls scsi <device:partition> For example: => ls scsi 0:2 Program QSPI NOR flash1: => sf probe 0:1 Load PBL image from the storage device. => load mmc 0:2 a0000000 <image name> => print filesize For example: => load mmc 0:2 a0000000 rcw_1600_qspi.bin => print filesize filesize=b4 Or => load usb 0:2 a0000000 <image name> => print filesize Or => load scsi 0:2 a0000000 <image name> => print filesize Program image to QSPI NOR flash: => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize Address 0x0 is the location of PBL binary in QSPI NOR flash.  Refer Flash layout for old boot flow with PPA for the complete flash memory layout for the PPA boot flow. Boot from QSPI NOR flash1: => qixis_reset altbank For LS1088ARDB, in boot log, you’ll see: Board: LS1088A-RDB, Board Arch: V1, Board version: C, boot from QSPI:1 For LS1088ARDB-PB, in boot log, you'll see: Board: LS1088ARDB-PB, Board Arch: V1, Board version: A, boot from QSPI:1 Ensure that SD card, USB flash drive, or SCSI hard disk installed with LSDK Ubuntu distribution is plugged into the board to boot the board to Ubuntu. If U-Boot does not find LSDK on a mass storage device, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored in QSPI NOR flash.

Follow these steps to update the DPAA1 FMan ucode image on the SD card.  Obtaining DPAA1 FMan ucode image Clone the qoriq-fm-ucode repository. $ git clone https://github.com/NXP/qoriq-fm-ucode.git $ cd qoriq-fm-ucode $ git checkout LSDK-<LSDK version>. For example, $ git checkout LSDK-18.12 The prebuilt FMan ucode images, fsl_fman_ucode_ls1046_r1.0_<microcode version>.bin, are at qoriq-fm-ucode/. In the binary file, ls1046_r1.0 refers to the LS1046A silicon revision 1.0. See qoriq-fm-ucode/readme for a description of the ucode version numbers. SD card start block number for DPAA1 FMan ucode image Image  SD card start block number DPAA1 FMan ucode image 0x04800 = 18432 Refer Flash layout for new boot flow with TF-A for complete listing of the SD card start block numbers for all LSDK firmware images. Programming DPAA1 FMan ucode image to SD card Plug the SD card into the Linux host. Run the following command on the Linux host: $ sudo dd if=fsl_fman_ucode_ls1046_r1.0_<ucode version>.bin of=/dev/sdX bs=512 seek=18432 conv=fsync Use the command cat /proc/partitions to see a list of devices and their sizes to make sure that the correct device names have been chosen. The SDHC storage drive in the Linux PC is detected as /dev/sdX, where X is a letter such as a, b, c. Make sure to choose the correct device name, because data on this device will be replaced. If your Linux host machine supports read/write SDHC card directly without an extra SDHC card reader device, the device name of SDHC card is typically mmcblk0.                             Remove the SD card from the Linux host machine. Plug the SD card into LS1046ARDB and boot the board to Ubuntu using the SD card. You can boot the board using the SD card either by: setting the switches: SW3[1:8] = 01001110 and SW5 [1:8] = 00100000, or boot switching to SD card => cpld reset sd In boot log, you’ll see: Board: LS1046ARDB, boot from SD You can check the following code line in the boot log to confirm that the DPAA1 FMan ucode image on the SD card is updated. Fman1: Uploading microcode version 106.4.18 If U-Boot does not find LSDK on the SD card, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored on the SD card.

#lx2160a‌ #lx2160a reference design board‌ #edge_devices‌ #edge-node‌

NXP created eIQ machine learning software for QorIQ Layerscape applications processors, a set of ML tools which allows developing and deploying ML applications on the QorIQ Layerscape family of devices. OpenCV is an open-source computer vision library. It offers a unitary solution for both the neural network inference (DNN module) and the standard machine learning algorithms (ML module). It includes many computer vision functions, making it easier to build complex machine learning applications in a short amount of time and without being dependent on other libraries. This document describe applications YOLO object detection, Image segmentation, Image colorization, Image classification, Human pose estimation and Text detection developed based on OpenCV DNN framework.

The VPP platform is an extensible framework that provides out-of-the-box production quality switch/router functionality. This document introduces Vector Packet Processing(VPP), creating VPP IPsec configuration scripts, building VPP v20.05 in LSDK 20.12, executing VPP IPsec on LS1046ARDB and LS2088ARDB platforms

This how-to topic is applicable only for LSDK 18.09 and older releases. For LSDK 18.12 and newer releases, refer LS1088ARDB-PB - How to deploy TF-A binaries on SD card. Follow these steps to update the PBL/RCW binary on the SD card.  Compiling PBL binary from RCW source file (optional) If user already has a PBL binary, this step can be skipped.   Clone the  rcw repository and compile the PBL binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw $ cd rcw $ git checkout -b <new branch name> <LSDK tag>. For example, $ git checkout -b LSDK-18.09 LSDK-18.09  $ cd ls1088ardb If required, make changes to the rcw files. $ make   The default PBL binary for LS1088ARDB/LS1088ARDB-PB is FCQQQQQQQQ_PPP_H_0x1d_0x0d/rcw_1600_qspi.bin.   See the rcw/ls1088ardb/README file for an explanation of the naming convention for the directories that contain the RCW source and binary files. SD card start block number for PBL/RCW binary Image  SD card start block number PBL/RCW binary 0x00008 = 8 Refer the Flash layout for old boot flow with PPA – LSDK 18.09 and older releases for complete listing of the SD card start block numbers for all LSDK firmware images. Programming PBL/RCW binary to SD card Plug the SD card into the Linux host. Run the following command on the Linux host: $ sudo dd if=rcw_1600_qspi.bin of=/dev/sdX bs=512 seek=8 conv=fsync Use the command cat /proc/partitions to see a list of devices and their sizes to make sure that the correct device names have been chosen. The SDHC storage drive in the Linux PC is detected as /dev/sdX, where X is a letter such as a, b, c. Make sure to choose the correct device name, because data on this device will be replaced. If your Linux host machine supports read/write SDHC card directly without an extra SDHC card reader device, the device name of SDHC card is typically mmcblk0.    Remove the SD card from the Linux host machine. On the LS1088ARDB/LS1088ARDB-PB, ensure that the switches are set to boot the board from the SD card.  For booting from SD card, SW1[1:8] + SW2[1] = 0010_0000_0  Plug the SD card to the board and boot the board to Ubuntu. If U-Boot does not find LSDK on the SD card, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored on the SD card.

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-342651 

On LS2085 platform, the basic networking product performs autonomous IP forwarding and IPSEC on the AIOP, data path functions run mostly independent of the GPP software and only involve GPP when necessary. NADK(Network Acceleration Development Kit) is a complete user space development kit for networking applications. This IPSEC application is implemented in Linux user space using NADK framework, this application learns the Linux configuration through the netlink event notification and sends the configuration to AIOP DP using the respective NF APIs. The application invokes NF APIs to send configuration details to IPsec data path on the AIOP. 1. Overview and Architecture of the AIOP-NADK Based IPSEC Application 2. NADK Based GPP Listener Program Design 2.1 NADK APIs Introduction Used in the Application 2.2 Packet Processing in Multiple Threads Mode NADK Application 2.3 IPSEC XFRM Events monitored by the Listener 3. IPSEC Application communicates with AIOP through NF APIs 3.1 IPSEC provided features implemented at AIOP 3.2 IPSEC NF APIs Used to Configure AIOP 3.3 The process of add SPD policy in the IPSEC Application 4. Setup Networking Environment to Verify the IPSEC application

The below steps describe how to measure the CPU power using sensors and also describe how to stress individual cores of CPU. Steps are explained with an example of LX2160A SoC. However, these steps are applicable to all Layerscape devices. Download Flexbuild and add packages in Ubuntu:Lite Generate Ubuntu-based Lite userland (Ubuntu:Lite) Enable system monitoring unit and build kernel Generate .itb image Load .itb image from TFTP server to Layerscape board Validate stress package and measure CPU power using sensors Step 1: Download Flexbuild and add packages in Ubuntu:lite On a Linux machine, download Layerscape Software Development Kit - <version>. Go to Download tabs at http://www.nxp.com/lsdk. Enter login details, accept the agreement to download the Flexbuild source tarball in the name format flexbuild_<version>.tgz. Run the following commands to extract Flexbuild files from tar archived file. $ tar xvzf flexbuild_<version>.tgz $ cd flexbuild_<verison> $ source setup.env $ flex-builder -h Add packages for stress and power sensors in the additional_lite_packages_list file available in the flexbuild_<version>/configs/ubuntu/ folder. Add ‘stress’ and ‘lm-sensors’ packages for Ubuntu Lite as shown below: Save and exit the file. Step 2 – Generate Ubuntu:Lite image Change directory to flexbuild_<version>. Clean obsolete cache data. This step is needed in case the source/configuration has changed. $ source setup.env $ flex-builder -i clean-rfs -r ubuntu:lite Generate Ubuntu-based Lite userland using the following command: $ flex-builder -i mkrfs -r ubuntu:lite This generates rootfs_lsdk<version>_ubuntu_lite_arm64 file. For example: rootfs_lsdk2004_ubuntu_lite_arm64 file. Pack userland in tgz format (Optional step). $ flex-builder -i packrfs -r ubuntu:lite For example: rootfs_lsdk2004_ubuntu_lite_arm64.tgz (~180 M)   Step 3 Enable system monitoring unit and build kernel Change directory to flexbuild_<version>/packages/linux/linux. Enable environmental setting for cross-compiling. The following setting is applicable when you configure and build kernel on a different architecture from the target. For example, compiling an Armv8 kernel on an X86 computer. Run the following commands on Ubuntu Linux: $ export CROSS_COMPILE=aarch64-linux-gnu- $ export ARCH=arm64 Run make menuconfig command to configure settings to enable system monitoring unit for sensing power. $ make menuconfig The command opens the kernel configuration [tree-view structure] prompt. Use the Arrow keys to navigate the menu and Enter to select the submenu. Navigate to Device Drivers --> <*> Hardware Monitoring Support --> [M] Texas Instruments INA219 and compatibles option. Device Drivers-->Hardware Monitoring Support Press Y key to include the option. [*] symbol indicates the option is included (shown in below figure). This enables INA220. Texas Instruments INA219 and Compatibles option included Similarly, include the following options to enable I2C block device driver support and I2C bus multiplexing PC9547. Kernel Configure Tree View Option After you include all options as mentioned in the above table, save the configuration with a file name. For example,  save the configuration file as power.config. Exit to come out of the Kernel Configuration prompt. Copy the configuration file to arch/arm64/configs folder. $ cp <config filename> arch/arm64/configs/ For example, $ cp power.config arch/arm64/configs/ Configure the kernel. Load the changed configuration for Layerscape Armv8 platform in 64-bit mode for LSDK. $ export CROSS_COMPILE=aarch64-linux-gnu- $ export ARCH=arm64 $ make distclean $ make defconfig <config filename> Build kernel image and device tree image. $ make -j8 Step 4 - Generate .itb file Generate .itb file, which includes stress package and thermal monitoring unit installed, for kernel booting. Copy the Image and Image.gz files from the /flexbuild_<version>/packages/linux/linux/arch/arm64/boot folder and to the /flexbuild_<version>/build/linux/kernel/arm64/LS folder. Change directory to flexbuild_<version>. Generate .itb image using flex-builder. $ source setup.env $ flex-builder -i mkitb -r ubuntu:lite This generates lsdk<version>_ubuntu_lite_LS_arm64.itb file. For example, lsdk2004_ubuntu_lite_LS_arm64.itb Copy the .itb image to the TFTP server. Step 5 - Load .itb image from TFTP server to Layerscape board Set up Ethernet connection between the board (for example, LX2160ARDB) and host machine on which you have configured the TFTP server. Boot the board to U-Boot prompt. U-Boot prints a list of enabled Ethernet interfaces. For example, LX2160ARDB U-Boot prints following Ethernet interfaces. DPMAC2@xlaui4, DPMAC3@xgmii, DPMAC4@xgmii, DPMAC5@25g-aui, DPMAC6@25g-aui, DPMAC17@rgmii-id, DPMAC18@rgmii-id  Set server IP address to the IP address of the host machine on which you have configured the TFTP server. => setenv serverip <ipaddress1> Set ethact and ethprime as the ethernet interface connected to the TFTP server. See LX2160ARDB Ethernet Port Mapping  for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux. => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime DPMAC3@xgmii => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact DPMAC3@xgmii Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command.  Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using DPMAC3@xgmii device host 192.168.2.1 is alive Load the .itb image from TFTP server to DDR memory of the board. => tftp 0xa0000000 <itb_file_name> For example: => tftp 0xa0000000 sdk2004_ubuntu_lite_LS_arm64.itb Boot the kernel with .itb image as follows: => bootm 0xa0000000#<board_name> For example: => bootm 0xa0000000#lx2160ardb Board boots to Linux prompt. Step 6 – Validate stress package and measure CPU power using sensors Validate if stress and sensors packages have been installed properly. $ which stress ./usr/bin/stress  $ which sensors ./usr/bin/sensors Measure CPU power before applying stress to the cores. $ sensors CPU power before stress Apply stress to CPU cores using the following command. # stress -c <number of cores> -i <number of IO> -m <number of vm> --vm-bytes 128M -t <time in seconds> & For example: The command applies stress for 60 seconds. For more information on stress command, run stress-h command for help. Measure CPU power after applying stress in given time interval. $ sensors

Trusted Firmware for Cortex-A (TF-A) is an implementation of EL3 secure firmware. TF-A replaces PPA in secure firmware role. Please note the steps listed in this topic can only be performed with LSDK 18.12 and newer releases.                                                       To migrate to the TF-A boot flow from the previous boot flow (with PPA), you need to compile the TF-A binaries, bl2_<boot_mode>.pbl and fip.bin, and flash these binaries on the specific boot medium on the board. For NOR boot, you need to compile the following TF-A binaries. TF-A binary name Components bl2_nor.pbl BL2 binary: Platform initialization binary RCW binary for NOR boot  fip.bin BL31: Secure runtime firmware BL32: Trusted OS, for example, OPTEE (optional) BL33: U-Boot/UEFI image   Follow these steps to compile and deploy TF-A  binaries (bl2_nor.pbl and fip.bin) on the NOR flash. Compile RCW binary Compile U-Boot binary [Optional] Compile OPTEE binary  Compile TF-A binaries (bl2_nor.pbl and fip.bin) for NOR boot Program TF-A binaries to the NOR flash Step 1: Compile RCW binary  You need to compile the rcw_1800.bin binary to build the bl2_nor.pbl binary. Clone the  rcw repository and compile the PBL binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw $ cd rcw $ git checkout -b <new branch name> <LSDK tag>. For example, $ git checkout -b LSDK-19.09 LSDK-19.09  $ cd ls2088ardb If required, make changes to the rcw files. $ make The compiled PBL binary for NOR boot on LS2088ARDB, rcw_1800.bin, is available at rcw/ls2088ardb/FFFFFFFF_PP_HH_0x2a_0x41 See the rcw/ls2088ardb/README file for an explanation of the naming convention for the directories that contain the RCW source and binary files. Step 2: Compile U-Boot binary You need to compile the u-boot.bin binary to build the fip.bin binary. Clone the u-boot repository and compile the U-Boot binary for TF-A. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot.git $ cd u-boot $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.09 LSDK-19.09 $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- $ make distclean $ make ls2088ardb_tfa_defconfig $ make If the make command shows the error "*** Your GCC is older than 6.0 and is not supported", ensure that you are using Ubuntu 18.04 64-bit version for building the LSDK 18.12 and onwards U-Boot binary.                                                              The compiled U-Boot binary, u-boot.bin, is available at u-boot/.   Step 3: [Optional] Compile OPTEE binary  You need to compile the tee.bin binary to build fip.bin with OPTEE. However, OPTEE is optional, you can skip the procedure to compile OPTEE if you want to build the FIP binary without OPTEE.   Clone the optee_os repository and build the OPTEE binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/optee_os $ cd optee_os $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.09 LSDK-19.09 $ export ARCH=arm $ export CROSS_COMPILE=aarch64-linux-gnu- $ make CFG_ARM64_core=y PLATFORM=ls-ls2088ardb $ aarch64-linux-gnu-objcopy -v -O binary out/arm-plat-ls/core/tee.elf out/arm-plat-ls/core/tee.bin The compiled OPTEE image, tee.bin, is available at optee_os/out/arm-plat-ls/core/. Step 4: Compile TF-A binaries for NOR boot Clone the atf repository and compile the TF-A binaries, bl2_nor.pbl and fip.bin. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/atf $ cd atf $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.09 LSDK-19.09 $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- Build BL2 binary with OPTEE. $ make PLAT=ls2088ardb bl2 SPD=opteed BOOT_MODE=nor BL32=<path_to_optee_binary>/tee.bin pbl RCW=<path_to_rcw_binary>/rcw_1800.bin The compiled BL2 images, bl2.bin and bl2_nor.pbl are available at atf/build/ls2088ardb/release/. For any update in the BL2 source code or RCW binary, the bl2_nor.pbl binary needs to be recompiled. To compile the BL2 binary without OPTEE: $ make PLAT=ls2088ardb bl2 BOOT_MODE=nor pbl RCW=<path_to_rcw_binary>/rcw_1800.bin                     Build FIP binary with OPTEE and without trusted board boot. $ make PLAT=ls2088ardb fip BL33=<path_to_u-boot_binary>/u-boot.bin SPD=opteed BL32=<path_to_optee_binary>/tee.bin The compiled BL31 and FIP binaries, bl31.bin, fip.bin, are available at atf/build/ls2088ardb/release/. For any update in the BL31, BL32, or BL33 binaries, the fip.bin binary needs to be recompiled. To compile the FIP binary without OPTEE and without trusted board boot: $ make PLAT=ls2088ardb fip BOOT_MODE=nor BL33=<path_to_u-boot_binary>/u-boot.bin To compile the FIP binary with trusted board boot, refer the read me at <atf repository>/plat/nxp/README.TRUSTED_BOOT                                                                     Step 5: Program TF-A binaries to NOR flash Boot LS2088ARDB from NOR flash. Ensure that the switches and jumpers are set to boot the board from NOR bank 0.  SW5[1:8] = 1111 1111 SW3[1:8] = 0001 0010 SW4[1:8] = 1111 1111 SW6[1:8] = 1111 1111 SW7[1:8] = 0100 0010 SW9[1:8] = 0100 0000 SW8[1:8] = 0111 1111 In addition to the above switch settings, make sure the following jumper settings are correct (for RDB Rev E and later) J14 = 1-2, for NOR boot Boot from NOR bank 0: => qixis_reset For LS2088ARDB, in boot log, you'll see: Board: LS2088AE Rev1.1-RDB, Board Arch: V1, Board version: F, boot from vBank: 0 TF-A binaries can be loaded to LS2088ARDB from a TFTP server or from a mass storage device (SD, USB, or SATA).   Option 1: Load image from the TFTP server Set up Ethernet connection When board boots up, U-Boot prints a list of enabled Ethernet interfaces. DPMAC1@xgmii, DPMAC2@xgmii, DPMAC3@xgmii, DPMAC4@xgmii, DPMAC5@xgmii, DPMAC6@xgmii, DPMAC7@xgmii, DPMAC8@xgmii Set server IP address to the IP address of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the Ethernet interface connected to the TFTP server. See LS2088ARDB Ethernet port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux.                                                              => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime DPMAC1@xgmii => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact DPMAC1@xgmii Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command.  Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using DPMAC1@xgmii device host 192.168.1.1 is alive Load TF-A binaries from the TFTP server For details about the flash image layout for TF-A binaries, refer LSDK memory layout for TF-A boot flow.                   Flash bl2_nor.pbl to NOR bank 4 (after booting from NOR bank 0). => tftp 82000000 bl2_nor.pbl => erase 0x584000000 +$filesize;cp.b 82000000 0x584000000 $filesize Flash fip.bin to NOR bank 4 (after booting from NOR bank 0). => tftp 82000000 fip.bin => erase 0x584100000 +$filesize;cp.b 82000000 0x584100000 $filesize Boot from NOR bank 4: => qixis_reset altbank LS2088ARDB will boot with TF-A. In the boot log, you will see: NOTICE: UDIMM 18ASF1G72AZ-2G3B1 NOTICE: 16 GB DDR4, 64-bit, CL=13, ECC on, 256B, CS0+CS1 NOTICE: UDIMM 18ASF1G72AZ-2G3B1 NOTICE: 4 GB DDR4, 32-bit, CL=11, ECC on, CS0+CS1 NOTICE: BL2: v1.5(release):LSDK-19.09 NOTICE: BL2: Built : 16:04:08, Nov 4 2019 NOTICE: BL31: v1.5(release):LSDK-19.09 NOTICE: BL31: Built : 16:40:39, Nov 4 2019 NOTICE: Welcome to LS2088 BL31 Phase U-Boot 2019.04 (Nov 04 2019 - 15:57:49 +0530) SoC: LS2088AE Rev1.1 (0x87090011) Clock Configuration: CPU0(A72):1800 MHz CPU1(A72):1800 MHz CPU2(A72):1800 MHz CPU3(A72):1800 MHz CPU4(A72):1800 MHz CPU5(A72):1800 MHz CPU6(A72):1800 MHz CPU7(A72):1800 MHz Bus: 700 MHz DDR: 1866.667 MT/s DP-DDR: 1600 MT/s Reset Configuration Word (RCW): 00000000: 483038b8 48480048 00000000 00000000 00000010: 00000000 00000000 00a00000 00000000 00000020: 01e01180 00002581 00000000 00000000 00000030: 00400c0b 00000000 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 00000000 00000000 00000060: 00000000 00000000 00027000 00000000 00000070: 412a0000 00040000 Model: Freescale Layerscape 2080a RDB Board Board: LS2088AE Rev1.1-RDB, Board Arch: V1, Board version: F, boot from vBank: 4 ....... Option 2: Load image from partition on mass storage device (SD, USB, or SATA) Select mass storage device to use. => mmc rescan => mmc info Or => usb start => usb info Or => scsi scan => scsi info Optional – List files on storage device => ls mmc <device:partition> For example: => ls mmc 0:2 Or => ls usb <device:partition> For example: => ls usb 0:1 Or => ls scsi <device:partition> For example: => ls scsi 0:2 If the ls command fails to run, check that U-Boot in NOR bank 0 supports the command by typing ls at the U-Boot prompt: => ls ls - Lists files in a directory (default) Usage: ls <interface> [<dev[:part]> [directory]] - Lists files in directory [directory] of partition [part] on device type [interface] and instance [dev]. If U-Boot does not support this command, then update the composite firmware image in NOR bank 0. For steps to update composite firmware image in NOR bank, see Layerscape Software Development Kit User Guide .            Use the following command if the SD card is formatted/created using LSDK flex-installer command: => load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]] For example: => load mmc 0:2 $load_addr bl2_nor.pbl Use the following command if the SD card is formatted/created on a Windows PC: => fatload <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]] For example: => fatload mmc 0:2 $load_addr bl2_nor.pbl Use the following command if the SD card is formatted/created on a Linux PC: => ext2load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]] For example: =>ext2load mmc 0:2 $load_addr bl2_nor.pbl Also note that LSDK flex-installer command puts the images on the IInd partition, so 0:2 is used in the load command. If the SD card is formatted on Windows PC or Linux PC for single partition only, then 0 should be used instead of 0:2 in the fatload/ext2load command.    Load bl2_nor.pbl image from the storage device => load mmc 0:2 0xa0000000 <image name> => print filesize For example: => load mmc 0:2 0xa0000000 bl2_nor.pbl => print filesize filesize=14379 Or => load usb 0:2 0xa0000000 <image name> => print filesize Or => load scsi 0:2 0xa0000000 <image name> => print filesize Program bl2_nor.pbl to NOR bank 4 (after booting from NOR bank 0): => erase 0x584000000 +$filesize;cp.b 0xa0000000 0x584000000 $filesize Load fip.bin image from the storage device => load mmc 0:2 0xa0000000 <image name> => print filesize For example: => load mmc 0:2 0xa0000000 fip.bin => print filesize filesize=131510 Or => load usb 0:2 0xa0000000 <image name> => print filesize Or => load scsi 0:2 0xa0000000 <image name> => print filesize Program fip.bin to NOR bank 4 (after booting from NOR bank 0): => erase 0x584100000 +$filesize;cp.b 0xa0000000 0x584100000 $filesize Boot from NOR bank 4: => qixis_reset altbank LS2088ARDB will boot with TF-A.

This document introduces how to configure software to disable the second DDR controller and only use DDR1 on LX2160A platforms, includes configuring RCW to disable clock of DDR2 by using DEVDISR register and setting HN-F SAM control registers to disable DDR2 in CodeWarrior and atf software coding. 1. Configure RCW to Disable clock of DDR2 by using DEVDISR register 2. Configuring HN-F SAM control register to disable DDR2 in CodeWarrior 3. ATF coding to configure HN-F SAM control register to disable the specific DDR controller

1. FMan VSP Hardware Overview 2. The usage of Virtual Storage Profiles 3. FMan VSP Driver 4. Traffic bifurcation using VSP on LS1046ARDB

Introduction.   CodeWarrior TAP combined with a host debugger provide control and visibility into your target embedded system through a debugging process. Main tasks to test a Reference Design Board with are: Flash an storage device for userspace debugging and recovering a board. RCW and PBL configuration. DDR and SerDes configuration. DDR and SerDes validation. U-Boot and Kernel debug For all of them and every activity involving real hardware, a link is needed nevertheless is a very straightforward process that is going to be crawled in this document.   Hardware List.   CodeWarrior TAP USB cable. USB A-Mini-B. CodeWarrior TAP TIP CWH-CTP-CTX10-YE. COP connector. CodeWarrior TAP Base Unit. CWH-CTP-BASE-HE. Host computer. Processor: Windows® OS: Intel® Pentium® 4 processor, 2 GHz or faster, Intel® Xeon™, Intel® Core™, AMD Athlon™ 64, AMD Opteron™, or later Linux® OS: 1.8 GHz Intel® Pentium® class processor (or better). 64-bit host OS required. Operating System: Microsoft® Windows 7 64-bit Microsoft® Windows 10 64-bit RHEL 7.8, 8.2 64-bit CentOS 7.8, 8.2 64-bit Ubuntu 16.04 64-bit Ubuntu 18.04 64-bit Ubuntu 20.04 64-bit Fedora 31 64-bit Mint 19.3 64-bit Memory. At least 2 GB of RAM At least 3 GB of free disk space NXP Reference Board featuring. LS2088A. LS1012A. LS1043A. LS1088A. LS1046A.   Power-up set-up.   Connect debugger and target's end to each other, while both of them are powered off. Connect TAP TIP multipin connector to TAP multipin socket pushing them.     Ribbon cable red side has to be on TIP pin 1 side and Target COP pin 1 side, look for CPU/Processor silkscreen and pin 1 label. See below examples.            Note that CPU JTAG silkscreen label is in the red box, but also may be visible the 1 label. Power up CWTAP. The most efficient way to set up CWTAP is using USB cable, due to can be both powered and communicated with just one cable. Connect USB to Host PC and wait for TX LED to go green blinking.     If communication is directly to host, considerate that you'll be joined into a private network and you will not have internet access. Power up Target. Connect target to DC supply and turn on power switch and press reset button (needed for boards which don't have a power switch). Create a connection in CodeWarrior.   Open CodeWarrior previously previously set up and with a workspace selected. Make sure that Target Connections window is visible, if not, look for it in Window > Show view > Other.   Every target connection desired has to be based on CW predefined board connections. Predefined connections are processor oriented and have a default configuration, you cannot and should not override this values, e.g., MAC field for TAP probe, you should duplicate and then customize it. Click on the reference board that you have, then duplicate, name new target and save.     Double click or click edit to enter TAP MAC value. Settings are initialized based on the duplicated board, it's recommended to just update MAC. Click on look for probes, select the one that matches your MAC and save.     Save. Serial number field is updated and you are notified of unsaved changes, is the asterisk at the left of your duplicate name, save (ctrl + s) and you may close the connection data is done now.     Open a project or create a new one. I created a new project to simply read RCW inside NOR Flash Bank 0 of LS1043ARDB following the below process.         Then, open Connections View to test the new connection based on custom connection data created before. Click on recheck connection button (green play button) and connection status should change from no-link (connection button right side) to connection working.     Diagnose connection.   Go to Target Connections view and click diagnose connection, Connection Diagnostics view should be popped up and log different tests to ensure that there is a target connection and SOC modules are accessible.     At this point, the connection is made and is already tested, but in this document, RCW will also be dumped into our project just to work ourselves with the connection already made. Under Component Inspector view go to Import tab, select Import From Target and click Read from target.     Results are display in text box as: RCWSR registers were successfully read from the target and imported! RCWSR1:0x08100010 RCWSR2:0x0A000000 RCWSR3:0x00000000 RCWSR4:0x00000000 RCWSR5:0x14550002 RCWSR6:0x80004012 RCWSR7:0xE0025000 RCWSR8:0xC1002000 RCWSR9:0x00000000 RCWSR10:0x00000000 RCWSR11:0x00000000 RCWSR12:0x00038800 RCWSR13:0x00000000 RCWSR14:0x00001101 RCWSR15:0x00000096 RCWSR16:0x00000001 That should save a connection to a CWTAP to reuse with that same MAC intended to a any RDB that features the selected processor. Later on you can recover LS Series processors, flash, configure or validate a board. Please ask any question you may have. Best regards, Joseph

UEFI (Unified Extensible Firmware Interface) describes an interface between the operating system (OS) and the platform firmware. The interface consists of data tables that contain platform-related information, plus boot and runtime service calls that are available to the operating system and its loader. Together, these provide a standard, modern environment for booting an operating system and running pre-boot applications. 1. UEFI boot flow 2. Build UEFI firmware images on the host PC 3. Generate Composite Firmware with UEFI Firmware Images 4. Deploy LSDK distro boot with UEFI

This document introduces a method to separate control plane and data plane between GPP(ARM) and AIOP based on different L4 protocols implemented in the AIOP software. So far, in the current MC version, this scenario could not be implemented from WRIOP using DPDMUX, so it is a good choice for users to separate the traffic in AIOP.   1. Basic Concept of DPAA2 Objects   2. AIOP Application to Implement Control in ARM and Data Plane in AIOP   3. Build AIOP Application Project with CodeWarrior   4. Running AIOP Application Program on LS2085ARDB

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CMSIS-DAP is a useful tool and exists in some NXP reference boards, but how to use it. This document describes the steps how to use the CMSIS-DAP in the LS1034ARDB as a reference for user.

Currently rate limiting is supported on TX side only via IOCTL call FM_PORT_IOC_SET_RATE_LIMIT. A user-space application has to be implement which opens the character driver interface of the TX port and issue the IOCTL. The rate_limit structure (mentioned below) has to be filled to implement the restriction.   For example:   fd = open ("/dev/fm0_port_tx5", O_RDWR);   err = ioctl(fd, FM_PORT_IOC_SET_RATE_LIMIT, &fm_port);   Structure to pass to the IOCTL: /**************************************************************************//** @Description@@   A structure for defining Tx rate limiting (Must match struct t_FmPortRateLimit defined in fm_port_ext.h) *//***************************************************************************/ typedef struct ioc_fm_port_rate_limit_t { uint16_t max_burst_size;         /**< in KBytes for Tx ports, in frames for offline parsing ports. (note that for early chips burst size is rounded up to a multiply of 1000 frames).*/     uint32_t rate_limit; /**< in Kb/sec for Tx ports, in frame/sec for offline parsing ports. Rate limit refers to data rate (rather than line rate). */ ioc_fm_port_dual_rate_limiter_scale_down rate_limit_divider; /**< For offline parsing ports only. Not-valid for some earlier chip revisions */ } ioc_fm_port_rate_limit_t; Further information in the below link. http://www.freescale.com/infocenter/index.jsp?topic=%2FQORIQSDK%2F2283674.html

[中文翻译版] 见附件   原文链接： https://community.nxp.com/docs/DOC-343572