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Adeneo Embedded enhances the already feature rich Windows Embedded Compact 7 (WEC7) BSP for the i.MX6 platforms by adding support for PCIe. PCIe support now enables customers to connect various PCI based peripherals to the high performance i.MX6 platform. In the example shown in the video, a PCIe based network card can be seen working with the i.MX6 SABRE lite board. The PCI bus and controller driver implementations from Adeneo are of production quality.
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REX - Freescale iMX6 Opensource Project Designed by FEDEVEL Academy Based on Freescale i.MX6 CPU. This is an open source project. All documents are free for download, including Schematic and PCB files. The iMX6 Rex Module is also used for teaching about Schematic Design and Advanced PCB Layout at FEDEVEL Academy. Module Specification Freescale iMX6 processor, up to 1.2GHz / 4 cores Soldered down DDR3-1066 (533MHz), up to 4GB 10/100/1000 Mbps Ethernet 1x HDMI (up to QXGA 2048×1536) 1x LVDS (up to WUXGA 1920×1200) 1x PCIE 1x SATA On board SPI Flash up to 32Mb 1x SD, 1x MMC 2x USB 3x UART, 3x I2C, 1x SPI Digital audio JTAG User LED, power LED 2x high speed board to board connectors (only one required) Size: 70 x 40 mm (smaller than a credit card) Input power: 7 to 24 V (DC) Releated posts iMX6 Rex EMC Testing – Pass iMX6 Rex infrared images User friendly GUI + Mouse + Keyboard working ok How long it took to design the iMX6 Rex module prototype? iMX6 Module Total Cost Prototype Developement The iMX6 Rex module design licensing Video from Assembling iMX6 Rex Boards Bringing up i.MX6 Rex Module to Life – from unpacking to booting iMX6 Rex Layout Video
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LTC3676 datasheet Features Quad I 2 C Adjustable High Efficiency Step Down DC/DC Converters: 2.5A, 2.5A, 1.5A, 1.5A Three 300mA LDO Regulators (Two Adjustable) DDR Power Solution with V TT and VTTR Reference Pushbutton ON/OFF Control with System Reset Independent Enable Pin-Strap or I 2 C Sequencing Programmable Autonomous Power-Down Control Dynamic Voltage Scaling Power Good and Reset Functions Selectable 2.25MHz or 1.12MHz Switching Frequency Always Alive 25mA LDO Regulator 12μA Standby Current Low Profile 40-Lead 6mm × 6mm × 0.75mm QFN Package Linux Driver Instructions (Please note that this is a Beta Release Version) The driver is good reference code to illustrate how to communicate with LTC3676 via I2C. The .zip file also includes a test app and readme.txt with instructions. It has been tested with i.MX6Q NovPek board from NovTech. It is configured for the LTC3676-1 but also support LTC3676 by simply changing a flag and there are comments about the minor difference between the -1 and non-1 for the driver. Here is the description and instructions also contained in the included readme file: This package contains the linux driver for LTC3676 and LTC3676-1. It has been tested with i.MX6Q. It also includes a test app. It is configured for the LTC3676-1 but there are internal comments about the minor difference between the -1 and non-1 for the driver. Here are general instructions on how to include this new driver in the Linux build using ltib. You can also see that it is tested with linux-3.0.35 that Freescale has used for i.MX6. 1) cd ltib/rpm/BUILD/linux-3.0.35 (Where your Ltib folder is stored). 2) extract zip file: tar -zxpf LTC3676_Driver.tar.gz 3) Run LTIB configure: ./ltib -c 4) Select "Configure the kernel", exit, and yes to save. 5) When Kernel Menu appears, select "Device Drivers". 6) Select "Voltage and Current Regulator Support". 7) Select "Linear LTC3676 Regulator Driver" to compile into kernel. Don't build as a module. 😎 Exit and Save. 9) Ltib should build the kernel with the driver. Application Instructions: This builds in the ltc3676_1_test application to allow a user to check the regulators and dynamically change the voltage on the ARM core rail. The voltage movement is small to not push the i.MX6 outside normal operation. This test application does not have any overvoltage error checking for safety. It also does not change the processor frequency. It just tests the basic LTC3676 driver operation. 1) cd ltib (Where your Ltib folder is stored). 2) Run "./ltib -m prep -p imx-test" 3) Move the ltc3676_test folder extracted from this tar file: "mv rpm/BUILD/linux-3.0.35/ltc3676_test rpm/BUILD/imx-test-12.09.01/test/." 4) Run "./ltib -m scbuild -p imx-test" 5) Run "./ltib" 6) Burn SD Card, "./mk_mx6_sd -ukr /dev/sdb", /dev/sdb is the name of the SD card. 7) Safely Remove SD Card and install in NOVPEK board. 😎 Power and boot to Linux. 9) Run "cd /unit_test " 10) Run Application, ./ltc3676_1_test i.MX6 Board from NovTech (Click on this link) Schematics for LTC3676-1 Linear Technology Power Plug in Board available. Contact your local Linear Technology sales office Gerard Velcelean (gvelcelean@linear.com) or Steve Knoth (sknoth@linear.com) if you have any questions.
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NOVPEK TM i.MX6Q/D System Download the NOVPEK i.MXQ/D Brochure Includes NOVPEK TM i.MX6Q/D Module 201 easily accessible IOMUX pins Arranged in 32x2 100mil pin headers Advanced Power Management (PM) development support via Add-on Card, various PM options available Multiple voltage settings for each peripheral voltage rail Accurate power consumption analysis framework for all 35 voltage rails on the i.MX6Q/D On-board debug ports: JTAG and 16bit ETM Bootable with terminal support RS232 and TTL interfaces, only uses two i.MX6Q/D pins All i.MX6Q/D boot options Simplified firmware/software development through 10/100 Ethernet port SPI based, doesn’t consume the built-in FEC USB HOST port and USBOTG port that can be forced to HOST mode HDMI video out port SATA interface LVDS interface PCI Express Mini PCIe with SIM slot MIPI/SDI interface Highly integrated NovTech PM solution Multiple power-on events Reprogrammable for configurability   For more information click here  
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NXP i.MX7 CPU, dual-core Cortex-A7 1GHz Up to 2GB DDR3 and 32GB eMMC 3G/LTE modem, WiFi 802.11a/b/g/n, BT 4.1 2x 1000Mbps Ethernet, 4x USB2, RS485, RS232 Support for PoE powered mode Fanless design in aluminum, rugged housing Miniature size – 10.8 x 8.3 x 2.4 cm Designed for reliability and 24/7 operation Wide temperature range of -40C to 85C Mainline Linux kernel and full Linux BPS IOT-GATE-iMX7 is built around the NXP i.MX7 System-on-Chip featuring an advanced ARM Cortex-A7 CPU coupled with a dedicated real-time ARM Cortex-M4 MCU. The SoC is supplemented with up-to 2GB DDR3 and 32GB of on-board eMMC storage.   Featuring a wide range of embedded interfaces, IOT-GATE-iMX7 is a versatile platform for industrial automation and control systems. Dual Gbit Ethernet, 3G/LTE modem, dual-band 802.11a/b/g/n WiFi and Bluetooth 4.1 make IOT-GATE-iMX7 an excellent solution for networking, communications and IoT applications.   IOT-GATE-iMX7 is provided with a full Board Support Package and ready-to-run images for the Linux operating system. The IOT-GATE-iMX7 BSP includes Linux kernel 4.1.15, Yocto Project file-system and U-Boot boot-loader. In addition, CompuLab will support IOT-GATE-iMX7 with mainline Linux and upstream Yocto Project. IOT-GATE-iMX7 spec IOT-GATE-iMX7 evaluation kit IOT-GATE-iMX7 pricing
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Hi all, Below is our press release for our i.MX6 solutions, i.e., kits and boards. emtrion GmbH, a company specialised in Embedded Systems design, hardware and software, Freescale Proven Partner, announces the availability of a new industrial processor module based on the multicore Cortex-A9 i.MX6 SoC family from Texas Instruments. This new module, called DIMM-MX6, extends the emtrion DIMM family and offers a full electrical and mechanical compatibility with the other modules of the emtrion DIMM series. emtrion guarantees the availability of its new module for at least 10 years. The DIMM-MX6 module from emtrion brings high computing capabilities with up to 10.000 DMIPS, multiple NEON SIMD and VPFU co-processors at a low power level, without requiring any active cooling system. The DIMM-MX6 module is available in several versions, with either i.MX6 Solo (1 core), Dual (2 cors) or Quad (4 cores) and on-board memories ranging from 512MB up to 8GB for the Flash (SLC NAND) and from 512MB up to 2GB RAM (DDR3). The new module is also qualified for an extended temperature range of -40°C to +85°C. In addition to boards and kits, emtrion offers support for a broad range of operating systems, board support packages (BSP) as well as engineering services. The DIMM-MX6 is available now with a BSP for Linux, that will be followed by additional BSP for Windows Embedded Compact 7 (WEC7), for QNX 6.5 and for Android 4.0. The BSP are available together with a developer kit. Each developer kit includes a DIMM-MX6 industrial module, a base board, a display and a development environment. All parts are mounted together and programmed by emtrion. The kits are shipped ready to use.
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Boundary Devices is pleased to announce that its i.MX8M-based SBC Nitrogen8M is available and in stock! https://boundarydevices.com/product/nitrogen8m-imx8/  Nitrogen8M specifications The Nitrogen8M comes pre-populated with the most robust set of connectivity options available to allow for rapid development and validation of your next project. The boards are also be built with Boundary Device’s industry-leading, production-ready standards and include options such as industrial temp and conformal coating. All this allows the Nitrogen8M to be used as an evaluation platform or production-ready solution. Review the full list of the specifications below. More information including pricing and availability can be found on the Nitrogen8M product page: CPU — i.MX 8M Quad Core (x4 Cortex-A53 @ 1.5GHz; Cortex-M4 @ 266MHz) RAM — 2GB LPDDR4 (4GB Optional) Storage — 8GB eMMC (upgradeable to 128GB) GPU — Vivante GC7000Lite Camera — x2 4-lane MIPI-CSI Display — x1 HDMI (w/CEC) and x1 MIPI DSI several MIPI-DSI displays options available Wireless — 802.11 ac and Bluetooth 4.1 BD-SDMAC Module (QCA9377) Networking — Gigabit Ethernet port Other I/O: x3 USB 3.0 Host ports x1 USB 3.0 OTG port x3 I2C x1 SPI x3 RS-232 x1 SD/MMC x1 RTC + battery x2 PCIe (1 Mini-PCIE connector, 1 on expansion connector) x1 JTAG Power — 5V DC input Operating Temperature — 0 to 70°C (Industrial Optional) Operating System — Yocto, Ubuntu/Debian, Buildroot, FreeRTOS (M4 Core), Android Demos As some people say, a video is worth a thousand words, so let's just share what can run on that platform already: Nitrogen8M Crank Storyboard Demo - YouTube  Nitrogen8M Yocto GPU SDK Demo - YouTube  Nitrogen8M Android 8.1 Qt5 + 4k video demo - YouTube  Source code access The bootloader and kernel source code are already available publicly on our GitHub account: GitHub - boundarydevices/u-boot-imx6 at boundary-imx_v2017.03_4.9.51_imx8m_ga  GitHub - boundarydevices/linux-imx6 at boundary-imx_4.9.x_2.0.0_ga  Android has been officially released: https://boundarydevices.com/android-oreo-8-1-0-release-for-nitrogen8m/  Some benchmarking has been done to compare against previous i.MX6 CPUs Yocto BSP is on the way, Boundary Devices is actively contributing to the community BSP: meta-freescale-3rdparty/nitrogen8m.conf at master · Freescale/meta-freescale-3rdparty · GitHub  Ubuntu Bionic Beaver beta image is also available upon request (please contact support@boundarydevices.com). Feel free to contact us for more information: info@boundarydevices.com.
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MYIR introduces a high-performance ARM SoM MYC-JX8MX CPU Module, which is built around the NXP i.MX 8M Quad processor featuring 1.3GHz quad ARM Cortex-A53 cores and a real-time ARM Cortex-M4 co-processor. The module runs Linux and is capable of working in extended temperature ranging from -30°C to 80°C.   Measuring 82mm by 52mm, the MYC-JX8MX CPU Module has integrated 1GB/2GB LPDDR4, 8GB eMMC, 256Mbit QSPI Flash, Gigabit Ethernet PHY and PMIC on board. A large number of I/O signals are carried to or from the i.MX 8M CPU Module through one 0.5mm pitch 314-pin MXM 3.0 expansion connector, making it an excellent embedded solution for Scanning/Imaging, Building Automation and Smart Home, Human Machine Interface (HMI), Machine Vision and more other consumer and industrial applications which requires high multi-media performance. MYC-JX8MX CPU Module (delivered with heat sink by default) MYIR also offers a versatile platform MYD-JX8MX development board for evaluating the MYC-JX8MX CPU Module. It takes full features of the i.MX 8M processor and has brought out rich peripherals through connectors and headers such as 4 x USB 3.0 Host ports and 1 x USB 3.0 Host/Device port, Gigabit Ethernet, TF card slot, USB based Mini PCIe interface for 4G LTE Module, WiFi/BT, Audio In/Out, HDMI, 2 x MIPI-CSI, MIPI-DSI, 2 x LVDS display interfaces, PCIe 3.0 (x4) NVMe SSD Interface, etc. It is delivered with necessary cable accessories for customer to easily start development as soon as getting it out-of-box. A MIPI Camera Module MY-CAM003 is provided as an option for the board.                                                                       MYD-JX8MX Development Board MYIR offers 1GB or 2GB RAM selections for the CPU modules and development boards which have very-high powered prices to compare. Part No. Item Processor LPDDR4 eMMC Unit Price MYC-JX8MQ6-8E1D-130-E MYC-JX8MX  CPU Module NXP i.MX 8M Quad Processor based on 1.3GHz Quad ARM Cortex-A53 and 266MHz Cortex-M4 cores  (MIMX8MQ6CVAHZAB) 1GB 8GB $99 MYC-JX8MQ6-8E2D-130-E 2GB $119 MYD-JX8MQ6-8E1D-130-E MYD-JX8MX Development Board 1GB $279 MYD-JX8MQ6-8E2D-130-E 2GB $299 Supports extended working temperature ranging from -30°C to 80°C.
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NXP i.MX8M processor family, 1.5GHz Up to 4GB LPDDR4 and 64GB eMMC HDMI 2.0a, LVDS, MIPI-DSI, up to 4096 x 2160 Gbit Ethernet, WiFi 802.11a/b/g/n/ac, BT 4.1 2x PCIe, 2x USB3.0, 4x UART, 90x GPIO Industrial temperature range of -40C to 85C Yocto Linux and Android CompuLab's CL-SOM-iMX8 is a miniature System-on-Module board designed for integration into industrial embedded applications. CL-SOM-iMX8 is built around the new NXP i.MX8M System-on-Chip featuring a quad-core ARM Cortex-A53 CPU coupled with a powerful Vivante GC7000Lite GPU. The SoC is supplemented with up-to 4GB of LPDDR4 and 64GB of on-board eMMC storage. Designed to bring out the full capabilities of the i.MX8M SoC, CL-SOM-iMX8 provides Gbit Ethernet, PCIe, 2 USB3.0 ports, 4 UARTs and up-to 90 GPIOs. Display connectivity is supported with HDMI2.0, LVDS and MIPI-DSI interfaces with resolutions of up-to 4096 x 2160. In addition, CL-SOM-iMX8 features on-board WiFi 802.11ac and Bluetooth 4.1. CL-SOM-iMX8 is provided with full BSPs and ready-to-run images for Linux and Android operating system. CL-SOM-iMX8 BSP includes Linux kernel 4.9, Yocto Project file-system, Android 8.0 and U-Boot boot-loader. CL-SOM-iMX8 Detailed Spec CL-SOM-iMX8 Development Kit CL-SOM-iMX8 Online Pricing
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This document will explain Cairo setup to draw something on screen with hardware accelerates using OpenGL ES 2.0 or OpenVG.   Introduction:   As you know you can use those libraries that I mentioned (OpenGL ES and OpenVG) to draw on frame buffer with hardware accelerate on imx6q but using those libraries are a little bit hard to deal what I mean is that using OpenGL or OpenVG  is a kind of tough job but why? Let me bring an example here to clarify it, Imagine you want to draw an attitude aircraft symbol, this symbol needs some of elements to be drawn to look like a complete attitude symbol it includes: 1-Circle 2-line 3-Text 4-Triangle 5-some custom shapes for instance two L like lines that draw horizontally   If you have an experience with OpenGL specially OpenGL ES you’ll realize that drawing circle, line, triangle and so forth doesn’t a really tough job, of course drawing these primitive in OpenGL needs more lines of code in contrast with Cairo API that you can draw them with just three lines of code but the most hard job is drawing TEXT in OpenGL when you want to draw a simple text you have to deal with extra libraries like freetype,… to fetch the glyph features and then you can using atlas approach to draw text in a bitmap texture then when you need a character in your app  you can access to the character’s position in previous stored glyph in the texture, fetch and use, also you need to work with two specific OpenGL ES shaders in this case.   So I think it’s ok to use OpenGL or OpenVG to draw shapes if you are really skilled with those or if you looking for trouble! 😄 personally I prefer to use a high level API and then focus on other aspect of my application.   Compiling Cairo:   This document doesn’t intend to configure or compile Cairo, I’m sure that you can easily configure and compile it with OpenGL ES backend with YOCTO, Buildroot or any other embedded Linux distribution builders (YOCTO and Buildroot aren’t an embedded Linux distributions they can make custom one for you) even you can compile it manually.   To configure: ./configure --prefix=/home/super/Desktop/ROOTFS/MY_ROOTFS/usr --host=${CROSS_COMPILE} CFLAGS="-I/home/super/Desktop/ROOTFS/MY_ROOTFS/usr/include/ -DLINUX -DEGL_API_FB" LIBS="-L/home/super/Desktop/ROOTFS/MY_ROOTFS/usr/lib/ -lz" --enable-xlib=no --enable-egl --enable-glesv2   To compile: make     By the way you can find your suitable configuration for your own board; Cairo has a lot of options.     How to make surface for Cairo:   If you have an experience drawing shapes with Cairo you know that you need a surface from cairo_t* type to drawing function API can work on and shapes appear on the screen. To create a Cairo surface that uses OpenGL ES you have to configure EGL (EGL is an interface between Khronos rendering APIs (such as OpenGL, OpenGL ES or OpenVG) and the underlying native platform windowing system)[1] correctly and then make a Cairo surface from it.                    EGLint config_attributes[] =                 {                                                EGL_RENDERABLE_TYPE,                                                EGL_OPENGL_ES2_BIT,                                                EGL_RED_SIZE, 8,                                                EGL_GREEN_SIZE, 8,                                                EGL_BLUE_SIZE, 8,                                                EGL_ALPHA_SIZE,EGL_DONT_CARE,                                                EGL_SURFACE_TYPE,EGL_WINDOW_BIT,                                                EGL_DEPTH_SIZE, 16,                                                EGL_SAMPLES,      4,                                                EGL_NONE                 };   When you want to change OpenGL ES v 2.0 with OpenVG it’s enough that change the parameter of EGL_RENDERABLE_TYPE (that is EGL_OPENGL_ES2_BIT) to EGL_OPENVG_BIT.   The below code will appear Figure 1 on screen:     Figure 1:Simple drawing by Cairo on IMX6Q     //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   //======================================================================== // Name        : testCairo.cpp // Author      : Ali Sarlak // Version     : 1.0 // Copyright   : GPL // Description : EGL+Cairo GLIB //========================================================================   #include <iostream> #include <stdio.h> #include <EGL/egl.h> #include <EGL/eglext.h> #include <EGL/eglplatform.h> #include <cairo/cairo-gl.h> #include <EGL/eglvivante.h> #include <stdlib.h>     #define DISPLAY_WIDTH 640 #define DISPLAY_HEIGHT 480 using namespace std;   int main() {     printf("START\n");     printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n");     EGLContext eglContext;     EGLSurface eglSurface;     EGLBoolean resultB;       /* Get a display handle and initalize EGL */     EGLint major, minor;     EGLDisplay eglDisplay = eglGetDisplay(EGL_DEFAULT_DISPLAY);       resultB = eglInitialize(eglDisplay, &major, &minor);       EGLint config_attributes[] =     {             EGL_RENDERABLE_TYPE,             EGL_OPENGL_ES2_BIT,             EGL_RED_SIZE, 8,             EGL_GREEN_SIZE, 8,             EGL_BLUE_SIZE, 8,             EGL_ALPHA_SIZE,EGL_DONT_CARE,             EGL_SURFACE_TYPE,EGL_WINDOW_BIT,             EGL_DEPTH_SIZE, 16,             EGL_SAMPLES,      4,             EGL_NONE     };       EGLint numberConfigs = 0;     EGLConfig* matchingConfigs=NULL;       if (EGL_FALSE             == eglChooseConfig(eglDisplay, config_attributes, NULL, 0, &numberConfigs))     {         printf("eglChooseConfig EROR\n");     }     if (numberConfigs == 0)     {         printf("eglChooseConfig EROR\n");     }       printf("number of configs = %d\n", numberConfigs);     /* Allocate some space to store list of matching configs... */     matchingConfigs = (EGLConfig*) malloc(numberConfigs * sizeof(EGLConfig));       if (EGL_FALSE  == eglChooseConfig(eglDisplay, config_attributes, matchingConfigs, numberConfigs, &numberConfigs))     {         printf("eglChooseConfig EROR\n");         if(matchingConfigs!=NULL)         {             free(matchingConfigs);             matchingConfigs=NULL;         }         return -1;     }       printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n");       EGLint display_attributes[] =     {             EGL_WIDTH, DISPLAY_WIDTH,             EGL_HEIGHT, DISPLAY_HEIGHT,             EGL_NONE };       /*Window attributes*/     EGLint window_attribList[] =     {             EGL_NONE     };       EGLNativeDisplayType eglNativeDisplayType = fbGetDisplay(0);       EGLNativeWindowType eglNativeWindow = fbCreateWindow(eglNativeDisplayType,             0,             0,             DISPLAY_WIDTH,             DISPLAY_HEIGHT);       eglSurface = eglCreateWindowSurface(eglDisplay,matchingConfigs[0],eglNativeWindow,window_attribList);       if (eglSurface == EGL_NO_SURFACE)     {         printf("eglSurface = %x\n", eglGetError());     }       const EGLint attribListCtx[] =     {             // EGL_KHR_create_context is required             EGL_CONTEXT_CLIENT_VERSION, 2,             EGL_NONE     };       eglContext = eglCreateContext(eglDisplay, matchingConfigs[0], EGL_NO_CONTEXT,  attribListCtx);      //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~     if (eglContext == EGL_NO_CONTEXT)     {         printf("eglContext = %x\n", eglGetError());         return -1;     }       cairo_device_t* cdt = cairo_egl_device_create(eglDisplay, eglContext);       eglMakeCurrent(eglDisplay, eglSurface, eglSurface, eglContext);       cairo_surface_t *surface = cairo_gl_surface_create_for_egl(cdt, eglSurface,             DISPLAY_WIDTH,DISPLAY_HEIGHT);         cairo_t *cr = nullptr;     cr = cairo_create(surface);     if(!cr)     {         printf("Wrong cairo_t!\n");         return -1;     }     //*********************************************************************************************     for (int index = 0; index < 1; ++index) {         cairo_set_source_rgb (cr, 0, 0, 0);           cairo_move_to (cr, 0, 0);         cairo_line_to (cr, 200, 200);         cairo_move_to (cr, 200, 0);         cairo_line_to (cr, 0, 200);         cairo_set_line_width (cr, 1);         cairo_stroke (cr);           cairo_rectangle (cr, 0, 0, 100,100);         cairo_set_source_rgba (cr, 1, 0, 0, 0.8);         cairo_fill (cr);          cairo_rectangle (cr, 0, 100, 100, 100);         cairo_set_source_rgba (cr, 0, 1, 0, 0.60);         cairo_fill (cr);          cairo_rectangle (cr, 100, 0, 100, 100);         cairo_set_source_rgba (cr, 0, 0, 1, 0.40);         cairo_fill (cr);          cairo_rectangle (cr, 100, 100, 100, 100);         cairo_set_source_rgba (cr, 1, 1, 0, 0.20);         cairo_fill (cr);          cairo_surface_flush(surface);         eglSwapBuffers(eglDisplay,eglSurface);     }       //to check that cairo can make the photo from the surface, png file created     cairo_status_t s = cairo_surface_write_to_png(surface, "surface.png");     //it is a photo that made by cairo [OK]     cairo_destroy(cr);      if (CAIRO_STATUS_SUCCESS == s)     {         printf("Status = OK \n");     }     else     {         printf("Status = ERROR <ERROR_CODE->%d>\n", s);     }      if(matchingConfigs!=NULL)     {         free(matchingConfigs);         matchingConfigs=NULL;     }       cairo_surface_destroy(surface);     printf("END!\n");     return 0; }     How To Be Sure That My Application Using GPU:   If you have a look at https://community.nxp.com/thread/324670 you can profile a graphical application and investigate if it uses GPU or not, also you can measure the performance and analyze the application by vAnalyzer.       According to the link I’ve mentioned that’s enough to set galcore.gpuProfiler=1 in uboot and then check the /sys/module/galcore/parameters/gpuProfiler   file (read the file by cat, vi, nano, etc.) if the output is 1 all things is done in a right way the final step is that exporting some environment variables :   export VIV_PROFILE=1 export VP_OUTPUT=sample.vpd export VP_FRAME_NUM=1000 export VP_SYNC_MODE=1   VIV_PROFILE[0,1,2,3], VP_OUTPUT[any string], VP_FRAME_NUM[1,N], VP_SYNC_MODE[0,1]   Note: VIV_PROFILE[0] Disable vProfiler (default), VIV_PROFILE [1] Enable vProfiler, VIV_PROFILE [2] Control via application call, VIV_PROFILE [3]Allows control over which frames to profile with vProfiler by VP_FRAME_START and VP_FRAME_END.     If application uses GPU smaple.vpd file will create if not there isn't any vpd file. [1] - https://www.khronos.org/egl
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The Wandboard is a ultra low power complete computer with high performance multimedia capabilities based around the new upcoming Freescale i.MX6 Cortex-A9 processor and comes with a dazzling 1Ghz processor HDMI display interface and gigabit ethernet. The dualcore version of the Wandboard (The Wandboard DUAL) not only features 1GB of memory but also has onboard Wi-Fi and Bluetooth.     Wandboard Solo Wandboard Dual Processor Freescale i.MX6 Solo Freescale i.MX6 Duallite Cores Cortex-A9 Single core Cortex-A9 Dual core Memory 512 MB DDR3 1 GB DDR3 Audio • • Optical S/PDIF • • HDMI • • Camera interface • • micro SD cardslot 2 2 Serial port • • Expansion Header • • USB • • USB OTG • • SATA connector Not populated Not populated Gigabit LAN • • WIFI (802.11n) • Bluetooth • 69 USD 89 USD   www.wandboard.org Contact person : wandboard@gmail.com
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iWave, a reliable embedded solutions provider has now optimized the booting time of its Windows Embedded Compact 7 (WEC7) BSP for Freescale’s SABRE SDP/B platform. Now the WEC7 OS is booting in a short period of time  ~3 seconds for a small footprint OS image with display and touch drivers support, and boot time of ~8 to ~10 seconds for an OS image with basic drivers and OS components support. Why boot time optimization? WinCE7 is a real time OS which will be used in performance-critical applications such as automotive and healthcare units. In most of the cases, booting time will play important role, e.g. if the device is used in rear-view camera system in automotive field, the user needs the device to start working as soon as the reverse-gear is applied. This requirement needs the device to boot and start the camera application within few seconds. This demands a very short OS boot time. Some of the techniques which can be applied for efficient boot time optimization are discussed in this article. Boot phases in WEC7: Boot-loader (eboot) Copying of OS image from booting device (e.g. Micro-SD) to RAM OAL Layer Driver initializations and file system mounting Guidelines for reducing the boot time in different booting phases of WEC7: Boot-loader (eboot): Remove the code that initializes a hardware which is not required in boot-loader. E.g. If booting device is micro-SD, the initialization of NAND is not necessary. So, this redundant code needs to be removed. The eboot menu in eboot is important for debugging of WEC7 OS. But it is not needed in an end product. So, the delay for this eboot menu can be completely removed to reduce 3 seconds of time. In few platforms such as Freescale’s SABRE platform, a default splash screen is used, which updates continuously. This can be removed, and a static splash screen can be displayed, which can save a few milliseconds of time. Remove unnecessary serial debug prints. Copying of OS image from booting device (e.g. Micro-SD) to RAM: This time increases as the size of WEC7 OS image increases. So, select the OS components carefully and remove redundant components from OS image so that the OS image can be copied to RAM quickly. Also remove unnecessary registry keys, dlls and libraries to reduce the OS size. Optimize binary image builder (.bib) file to reduce the run-time image file. Implement Multi-BinFS OS binaries to reduce the OS copying size. As the functionalities/driver supports goes on increasing, WEC7 image size increases. So, the time required to copy the image increases, and RAM size needed to store the OS image increases. The Binary ROM Image File System (BinFS) can fix the two issues. In a BinFS file system, the WEC7 OS binary is divided into multi-binary Image files, and only the one binary (less than 5MBs) is copied into the RAM by the boot-loader. The components in the other binary files are copied into the RAM only when they are required to run. Links that can be referred to implement multi-BinFS in WinCE:      MSDN documentation: http://msdn.microsoft.com/en-us/library/aa516960.aspx; An implementation guide by Freescale: http://cache.freescale.com/files/dsp/doc/app_note/AN4137.pdf You can also include compressing-decompressing mechanisms in boot-loader to achieve even shorter copying time. OAL layer: Remove the code that does unnecessary hardware implementations. Skip the initializations that already done in eboot. Remove any wait/loop/delay if exists. Remove unnecessary serial debug prints. Driver initializations and file system mounting: Analyse and remove all the redundant drivers, check for any loop, wait or delay sequences in driver initialization code. Load any applicable drivers (e.g. USB, sensors) after the OS boot (i.e. after user sees a desktop/application). In WEC7 OS, a driver can be either loaded during booting using device manager/GWES, or can be loaded dynamically whenever necessary. This can be achieved easily by changing the registry key configurations to remove the driver from built-in drivers, a small application to load the driver after OS boot-up, and registry settings to launch this application automatically once the OS is booted. To decide the load order, it is important to check the dependencies of/on a driver. Use appropriate splash screen/progress bar while user waits for OS booting. Remove unnecessary serial debug prints. By effectively following the techniques mentioned, WEC7 based platforms can achieve reduced boot time for quick application access. iWave has optimized the WEC7 booting time on Freescale’s SABRE SDP platform. The booting time is as low as ~3 seconds for a WEC7 OS with standard shell, LCD display, DDraw, I2C and touch driver support, and ~8 to 10 seconds for WEC7 OS with following components: Standard shell Display DDRAW Capacitive touch screen MicroSD USB host – Mass storage and HID Ethernet GPU (OpenVG/GL) Multimedia codecs DirectShow Audio Video Playback Ambient Light Sensor Accelerometer SMP PWM Backlight I2C Debugging using KITL For further information or inquiries please write to mktg@iwavesystems.com or visit www.iwavesystems.com
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Boundary Devices has a variety of i.MX6 solutions. The SABRE Lite and Nitrogen6X boards are great tools for hardware and software evaluation. The Nitrogen6X_SOM is a low cost, highly integrated System-on-Module that is ideal for customers looking for rapid product development while maintaining the flexibility of a custom design. The Nitrogen6X_SOM is shown here running the QNX operating system with QT and Storyboard Suite from Crank Software on a 7" 800x480 display.
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This full featured BSP comes with all the core improvements that were made on the SABRE Lite BSP along with support for most of the features available for the SABRE board platform. Please contact Adeneo Embedded for access to the BSP as binary OS images or evaluation source code version at sales@adeneo-embedded.com
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The MYC-C8MMX CPU Moduleis designed by MYIR, which is an ARM embedded System-on-Module (SoM) based on NXP’ i.MX 8M Mini Quad Application Processor. The MYD-C8MMX development board is built around the MYC-C8MMX CPU Module, it is a complete evaluation module for your prototype and reference design. It is capable of running Linux and Android OS and provided with plenty of software resources. Typical applications are for Industry Control, Smart City, Smart Home, HMI, Internet of Things (IoT), etc. Let’s see a video introduction of the MYD-C8MMX development board. https://youtu.be/FL_CZiSMYsM The MYC-C8MMX CPU Moduleis using the MIMX8MM6CVTKZAA (MIMX8MM6DVTLZAA) processor chip which is among the NXP i.MX 8M Mini family and combines advanced 14LPC FinFET process technology to provide more speed and improved power efficiency. It has a quad Cortex-A53 core which operates at speeds of up to 1.6 (1.8) GHz. It also has a general-purpose Cortex-M4 400 MHz core processor for low-power processing. Some parameters and target applications of the processor chip are listed below for reference. Parameter Value Core: Number of cores (SPEC) 4 Core Type Arm Cortex-A53 Operating Frequency [Max] (MHz) 1600 (MIMX8MM6CVTKZAA)/1800 (MIMX8MM6DVTLZAA) L2 Cache (Max) (KB) 512 Co-Processor Type Arm Cortex-M4F Co-Processor Frequency (MAX) (MHz) 400 External Memory Supported DDR3L SDRAM, DDR4 SDRAM, ECC, LPDDR4 DRAM, NAND FLASH, NOR FLASH, QSPI GPU 2D / GPU 3D 1x shader, Vivante GC320, Vivante GCNanoUltra MIMX8MM6CVTKZAA (MIMX8MM6DVTLZAA) processor The chip only has MIPI-DSI and MIPI-CSI interfaces and no HDMI or other display interfaces. It can support wide working temperature range from -40 to 105 Celsius degree. MYIR’s MYC-C8MMX CPU Module can support working temperature from -40 to 85 Celsius degree. Parameter Value HW Video Encoder / Decoder HD1080p60 H.264, HD1080p60 H.265 Video/Display features MIPI-CSI, MIPI-DSI PCIe PCIe 2.0 x 1 Audio Specific Modules 8-ch PDM input, SAI USB Controllers 2 Serial Communication 1 x PCIe 2.0,3 x SPI,4 x I²C,4 x UART Junction Temperature (℃) -40 to 105 (MIMX8MM6CVTKZAA), 0 to 95 (MIMX8MM6DVTLZAA) MIMX8MM6CVTKZAA (MIMX8MM6DVTLZAA) processor Target Applications of i.MX 8M Mini Processors Automotive Smart City Heating Ventilation, and Air Conditioning (HVAC) Automatic Vehicle Identification Motorcycle Engine Control Unit (ECU) and Small Engine Control Fleet Management   Inventory and Supply Chain Management Industrial Public Address Systems Air Conditioning (AC) Transport Ticketing Building Safety   Building Security Smart Home Digital Signage Audio/Video (AV) Receivers Energy Gateway Gaming Console Heat Metering Home Control Panel Hospital Admission Machine Home Security & Surveillance Image Analytics Home Sensor Industrial Control In-Home Energy Display Industrial HMI Major Home Appliances Machine Visual Inspection Robotic Appliance Smart Lighting Set Top Boxes Smart Power Socket and Light Switch Small and Medium Appliances Two-way Video Conferencing Smart Speaker Vision, Advanced Sensing and Processing Board Soundbar   Surround Sound and Sound Bars Mobile Wireless or Networked Speakers Cable   Hearables Technologies Input Device (Mouse, Pen, Keyboard) Voice Assistants Smart Watch Voice Control Wireless Charging Pad   Wristband   The MYC-C8MMX CPU Module is a minimum system with PMIC, CPU, RAM (DDR4), Flash (eMMC, SPI Flash) and clock, plus an Ethernet PHY chip. A number of peripheral and IO signals are access through two 0.8mm pitch 100-pin board-to-board expansion connectors.                           MYC-C8MMX CPU Module Top-view                                         MYC-C8MMX CPU Module Bottom-view The MYD-C8MMX base board has mainly extended four parts: 1. Audio interface: added audio chip to extend Audio input and output interfaces 2. External power supply part: added one DC-DC power chip 3. Added one USB hub chip to extend 4 USB from the SoC USB interface, separately used for 4G LTE, two USB Host and one USB on expansion header. 4. Extend RTC module through I2C interface Many other peripheral interfaces are brought out for user extension.                                                    MYD-C8MMX Function Block Diagram                                                            MYD-C8MMX Interface Diagram Among so many interfaces, Backlight, LVDS LCD and MIPI interface are relative to display function. The Backlight interface has 6 pins including two power signals, two GND and two GPIO (one is enabled terminal to control the backlight power and another is PWM to control the brightness of backlight.) The two GPIO control terminals are from the GPIO1_01 and 08 of the i.MX 8M Mini. The LVDS LCD and MIPI interface, total 3 interfaces are for display. But actually i.MX 8M Mini only has one MIPI DSI interface. The other two LVDS interfaces are switched from DSI through one DS12LVDS bridge chip, one is single link LVDS and another is dual link LVDS. So, we can only select MIPI DSI display or LVDS display. Also, we can only select single link LVDS or dual link LVDS. MYIR offers optional LVDS based 7-inch LCD Module MY-LVDS070C including capacitive touch screen to work with the MYD-C8MMX board. The display resolution is up to 1024 by 600 pixels.                            MY-LVDS070C 7-inch LCD Module with Capacitive Touch Screen The MYD-C8MMX has one 2.0mm pitch 2*15-pin male expansion header. PDM and SAI are audio relative interfaces which are brought out from the expansion header.
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                                                  (Images are scaled to actual size) Accelerate time-to-market and optimize cost by using proven solutions from toradex​ We offer off-the-shelf System on Modules/ Computer on Modules and Customized SBCs based on i.MX 6Q, i.MX 6D, i.MX 6DL and i.MX 6S processors at competitive prices. These modules exposes majority of the extensive interfaces supported by i.MX 6 processors. Complemented with these robust and small form-factor modules, we also offer extensive online technical resources, free premium support, and open-source carrier board designs. BSPs and libraries for Windows Embedded Compact and Linux are available at no cost. For more information on our i.MX 6 solutions, please check https://www.toradex.com/products/freescale-i.mx6
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NXP i.MX8M-Mini CPU, quad-core Cortex-A53 Up-to 4GB RAM and 128GB eMMC LTE modem, WiFi 802.11ac, Bluetooth 5.0 2x Ethernet, 3x USB2, RS485/RS232, CAN-FD Custom I/O expansion boards Fanless design in aluminum, rugged housing Designed for reliability and 24/7 operation Wide temperature range of -40C to 80C Wide input voltage range of 8V to 36V Debian Linux, Yocto Project and mainline kernel Support for Docker and Microsoft Azure IoT   IOT-GATE-iMX8 is built around the NXP i.MX8M Mini System-on-Chip, featuring an advanced ARM Cortex-A53 CPU. The SoC is supplemented with up-to 4GB LPDDR4 and 128GB of eMMC storage.   Featuring dual Ethernet, CAN-FD, LTE modem, 802.11ac WiFi and Bluetooth 5.0, IOT-GATE-iMX8 is a highly versatile platform for industrial control, networking, communications and IoT applications. Fanless rugged enclosure design, wide range DC input of 8V to 36V and industrial temperature range of -40C to 80C make IOT-GATE-iMX8 an ideal solution for industrial installations and harsh environments.  IOT-GATE-iMX8 is provided with ready-to-run Debian Linux and full Linux Board Support Package. IOT-GATE Linux packages support Docker and Microsoft Azure IoT.   IOT-GATE-iMX8 spec IOT-GATE-iMX8 evaluation kit IOT-GATE-iMX8 pricing
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Hi, RAW is still often used in automotive applications. If you are doing bare metal code and if you use OS (QNX, GreenHills integrity), it is often a pain to boot from NAND. On SABRE AI, you have a NAND socket, this document will present you the basics command to reverse engineer the NAND boot setup of a SABRE AI. KOBS-NG What you can do first is understand kobs-ng application, and try to understand it...sources are available on freescale's GIT: http://sw-git.freescale.net/cgi-bin/gitweb.cgi?p=linux-kobs.git;a=summary Anyway, the sequencing is not obvious... Modified MFGtool (see enclosed archive) What you can do also it to program a NAND flash on a SABRE board for instance and read back the NAND flash. First configure your SABRE AI board: S2: 0001 S1: 0001100000  (I use 8 BBT and FCB to be more secure) BOOT_MODE: 0010 (if your NAND flash is not already programmed, otherwise 0100) Copy my mfgtool (Works only with i.MX6 Solo part), and unzip it. Plug  a micro USB cable and a RS232 cable, configure your hyperterminal as usual. Launch mfgtool and press start: Wait the end of programmation: Note: I did modify ucl2.xml file to have 8 BBT and FCB (see S1 configuration above, and "--search_exponent=3" --> 2^3=8 instead of default 2^2=4 ) and I did add the "-v" option in ucl2.xml file to have the verbose mode (thus memory addresses of FCB, BBT and more are displayed) ---> you have to go on the extreme right of the lines below... depending of the witdth of your screen): <!--burn the uboot to NAND: -->    <CMD   state = "Updater"   type = "push"   body = "send"   file = "files/u-boot-mx6solo-sabreauto-nand.bin" > Sending U-Boot </CMD>   <CMD   state = "Updater"   type = "push"   body = "$ kobs-ng init -v --search_exponent=3 --chip_0_device_path=/dev/mtd0 $FILE" > Flashing Bootloader </CMD> ‍‍‍‍‍‍‍‍‍‍‍ Set BOOT_MODE switches: 0010 and press reset. After u-boot startup press a key in the terminal to stop execution. Now you can explore your NAND! have a look in the enclosed "mx6Solo_RAW_NAND_SABRE_AI_programming_verbose.txt" file, you have all the adressses of BBT, FCB, etc...: Firmware: image #0 @ 0x400000 size 0x2a000 - available 0x600000 Firmware: image #1 @ 0xa00000 size 0x2a000 - available 0x600000 -------------- Start to write the [ FCB ] ----- mtd: erasing @0:0x0-0x80000 mtd: Writing FCB0 [ @0:0x0 ] (10e0) * mtd: Writing FCB1 [ @0:0x40000 ] (10e0) * mtd: erasing @0:0x80000-0x100000 mtd: Writing FCB2 [ @0:0x80000 ] (10e0) * mtd: Writing FCB3 [ @0:0xc0000 ] (10e0) * mtd: erasing @0:0x100000-0x180000 mtd: Writing FCB4 [ @0:0x100000 ] (10e0) * mtd: Writing FCB5 [ @0:0x140000 ] (10e0) * mtd: erasing @0:0x180000-0x200000 mtd: Writing FCB6 [ @0:0x180000 ] (10e0) * mtd: Writing FCB7 [ @0:0x1c0000 ] (10e0) * mtd_commit_bcb(FCB): status 0   -------------- Start to write the [ DBBT ] ----- mtd: erasing @0:0x200000-0x280000 mtd: Writing DBBT0 [ @0:0x200000 ] (1000) * mtd: Writing DBBT1 [ @0:0x240000 ] (1000) * mtd: erasing @0:0x280000-0x300000 mtd: Writing DBBT2 [ @0:0x280000 ] (1000) * mtd: Writing DBBT3 [ @0:0x2c0000 ] (1000) * mtd: erasing @0:0x300000-0x380000 mtd: Writing DBBT4 [ @0:0x300000 ] (1000) * mtd: Writing DBBT5 [ @0:0x340000 ] (1000) * mtd: erasing @0:0x380000-0x400000 mtd: Writing DBBT6 [ @0:0x380000 ] (1000) * mtd: Writing DBBT7 [ @0:0x3c0000 ] (1000) * mtd_commit_bcb(DBBT): status 0‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ to read the NAND, I read it in internal OCRAM ( address is 0x918000 for i.MX6DL and Solo) and then I display it): You can read the DCD of one of the boot image (first one is at address 0x400000 as you can see in the enclosed text file): Firmware: image #0 @ 0x400000 size 0x2a000 - available 0x600000 Firmware: image #1 @ 0xa00000 size 0x2a000 - available 0x600000‍‍‍‍‍‍ So, let's read the begenning of the image... at offset 0x400, you'll see the barker code of the DCD: 0x402000D1: MX6SOLO SABREAUTO U-Boot > nand read 0x918000 0x400000 0x800 NAND read: device 0 offset 0x400000, size 0x800 2048 bytes read: OK MX6SOLO SABREAUTO U-Boot > md 0x918000 0x500 00918000: ea000186 00000000 00000000 00000000 ................ 00918010: 00000000 00000000 00000000 00000000 ................ 00918020: 00000000 00000000 00000000 00000000 ................ 00918030: 00000000 00000000 00000000 00000000 ................ 00918040: 00000000 00000000 00000000 00000000 ................ 00918050: 00000000 00000000 00000000 00000000 ................ 00918060: 00000000 00000000 00000000 00000000 ................ 00918070: 00000000 00000000 00000000 00000000 ................ 00918080: 00000000 00000000 00000000 00000000 ................ 00918090: 00000000 00000000 00000000 00000000 ................ 009180a0: 00000000 00000000 00000000 00000000 ................ 009180b0: 00000000 00000000 00000000 00000000 ................ 009180c0: 00000000 00000000 00000000 00000000 ................ 009180d0: 00000000 00000000 00000000 00000000 ................ 009180e0: 00000000 00000000 00000000 00000000 ................ 009180f0: 00000000 00000000 00000000 00000000 ................ 00918100: 00000000 00000000 00000000 00000000 ................ 00918110: 00000000 00000000 00000000 00000000 ................ 00918120: 00000000 00000000 00000000 00000000 ................ 00918130: 00000000 00000000 00000000 00000000 ................ 00918140: 00000000 00000000 00000000 00000000 ................ 00918150: 00000000 00000000 00000000 00000000 ................ 00918160: 00000000 00000000 00000000 00000000 ................ 00918170: 00000000 00000000 00000000 00000000 ................ 00918180: 00000000 00000000 00000000 00000000 ................ 00918190: 00000000 00000000 00000000 00000000 ................ 009181a0: 00000000 00000000 00000000 00000000 ................ 009181b0: 00000000 00000000 00000000 00000000 ................ 009181c0: 00000000 00000000 00000000 00000000 ................ 009181d0: 00000000 00000000 00000000 00000000 ................ 009181e0: 00000000 00000000 00000000 00000000 ................ 009181f0: 00000000 00000000 00000000 00000000 ................ 00918200: 00000000 00000000 00000000 00000000 ................ 00918210: 00000000 00000000 00000000 00000000 ................ 00918220: 00000000 00000000 00000000 00000000 ................ 00918230: 00000000 00000000 00000000 00000000 ................ 00918240: 00000000 00000000 00000000 00000000 ................ 00918250: 00000000 00000000 00000000 00000000 ................ 00918260: 00000000 00000000 00000000 00000000 ................ 00918270: 00000000 00000000 00000000 00000000 ................ 00918280: 00000000 00000000 00000000 00000000 ................ 00918290: 00000000 00000000 00000000 00000000 ................ 009182a0: 00000000 00000000 00000000 00000000 ................ 009182b0: 00000000 00000000 00000000 00000000 ................ 009182c0: 00000000 00000000 00000000 00000000 ................ 009182d0: 00000000 00000000 00000000 00000000 ................ 009182e0: 00000000 00000000 00000000 00000000 ................ 009182f0: 00000000 00000000 00000000 00000000 ................ 00918300: 00000000 00000000 00000000 00000000 ................ 00918310: 00000000 00000000 00000000 00000000 ................ 00918320: 00000000 00000000 00000000 00000000 ................ 00918330: 00000000 00000000 00000000 00000000 ................ 00918340: 00000000 00000000 00000000 00000000 ................ 00918350: 00000000 00000000 00000000 00000000 ................ 00918360: 00000000 00000000 00000000 00000000 ................ 00918370: 00000000 00000000 00000000 00000000 ................ 00918380: 00000000 00000000 00000000 00000000 ................ 00918390: 00000000 00000000 00000000 00000000 ................ 009183a0: 00000000 00000000 00000000 00000000 ................ 009183b0: 00000000 00000000 00000000 00000000 ................ 009183c0: 00000000 00000000 00000000 00000000 ................ 009183d0: 00000000 00000000 00000000 00000000 ................ 009183e0: 00000000 00000000 00000000 00000000 ................ 009183f0: 00000000 00000000 00000000 00000000 ................ 00918400: 402000d1 27800620 00000000 2780042c .. @ ..'....,..' 00918410: 27800420 27800400 00000000 00000000 ..'...'........ 00918420: 27800000 0002a0a4 00000000 40e001d2 ...'...........@ 00918430: 04dc01cc 74070e02 00000c00 54070e02 .......t.......T 00918440: 00000000 ac040e02 30000000 b0040e02 ...........0.... 00918450: 30000000 64040e02 30000000 90040e02 ...0...d...0.... 00918460: 30000000 4c070e02 30000000 94040e02 ...0...L...0.... 00918470: 30000000 a0040e02 00000000 b4040e02 ...0............ 00918480: 30000000 b8040e02 30000000 6c070e02 ...0.......0...l 00918490: 30000000 50070e02 00000200 bc040e02 ...0...P........ 009184a0: 28000000 c0040e02 28000000 c4040e02 ...(.......(.... 009184b0: 28000000 c8040e02 28000000 60070e02 ...(.......(...` 009184c0: 00000200 64070e02 28000000 70070e02 .......d...(...p 009184d0: 28000000 78070e02 28000000 7c070e02 ...(...x...(...| 009184e0: 28000000 70040e02 28000000 74040e02 ...(...p...(...t 009184f0: 28000000 78040e02 28000000 7c040e02 ...(...x...(...| 00918500: 28000000 00081b02 030039a1 0c081b02 ...(.....9...... 00918510: 1f001f00 10081b02 1f001f00 3c081b02 ...............< 00918520: 16021c42 40081b02 7a017b01 48081b02 B......@.{.z...H 00918530: 4c4e4a4b 50081b02 34333f3f 1c081b02 KJNL...P??34.... 00918540: 33333333 20081b02 33333333 24081b02 3333... 3333...$ 00918550: 33333333 28081b02 33333333 b8081b02 3333...(3333.... 00918560: 00080000 04001b02 25000200 08001b02 ...........%.... 00918570: 30303300 0c001b02 13536b67 10001b02 .300....gkS..... 00918580: 638b6eb6 14001b02 db00ff01 18001b02 .n.c............ 00918590: 40170000 1c001b02 00800000 2c001b02 ...@..........., 009185a0: d2260000 30001b02 23106b00 40001b02 ..&....0.k.#...@ 009185b0: 27000000 00001b02 00001984 1c001b02 ...'............ 009185c0: 32800004 1c001b02 33800000 1c001b02 ...2.......3.... [ETC....] MX6SOLO SABREAUTO U-Boot >‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Let's check the persistent bit (i.MX6S or DL) PERSIST_SECONDARY_BOOT, reflecting from which image you boot: MX6SOLO SABREAUTO U-Boot > md 0x20D8044 1 020d8044: 40000000    ...@ MX6SOLO SABREAUTO U-Boot >‍‍‍‍‍‍‍‍ Bit 30 is 0, meaning you boot from first image Let's erase one boot image to see it it still boot (you have 2 boot images) MX6SOLO SABREAUTO U-Boot > nand erase 0x400000 0x512 NAND erase: device 0 offset 0x400000, size 0x512 Warning: Erase size 0x00000512 smaller than one erase block 0x00080000 Erasing 0x00080000 instead Erasing at 0x400000 -- 100% complete. OK MX6SOLO SABREAUTO U-Boot >‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Presss the reset button of your board to see if the board still start. If you read the PERSIST_SECONDARY_BOOT persistent bit, you'll see you boot from the second image as bit 30 is active: MX6SOLO SABREAUTO U-Boot > md 0x20D8044 1 020d8044: 40000000    ...@ MX6SOLO SABREAUTO U-Boot >‍‍‍‍‍‍‍‍ If you erase the second image (address 0xa00000, board will not boot as you only have 2 images). What you can do thenis read your FCB (flash configuration) with the following commands in u-boot prompt (sometimes the first read fails! so try again): WARNING: this was for a 2009 u-boot, in newer version (2016 for instance) you have to do a "nand dump" otherwise it will return an error (FAIL -74), see [Uboot] Nand read from offset xxx failed -74  MX6SOLO SABREAUTO U-Boot > nand read 0x918000 0x40000 0x800 NAND read: device 0 offset 0x40000, size 0x800 NAND read from offset 40000 failed -74 0 bytes read: ERROR MX6SOLO SABREAUTO U-Boot > nand read 0x918000 0x40000 0x800 NAND read: device 0 offset 0x40000, size 0x800 2048 bytes read: OK MX6SOLO SABREAUTO U-Boot > md 0x918000 0x100 00918000: fc000000 4346ffff 00002042 3c500100 ......FCB ....P< 00918010: 00000619 10000000 10e00000 00800000 ................ 00918020: 00000000 00000000 00000000 00080000 ................ 00918030: 02000000 02000000 00080000 000a0000 ................ 00918040: 00070000 00000000 00000000 00000000 ................ 00918050: 00000000 00000000 00000000 00000000 ................ 00918060: 00000000 00000000 04000000 0a000000 ................ 00918070: 002a0000 002a0000 02000000 0f400000 ..*...*.......@. 00918080: 00000000 10000000 00000000 00000000 ................ 00918090: 00000000 00000000 00000000 00000000 ................ 009180a0: 00000000 00000000 00000000 00000000 ................ 009180b0: 00000000 00000000 00000000 00000000 ................ 009180c0: 00000000 00000000 00000000 00000000 ................ 009180d0: 00000000 00000000 00000000 00000000 ................ 009180e0: 00000000 00000000 00000000 00000000 ................ 009180f0: 00000000 00000000 00000000 00000000 ................ 00918100: 00000000 00000000 00000000 00000000 ................ 00918110: 00000000 00000000 00000000 00000000 ................ 00918120: 00000000 00000000 00000000 00000000 ................ 00918130: 00000000 00000000 00000000 00000000 ................ 00918140: 00000000 00000000 00000000 00000000 ................ 00918150: 00000000 00000000 00000000 00000000 ................ 00918160: 00000000 00000000 00000000 00000000 ................ 00918170: 00000000 00000000 00000000 00000000 ................ 00918180: 00000000 00000000 00000000 00000000 ................ 00918190: 00000000 00000000 00000000 00000000 ................ 009181a0: 00000000 00000000 00000000 00000000 ................ 009181b0: 00000000 00000000 00000000 00000000 ................ 009181c0: 00000000 00000000 00000000 00000000 ................ 009181d0: 00000000 00000000 00000000 00000000 ................ 009181e0: 00000000 00000000 00000000 00000000 ................ 009181f0: 00000000 00000000 00000000 00000000 ................ 00918200: 00001a1c 0000000e 00000000 00000000 ................ 00918210: 00000000 00000019 00001600 00001600 ................ 00918220: 00000019 0000000f 00000019 00000000 ................ 00918230: 00000000 00000000 00000000 00000000 ................ 00918240: 00000000 00000000 00000000 00000000 ................ 00918250: 00001300 00000f00 00000008 00000008 ................ 00918260: 00001600 00000015 00000000 00001a00 ................ 00918270: 00000000 00000000 00000000 00000000 ................ 00918280: 00000000 00000000 00000000 00000000 ................ 00918290: 00000000 00000000 00000000 00000000 ................ 009182a0: 00000000 00000000 00000000 00000000 ................ 009182b0: 00000000 00000000 00000000 00000000 ................ 009182c0: 00000000 00000000 00000000 00000000 ................ 009182d0: 00000000 00000000 00000000 00000000 ................ 009182e0: 00000000 00000000 00000000 00000000 ................ 009182f0: 00000000 00000000 00000000 00000000 ................ 00918300: 00000000 00000000 00000000 00000000 ................ 00918310: 00000000 00000000 00000000 00000000 ................ 00918320: 00000000 00000000 00000000 00000000 ................ 00918330: 00000000 00000000 00000000 00000000 ................ 00918340: 00000000 00000000 00000000 00000000 ................ 00918350: 00000000 00000000 00000000 00000000 ................ 00918360: 00000000 00000000 00000000 00000000 ................ 00918370: 00000000 00000000 00000000 00000000 ................ 00918380: 00000000 00000000 00000000 00000000 ................ 00918390: 00000000 00000000 00000000 00000000 ................ 009183a0: 00000000 00000000 00000000 00000000 ................ 009183b0: 00000000 00000000 00000000 00000000 ................ 009183c0: 00000000 00000000 00000000 00000000 ................ 009183d0: 00000000 00000000 00000000 00000000 ................ 009183e0: 00000000 00000000 00000000 00000000 ................ 009183f0: 00000000 00000000 00000000 00000000 ................ MX6SOLO SABREAUTO U-Boot >‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ If you read the addresses 0x000000, 0x40000, 0x80000, 0xc0000, 0x100000, 0x140000 or 0x180000 or 0x1c0000 you'll have a copy of the FCB in OCRAM (internal RAM) and then read the OCRAM. You can now try that the replication is working. Thus try to erase FCBs (in my case, with Micron MT29F16G08ABABAWP the minimum I can erase is 2 FCBs due to sector size of 0x80000, check it on your side), for u-boot after 2009 use "nand dump", see https://community.nxp.com/message/885233  : MX6SOLO SABREAUTO U-Boot > nand erase 0x0 0x512 NAND erase: device 0 offset 0x0, size 0x512 Warning: Erase size 0x00000512 smaller than one erase block 0x00080000 Erasing 0x00080000 instead Erasing at 0x0 -- 100% complete. OK MX6SOLO SABREAUTO U-Boot > nand erase 0x80000 0x512 NAND erase: device 0 offset 0x80000, size 0x512 Warning: Erase size 0x00000512 smaller than one erase block 0x00080000 Erasing 0x00080000 instead Erasing at 0x80000 -- 100% complete. OK MX6SOLO SABREAUTO U-Boot > nand erase 0x100000 0x512 NAND erase: device 0 offset 0x100000, size 0x512 Warning: Erase size 0x00000512 smaller than one erase block 0x00080000 Erasing 0x00080000 instead Erasing at 0x100000 -- 100% complete. OK MX6SOLO SABREAUTO U-Boot >‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ You have erase 6 FCB. If you press reset, you normallystill can boot the device (checkswitch S1 is configured like that: 0001100000). You can also read the bad block table. In enclosed "mx6Solo_RAW_NAND_SABRE_AI_programming_verbose.txt" you have addresses of the DBBT: 0x200000, 0x240000, 0x280000, 0x2c0000, 0x300000, 0x340000, 0x380000 and 0x3c0000: -------------- Start to write the [ DBBT ] ----- mtd: erasing @0:0x200000-0x280000 mtd: Writing DBBT0 [ @0:0x200000 ] (1000) * mtd: Writing DBBT1 [ @0:0x240000 ] (1000) * mtd: erasing @0:0x280000-0x300000 mtd: Writing DBBT2 [ @0:0x280000 ] (1000) * mtd: Writing DBBT3 [ @0:0x2c0000 ] (1000) * mtd: erasing mtd: Writing DBBT4 [ @0:0x300000 ] (1000) * mtd: Writing DBBT5 [ @0:0x340000 ] (1000) * mtd: erasing @0:0x380000-0x400000 mtd: Writing DBBT6 [ @0:0x380000 ] (1000) * mtd: Writing DBBT7 [ @0:0x3c0000 ] (1000) * mtd_commit_bcb(DBBT): status 0‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ now read a DBBT in u-boot (as already mentionned, sometimes nand read failed, so try again!): MX6SOLO SABREAUTO U-Boot > nand read 0x918000 0x280000 0x800 NAND read: device 0 offset 0x280000, size 0x800 2048 bytes read: OK MX6SOLO SABREAUTO U-Boot > md 0x918000 0x80 00918000: 00000000 54424244 01000000 00000000 ....DBBT........ 00918010: 00000000 00000000 00000000 00000000 ................ 00918020: 00000000 00000000 00000000 00000000 ................ 00918030: 00000000 00000000 00000000 00000000 ................ 00918040: 00000000 00000000 00000000 00000000 ................ 00918050: 00000000 00000000 00000000 00000000 ................ 00918060: 00000000 00000000 00000000 00000000 ................ 00918070: 00000000 00000000 00000000 00000000 ................ 00918080: 00000000 00000000 00000000 00000000 ................ 00918090: 00000000 00000000 00000000 00000000 ................ 009180a0: 00000000 00000000 00000000 00000000 ................ 009180b0: 00000000 00000000 00000000 00000000 ................ 009180c0: 00000000 00000000 00000000 00000000 ................ 009180d0: 00000000 00000000 00000000 00000000 ................ 009180e0: 00000000 00000000 00000000 00000000 ................ 009180f0: 00000000 00000000 00000000 00000000 ................ 00918100: 00000000 00000000 00000000 00000000 ................ 00918110: 00000000 00000000 00000000 00000000 ................ 00918120: 00000000 00000000 00000000 00000000 ................ 00918130: 00000000 00000000 00000000 00000000 ................ 00918140: 00000000 00000000 00000000 00000000 ................ 00918150: 00000000 00000000 00000000 00000000 ................ 00918160: 00000000 00000000 00000000 00000000 ................ 00918170: 00000000 00000000 00000000 00000000 ................ 00918180: 00000000 00000000 00000000 00000000 ................ 00918190: 00000000 00000000 00000000 00000000 ................ 009181a0: 00000000 00000000 00000000 00000000 ................ 009181b0: 00000000 00000000 00000000 00000000 ................ 009181c0: 00000000 00000000 00000000 00000000 ................ 009181d0: 00000000 00000000 00000000 00000000 ................ 009181e0: 00000000 00000000 00000000 00000000 ................ 009181f0: 00000000 00000000 00000000 00000000 ................ MX6SOLO SABREAUTO U-Boot >‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Here I have no bad block (it is a SLC RAW NAND flash..). To be sure I have effectively erased 6 FCB, I will erase the 2 last one... thus I will not boot as all FCB tables will be erased(remove the usb cable otherwise mfgtool will restart): MX6SOLO SABREAUTO U-Boot > nand erase 0x180000 0x512 NAND erase: device 0 offset 0x180000, size 0x512 Warning: Erase size 0x00000512 smaller than one erase block 0x00080000 Erasing 0x00080000 instead Erasing at 0x180000 -- 100% complete. OK MX6SOLO SABREAUTO U-Boot >‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍ Reset the board... and it will not start as you have erased all the 8 FCB tables... you have to reprogram your board if you want to start again.
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Measuring 60mm by 49mm, the MYC-C8MMX CPU Module is a high-performance and cost-effective ARM SoM powered by i.MX 8M Mini which is NXP's first embedded multi-core heterogeneous applications processors built using advanced 14LPC FinFET process technology. The MYC-C8MMX CPU Module provides an outstanding embedded solution for Home and Building Control, IOV, Industrial and Medical Instruments, Human Machine Interface (HMI) and more other general purpose industrial and IoT applications which require optimized power consumption while maintaining high-performance. It is a minimum system integrated with CPU, 2GB DDR4, 8GB eMMC, 32MB QSPI Flash, GigE PHY and PMIC. All controller signals are brought out through two 0.8mm pitch 100-pin Expansion Connectors. It is capable of running Linux and Android OS and provided with plenty of software resources.                         MYC-C8MMX CPU Module Top-view                                         MYC-C8MMX CPU Module Bottom-view   MYIR offers MYD-C8MMX development board for evaluating the MYC-C8MMX CPU Module, the base board has taken great media capabilities of the i.MX 8M Mini processor to provide MIPI-DSI, MIPI-CSI, LVDS interfaces and Audio In/Out ports. It also has strong communication connectivity with 2 x USB 2.0 Host ports and 1 x Micro USB 2.0 Host/Device port, Gigabit Ethernet, MicroSD card slot, USB based Mini PCIe interface for 4G LTE Module, WiFi/Bluetooth and NVMe PCIe M.2 2280 SSD Interface. MYIR can offer design services to help customize the base board according to customers’ requirements.                                                    MYD-C8MMX Development Board Top-view                                                     MYD-C8MMX Development Board Bottom-view   MYIR offers commercial and industrial grades options for CPU Modules. More information can be found at: http://www.myirtech.com/list.asp?id=617
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This the document for SUSPEND and WAKE-UP in IMX8QM-MEK platform Wake up done by following, M4  debug UART A53 debug UART Power Key Source: imx-p9.0.0_2.1.1-auto-ga CONFIGURATION          Disable the default wake-up - RTC Timer (Patch - Disable_auto_wakeup.diff) SUSPEND      1. Command  Line,             # echo mem > /sys/power/state      2. Dumpsys Command                  # dumpsys activity service com.android.car inject-vhal-event 0x11410a00 4,2 WAKE-UP     1. BUTTON          By pressing the power-key SW3 (0.5s)      2. DEBUG UART          Enable debug UART wake-up          # cat ./sys/devices/platform/5a060000.serial/tty/ttyLP0/power/wakeup          disabled          # echo enabled  > ./sys/devices/platform/5a060000.serial/tty/ttyLP0/power/wakeup          TO WAKEUP                   Press the ENTER Key 2 times 3. M4 UART WAKEUP                        Apply the RPMSG patch (L4.14.98.diff)                                        # cat./sys/devices/platform/5a070000.serial/tty/ttyLP1/power/wakeup          disabled          # echo enabled > ./sys/devices/platform/5a070000.serial/tty/ttyLP1/power/wakeup Type some input in M4 Cosole               
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