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Starting from $52, the VAR-SOM-MX6 sets the bar for unparalleled design flexibility The VAR-SOM-MX6 goes one step further and not only ensures scalable and simplified development, but also extends the product life-cycle. Thanks to four CPU core assembly options, customers can apply a single System on Module in a broad range of applications to achieve short time-to-market for their current innovations, while still accommodating potential R&D directions and marketing opportunities. Key features include: Freescale i.MX6 1.2GHz quad/dual/single core Cortex-A9             2GB DDR3, 1GB SLC NAND Flash             Full HD 1080p video encoding/decoding capability             Vivante GPU providing 2D/3D acceleration             Simultaneous multiple display support             Gigabit Ethernet             TI WiLink™ 6.0 single-chip connectivity solution (Wi-Fi, Bluetooth®)             PCI-Express 2.0, S-ATA 3.0             Camera interface             USB 2.0: Host, OTG             Audio In/Out             Dual CAN Bus Supporting the leading OS: Linux, Win EC and Android This versatile solution's -40 to 85°C temperature range and Dual CAN support is ideal for industrial applications, while 1080p video and graphics accelerations make it equally suitable for intensive multimedia applications. The impressive scalability of the VAR-SOM-MX6 satisfies the needs of the most demanding future application requirements whether faster processing power, enhanced algorithms or improved graphics and video performance to name just a few. The VAR-SOM-MX6 is an all-round solution with broad connectivity and sophisticated video and acceleration graphic capabilities, delivering a range of middle to high end assembly options all from the same product. Oded Yaron from Variscite explained the need for a scalable System on Module that can carry a product through several incarnations. "The VAR-SOM-MX6 has removed the need for lengthy and costly redesign to support different market options. At Variscite we understand that a product concept is dynamic and evolves according to market drivers, consumer need and overall corporate strategy. As such we've developed the VAR-SOM-MX6 high performance System on Module, allowing customers to create optimized products for target markets: Add functionality for a more sophisticated offering, or scale down for a simpler lower cost alternative." About Variscite:   In less than a decade Variscite has taken a leading position in the System-on-Modules (SoM) design and manufacturing market. A trusted provider of development and consulting services for a variety of embedded platforms, Variscite transforms clients’ visions into successful products. Learn more about Variscite by visiting: www.variscite.com or contacting: Variscite Sales, sales@variscite.com , +972-9-9562910
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Adeneo Embedded's senior engineer Tristan Lelong has put together this very useful whitepaper which describes the process of using USB loader to program a new i.MX6 platform.
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Mar 13, 2020: imx_builder_03122020.tgz  --- change the i.MX8MN  configuration.  Dec 11, 2019: imx_builder_12112019.tgz --- add support  L4.19.35_1.1.0 August 28, 2019:  imx_builder_08282019.tgz   --- add i.MX8MM July 03, 2019:  imx_builder_07032019.tgz --- add i.MX8QM: build_i.MX8  Feb 26, 2020: imx_builder_02262020 --- add i.MX8MN, add spl m4 for build_i.MX8, build_i.MX8X with L4.14.98_2.0.0_ga, L4.14.98_2.2.0, L4.19.35_1.1.0 imx_builder_02262020: imx_builder |-- atf -> bsp/imx-atf |-- bsp -> REL/rel_imx_4.19.35_1.1.0 |-- build -> build_i.MX8X/L4.19.35_1.1.0 |-- build_i.MX6 |   |-- L3.0.x |   |-- L3.1x.xx |   |-- L4.14.xx |   |-- L4.19.xx |   `-- L4.1.xx |-- build_i.MX8 |   |-- before_L4.14.98_2.0.0_ga |   |-- L4.14.98_2.0.0_ga |   |-- L4.14.98_2.2.0 |   `-- L4.19.35_1.1.0 |-- build_i.MX8M |   |-- before.L4.19.35 |   `-- L4.19.35 |-- build_i.MX8MM |   |-- before.L4.19.35 |   `-- L4.19.35 |-- build_i.MX8MN |   `-- L4.19.35 |-- build_i.MX8X |   |-- before_L4.14.98_2.0.0_ga |   |-- L4.14.98_2.0.0_ga |   |-- L4.14.98_2.2.0 |   `-- L4.19.35_1.1.0 |-- dts -> linux/arch/arm/boot/dts |-- dts64 -> linux/arch/arm64/boot/dts/freescale |-- dts_uboot -> u-boot/arch/arm/dts |-- imx-mkimage -> bsp/imx-mkimage |-- linux -> bsp/linux-imx |-- m4_img |   |-- m4_1_image.bin -> rpmsg_lite_str_echo_rtos_imxcm4.bin |   |-- m4_image.bin -> power_mode_switch.bin |   `-- readme.txt |-- Makefile -> build/Makefile |-- Others |   |-- clk_module |   |-- cryptodev-linux-1.8 |   |-- helloworld_module |   |-- key_blob_module |   `-- spi |-- out |-- README -> build/README |-- REL |-- scfw -> bsp/scfw |-- SETTINGS.MK -> build/SETTINGS.MK |-- toolchains |   `-- scfw |-- u-boot -> bsp/uboot-imx `-- VERSION.MK imx_builder is a set of Makefile for build u-boot, Linux kernel, atf, scfw, imx-mkimage.  You can call it standalone build. here is the step to try it.  You can use  -n for make to get the detail build steps. ex:  make atf -n         make linux.Image -n L4.14.78_ga as example: 1. Untar  imx_builder_02282019.tgz 2. Read the  Standalone_Build_Preparation.pdf inside to prepare the bsp. 3. Prepare the toolchains(populate_sdk from yocto, get from linaro, get from buildroot, etc.) 4. Prepare scfw toolchains following the SCFW Porting Kit.  5. Follow the Standalone_Build_Preparation.pdf to check if the Build Structure is correct. Build Structure L4.14.78_1.0.0_ga as example. Prepare rel_imx_4.14.78_1.0.0_ga in REL Make symbol link to REL/rel_imx_4.14.78_1.0.0_ga Make symbol link to build_i.MX8X   imx_builder/ |-- atf -> bsp/imx-atf |-- bsp -> REL/rel_imx_4.14.78_1.0.0_ga |-- build -> build_i.MX8X |-- build_i.MX6 |-- build_i.MX8M |-- build_i.MX8X |   |-- Makefile -> Makefile.4.14.78_ga |   |-- Makefile.4.14.78_ga |   |-- README |   |-- SETTINGS_4.14.78_1.0.0_ga.MK |   |-- SETTINGS.MK -> SETTINGS_4.14.78_1.0.0_ga.MK |   `-- VERSION.MK |-- dts -> linux/arch/arm/boot/dts |-- imx-mkimage -> bsp/imx-mkimage |-- linux -> bsp/linux-imx |-- Makefile -> build/Makefile |-- Others |-- out |-- README -> build/README |-- REL |   `-- rel_imx_4.14.78_1.0.0_ga |       |-- firmware-imx-8.0.bin |       |-- imx-atf |       |-- imx-mkimage |       |-- imx-sc-firmware-1.1.bin(optional) |       |-- imx-scfw-porting-kit-1.1.tar.gz |       |-- linux-imx |       `-- uboot-imx |-- scfw -> bsp/scfw |-- SETTINGS.MK -> build/SETTINGS.MK |-- Standalone_Build_Preparation.pdf |-- toolchains |   `-- scfw |       `-- gcc-arm-none-eabi-6-2017-q2-update |-- u-boot -> bsp/uboot-imx `-- VERSION.MK -> build/VERSION.MK
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The Nitrogen6X board has been designed to allow for Power-over-Ethernet functionality. With the addition of our POE modules, the Nitrogen6X can become a stand-alone POE powered device which is ideal for digital signage applications. This demo features a 7" 1024x600 display with capacitive multi-touch and the TimeSys Linux operating system.
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e-con Systems with over 15 years of experience in pioneering different cameras for embedded devices have been working towards integrating MIPI CSI-2 cameras to the i.MX 8M EVK from NXP. Our current pursuit to interface the e-CAM130_MI1335_MOD to the MCIMX8M-EVK was successful and we have evaluated the following resolutions and framerates. S. No Resolution Framerate (per second) 1 640×480 120 2 1280×720 80 3 1920×1080 80 4 3840×2160 30 5 4192×3120 13* Table 1 : Resolutions and framerates supported * – under development. Expected to go higher. The MCIMX8M-EVK is the official evaluation kit for the i.MX 8M series application processors from NXP. It has a quad core ARM Cortex A53 running at 1.5 GHz and an ARM Cortex M4 core for low power operations and 3GB of LPDDR4 RAM. The MCIMX8M-EVK supports 2 MIPI CSI2 cameras in 4 lane configuration simultaneously. It also has other IO options such as a DSI display interface, HDMI 2.0, USB 3.0, MicroSD, Ethernet and Audio out. This configuration is ideal for designing low power devices such as OTT STBs, AV receivers, handheld devices, machine visual inspection systems and other general-purpose HMI solutions. The e-CAM130_MI1335_MOD uses the 1/3.2” AR1335 rolling shutter sensor from ON Semiconductor. This sensor supports a maximum resolution of 13MP with an active pixel array of 4208×3120. We have also added additional features such as 3A (Auto Exposure, Auto Focus, Auto White Balance) and HDR imaging using a dedicated onboard ISP. The output format of the camera is UYVY which removes the need for bayer demosaic processing on the host processor. This camera is ideal for developing high resolution imaging with HDR for close range machine visual inspection. You can soon expect our launch for various camera products for the i.MX 8M platform. Please check out our product page for updates.
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iWave i.MX6 Demo with Qt
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LTC3676 datasheet Features Quad I 2 C Adjustable High Efficiency Step Down DC/DC Converters: 2.5A, 2.5A, 1.5A, 1.5A Three 300mA LDO Regulators (Two Adjustable) DDR Power Solution with V TT and VTTR Reference Pushbutton ON/OFF Control with System Reset Independent Enable Pin-Strap or I 2 C Sequencing Programmable Autonomous Power-Down Control Dynamic Voltage Scaling Power Good and Reset Functions Selectable 2.25MHz or 1.12MHz Switching Frequency Always Alive 25mA LDO Regulator 12μA Standby Current Low Profile 40-Lead 6mm × 6mm × 0.75mm QFN Package Linux Driver Instructions (Please note that this is a Beta Release Version) The driver is good reference code to illustrate how to communicate with LTC3676 via I2C. The .zip file also includes a test app and readme.txt with instructions. It has been tested with i.MX6Q NovPek board from NovTech. It is configured for the LTC3676-1 but also support LTC3676 by simply changing a flag and there are comments about the minor difference between the -1 and non-1 for the driver. Here is the description and instructions also contained in the included readme file: This package contains the linux driver for LTC3676 and LTC3676-1. It has been tested with i.MX6Q. It also includes a test app. It is configured for the LTC3676-1 but there are internal comments about the minor difference between the -1 and non-1 for the driver. Here are general instructions on how to include this new driver in the Linux build using ltib. You can also see that it is tested with linux-3.0.35 that Freescale has used for i.MX6. 1) cd ltib/rpm/BUILD/linux-3.0.35 (Where your Ltib folder is stored). 2) extract zip file: tar -zxpf LTC3676_Driver.tar.gz 3) Run LTIB configure: ./ltib -c 4) Select "Configure the kernel", exit, and yes to save. 5) When Kernel Menu appears, select "Device Drivers". 6) Select "Voltage and Current Regulator Support". 7) Select "Linear LTC3676 Regulator Driver" to compile into kernel. Don't build as a module. 😎 Exit and Save. 9) Ltib should build the kernel with the driver. Application Instructions: This builds in the ltc3676_1_test application to allow a user to check the regulators and dynamically change the voltage on the ARM core rail. The voltage movement is small to not push the i.MX6 outside normal operation. This test application does not have any overvoltage error checking for safety. It also does not change the processor frequency. It just tests the basic LTC3676 driver operation. 1) cd ltib (Where your Ltib folder is stored). 2) Run "./ltib -m prep -p imx-test" 3) Move the ltc3676_test folder extracted from this tar file: "mv rpm/BUILD/linux-3.0.35/ltc3676_test rpm/BUILD/imx-test-12.09.01/test/." 4) Run "./ltib -m scbuild -p imx-test" 5) Run "./ltib" 6) Burn SD Card, "./mk_mx6_sd -ukr /dev/sdb", /dev/sdb is the name of the SD card. 7) Safely Remove SD Card and install in NOVPEK board. 😎 Power and boot to Linux. 9) Run "cd /unit_test " 10) Run Application, ./ltc3676_1_test i.MX6 Board from NovTech (Click on this link) Schematics for LTC3676-1 Linear Technology Power Plug in Board available. Contact your local Linear Technology sales office Gerard Velcelean (gvelcelean@linear.com) or Steve Knoth (sknoth@linear.com) if you have any questions.
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This is ITE MIPI to HDMI/IT6161 video bridge already merge/verified with i.Mx8 series processor. attached is IT6161 MINISAS card user manuel and reference circuits.@
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                                                  (Images are scaled to actual size) Accelerate time-to-market and optimize cost by using proven solutions from toradex​ We offer off-the-shelf System on Modules/ Computer on Modules and Customized SBCs based on i.MX 6Q, i.MX 6D, i.MX 6DL and i.MX 6S processors at competitive prices. These modules exposes majority of the extensive interfaces supported by i.MX 6 processors. Complemented with these robust and small form-factor modules, we also offer extensive online technical resources, free premium support, and open-source carrier board designs. BSPs and libraries for Windows Embedded Compact and Linux are available at no cost. For more information on our i.MX 6 solutions, please check https://www.toradex.com/products/freescale-i.mx6
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Some customer need to run standalone application in i.MX side. This article describe how to run standalone application in uboot and kernel, how to improve application running performance. It takes i.MX8MP as example, which is also suitable for other i.MX platform.
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Boundary Devices is pleased to announce that its i.MX8M-based SBC Nitrogen8M is available and in stock! https://boundarydevices.com/product/nitrogen8m-imx8/  Nitrogen8M specifications The Nitrogen8M comes pre-populated with the most robust set of connectivity options available to allow for rapid development and validation of your next project. The boards are also be built with Boundary Device’s industry-leading, production-ready standards and include options such as industrial temp and conformal coating. All this allows the Nitrogen8M to be used as an evaluation platform or production-ready solution. Review the full list of the specifications below. More information including pricing and availability can be found on the Nitrogen8M product page: CPU — i.MX 8M Quad Core (x4 Cortex-A53 @ 1.5GHz; Cortex-M4 @ 266MHz) RAM — 2GB LPDDR4 (4GB Optional) Storage — 8GB eMMC (upgradeable to 128GB) GPU — Vivante GC7000Lite Camera — x2 4-lane MIPI-CSI Display — x1 HDMI (w/CEC) and x1 MIPI DSI several MIPI-DSI displays options available Wireless — 802.11 ac and Bluetooth 4.1 BD-SDMAC Module (QCA9377) Networking — Gigabit Ethernet port Other I/O: x3 USB 3.0 Host ports x1 USB 3.0 OTG port x3 I2C x1 SPI x3 RS-232 x1 SD/MMC x1 RTC + battery x2 PCIe (1 Mini-PCIE connector, 1 on expansion connector) x1 JTAG Power — 5V DC input Operating Temperature — 0 to 70°C (Industrial Optional) Operating System — Yocto, Ubuntu/Debian, Buildroot, FreeRTOS (M4 Core), Android Demos As some people say, a video is worth a thousand words, so let's just share what can run on that platform already: Nitrogen8M Crank Storyboard Demo - YouTube  Nitrogen8M Yocto GPU SDK Demo - YouTube  Nitrogen8M Android 8.1 Qt5 + 4k video demo - YouTube  Source code access The bootloader and kernel source code are already available publicly on our GitHub account: GitHub - boundarydevices/u-boot-imx6 at boundary-imx_v2017.03_4.9.51_imx8m_ga  GitHub - boundarydevices/linux-imx6 at boundary-imx_4.9.x_2.0.0_ga  Android has been officially released: https://boundarydevices.com/android-oreo-8-1-0-release-for-nitrogen8m/  Some benchmarking has been done to compare against previous i.MX6 CPUs Yocto BSP is on the way, Boundary Devices is actively contributing to the community BSP: meta-freescale-3rdparty/nitrogen8m.conf at master · Freescale/meta-freescale-3rdparty · GitHub  Ubuntu Bionic Beaver beta image is also available upon request (please contact support@boundarydevices.com). Feel free to contact us for more information: info@boundarydevices.com.
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This blog post will present the architecture of the i.MX6SoloX and i.MX7D processors and explain how to build and run the FreeRTOS BSP v1.0.1 on the MCU. Both processors are coupling a Cortex-A with a Cortex-M4 core inside one chip to offer the best of MPU and MCU worlds (see i.MX7D diagram). Content below will apply for our Nit6_SoloX and Nitrogen7 platforms. For the impatient You can download a demo image from here: 20160804-buildroot-nitrogen6sx-freertos-demo.img.gz for Nit6_SoloX 20160804-buildroot-nitrogen7-freertos-demo.img.gz for Nitrogen7 As usual, you’ll need to register on our site and agree to the EULA because it contains NXP content. The image is a 1GB SD card image that can be restored using zcat and dd under Linux. ~$ zcat 20160804-buildroot*.img.gz | sudo dd of=/dev/sdX bs=1M For Windows users, please use Alex Page’s USB Image Tool. This image contains the following components: Linux kernel 4.1.15 U-Boot v2016.03 FreeRTOS 1.0.1 demo apps Please make sure to update U-Boot from its prompt before getting started: => run clearenv => run upgradeu After the upgrade, the board should reset, you can start your first Hello World application on the Cortex-M4: => run m4update => run m4boot Architecture As an introduction, here is the definition of terms that will be used throughout the post: MCU: Microcontroller Unit such as the ARM Cortex-M series, here referring to the Cortex-M4 MPU: Microprocessor Unit such as the ARM Cortex-A series, here referring to the Cortex-A9/A7 RTOS: Real-Time Operating System such as FreeRTOS or MQX The i.MX6SX and i.MX7 processors offer an MCU and a MPU in the same chip, this is called a Heterogeneous Multicore Processing Architecture. How does it work? The first thing to know is that one of the cores is the "master", meaning that it is in charge to boot the other core which otherwise will stay in reset. The BootROM will always boot the Cortex-A core first. In this article, it is assumed that U-Boot is the bootloader used by your system. The reason is that U-Boot provides a bootaux command which allows to start the Cortex-M4. Once started, both CPU are on their own, executing different instructions at different speeds. Where is the code running from? It actually depends on the application linker script used. When GCC is linking your application into an ELF executable file, it needs to know the code location in memory. There are several options in both processors, code can be located in one of the following: TCM (Tightly Coupled Memory): 32kB available OCRAM: 32kB available If not using the EPDC, 128kB can be used but requires to modify the ocram linker script DDR: up to 1MB available QSPI flash (not available for ou Nit6_SoloX): 128kB allocated on Nitrogen7 Note that the TCM is the preferred option when possible since it offers the best performances since it is an internal memory dedicated to the Cortex-M4. External memories, such as the DDR or QSPI, offer more space but are also much slower to access. In this article, it is assumed that every application runs from the TCM. When is the MCU useful? The MCU is perfect for all the real-time tasks whereas the MPU can provide a great UI experience with non real-time OS such as GNU/Linux. We insist here on the fact that the Linux kernel is not real-time, not deterministic whereas FreeRTOS on Cortex-M4 is. Also, since its firmware is pretty small and fast to load, the MCU can be fully operating within a few hundred milliseconds whereas it usually takes Linux OS much longer to be operational. Examples of applications where the MCU has proven to be useful: Motor control: DC motors only perform well in a real-time environment since feedback response time is crucial Automotive: CAN messages can be handled by the MCU and operational at a very early stage Resource Domain Controller (RDC) Since both cores can access the same peripherals, a mechanism has been created to avoid concurrent access, allowing to ensure a program's behavior on one core does not depend on what is executed/accessed on the other core. This mechanism is the RDC, it can be used to grant peripheral and memory access permissions to each core. The examples and demo applications in the FreeRTOS BSP use RDC to allocate peripheral access permission. When running the ARM Cortex-A application with the FreeRTOS BSP example/demo, it is important to respect the reserved peripheral. The FreeRTOS BSP application has reserved peripherals that are used only by ARM Cortex-M4, and any access from ARM Cortex-A core on those peripherals may cause the program to hang. The default RDC settings are: The ARM Cortex-M4 core is assigned to RDC domain 1, and ARM Cortex-A core and other bus masters use the default assignment (RDC domain 0). Every example/demo has its specific RDC setting in its hardware_init.c. Most of them are set to exclusive access. The user of this package can remove or change the RDC settings in the example/demo or in his application. It is recommended to limit the access of a peripheral to the only core using it when possible. Also, in order for a peripheral not to show up as available in Linux, it is mandatory to disable it in the device, which is why a specific device tree is used when using the MCU: imx7d-nitrogen7-m4.dts The memory declaration is also modified in the device tree above in order to reserve some areas for FreeRTOS and/or shared memory. Remote Processor Messaging (RPMsg) The Remote Processor Messaging (RPMsg) is a virtio-based messaging bus that allows Inter Processor Communications (IPC) between independent software contexts running on homogeneous or heterogeneous cores present in an Asymmetric Multi Processing (AMP) system. The RPMsg API is compliant with the RPMsg bus infrastructure present in upstream Linux 3.4.x kernel onward. This API offers the following advantages: No data processing in the interrupt context Blocking receive API Zero-copy send and receive API Receive with timeout provided by RTOS Note that the DDR is used by default in RPMsg to exchange messages between cores. Here are some links with more details on the implementation: RPMsg_RTOS_Layer_User's_Guide.pdf https://www.kernel.org/doc/Documentation/rpmsg.txt Where can I find more documentation? The BSP actually comes with some documentation which we recommend reading in order to know more on the subject: FreeRTOS_BSP_1.0.1_i.MX_7Dual_Release_Notes.pdf FreeRTOS_BSP_for_i.MX_7Dual_Demo_User's_Guide.pdf FreeRTOS_BSP_i.MX_7Dual_API_Reference_Manual.pdf Getting_Started_with_FreeRTOS_BSP_for_i.MX_7Dual.pdf Build instructions Development environment setup In order to build the FreeRTOS BSP, you first need to download and install a toolchain for ARM Cortex-M processors. ~$ cd && mkdir toolchains && cd toolchains ~/toolchains$ wget https://launchpad.net/gcc-arm-embedded/4.9/4.9-2015-q3-update/+download/gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2 ~/toolchains$ tar xjf gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2 ~/toolchains$ rm gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2 FreeRTOS relies on cmake to build, so you also need to make sure the following packages are installed on your machine: ~$ sudo apt-get install make cmake Download the BSP The FreeRTOS BSP v1.0.1 is available from our GitHub freertos-boundary repository. ~$ git clone https://github.com/boundarydevices/freertos-boundary.git freertos ~$ cd freertos Depending on the processor/board you plan on using, the branch is different. For Nit6_SoloX (i.MX6SX), use the imx6sx_1.0.1 branch. ~/freertos$ git checkout origin/imx6sx_1.0.1 -b imx6sx_1.0.1 For Nitrogen7 (i.MX7D), use the imx7d_1.0.1 branch. ~/freertos$ git checkout origin/imx7d_1.0.1 -b imx7d_1.0.1 Finally, you need to export the ARMGCC_DIR variable so FreeRTOS knows your toolchain location. ~/freertos$ export ARMGCC_DIR=$HOME/toolchains/gcc-arm-none-eabi-4_9-2015q3/ Build the FreeRTOS apps First, here is a quick overview of what the FreeRTOS BSP looks like: All the applications are located under the examples folder: examples/imx6sx_nit6sx_m4/ for Nit6_SoloX examples/imx7d_nitrogen7_m4/ for Nitrogen7 As an example, we will build the helloworld application for Nitrogen7: ~/freertos$ cd examples/imx7d_nitrogen7_m4/demo_apps/hello_world/armgcc/ ~/freertos/examples/imx7d_nitrogen7_m4/demo_apps/hello_world/armgcc$ ./build_all.sh ~/freertos/examples/imx7d_nitrogen7_m4/demo_apps/hello_world/armgcc$ ls release/ hello_world.bin hello_world.elf hello_world.hex hello_world.map The build_all.sh script builds both debug and release binaries. If you don't have a JTAG to debug with, the debug target can be discarded. You can then copy that hello_world.bin firmware to the root of an SD card to flash it. Run the demo apps Basic setup First you need to flash the image provided at the beginning of this post to an SD Card. The SD Card contains the U-Boot version that enables the use of the Cortex-M4 make sure to update it as explained in the impatient section. By default, the firmware is loaded from NOR to TCM. You can execute m4update to upgrade the firmware in NOR. It will look for file named m4_fw.bin as the root of any external storage (SD, USB, SATA) and flash it at the offset 0x1E0000 of the NOR: => run m4update If you wish to flash a file named differently, you can modify the m4image variable as follows: => setenv m4image While debugging on the MCU, you might wish not to write every firmware into NOR so we've added a command that loads the M4 firmware directly from external storage. => setenv m4boot 'run m4boot_ext' Before going any further, make sure to hook up the second serial port to your machine as the one marked as "console" will be used for U-Boot and the other one will display data coming from the MCU. In order to start the MCU automatically at boot up, we need to set a variable that will tell the 6x_bootscript to load the firmware. To do so, make sure to save this variable. => setenv m4enabled 1 => saveenv This blog post only considers the TCM as the firmware location for execution. If you wish to use another memory, such as the OCRAM or QSPI or DDR, you can specify it with U-Boot variables. => setenv m4loadaddr => setenv m4size Note that the linker script must be different for a program to be executed from another location. Also, the size reserved in NOR right now is 128kB. Hello World app The Hello World project is a simple demonstration program that uses the BSP software. It prints the "Hello World" message to the ARM Cortex-M4 terminal using the BSP UART drivers. The purpose of this demo is to show how to use the UART and to provide a simple project for debugging and further development. In U-Boot, type the following: => setenv m4image hello_world.bin => run m4update => run m4boot On the second serial port, you should see the following output: Hello World! You can then type anything in that terminal, it will be echoed back to the serial port as you can see in the source code. RPMsg TTY demo This demo application demonstrates the RPMsg remote peer stack. It works with Linux RPMsg master peer to transfer string content back and forth. The Linux driver creates a tty node to which you can write to. The MCU displays what is received, and echoes back the same message as an acknowledgement. The tty reader on ARM Cortex-A core can get the message, and start another transaction. The demo demonstrates RPMsg’s ability to send arbitrary content back and forth. In U-Boot, type the following: => setenv m4image rpmsg_str_echo_freertos_example.bin => run m4update => boot On the second serial port, you should see the following output: RPMSG String Echo FreeRTOS RTOS API Demo... RPMSG Init as Remote Once Linux has booted up, you need to load the RPMsg module so the communication between the two cores can start. # modprobe imx_rpmsg_tty imx_rpmsg_tty rpmsg0: new channel: 0x400 -> 0x0! Install rpmsg tty driver! # echo test > /dev/ttyRPMSG The last command above writes into the tty node, which means that the Cortex-M4 should have received data as it can be seen on the second serial port. Name service handshake is done, M4 has setup a rpmsg channel [0 ---> 1024] Get Message From Master Side : "test" [len : 4] Get New Line From Master Side RPMsg Ping Pong demo Same as previous demo, this one demonstrates the RPMsg communication. After the communication channels are created, Linux OS transfers the first integer to FreeRTOS OS. The receiving peer adds 1 to the integer and transfers it back. The loop continues infinitely. In U-Boot, type the following: => setenv m4image rpmsg_pingpong_freertos_example.bin => run m4update => boot On the second serial port, you should see the following output: RPMSG PingPong FreeRTOS RTOS API Demo... RPMSG Init as Remote Once Linux has booted up, you need to load the RPMsg module so the communication between the two cores can start. # modprobe imx_rpmsg_pingpong imx_rpmsg_pingpong rpmsg0: new channel: 0x400 -> 0x0! # get 1 (src: 0x0) get 3 (src: 0x0) get 5 (src: 0x0) ... While you can send the received data from the MCU on the main serial port, you can also see the data received from the MPU on the secondary serial port. Name service handshake is done, M4 has setup a rpmsg channel [0 ---> 1024] Get Data From Master Side : 0 Get Data From Master Side : 2 Get Data From Master Side : 4 ... That's it, you should now be able to build, modify, run and debug
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iWave Systems launched Industry's latest Pico ITX Board around Freescale Semiconductor’s i.MX 6 Solo/Dual Lite processor which is iWave’s 4th design based on i.MX6 CPU. Pico-ITX is the industry’s smallest motherboard form factor which inspires innovative system designs and allows Single Board Computers to be accessible for a new generation of smaller computing and connecting devices. Measuring just 10cm x 7.2cm, iWave’s i.MX6 SBC is a highly integrated platform for increased performance in “Intelligent Industrial Control Systems, Industrial Human Machine Interface, Ultra-Portable Devices, Home Energy Management Systems and Portable Medical Devices”. iMX6 Pico ITX SBC Board iWave’s Pico ITX SBC is based on  i.MX6 Dual Lite/Solo based dual/single core ARM Cortex™-A9 core which can operate up to 1GHz with 2D/3D graphics accelerators, 1080p video encode & decode, and integrated power management. The design is also compatible with i.MX6 Quad & Dual processors. The platform is designed keeping extended temperature in mind, which can operate form -20C to +85C temperature range. The i.MX6 Pico ITX SBC supports the following features;  CPU: i.MX6 Dual Lite/Solo, (Quad /Dual compatible) RAM: 512MB DDR3 (Expandable up to 2GB) PMIC: Freescale MMPF0100 Debug Console: RS232 to USB Micro-AB connector USB OTG connector Dual USB Host Connector Micro SD Slot (default boot device) Standard SD/SDIO Slot 10/100/1000Mbps Ethernet Half mini PCIe card connector HDMI Port LVDS connector with Backlight 4-wire Resistive Touch controller AC97 Audio Codec with Audio Out Jack & Audio In Header 8bit CMOS Camera Connector 2 Lanes MIPI Camera connector CAN1 Header 4 Position user  Dip Switch & status LEDs Optional eMMC Support Optional SATA 7pin Connector 80mils Expansion Header-84 pin           o MIPI DSI  SPI CSI0 Camera interface CAN2 Interface UART s- 3 Ports I2C- 3 Ports GPIOs Optional LVDS1 interface Optional MLB 6pin & 3 pin signals Power Input: 5V, 2A (2.5mm Jack) Form factor: Pico ITX (100 x 72mm) Operating temperature range:  -20°C to +85°C OS Support: Linux 3.0.35, Android 4.0*, WEC7* The Pico ITX module will be supported for minimum 7 years. :smileyinfo: http://www.iwavesystems.com/product/development-platform/i-mx6-pico-itx-sbc/i-mx6-pico-itx-sbc.html Email: mktg@iwavesystems.com iWave Launches Industry's first i.MX6 SoloDual Lite based Pico-ITX Single Board Computer - YouTube
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This post is based on http://boundarydevices.com/using-the-cortex-m4-mcu-on-the-nit6_solox/ The i.MX6 SoloX processor is the first of a kind, coupling a Cortex-A9 with a Cortex-M4 core inside one chip to offer the best of both MPU and MCU worlds. The MCU is perfect for all the real-time tasks whereas the MPU can provide a great UI experience with non real-time OS such as GNU/Linux. This blog post will detail how to build and run source code on the MCU using our Nit6_SoloX. Terminology Before getting any further, here is a list of terms that will be used in this post: MCC: Multi-Core Communication: protocol offered by Freescale for the MCU and MPU to exchange data MCU: Microcontroller Unit such as the ARM Cortex-M series, here referring to the Cortex-M4 MPU: Microprocessor Unit such as the ARM Cortex-A series, here referring to the Cortex-A9 MQX: RTOS provided by Freescale to run their MCUs RTOS: Real-Time Operating System such as MQX or FreeRTOS For the impatient You can download a demo image from here: 20150814-buildroot-nitrogen6x-mcu-demo.img.gz for Nit6_SoloX. As usual, you’ll need to register on our site and agree to the EULA because it contains Freescale content. The image is a 1GB SD card image that can be restored using zcat and dd under Linux. ~$ zcat 20150814-buildroot*.img.gz | sudo dd of=/dev/sdX bs=1M For Windows users, please use Alex Page’s USB Image Tool. This image contains the following components: Linux kernel 3.14.38 from our repo https://github.com/boundarydevices/linux-imx6/tree/boundary-imx_3.14.38_6qp_beta U-Boot v2015.04 from our repo https://github.com/boundarydevices/u-boot-imx6/tree/boundary-imx6sx Development environment setup This section will detail how to set up a Linux machine to be able to build MCU source code. First you need to download the "MQX RTOS for i.MX 6SoloX v4.1.0 releases and patches" file from Freescale website: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MQX Then you need to untar this archive and apply our patch to add support for the Nit6_SoloX board. ~$ cd && mkdir mqx && cd mqx ~/mqx$ tar xf ~/Downloads/Freescale\ MQX\ RTOS\ 4.1.0\ for\ i.MX\ 6SoloX\ Linux\ Base.tar.gz ~/mqx$ wget http://boundarydevices.com.commondatastorage.googleapis.com/0001-Add-Nit6_SoloX-board-support.patch ~/mqx$ patch -p1 < 0001-Add-Nit6_SoloX-board-support.patch ~/mqx$ find . -name "*.sh" -exec chmod +x {} \; Note that this package comes with a good set of documentation which we invite you to read: doc/Freescale_MQX_RTOS_4.1.0_i.MX_6SoloX_Release_Notes.pdf doc/Getting_Started_with_Freescale_MQX_RTOS_on_i.MX_6SoloX.pdf As specified in the documentation, you need to install a specific toolchain (CodeSourcery v2014q1) in order to build the BSP. ~$ cd && mkdir toolchains && cd toolchains ~/toolchains$ wget https://launchpad.net/gcc-arm-embedded/4.8/4.8-2014-q1-update/+download/gcc-arm-none-eabi-4_8-2014q1-20140314-linux.tar.bz2 ~/toolchains$ tar xjf gcc-arm-none-eabi-4_8-2014q1-20140314-linux.tar.bz2 ~/toolchains$ rm gcc-arm-none-eabi-4_8-2014q1-20140314-linux.tar.bz2 Your machine is now ready to build applications for the MCU! Build instructions This section explains how to build the BSP as well as the applications for the MCU only. In order to build the BSP for the MPU, please refer to other blog posts on either Yocto or Buildroot. ~$ cd ~/mqx/ ~/mqx$ export TOP=$PWD ~/mqx$ export TOOLCHAIN_ROOTDIR=$HOME/toolchains/gcc-arm-none-eabi-4_8-2014q1/ ~/mqx$ cd $TOP/build/imx6sx_nit6sx_m4/make ~/mqx$ ./build_gcc_arm.sh As the BSP for our board is now built, we can build any example application provided in the MQX package. In order to have an interaction between the MPU and the MCU, you need to build a MCC application. Below are the instructions to build the pingpong application which sends data back and forth between the cores. ~/mqx$ cd $TOP/mcc/examples/pingpong/build/make/pingpong_example_imx6sx_nit6sx_m4/ ~/mqx$ ./build_gcc_arm.sh ~/mqx$ $TOOLCHAIN_ROOTDIR/bin/arm-none-eabi-objcopy \        ./gcc_arm/ram_release/pingpong_example_imx6sx_nit6sx_m4.elf \        -O binary m4_fw.bin That's it, the binary is ready to be used! Some might be interested in using an IDE to browse/modify/build the source code, note that Freescale provides instructions to use IAR Workbench (Windows only). It seems that there isn't any plan to support the SoloX MQX release inside the KSDK (Kinetis SDK) as explained in a community forum post. Run the demo First you need to copy the image (20150814-buildroot-nitrogen6x-mcu-demo.img.gz) provided at the beginning of this post to an SD Card. Then copy the m4_fw.bin binary to the root directory of the SD Card. The SD Card contains the U-Boot version that enables the use of the Cortex-M4, the bootloader inside your NOR must therefore be upgraded. U-Boot > setenv bootfile u-boot.imx U-Boot > run upgradeu Once the upgrade is complete and the board restarted, make sure to have a clean environment: U-Boot > env default -a ## Resetting to default environment U-Boot > saveenv By default, the M4 must be flashed in NOR memory, a U-Boot command has been added to look for the m4_fw.bin as the root of any external storage (SD, USB, SATA): U-Boot > run m4update This command will download the firmware from external storage to RAM and flash it at the offset 0x1E0000 of the NOR. While debugging on the MCU, you might wish not to write every firmware into NOR so we've added a command that loads the M4 firmware directly from external storage. U-Boot > setenv m4boot 'run m4boot_ext' Before going any further, make sure to hook up the second serial port to your machine as the one marked as "console" will be used for U-Boot and the other one will display data coming from the MCU. In order to start the MCU at boot up, we need to set a variable that will tell the 6x_bootscript to load the firmware into OCRAM. If you wish to start the MCU at every boot, make sure to save this variable. U-Boot > setenv m4enabled 1 U-Boot > boot While the kernel is booting, you should see the following prompt on the MCU serial output: ***** MCC PINGPONG EXAMPLE ***** Please wait :   1) A9 peer is ready   Then press "S" to start the demo ******************************** Press "S" to start the demo : Press the S key as requested above on the MCU serial console and then log into Buildroot on the MPU serial output (login is root, no password). You now need to enable the MPU side of the communication before starting the demo: # echo 1 > /sys/bus/platform/drivers/imx6sx-mcc-test/mcctest.15/pingpong_en & A9 mcc prepares run, MCC version is 002.000 test/mcctest.15/pingpong_en & # Main task received a msg from [1, 0, 2] endpoint Message: Size=0x00000004, data = 0x00000002 Main task received a msg from [1, 0, 2] endpoint Message: Size=0x00000004, data = 0x00000004 ... That's it, you've built a MCU application from scratch and can now start exploring all the examples provided inside the MQX SoloX release.
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This is a reference design showcasing a secondary vehicle dashboard with on-board diagnostics information along with all entertainment and features: Wifi, Bluetooth, GPS, GSM, microSD, USB 2.0 Host, Ethernet, SATA 3.0 and HDMI 1080p Contact marsha.chang@firstviewconsultants.com for more information
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MYIR introduces a high-performance ARM SoM MYC-JX8MX CPU Module, which is built around the NXP i.MX 8M Quad processor featuring 1.3GHz quad ARM Cortex-A53 cores and a real-time ARM Cortex-M4 co-processor. The module runs Linux and is capable of working in extended temperature ranging from -30°C to 80°C.   Measuring 82mm by 52mm, the MYC-JX8MX CPU Module has integrated 1GB/2GB LPDDR4, 8GB eMMC, 256Mbit QSPI Flash, Gigabit Ethernet PHY and PMIC on board. A large number of I/O signals are carried to or from the i.MX 8M CPU Module through one 0.5mm pitch 314-pin MXM 3.0 expansion connector, making it an excellent embedded solution for Scanning/Imaging, Building Automation and Smart Home, Human Machine Interface (HMI), Machine Vision and more other consumer and industrial applications which requires high multi-media performance. MYC-JX8MX CPU Module (delivered with heat sink by default) MYIR also offers a versatile platform MYD-JX8MX development board for evaluating the MYC-JX8MX CPU Module. It takes full features of the i.MX 8M processor and has brought out rich peripherals through connectors and headers such as 4 x USB 3.0 Host ports and 1 x USB 3.0 Host/Device port, Gigabit Ethernet, TF card slot, USB based Mini PCIe interface for 4G LTE Module, WiFi/BT, Audio In/Out, HDMI, 2 x MIPI-CSI, MIPI-DSI, 2 x LVDS display interfaces, PCIe 3.0 (x4) NVMe SSD Interface, etc. It is delivered with necessary cable accessories for customer to easily start development as soon as getting it out-of-box. A MIPI Camera Module MY-CAM003 is provided as an option for the board.                                                                       MYD-JX8MX Development Board MYIR offers 1GB or 2GB RAM selections for the CPU modules and development boards which have very-high powered prices to compare. Part No. Item Processor LPDDR4 eMMC Unit Price MYC-JX8MQ6-8E1D-130-E MYC-JX8MX  CPU Module NXP i.MX 8M Quad Processor based on 1.3GHz Quad ARM Cortex-A53 and 266MHz Cortex-M4 cores  (MIMX8MQ6CVAHZAB) 1GB 8GB $99 MYC-JX8MQ6-8E2D-130-E 2GB $119 MYD-JX8MQ6-8E1D-130-E MYD-JX8MX Development Board 1GB $279 MYD-JX8MQ6-8E2D-130-E 2GB $299 Supports extended working temperature ranging from -30°C to 80°C.
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The MEasy HMI developed by MYIR is a set of human-machine interfaces which contains a local HMI based on QT5 and a Web HMI based on Python2 back-end and HTML5 front-end. It runs on development boards with LCD, touch panel, Ethernet and so on. The dependency software includes dbus, connman and QT5 applications, python, tornado and other components. The video gives a demonstration on how to use the examples in MEasy HMI on MYIR's MYD-Y6ULX development board. It also applies to MYIR's MYS-6ULX Single Board Computer.
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