About this demo This demo shows the usage of a Neural Network (NN) applied for handwritten digit recognition, the NN model runs on the i.MX RT1060 MCU. The main idea of the demonstration is to show the i.MX RT capability to manage a graphical user interface while applying a NN model to recognize handwritten numbers to determine whether a password is correct or wrong. The demonstration is tested by setting a 4-digit password to a 4.3" LCD Panel, then the user must enter the correct password to unlock device; when the password is provided, the digits recognized by the NN are displayed on the screen. A 'Clear' button will erase the previous numbers for the user to try a new password to unlock the device. Technical Introduction and Acknowledgment The demo is available using two different approaches for the model creation and inference engines: TensorFlow Lite and CMSIS-NN using Caffe Framework.   TensorFlow Lite The application note AN12603 describes handwritten digit recognition on embedded systems through deep learning. The digit recognition is performed by a TensorFlow Lite model trained with the MINST dataset containing 60,000 handwritten grayscale images and 10,000 testing examples. This application note, deep dives into every step to achieve the application using Tensorflow Lite and build a GUI using Embedded Wizard.   CMSIS-NN using Caffee Framework The application note AN12781 explores the usage of Deep Neural Networks created in Caffe Framework, this framework allows creating a model and convert it to CMSIS-NN functions to be exported to the i.MX RT platform as source files. The model is also trained for the digit recognition using the MNIST dataset. The document describes the procedure to create, train and deploy the model; in the final step the model is exported a C source files using CMSIS-NN functions and weights that are exported to the i.MX RT1060 project. Video     Hardware setup   Recommended Products i.MX RT1060 Evaluation Kit | NXP  4.3" LCD Panel RK043FN02H-CT | NXP    Further Information                                           The NXP ® eIQ ™ software environment enables the use of ML algorithms on NXP MCUs, i.MX RT crossover MCUs, and i.MX family SoCs. eIQ software includes inference engines, neural network compilers and optimized libraries. Additionally,  the models can be optimized through techniques like quantization and pruning, AN12781 explores the possibility of optimization by creating a new model using Caffe with a quantization to simplify the floating-point data. By reducing the 32-bit floating-point data to an 8-bit and fixed-point format, the memory allocation got reduced and this resulted in a lower-processing power.   Transfer Learning Transfer learning gives machine learning models the ability to apply past experience to quickly and more accurately learn to solve new problems. This technique has become very important in deep learning. AN12892 describes how to perform transfer learning in TensorFlow and a use case example, which aims to improve the performance of the application from AN12603.    Useful Links   Links  AN12603 AN12603 Software AN12781 AN12781 Software AN12892 AN12892 Software eIQ™ for TensorFlow Lite | NXP  Caffe | Deep Learning Framework  Embedded Wizard | Simplify Your GUI Development  What is a Container? | App Containerization | Docker 

Overview In the industrial world, it is critical to incorporate fail-safe technology where possible in applications such as crane steering machines, robotic lift, and assembly line robots to name a few. By doing so, you ensure you meet Safety Integrity Level (SIL) standards as found in the IEC 61508 standard. Also, you significantly increase human safety and protect products and property. This fail Safe Motor Control solution incorporates the MPC574xP family of MCUs that delivers the highest functional safety standards for industrial applications. The MPC574xP family incorporates a lockstep function that serves as a watchdog function to flag any problems with the MCU including a programmable Fault Collection and Control Unit (FCCU) that monitors the integrity status of the MCU and provides flexible safe state control. Also, this device is a part of the SafeAssure® program, helping manufacturers achieve functional safety standard compliance. Block Diagram Recommended Products Category Products Features Power Switch 12XS2 | 12 V Low RDSON eXtreme Switch | NXP  Watchdog and configurable Fail-safe mode by hardware Authentication time (on-chip calculations) < 50 ms Programmable overcurrent trip level and overtemperature protection, undervoltage shutdown, and fault reporting Output current monitoring Pressure Sensor MPXHZ6130A|Pressure Sensor | NXP  The MPXHZ6130A series sensor integrates on-chip, bipolar op amp circuitry and thin-film resistor networks to provide a high output signal and temperature compensation for automotive, aviation, and industrial applications. Temperature Sensor https://www.nxp.com/products/sensors/silicon-temperature-sensors/silicon-temperature-sensors:KTY8X High accuracy and reliability Long-term stability Positive temperature coefficient; fail-safe behavior MOSFET Pre-driver GD3000 |3-phase Brushless Motor Pre-Driver | NXP  Fully specified from 8.0 to 40 V covers 12 and 24 V automotive systems Extended operating range from 6.0 to 60V covers 12 and 42 V systems Greater than 1.0 A gate drive capability with protection Power Management and Safety Monitoring MC33908 | Safe SBC | NXP  Enhanced safety block associated with fail-safe outputs Designed for ASIL D applications (FMEDA, Safety manual) Secured SPI interface   Evaluation and Development Boards   Link Description MPC5744P Development Kit for 3-phase PMSM | NXP  The NXP MTRCKTSPS5744P motor control development kit is ideal for applications requiring one PMSM motor, such as power steering or electric powertrain. Evaluation daughter board - NXP MPC5744P, 32-bit Microcontroller | NXP  The KITMPC5744DBEVM evaluation board features the MPC5744P, which is the second generation of safety-oriented microcontrollers, for automotive and industrial safety applications

Overview In the industrial world, technologies to track performance and correct problems instantly have become critical to meeting output expectations and keeping personnel safe. This is especially true with organizations facing the impact of an unpredictable economic environment and aging infrastructure. Our NXP two-way radio solution takes advantage of our complete technology portfolio of high-performance MPUs, MCUs, and peripheral devices that integrate security and connectivity features and a 10-15 year product longevity program. This combination delivers high reliability and quality communication and performance that enables your customers to work safely, efficiently and enables seamless communication that boosts productivity and insight to extend the life of business assets.   Interactive Block Diagram Recommended Products   Category Products Features MCU Arm® Cortex®-M4|Kinetis® KV3x Real-time Control MCUs | NXP  100/120 MHz Cortex®-M4 core with DSP and floating-point unit – improves performance in math-intensive applications (e.g., processing of sensorless FOC (field-oriented control) algorithms) 2x 16-bit ADCs with two capture and hold circuits and up to 1.2 MSPS sample rate – simultaneous measurement of current and voltage phase, reduced jitter on input values improving system accuracy Up to 2 x 8-channel and 2 x 2-channel programmable FlexTimers – high-accuracy PWM generation with integrated power factor correction or speed sensor decoder (incremental decoder/hall sensor) MPU i.MX 8M Applications Processor | Arm® Cortex®-A53, Cortex-M4 | 4K display resolution | NXP  Quad Arm Cortex-A53; Cortex-M4F 6x I2S/SAI (20+ channels, each 32-bits @384 kHz); SPDIF Tx/Rx; DSD512 OpenGL® ES 3.1, OpenGL® 3.0, Vulkan®, OpenCL™ 1.2 Secure Element A1006 | Secure Authenticator IC: Embedded Security Platform | NXP  Advanced security using asymmetrical public/private key Diffie-Hellman authentication protocol with two different keys for encryption and decryption based on ECC (Elliptic Curve Cryptography) with a NIST B-163 bit strong binary field curve Authentication time (on-chip calculations) < 50 ms Power Consumption: 500 μA active CapTouch Sensor PCF8883 | NXP  Wide input capacitance range (10 pF to 60 pF) Wide voltage operating range (VDD = 3 V to 9 V) Designed for battery-powered applications (IDD = 3 μA, typical) Automatic calibration RTC PCF8523 | NXP  Provides year, month, day, weekday, hours, minutes, and seconds based on a 32.768 kHz quartz crystal Resolution: seconds to years Analog Switch Logic controlled high-side power switch | NXP  Wide supply voltage range from 3 V to 5.5 V 30 V tolerant on VBUS ISW maximum 2 A continuous current Load Switch USB PD and type C current-limited power switch | NXP  VIN supply voltage range from 4.0 V to 5.5 V All-time reverse current protection with ultra-fast RCP recovery Adjustable current limit from 400 mA to 3.3 adjustable current limits from 400 mA to 3.3 A Clamped current output in the over-current condition Very low ON resistance: 30 mΩ (typical) USB Type-C PTN5150 | NXP  USB Type-C Rev 1.1 compliance Compatible with legacy OTG hardware and software Support plug, orientation, role and charging current detection Level Translator PCAL6416AEX | NXP  The 16-bit general-purpose I/O expander Latched outputs with 25 mA drive maximum capability The operating power supply voltage range of 1.65 V to 5.5 V GPIO Expander PCAL6416AEX | NXP  The 16-bit general-purpose I/O expander Latched outputs with 25 mA drive maximum capability The operating power supply voltage range of 1.65 V to 5.5 V PMIC PMIC with 1A Li+ Linear Battery Charger | NXP  Input voltage VIN from 5V bus, USB, or AC adapter (4.1 V to 6.0 V) withstands up to 22V transient DDR memory reference voltage, VREFDDR, 0.5 to 0.9 V, 10 mA I2C interface User-programmable Standby, Sleep/Low-power, and Off (REGS_DISABLE) modes Accelerometer ±2g/±4g/±8g, Low g, 14-Bit Accelerometer | NXP  1.95 V to 3.6 V supply voltage 1.6 V to 3.6 V interface voltage ±2g/±4g/±8g dynamically selectable acceleration full-scale range Temperature Sensor PCT2075: I2C-bus Fm+, 1 Degree C Accuracy | NXP  Pin-for-pin replacement for LM75 series but allows up to 27 devices on the bus Power supply range from 2.7 V to 5.5 V Temperatures range from -55 °C to +125 °C Wireless MCU Arm® Cortex®-M0+|Kinetis® KW41Z 2.4 GHz Bluetooth Low Energy Thread Zigbee Radio MCUs | NXP  2.4 GHz Bluetooth Low Energy version 4.2 Compliant IEEE Std. 802.15.4 Standard Compliant AES-128 Accelerator (AESA), True Random Number Generator (TRNG)

Overview NXP's industrial printer solution allows you to leverage the Internet of Things (IoT) technologies and easily integrate a reliable, fast, and secure design that differentiates and provides value to your customers. NXP provides an extensive technology portfolio including high-performance MPUs with advanced integrated security and connectivity features, cryptographic accelerators, and a 10-15 year product longevity program. This enables designers to successfully develop reliable, high performing, and secure printers.   Interactive Block Diagram Recommended Products   Category Products Features MPU i.MX 6SoloX Applications Processors | Arm® Cortex®-A9, Cortex-M4 | NXP 1x Cortex-A9 up to 1 GHz 1x Cortex-M4 up to 200 MHz 24-bit parallel CMOS sensor interface 2x 10/100/1000 Ethernet PCIe 2.0 (1 lane) FlexCAN 5x SPI, 6x UART, 4x I2C, 5x I2S/SSI, 8x PWM   i.MX 8M Applications Processor | Arm® Cortex®-A53, Cortex-M4 | 4K display resolution | NXP  Quad Arm Cortex-A53; Cortex-M4F OpenGL® ES 3.1, OpenGL® 3.0,Vulkan®, Open CL™ 1.2 Dual PCIe with L1 substates for fast wake-up from low-power mode Gigabit Ethernet controller supporting AVB and EEE 4x PWM, 3X SPI, 4X I2C Secure Authenticator A1006 | Secure Authenticator IC: Embedded Security Platform | NXP  Authentication time (on-chip calculations) < 50 ms Unique static pair of ECC Private Key Power Consumption: 500 μA active RTC PCF8523 | NXP  Provides year, month, day, weekday, hours, minutes, and seconds based on a 32.768 kHz quartz crystal. Resolution: seconds to years. Load Switch USB PD and type C current-limited power switch | NXP  VIN supply voltage range from 4.0 V to 5.5 V All-time reverse current protection with ultra-fast RCP recovery Adjustable current limit from 400 mA to 3.3 adjustable current limits from 400 mA to 3.3 A Clamped current output in the over-current condition USB Type-C PTN5150 | NXP  Compatible with legacy OTG hardware and software Support plug, orientation, role and charging current detection Level Translator Voltage Level Translators (Level Shifters) | NXP  Bi-directional level shifter and translator circuits include a range from single-bit to 32-bit widths GPIO Expander PCAL6416AEX | NXP  The 16-bit general-purpose I/O expander Latched outputs with 25 mA drive maximum capability The operating power supply voltage range of 1.65 V to 5.5 V PMIC 14-Channel Configurable Power Management IC | NXP  Four to six buck regulators depending on configuration, Single/dual phase/parallel options, DDR termination tracking mode option, DVS option 5V boost regulator for USB OTG CAN Transceiver TJA1057 | High Speed CAN Transceiver | NXP  VIO option allows for direct interfacing with 3.3 V and 5 V-supplied microcontrollers I2S port to allow routing to the applications processor Functional behavior predictable under all supply conditions Thermally protected AC/DC AC-DC Solutions | NXP  Increased efficiency and no-load power of the total application Universal mains operation: 90 - 264 Vac / 47 - 63Hz Over Current Protection (OCP), Over Power Protection (OPP), Over Temperature Protection (OTP) Motor Driver Dual H-Bridge Motor Driver 2-8.6 V 1.4 A 200 kHz | NXP  Low Total RDS(ON) 0.8 Ω (Typ), 1.2 Ω (Max) @ 25°C Undervoltage Detection and Shutdown Circuit Output Current 0.7 A (DC) Temperature Sensor PCT2075: I2C-bus Fm+, 1 Degree C Accuracy | NXP  Pin-for-pin replacement for LM75 series but allows up to 27 devices on the bus Power supply range from 2.7 V to 5.5 V Temperatures range from -55 °C to +125 °C Wireless MCU Arm® Cortex®-M0+|Kinetis® KW41Z 2.4 GHz Bluetooth Low Energy Thread Zigbee Radio MCUs | NXP  2.4 GHz Bluetooth Low Energy version 4.2 Compliant IEEE Std. 802.15.4 Standard Compliant AES-128 Accelerator (AESA), True Random Number Generator (TRNG)

Overview Remote virtual smartphones promise the same benefits as remote computer desktops and cloud-based gaming: low-cost client hardware, sandboxed user environments, and persistent user state. The way they work is that the physical smartphone runs only thin-client software and the smartphone application runs remotely on a server. To be economical, this server hosts multiple of these virtual smartphones, taking advantage of hardware virtualization support built into its processor. Slotted into the machine, an add-on GPU provides high-performance graphics. To reduce latency for real-time gameplay, the server is best located near the end-user in the edge of the mobile network. For virtual smartphones to be compatible with physical smartphones, Arm compatibility is required. At the 2020 Consumer Electronics Show, NXP demonstrated the Layerscape LX2160A processor hosting Redfinger’s cloud-based Android emulator and virtual smartphone. NXP’s processor integrates 16 CPU cores, enabling it to host 16 or more virtual smartphones. Games and other software execute with the same look and feel as if they were running locally on a smartphone. Like other Layerscape processors, the LX2160A delivers excellent performance per watt and is designed to work in high-temperature environments, such as being packed densely in a rack in a data center or deployed remotely at an edge-computing site. Although NXP designed it for stringent embedded applications, the LX2160A processor is powerful enough for servers—making it a great solution for Android emulation.     Block Diagram NXP Products Name of Product QorIQ LX2160A Development Board | NXP    Related Documents from Community Name of Document Discover i.MX: Industry-Leading Processor Solution for Media, Smart Home, Smart Industrial, Health/Medical and Broad Embedded Applications    Related Communities Name of Document Layerscape 

Overview   Artificial intelligence, and machine learning specifically, is transforming industries from Consumer to Industrial. To date, many applications host AI/ML inferencing on conventional computers in the cloud or locally. Meanwhile, edge computing is enabling other computing workloads to move from conventional information technology (IT) to lower-cost systems close to where data is generated. Although many AI/ML workloads run fine on edge systems’ CPUs, others are more intense: either multiple AI/ML functions must run simultaneously or performance requirements (e.g., frame rates) are too great. The solution to gaining the combined benefits of AI/ML and edge computing is acceleration. At the 2020 Consumer Electronics Show, NXP demonstrated the LS1046A-FRWY platform simultaneously running two or more high-intensity AI/ML functions. These include face recognition, object detection (both general and safety gear), posture recognition, and gaze detection. The scenario demonstrated is factory safety. An operator within a safety zone is monitored for attentiveness, personal protective equipment, and access control. Helping to make this possible is external acceleration based on the Google Edge TPU. Interfacing to the Layerscape LS1046A processor via its copious PCI Express ports, two M.2 TPU cards slotted in the FRWY system offload AI/ML inferencing. Based on the Layerscape LS1046A processor with four powerful Arm Cortex-A72 CPU cores, the compact, cost-effective LS1046A-FRWY platform gives developers a leg up on implementing high-performance AI/ML applications at the edge.   Diagram     Products Product Name LS1046A Freeway Board | NXP  Related Community Documents Document Name NXP Helps Industrial System Developers Apply AI/ML to Their Designs  Five Easy Steps To Deploy Machine Learning On Layerscape 

Overview   The 5G era ushers in changes to the wireless industry and new benefits to end-users. One change is a new partitioning of network-infrastructure functions, dividing the once-monolithic base station into three pieces: the radio unit (RU), distributed unit (DU), and centralized unit (CU). Associated with one or more RUs, the DU performs upper-layer PHY and media-access functions. It shares characteristics of both standard Linux computers and real-time systems and may be deployed in the field. NXP demonstrated at the 2020 Consumer Electronics Show a working 5G system, including a DU highlighting how the Layerscape LX2160A processor addresses these requirements. This 16-core device integrates multiple high-speed PCI Express interfaces and Ethernet ports running up to 100Gbps, delivering the needed computational performance and I/O in a power-efficient envelope. NXP also showed how its Layerscape Access programmable baseband processors can help enable fixed-wireless access designs for the customer premises, small cells, repeaters, in-home wireless links, and accelerators for CU systems. These programmable devices help mobile operators quickly deploy open radio-access networks. NXP has solutions from the antenna to the processor. Diagram   NXP Products Product Name QorIQ LX2160A Development Board | NXP  QorIQ® LS2088A Development Board | NXP 

About the demo components For this demo, we are using the Sigfox kit, which includes the FRDM-KL43Z and the OM2385 board. Sigfox is an inexpensive, reliable, low-power solution to connect sensors and devices.  With our dedicated radio-based network, we are committed to giving a voice to the physical world and making the Internet of Things truly happen.  The Sigfox protocol focuses on:  Autonomy. Extremely low energy consumption allows years of battery life. Simplicity. No configuration, connection request or signaling. Your device is up and running within minutes! Cost efficiency. From the hardware used in the devices on our network, we optimized every step to be as cost-effective as possible. Small messages. there are no large assets or media allowed on the network.  Only small notifications up to 12 bytes are allowed. Complementarity. Thanks to its low cost and ease of configuration, you can also use Sigfox as a secondary solution to any other type of network, e.g.: Wi-Fi, Bluetooth, GPRS, etc. You can read more about Sigfox in What is Sigfox? | Sigfox build.     The OM2385/SF001 is a development platform dedicated to SIGFOX Wide Area Networking applications. It includes an OL2385 wireless sub-GHz transceiver running the preprogrammed SIGFOX library and is mounted on an FRDM-KL43Z development platform that serves as a host processor for the user's application. The FRDM-KL43Z is an ultra-low-cost development platform for Kinetis L families KL43, KL33, KL27, KL17, and KL13 MCUs built on Arm Cortex-M0+ processor running at 48 MHz.   Video     Limitations: Sigfox is only able to send a small amount of data every day for free, so if your application requires more data to be sent, you need to get a connectivity plan from Sigfox Buy .   Useful Links FRDM-KL43Z and NXP Sigfox OL2385 Board : OM2385/SF001 - SIGFOX Development Kit | NXP  Sigfox Backend Account: Sigfox Buy  Download MCUXpresso: MCUXpresso IDE|Eclipse-based Integrated Development Environment (IDE) | NXP  Download SDK: https://mcuxpresso.nxp.com/en/builder    NXP Product Link FRDM-KL43Z and NXP Sigfox OL2385 Board OM2385/SF001 - SIGFOX Development Kit | NXP  Sigfox Backend Account Sigfox Buy  Download MCUXpresso MCUXpresso IDE|Eclipse-based Integrated Development Environment (IDE) | NXP  Download SDK https://mcuxpresso.nxp.com/en/builder    Required Items:     OL2385 Arduino Shield Board FRDM-KL43Z hardware USB A-to-MiniB cable Sub-GHz Antenna GPS UART module   Hardware Diagram:    SPI OL2585 KL43Z FRDM UART GPS MOSI ---------- MISO ---------- SCK ----------- ACK ----------- CS ------------- PTD07 PTD06 PTD05 PTD02 PTD04 PTE23 PTE22           ----------- TX ----------- RX         This picture shows the board connections made for the project     Step-by-Step Guide After we get the Required items, we need to activate the Sigfox account and register our board: Sigfox Buy  If you are having trouble registering your Sigfox device, don't hesitate to write your question in our NXP community. We register the board in our backend account, and we should see the device on our device list. When we have our board registered, we will start building the application on MCUXpresso. Download the project attached at the end of this document and import it into MCUXpresso IDE.  In the video, how to import the sigfox_console example from the SDK is shown, and a brief explanation of the modifications is given. If you want to download the SDK example to start your project from scratch, you need to add the Sigfox software component to the SDK. After importing the project to our workspace, the only thing left is to make the respective hardware connections and flash the device. Then try your new project in a building-clear area. To be sure your new project will function properly, you should avoid tall buildings to get a stronger signal. The data sent should be seen in your Sigfox backend session. Teraterm console prints the data obtained from the GPS module for your viewing purposes.   Results:       This is the data sent from the Sigfox transceiver to the user backend account. The sent frames are floating-point coordinates converted to four byte-hexadecimal strings.     After the attached project is flashed to the KL43Z, this should be the results seen in the Teraterm console.

Overview In this demo we show how to load an example of an NFC reader using the combination between the UDOO NEO card and the development kit for the PN7150. PN7150ARD kit is a high performance fully NFC compliant expansion board compatible with Arduino Compatible Interface platforms. It meets compliance with Reader mode, P2P mode and Card emulation mode standards. The board features an integrated high-performance RF antenna to insure high interoperability level with NFC devices. Video Required Items UDOO NEO Compatible MicroSD card of at least 4 or 8 Gb memory size Micro USB cable UDOO Neo demo image file PN7150 NFC Controller Board         Links   Step by Step guide (Inlclude all links): https://www.nxp.com/docs/en/application-note/AN11841.pdf    NXP Product Link Development Kits for PN7150 Plug’n Play NFC Controller NFC Development Kits for Arduino and more | NXP 

This post entry provides a detailed information about the EMVCo L1 certification process for contactless payment devices. The structure is the following: EMV Introduction Objective When a company is developing a POS device, there are some challenges to consider for a successful deployment in the market: The device needs to have a good performance to provide the client with a good user experience. Moreover, the device should be able to operate seamlessly with other devices and cards in the market in a secure and reliable way.   These key characteristics are tackled by the EMV specifications. Summarizing, EMV is a group of specifications for smart payment cards and terminals that were created by EMVCo to guarantee interoperability and acceptance of secure payment transactions. EMV stands for Europay, Mastercard, and Visa, the three companies that originally created the standard. These specifications are now managed by EMVCo, an organization of six members – including Mastercard, UnionPay, Visa, AmEx, Discover, and JCB.   EMVCo organization We can see in the figure below the structure of the organization. EMVCo is managed by the Board of Managers that consists of two representatives of every member of the organization. On top of the Board of Managers, the Executive Committee provides guidance on the group’s long-term strategy.     From a more technical point-of-view, it is organized in several Working Groups, each of them dedicated to specific topics. EMVCo also has the Associates Program, so key industry stakeholders can provide input and feedback to the Board of Managers, Executive Committee, and Working Groups.   EMV Technologies EMV specifications encompass a wide range of technologies, including: Contact chip technology, where smartcards and readers provide with cryptographical security advantages in comparison with the traditional magnetic stripe. EMV specifications also regulate contactless payment devices based on NFC technology.  Mobile Transactions where the mobile phone would play the role of a contactless device. The QR code technology, where the transaction can be made using a QR reader. Payment tokenization, that enables to perform transactions without compromising sensible card information. And other technologies like Secure Remote Commerce, 2nd Gen or 3-D Secure.   EMV Contactless specifications EMV Contactless specifications is now on version 2.6 but planning to move to version 3.0 by the end of the year.   The EMV Contactless specifications are structured in three books and the Contactless Interface Specifications that substitutes the Book D from previous versions of the specs. The Book A describes the overall architecture of the system, and the instructions involved in the communication between the entry point and the kernel. The Book B addresses the specifications regarding the Entry Point, which is the piece of sw in charge of the transaction pre-processing, or protocol activation among other tasks. Book C consists of 6 different levels for each of the kernels that are defined in the specifications. The EMV Contactless Interface Specifications describe the minimum set of functionalities that are required for the correct operation between the PICCs and the PCD.   In addition we will mention other relevant documents like: The PCD Test Bench and Test Case Requirements, that describes the test cases that are carried out by the testing laboratory in order to evaluate the devices. Note that there are 2 different documents, one for the Analog L1 tests and another one for the Digital tests. Another document describes the Device Test Environment, which is the software needed to control the device during the testing phase Another document describes the requirements regarding the Contactless symbol that should appear in all EMVCo Contactless POS in the market.   PCD L1 Type Approval The following diagram summarizes the process for the PCD L1 Type Approval:     In the first step the Product Provider shall submit a Request for Registration form to EMVCo. Once EMVCo reviews and accepts the form, the product provider will receive a contract that has to be signed. Upon reception of this contract, EMVCo will assign a product provider registration number. In the second step the Product Provider will choose a Test Laboratory and complete a document called Implementation Conformance Statement in which it provides detailed information about the device and its features. The third step is the Product Validation phase. In this phase the laboratory performs the product testing, where the device goes through a set of tests to evaluate the digital and analog performance. In a final phase and considering the test reports from the Laboratory, the Product Provider might decide to send the product to EMVCo for approval. In that case, EMVCo would analyze the tests reports and grant with a Letter of Approval in case the reports demonstrate sufficient product conformance.   In our case we are going to focus on the Analog L1 PCD tests.    EMV Analog L1 PCD Tests Environment Before going directly to the actual set of tests, it worth it to explain some components about the testing environment to better understand the testing procedure. We have the following elements: Device Test Environment Contactless symbol Positioning conventions EMVCo Reference PICC   Device Test Environment (DTE) The Device Test Environment is a software application that is used to control the device under evaluation during the whole testing process. This application has to be developed by the product provider and shall be implemented in compliance with a set of requirements defined in the specifications. The software is submitted to the test laboratory along with the samples of the device under certification. The DTE shall implement different applications or modes of operation that would be used depending on the testing scenario. These application are:   PCD Controls: It allows the test operator to execute single basic commands from the ISO14443 standard (Carrier ON/OFF, WUPA, WUPB,..) Pre-validation application: This application is used to test the communication of the device with a set of actual EMV compliant cards. Loopback application: It is used to test the device for the majority of the Analog and Digital L1 PCD Tests. In this case the reader is communicating with a Card simulator connected to a reference antenna. Transaction send application: This application can be used by the laboratory to evaluate the compliancy of the device with the waveform requirements defined for the Analog L1 PCD Tests. The main characteristic of this mode of operation is that the device sends a sequence of commands without waiting the responses from the PICC.   Contactless symbol The contactless symbol is the logo that you can see in the lower image. It helps the user identify the area in the Point Of Sale where he has to tap the card in order to trigger the transaction. This symbol has to be visible in the device surface or screen before and during the transaction. The Contactless symbol is extremely important for the testing procedure as it marks the reference point for all the positions that the device should be tested.   Using this reference point EMVCo defines an operating volume.   Positioning convention All test position are included in this operating volume. Depending on the test case, it will be run in one or more positions. Every position is expressed with a set of 3 coordinates or parameters, representing the height, the radius, and the angle respectively.     In the figure above you can see the operating volume along with the different values that each parameter can have.   EMVCo Reference PICC The EMVCo Reference PICC is the reference antenna used to communicate with the PCD under test. It has 4 ports and 2 jumpers that are used to configure the PICC for different purposes. For example, jumper 8 is used to select between linear and non-linear load depending on the type of tests that are performed. In the same line, the MOD IN port where a Signal Generator will inject a certain modulation to emulate a PICC response. The DC OUT port is used to measure the voltage level in the power tests and the LETI COIL OUT is used to measure the waveform tests among others. In the figure below you can also see the reference point of the antenna where the two white lines crossed:   Power tests The power tests are evaluated in all positions with the purpose of guaranteeing that the device is emitting enough field in all the positions. Depending on the height the limiting values will differ. In the figure below you can see the different planes with the respective limiting values.     The critical positions for the power tests are usually the outer positions for plane z=4 and z=3 where the voltage measured may not be strong enough to pass the tests. On top of that and depending on the transmission configuration used, it can also happen that the voltage measured at positions (1, 0, 0) and (0, 0, 0) can exceed the maximum level.   Waveform tests The purpose of the waveform tests is to evaluate the wave shape of the modulation used in the commands from the PCD. That way, if the wave shape fits with the requirements an EMVCo compliant PICC would not have any problem understanding the commands sent by the PCD.   The waveform evaluation for Type A modulation include the following test cases: t1 (TB121) Monotonic Decrease (TB122) Ringing (TB123) t2 (TB124) t3 and t4 (TB125) Monotonic Increase (TB126) Overshoot (TB127)     In the same way, the Type B test cases are the following: Modulation Index (TB121)# Fall time (TB122) Rise time (TB123) Monotonic Increase (TB124) Monotonic Decrease (TB125) Overshoots (TB126) Undershoots (TB127)     Reception tests The objective of the communication or responsiveness tests is to guarantee that the PCD is able to properly finish a transaction when the response of the PICC is in the limits of the specifications in terms of amplitude and polarity.   That way we find 4 different tests: Minimum load modulation, positive polarity (Tx131) Maximum load modulation, positive polarity (Tx133) Minimum load modulation, negative polarity (Tx135) Maximum load modulation, negative polarity (Tx137)   In the two figures below we can easily check the difference in the load modulation level between the oscilloscope capture for the Tx131 and the Tx133.     Other tests Besides the power, waveform and communication tests there are other tests included in the EMVCo Analog L1 Test cases. Here is the list of these other tests:   Carrier frequency (TAB112) Field resetting (TAB113) Power off (TAB114) Polling sequence (TAB115) FDTA PICC (TA139) BitRate (TA141 & TB141) BitCodingPCD (TA142 & TB142) BitCodingPICC (TA143 & TB146) BitBoundaries (TB147) TFSOFF (TB145 & TB148)   EMV Contactless Specs v3.0 The most important change is that the tests will no longer be carried out with one specific EMVCo reference PICC but with three. The first two are Class 1 antennas tuned to 16.1MHz and 13.56MHz, and the third reference PICC is a Class 3 antenna tuned to 13.56MHz.     This is important since the device will need to pass the test for 3 different antennas, making the testing process between 2 and 3 times slower and the tuning of the device more difficult than for the 2.6 version of the specs.   Other changes are a second different load for the linear load tests and the modifications of some waveform tests limits.   NXP Product portfolio for POS The product portfolio that NXP offers for contactless POS device includes three main chips: CLRC663 plus: EMVCo 2.6 ready chip compliant both for analog and digital L1 requirements. The CLRC663 plus is able to work with a transmitter current of 350 mA and a limiting value of 500 mA. This feature allows us to increase the field strength radiated and overcome power issues because of the design of the POS or the antenna.  PN5180: The PN5180 chip is also an EMVCo compliant frontend, that supports highly innovative and unique features like the Dynamic Power Control that optimizes the RF performance even under detuned antenna conditions. Other features are the Adaptative Waveform Control or the Adaptative Receiver Control to automatically adjust the transmitter modulation or the receiver parameters. These and many other features turn the PN5180 into the best NFC frontend in the market. PN7462: It supports contact and contactless interface in the same chip. It is an NFC controller, so includes an MCU with a configurable host interface. For the contactless interface, it implements similar functionalities as the PN5180, like the Dynamic Power Control, the Adaptative Receiver Control, and the Adaptative Waveform Control.   Further Information You can find more information about NFC in: Our NFC everywhere portal: https://www.nxp.com/nfc You can ask your question in our technical community: https://community.nxp.com/community/identification-security/nfc You can look for design partners: https://nxp.surl.ms/NFC_AEC And you can check our recorded training: http://www.nxp.com/support/online-academy/nfc-webinars:NFC-WEBINARS   Video recorded session

In some use case, when user program size>128K，it will display verify error when download, and the user code can’t run normally. Especially the second time download in IAR, after user modify the FlexRAM allocation. The root cause is IAR default Flash Loader use all the default 128K OCRAM as the download buffer in .ICF, if user changed the FlexRAM allocation in user code, for example: setting OCRAM to 32K, it will lead to error as there is no 128K buffer size, this demo code is used to fix it.

本文档介绍了i.MXRT在GUI设计上的支持模块及特性，并列举了Embedded Wizard在i.MXRT上实现GUI的性能以及如何使用SDK实现用户定制的GUI. Products Product Category NXP Part Number URL MCU MIMXRT1062 i.MX RT1060 Crossover MCU with Arm® Cortex®-M7 core    Tools NXP Development Board URL i.MX RT1060 Evaluation Kit MIMXRT1060-EVK: i.MX RT1060 Evaluation Kit    Software Name URL NXP i.MX RT SDK_v2.7.0 mcuxpresso.nxp.com Embedded Wizard https://www.embedded-wizard.de/  

  Overview The NXP ®  Feature Phone reference design is designed to implement the Type 2 Feature Phone core. Includes support for on-hook GR-30 services such as Calling Number Delivery, Calling Name Delivery, Dialable Directory Number, Call Qualifier, and Visual Message Waiting Indicator Additional support for off-hook GR-30 services, such as Calling Identity Delivery on Call Waiting and Call Waiting Deluxe The Feature Phone reference design also includes a full duplex echo-cancelling speakerphone with solid sound quality; the demo is able to originate and terminate a call in full duplex speakerphone mode A HyperTerminal will be used to display the GR-30 messages Archived content is no longer updated and is made available for historical reference only.   Features DSP56858EVM and 5685X Digital Signal Controllers Telephony Daughter Card (TDC1) Microphone AKG Acoustics Type Q400Mk3, Code 2846Z003 Directional Mono Electret condenser microphone Use with Radio Shack adaptor: Stereo -to-Mono Headphone adapter number 274-374 Amplified Speaker On-Hook Data Transmission Protocol (GR-30-CORE) - CID_T1.DSP software module Adaptive Line Echo Canceller (SR-3004) - ALEC.DSP software module Off-Hook Data Transmission Protocol (SR-3004) - CIDCW_T2.DSP software module Acoustic Echo Cancellation Keypad LCD     IDE and Build Tools CodeWarrior® Development Tools for 56800/E DSC | NXP  Design Resources https://www.nxp.com/downloads/en/schematics/TDC1LD.zip

  Overview The Altimeter Barometer Reference Design is used for directly measuring the barometric pressure, determining altitude and making simple weather predictions. The barometer pressure readings are achieved using the compensated MPX2102A pressure sensor, a HCXX series of Flash microcontroller unit (MCU), and an LCD display. This reference design enables the user to evaluate a pressure sensor for barometer, personal weather station and altimeter applications. This design can be used for altimetry features in wrist watches, cell phones, GPS systems and other electronic devices. In addition, many systems require barometric pressure data to correct system response errors. This application note describes the reliability and accuracy that our sensors can provide in a barometer or altimeter system. Archived content is no longer updated and is made available for historical reference only.   Features Demonstrates barometric pressure and altitude Pressure Sensor: MPXM2102A MPAK Package Sensitivity: 0.4 mV / kPa Pressure Rating: 100kPa (Max) Microprocessor: MC68HC908QT4 4.0K Bytes of in-application reprogrammable Flash and 128 Bytes of RAM High performance, easy to use, HC08 CPU 4 Channel 8-bit analog to digital converter 8-pin DIP or SOIC packages       Design Resources

  Overview NXP ® 's wireless charging reference design uses inductive charging technology to charge high-capacity, multi-cell Li-Ion battery packs. The reference design is capable of charging four battery packs simultaneously, using a single NXP digital signal controller. The reference design consists of two main components: a transmitter that sends the requested power level to the battery packs, and a receiver embedded in the battery packs. The receiver provides a controlled charge to the battery by implementing a charging algorithm. Each transmitter channel adjusts its energy transfer independently by responding to commands from the receiver embedded in the battery pack. The intelligent charging method is software-controlled and has the ability to dynamically adjust the power transfer. Archived content is no longer updated and is made available for historical reference only.   Features 80% transfer efficiency Four charging stations to charge four battery packs simultaneously Supports Qi communications protocol Overtemp, overcurrent and overvoltage protection    

  Overview The Water Level Reference design continuously monitors water level and water flow using the temperature compensated MPXM2010GS pressure sensor in the low cost MPAK package, a dual op–amp, and the MC68HC908QT4, 8–pin microcontroller. This system uses very few components, reducing the overall system cost. This allows for a solution to compete with a mechanical switch for water level detection but also offer additional applications such as monitoring water flow for leak detection, and the other applications for smart washing machines. Archived content is no longer updated and is made available for historical reference only.   Features Demonstrate Water Level Monitor plus additional features such as water flow monitoring and leak Pressure Sensor - MPXM2010 MPAK Package Sensitivity 2.5 mV / kPa Pressure Rating 10kPa (Max) Microprocessor MC68HC908QT4 40K Bytes of in-application reprogrammable Flash and 128 Bytes of RAM High performance, easy to use, HC08 CPU 4 Channel 8-bit analog to digital converter 8-pin DIP or SOIC packages Design Considerations Media Isolate pressure sensor from water by using a head tube Accuracy To prevent overflow and control consumption of water Auto-zeroing concept can eliminate offset errors Tank/tub diameter is irrelevant, the important part is to have an accuracte look up table to correlate water height versus pressure     Printed Circuit Boards and Schematics RD1950MPXM2010SCHEM RD1950MPXM2010SCHEMATIC RD1950MPXM2010DGRBR

  Overview The Point of Sale reference design demonstrates how the control, security, and connectivity features found on the NXP ®  MCF5329 ColdFire ®  MPU and MCS908QG8 MCU work together to create a secure Industrial Point of Sale System. Complete with an Open Source Embedded Linux® Software Solution, the Point of Sale Reference Design serves as a reference for any industrial design that requires flexible connectivity options, secure communication, or a human interface at a low cost and with a fast development cycle. Archived content is no longer updated and is made available for historical reference only.   Features The Point of Sale Reference Design was designed with the following considerations: Low system cost Easy and intuitive graphical user interface Multiple connectivity solutions to accommodate various POS system connectivity requirements Secure networking communications, transactions, and memory accesses Fast development cycle The Industrial Point of Sale Reference Design also features an Open Source Software Solution: µCLinux Operating System running on the MCF5329 Microprocessor NanoX Graphical User Interface (GUI) Configuration Tool running in the µCLinux environment Communication protocol for secure ethernet transactions MySQL Server Database used to store/access sales transactions       Code Generation Tools Model-Based Design Toolbox Printed Circuit Boards and Schematics Point of Sale Reference Design Schematics Point of Sale Gerber Files (Reference Design)

  Overview The TRIAX demo board was built to combine many of the demos available for accelerometer applications. The TRIAX demo board will enable you to see how Our accelerometers can add additional functionality to applications in many different industries. By thinking of accelerometer applications in terms of the measurements that are performed, they can be grouped into 5 sensing functions – Tilt, Motion, Positioning, Shock and Vibration. The RD1986MMA6260Q reference design is a two accelerometer solution which is achieved by using the MMA6260Q (x and y-axis device) and the MMA1260D z-axis accelerometer. Archived content is no longer updated and is made available for historical reference only.   Features Accelerometers:  MMA6260Q, MMA1260D Packages:  Quad Flat No-Lead (QFN) 6x6x1.98m and SOIC 16 G Range:  +/- 1.5 G Sensitivity:  1200 mV / G Microprocessor:  MC68HC908KX8 Demonstrates Consumer Accelerometer Applications High-performance M68HC08 architecture Option to allow use of external clock source or external crystal/ceramic resonator SCI Interface User Inputs:  1 Pushbutton Outputs:  Piezohom, Serial Port Connection Design Resources

  Overview Archived content is no longer updated and is made available for historical reference only. The QorIQ ®  P1020EWLAN access point/router is a complete production-ready, bill of materials optimized solution that can support single- or dual-radio 802.11 a/b/g/n/ac devices through MiniPCI or Mini PCI Express ®  interfaces. IEEE ®  802.11N WLAN radios capable of supporting wireless data rates up to 300 Mbps per and the P1020 communication processor is ideal to maximize performance while meeting power and cost budgets Can be powered over a single Ethernet cable in 3 x 3 MIMO mode using a single 802.3af Power over Ethernet (PoE) link Provides complete data and control path processing needs for multiple radio solutions and excellent throughput with best-in-class performance/watt   Features P1020 in 45nm SOI operating at 533-800MHz dual core e500 processor with 256KB L2 cache with ECC 256MB to 512MB DDR3 SDRAM 4 FXS ports 1 FXO port 1 GbE RGMII port 1 GbE SGMII port 1 GbE port connected to RGMII 5-port switch 2 mini-USB 2.0 ports 1 mini-PCI Express connector 1 PCI Express VortiQa ®  software with Stateful Packet Inspection Firewall and NAT - performance optimized IPsec Virtual Private Network (VPN) with Quality of Service (QoS) and Traffic Management (TM) D2 Technologies optimized voice G.711-Alaw G.711-MuLaw G.729AB G.726 Voice Compression G.168 Echo Cancellation Advanced telephony Full Distributed Unicast Conferencing Call forwarding Call Waiting/ Caller ID. IDE and Build Tools CodeWarrior Development Suites for Networked Applications v11.4.0 Design Resources

  Overview The NXP ®  Smart Application Blueprint for Rapid Engineering (SABRE) series of market-focused reference designs delivers the SABRE platform for eReaders based on the i.MX508 processor. The i.MX508 is the first SoC designed specifically for eReaders with a high-performance Arm® Cortex®-A8 CPU and integrated display controller certified by E Ink® for Electronic Paper Display (EPD) panels The SABRE platform provides a reference design for EPD display, touch control, audio playback as well as the ability to add WLAN, 3G modem or Bluetooth® The platform was designed to facilitate software development with faster time to market through support of both Linux® and Android™ operating systems Archived content is no longer updated and is made available for historical reference only.   Features CPU Complex Up to 800 MHz Arm Cortex-A8 32 KB instruction and data caches Unified 256 KB L2 cache NEON SIMD media accelerator Vector floating point coprocessor Multimedia OpenVG™ 1.1 hardware accelerator 32-bit primary display support up to SXGA+ resolution 16-bit secondary display support EPD Controller supporting beyond 2048 × 1536 at 106 Hz refresh (or 4096 × 4096 at 20 Hz) Pixel Processing Pipeline (PxP) supporting CSC, Combine, Rotate, Gamma Mapping Display 6”Electronic Paper Display Panel daughter card powered by E-Ink External Memory Interface Up to 2 GB LP-DDR2, DDR2 and LP-DDR1(mDDR), 16/32-bit SLC/MLC NAND flash, 8/16-bit with 32-bit ECC Advanced Power Management Multiple independent power domains State Retention Power Gating (SRPG) Dynamic voltage and frequency scaling (DVFS) Connectivity High-Speed USB 2.0 OTG with PHY High-Speed USB 2.0 Host with PHY Controllers Wide array of serial interfaces, including SDIO, SPI, I2C and UART I2S audio interface 10/100 Ethernet controller   Design Resources