Watchdog timer usage imx6ull Hello, We are planning to use the Watchdog timer for our existing system for any type of os failure or hardware failure, and we are using the IMX6ULL board so can you suggest which watchdog we can use for the best output and feasibility point of view? i.MX6UL Re: Watchdog timer usage imx6ull Hello @amiraj_patel  I hope you are doing very well. You can refer to the imx6ul device tree, the only wdog used is the wdog1, you can use wdog2 and wdog3, just you must declare it on the device tree. I hope this can helps to you. Best regards, Salas.

How to obtain the commutation timing sequence table? Hello all:     I am testing the BLDC using the MCSPTE1 AK144 kit.      When I was reading the AN12435.pdf, I saw the Figure 4 "Six-step switching sequence" of page 5, and please refer to the attached sequence.png file.     I want to know how this switching sequence is obtained? What method can be used to obtain the sequence?     Thanks! Best regards, Fedora Re: How to obtain the commutation timing sequence table? Hello Leo:    Ok, I understand now. I will continue my research. Thanks for your help. Best regards, Fedora Re: How to obtain the commutation timing sequence table? Hi, Thank you so much for your interest in our products and for using our community. You could refer to Figure 2. 3-phase BEMF voltages and phase currents of a BLDC motor from the same app note. On the other hand, Six-step commutation is a very common method for driving a 3-phase star-connected BLDC motor, maybe there are more detailed documentation about this on the web. We usually just describe the basics to implement motor control with our MCUs. Hope it helps you. Have a nice day!

IMX8QM DP++ (DisplayPort Dual-Mode) Hi, We've a custom (imx8qm) board with an mDP (mini DisplayPort) connector, and I'd like to connect an external HDMI screen using a passive mDP-HDMI adapter. My understanding is that this should be possible if DP++ (DisplayPort Dual-Mode) is supported. I have a few questions regarding DP++ support on the i.MX8QM: i.MX8QM DP++ Support: Does the i.MX8QM processor itself support DP++? Cadence Firmware DP++ Support: Does the Cadence firmware for the i.MX8QM's DisplayPort controller support DP++? Device Tree Configuration: Are there any necessary device tree (dtb) configurations required to enable and utilize DP++ functionality? If so, could you please provide details on the specific settings? Thank you for your assistance. Re: IMX8QM DP++ (DisplayPort Dual-Mode) Hello, Unfortunately DisplayPort Dual-Mode is not supported in i.MX8QM, you need to look into another adapter. I apologize the inconvenience that this may affect your design. Best regards.

DAC 和 ADC 位于同一 SAI 上 你好， 我正在尝试设置一个设备树，以便我们可以使用相同的 SAI（SAI1）来使用 AK4458 DAC 和 AK5558 ADC。我已经成功为 AK4458 设置了一个简单的音频卡设备树节点，但现在我正尝试集成 AK5558。我只是想知道这是否可以通过简单的音频卡实现。请注意，它们应该使用相同的格式。它们都使用 TDM256、32 位、MSB。这是我当前测试设备树的摘录。在当前配置下，在相应卡上开始录制时似乎没有任何 RX 帧同步。 / { custom-audio-card { compatible = "simple-audio-card"; #address-cells = <1>; #size-cells = <0>; simple-audio-card,name = "Custom Audio"; system-clock-fixed; system-clock-direction-out; simple-audio-card,dai-link@0 { format = "left_j"; bitclock-master = <&sai1cpu0_master>; frame-master = <&sai1cpu0_master>; sai1cpu0_master: cpu { sound-dai = <&sai1>; dai-tdm-slot-num = <8>; dai-tdm-slot-width = <32>; dai-tdm-slot-tx-mask = <1 1 1 1 1 1 1 1>; dai-tdm-slot-rx-mask = <1 1 1 1 1 1 1 1>; }; codec { sound-dai = <&ak4458>; prefix = "ak4458"; dai-tdm-slot-num = <8>; dai-tdm-slot-width = <32>; dai-tdm-slot-tx-mask = <1 1 1 1 1 1 1 1>; dai-tdm-slot-rx-mask = <0 0 0 0 0 0 0 0>; }; }; simple-audio-card,dai-link@1 { format = "left_j"; bitclock-master = <&sai1cpu1_slave>; frame-master = <&sai1cpu1_slave>; sai1cpu1_slave: cpu { sound-dai = <&sai1>; dai-tdm-slot-num = <8>; dai-tdm-slot-width = <32>; dai-tdm-slot-tx-mask = <1 1 1 1 1 1 1 1>; dai-tdm-slot-rx-mask = <1 1 1 1 1 1 1 1>; }; codec { sound-dai = <&ak5558>; prefix = "ak5558"; dai-tdm-slot-num = <8>; dai-tdm-slot-width = <32>; dai-tdm-slot-tx-mask = <0 0 0 0 0 0 0 0>; dai-tdm-slot-rx-mask = <1 1 1 1 1 1 1 1>; }; }; }; }; &sai1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1>; // TODO ! clocks = <&clk IMX8MM_CLK_SAI1_IPG>, <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_SAI1_ROOT>, <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>; clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k"; assigned-clocks = <&clk IMX8MM_CLK_SAI1>; assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; assigned-clock-rates = <24576000>; fsl,sai-asynchronous; fsl,sai-mclk-direction-output; // SAI will output the MCLK fsl,dataline = <1 0x01 0x01>; status = "okay"; }; 回复：DAC 和 ADC 位于同一 SAI 上 我的密码配置确实错误！另外，我现在在 RX 同步模式下使用 sai。据我所知，一切都按预期进行！

Serdes Driver Not Showing Under Peripherals View Hi, I'm trying to configure the Serdes RTD driver to be able to use GMAC with Serdes. But when I go to the peripheral view I can't find Serdes in the list. What is the process to add Serdes configuration to a project in Design Studio ? I checked and serdes RTD driver is present under  C:\NXP\S32DS.3.6.0\S32DS\software\PlatformSDK_S32XX_4_0_0\RTD\Serdes_TS_T40D11M50I0R0 Thank you for your help .   Re: Serdes Driver Not Showing Under Peripherals View Hello @yanis-waabi,  After some research I can conclude that there is no supported procedure to add SerDes in S32DS. If you see the examples folder of the module, you can see that there are examples only for EB Tresos.  I apologize for the inconveniences.

IPS 大家好， S32G3参考手册中使用的IPS总线是什么？在多种情况下，“IPS”缩写被用于多种语境中。我正在寻找它的完整形式和规格。在其中一个例子中，我注意到它将“外围总线接口”称为（IPS），这听起来与缩写不符。它是 (IPS) NXP专有的吗？S32G2 S32G3 S32G-VNP-RDB3 S32G-VNP-RDB2 回复：IPS 谢谢您的回复。我很欣赏提供详细信息的方式。继续努力吧。

How to use imxvideoconvert_g2d and imxcompositor_g2d on imx8dxp with Wind River Linux. Hi, team I would like to use imxvideoconvert_g2d and imxcompositor_g2d on the SoC of imx8dxp. Due to certain circumstances, I need to use Wind River Linux. How can I use imxvideoconvert_g2d and imxcompositor_g2d? Can they be used by adjusting the Linux kernel configuration? Please let me know. Best Regards, Re: How to use imxvideoconvert_g2d and imxcompositor_g2d on imx8dxp with Wind River Linux. Hello, The imxvideoconverter plugin is available and runnign on VXworks you  just make sure that gstreamer is correctly installed on your system. If you continues with issue please send a case to winriver.  https://www.windriver.com/support Regards

S32G3 ubuntu login in username & passwd Hi, I recently used yocyo to compile fsl-image-ubuntu, but after burning the generated image to the sd card, the login is not like fsl-image-auto, which can be used by using "root". Please tell me how to log in to ubuntu  S32G-VNP-RDB3  Re: S32G3 ubuntu login in username & passwd Hi, @carlos_o : Thanks for your suggestion,you are right! Re: S32G3 ubuntu login in username & passwd Hi @jiajun_cheng, Please refer to the BSP User Manual of the version you are using. There at the chapter 3.1.3 BSP Ubuntu Build you can find the user and password.   [page 13, Linux BSP 42.0 User Manual for S32G3 platforms] 

S32K144 MCUを使用して同じFTMインスタンスのFTMチャネルで異なる周波数を使用する方法 私はS32K144 MCUを使用しており、FTMペリフェラルインスタンス0を使用しています。 FTM0_CH0とFTM0CH1で異なる周波数を生成したい。 しかし、私が観察したことは、APIによって1つのチャネルの周波数/周期を変更すると、 次のようになりますFtm_Pwm_Ip_UpdatePwmPeriodAndDuty(FTM_INSTANCE_0、channel0、35000、12000、TRUE); その後、他のチャンネルの周波数も変更されます。 すべてのチャンネルのMOD登録が同じであることがわかりました。したがって、周波数を変更するためにMOD値を変更すると、FTMインスタンス全体の周期が変更されます。 しかし、同じFTMインスタンスのチャネルで異なる周波数を使用したい場合はどうでしょうか。 どうすればそれを達成できますか?

s32k312 can not debug Hi NXP,    my environment is  jlink v11  and s32DS. it  works until yesterday, when starting debug, it can stop at main entry,  then run step into, or any other operation, it goes to unknown state. the abnormal as attached. 1. debug can't  halt CPU. 2. read sram failed. but with the same hardware and elf file,  i use ozone , it works normally.  here my debug cofig. it's same compare to it's working time. 回复： s32k312 can not debug i dont know what cause this problem, after totally reinstall S32DS , solved.  but after few days use, S32DS debuger seems responses slower than normal. currently, use OZone to program and debugger instead. Re: s32k312 can not debug Hi, Senlent Ozone is software on PC, my board and jlink are the same. i just use it instead of S32DS debug function, all others are same. Re: s32k312 can not debug Hi@victory I don't find any problem with your configuration, and your other debuggers (ozone) can burn and debug your hardware normally, so the possible reason may be your J-LINK tool or the link problem.

S32K396 SDADC measurement of AC signals shows attenuation Hello, I am using the S32K396 SDADC to measure two different frequencies of sine wave signals with the same peak-to-peak value, but the measured signals show varying degrees of attenuation. Specifically, when measuring a 1V 5kHz sine signal, the peak-to-peak value obtained from the SDADC conversion is (1051/32768)×5=0.16V(1051/32768)×5=0.16V. When measuring a 1V 3kHz sine signal, the peak-to-peak value obtained from the SDADC conversion is (1691/32768)×5=0.26V(1691/32768)×5=0.26V. My software configuration and code are as follows. Here are my configuration and code. /*================================================================================================== * INCLUDE FILES * 1) system and project includes * 2) needed interfaces from external units * 3) internal and external interfaces from this unit ==================================================================================================*/ #include "Clock_Ip.h" #include "Sdadc_Ip.h" #include "check_example.h" #include "Siul2_Port_Ip.h" #include "Siul2_Dio_Ip.h" #include "IntCtrl_Ip.h" #include "SGEN_conf.h" /*================================================================================================== * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS) ==================================================================================================*/ /*================================================================================================== * LOCAL MACROS ==================================================================================================*/ #define SDADC_INSTANCE_USED 0U /* The SDADC hardware instance used in the example */ #define DMA_CHANNEL_USED DMA_LOGIC_CH_0 /* The DMA logical channel used in the example */ #define NUM_SAMPLES 16U #define GET_COMPLEMENT_OF_2(x) ((uint32)(~((uint32)(x)) + 1U)) #define SDADC_INVALID_DATA 0xFFFF sint16 data[1700]; sint16 cali_data[1700]; uint16 cnt_data =0; uint32 sfr_data=0; #define SDADC_0 0U /*================================================================================================== * LOCAL CONSTANTS ==================================================================================================*/ /*================================================================================================== * LOCAL VARIABLES ==================================================================================================*/ #define ADC_START_SEC_VAR_CLEARED_16_NO_CACHEABLE #include "Adc_MemMap.h" static volatile uint16_t ResultsBuffer[NUM_SAMPLES + 1U]; /* Plus 1 to check for overflow */ #define ADC_STOP_SEC_VAR_CLEARED_16_NO_CACHEABLE #include "Adc_MemMap.h" /*================================================================================================== * GLOBAL CONSTANTS ==================================================================================================*/ /*================================================================================================== * GLOBAL VARIABLES ==================================================================================================*/ /*================================================================================================== * LOCAL FUNCTION PROTOTYPES ==================================================================================================*/ void fifo_notification(void); /*================================================================================================== * LOCAL FUNCTIONS ==================================================================================================*/ void fifo_notification(void) { //Siul2_Dio_Ip_WritePin(LED_PORT, LED_PIN, 1U); Sdadc_Ip_GetConvData(SDADC_INSTANCE_USED,13,&data[cnt_data]); //Sdadc_Ip_ApplyCalibration(SDADC_0,7,&data[cnt_data],&cali_data[cnt_data]); //Siul2_Dio_Ip_WritePin(LED_PORT, LED_PIN, 0U); cnt_data+=13; if(cnt_data >= 1680) { sfr_data=Sdadc_Ip_GetStatusFlags(SDADC_INSTANCE_USED); Siul2_Dio_Ip_WritePin(LED_PORT, LED_PIN, 0U); } } int main(void) { /* Initialize clock driver */ Clock_Ip_Init(Clock_Ip_aClockConfig); Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS_PortContainer_0_BOARD_InitPeripherals, g_pin_mux_InitConfigArr_PortContainer_0_BOARD_InitPeripherals); Siul2_Dio_Ip_WritePin(LED_PORT, LED_PIN, 0U); SGEN_init_M1(3,8,SWG_TRIG_SW); IntCtrl_Ip_Init(&IntCtrlConfig_0); /* Initialize SDADC driver */ Sdadc_Ip_EnableInterruptEvents(SDADC_INSTANCE_USED,1); Sdadc_Ip_Init(SDADC_INSTANCE_USED, &SdadcIpConfig_0); // Sdadc_Ip_DoCalibration(SDADC_0); /* Start DSPSS thread and SDADC conversion */ Sdadc_Ip_ReloadConversion(SDADC_INSTANCE_USED); /* Wait until buffer is full: the last element was written by DMA */ while (1) { // Sdadc_Ip_SwTriggerConversion(SDADC_INSTANCE_USED); } } I used the SDADC's FIFO interrupt to transfer the collected data to the data array, and the FIR filtering is not enabled in the SDADC. I measured a 1V 3kHz sine signal and a 1V 5kHz sine signal, and the obtained data arrays are plotted in the following images. when measuring a 1V 5kHz sine signal, the peak-to-peak value obtained from the SDADC conversion is (1051/32768)×5=0.16V(1051/32768)×5=0.16V. When measuring a 1V 3kHz sine signal, the peak-to-peak value obtained from the SDADC conversion is (1691/32768)×5=0.26V(1691/32768)×5=0.26V.  Could you please let me know if there is any configuration error? Re: S32K396 SDADC measurement of AC signals shows attenuation Thank you for your reply. , I'll to  to contact my NXP representative. Re: S32K396 SDADC measurement of AC signals shows attenuation Hi again, I'm glad to read that you have found the reason for the signal attenuation. Regarding your issue with enabling FIR filter, I note you are using a board that is no available in the NXP page, which do not allow me to debug your issue on my side. Is this issue is reproducible in the S32K396-BGA-DC1? If so, how? If not, I'll need to ask you to contact your NXP representative or whoever provided you with the S32K396-LQFP-DC to follow up with your issue please. An apology for the inconvenience. Have a nice day! Re: S32K396 SDADC measurement of AC signals shows attenuation @_Leo_ ，Thank you for your reply. I found the reason for the signal attenuation; it is caused by the low-pass filter circuit in the signal input circuit. The development board I am using is the S32K396-LQFP-DC, and the filter circuit for the SDADC0 AN0 and AN1 channels is shown in the figure below. Now, I am testing the AN_2 and AN_3 channels of SDADC0, and the input circuit is shown in the figure below： I used the SDADC's FIFO interrupt to transfer the collected data to the data array, and the FIR filtering is not enabled in the SDADC. I measured a 2V 10kHz sine signal , and the obtained data arrays are plotted in the following images. In this case, the SDADC works well; however, after enabling the FIR filter, the output data has issues. The conversion data read after filtering seems incomplete, and there is an abnormal downward offset in the signal, as shown in the figure below. The schematic and code files for the development board are shown below. Re: S32K396 SDADC measurement of AC signals shows attenuation Hi, Thank you so much for your interest in our products and for using our community. Please share your complete project in a zip, as we as HW (board connections) & SW (IDE and RTD versions) installation details in order to reproduce your issue from our side, like plug & play. Feel free to share any details to speed up the test and therefore the resolution of the problem. Have a nice day!

PTN3460 Design Review Hi Team, Kindly looking for PTN3460 eDP to LVDS converter Hardware Design review. Thankyou. Regards, Nagendra Prasad Re: PTN3460 Design Review Hi Nagendra_Nash Sure, but open a new ticket on our page please, we need to have a record of our conversation and information shared for your protection and ours. Once you create the ticket, I or a coworker can help you privately. Have a great day and best of luck. Re: PTN3460 Design Review Hi RafaR Waiting for your response. Regards, Nagendra Re: PTN3460 Design Review Hi RafaR Can we have this review through mail.  Thank you. Regards, Nagendra Re: PTN3460 Design Review Hi Nagendra_Nash Sure!, Please send me what you want me to review I will be waiting for your response Have a great day and best of luck.

i.MX93 Linux reboot not working We have a custom board based on i.MX93 running with Linux 6.6.52, and in principle everything works fine. But calling reboot stuck at the end and does not restart the CPU and the board. In U-Boot the command reset works perfect. I followed the calls and can see, both, U-Boot and Linux kernel, calls    invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); In U-Boot the CPU restarts, in Linux nothing is happening after that PSCI call. I tried CONFIG_ARM_PSCI_CHECKER to see if PSCI is working and the tests done during Linux boot finished with success. So it looks like the according PSCI call PSCI_0_2_FN_SYSTEM_RESET is not working correct under Linux. Any idea what could be the reason? Linux Re: i.MX93 Linux reboot not working Solved! In old version of imx93.dtsi only watchdog 3 (wdog3) is available and activated by default. In newer version several watchdogs are available and disabled by default. So you have to activate them explicitly by setting status to okay. And it seems that wdog3 is needed for the reboot in the Linux system. So after explicitly activating wdog3 via the device tree reboot is working.

FRDM-KL25Z SPI 中的 MOSI 和 MISO 空闲状态 KL25Z 上的 MOSI 和 MISO 线路的默认空闲状态是什么 - 低或高？从我的测试来看，它们都处于高空转状态。但是我用于 SD 卡的分线板似乎在 MOSI 空闲状态为低、MISO 空闲状态为高的情况下工作效果更好。我尝试将 MOSI 线的端口配置设置为 LOW，但它实际上并没有变低。我还尝试使用 MOSFET 2n7000 晶体管作为逆变器，将空闲高电平信号反转为空闲低电平信号，但这会导致 MISO 线路出现问题。 我已查看过 KL25 子系列参考手册，但没有在任何地方看到此信息。 回复：FRDM-KL25Z SPI 中的 MOSI 和 MISO 空闲状态 我已经确定 MOSI 和 MISO 在 SPI 模式下的 KL25Z 上均处于高电平空闲状态。这是我的示波器的屏幕截图，其中包含 SPI 模式下 SD 卡的工作命令和响应。黄色是 MOSI；紫色是 MISO。您看不到命令和响应的详细信息，因为我捕获了全部 6 个命令，但您可以看到下降到 0。

我需要克隆 IMXLXYOCTOUG v.LF6.6.3_1.0.0 的 uboot 版本 我正在使用 IMXLXYOCTOUG v.LF6.6.3_1.0.0 并且我想克隆 U-Boot Git 存储库。有人知道怎么做吗？ 谢谢和问候 斯里尼瓦斯 回复：我需要克隆 IMXLXYOCTOUG v.LF6.6.3_1.0.0 的 uboot 版本 你好@chavira 感谢您的帮助。 谢谢与问候 斯里尼瓦斯

符合 CAAM - NIST 标准的 i.MX6UL RNG i.MX6UL 中的 CAAM 模块有一个 RNG（随机数生成器）。 我们需要确认 RNG 符合 NIST 标准，特别是 SP800-90A。 其他一些论坛也认为这是真的： https://community.nxp.com/t5/i-MX-Processors/I-MX6-Cryptographic-Acceleration/mp/222394 但是，它并未在 NIST 的加密模块验证程序中明确列为验证模块。 您能帮忙确认 i.Mx6UL 的 RNG 是否符合 NIST 吗？ 射频

imx9596 - is it possible to flash only M7 core with JLink ? Hello, I am currently working on an iMX9596 evaluation board and I am therefore trying to do multi-OS segregation. To flash the different cores, I am creating a flash.bin file and flashing it using the USB-C port, as explained in the datasheet and training documents. I can then obtain two OSes running: a Linux one on the A55 cores and a Zephyr one on the Zephyr core. I will often change the Zephyr OS but not the Linux one, which is why I am trying to be able to quickly change the Zephyr firmware using the JTAG port and a J-Link probe. I downloaded the latest J-Link software and found out that my device, iMX9596-M7, is listed in the J-Link library. However, when I tried to connect with J-Link, I got the following error, attached to this message. Furthermore, my SM on M33 causes my Zephyr and Linux systems to reboot as well. Is there a way to flash only the M7 using J-Link, or is this not supported? I would also like to be able to debug with it. Thank you in advance for your answers. Re: imx9596 - is it possible to flash only M7 core with JLink ? Thanks for sharing. Re: imx9596 - is it possible to flash only M7 core with JLink ? Hello, Ok thanks. Regards, Audrey. Re: imx9596 - is it possible to flash only M7 core with JLink ? I found that if you stop linux booting in uboot you can then flash the M7 core with jlink probe. Re: imx9596 - is it possible to flash only M7 core with JLink ? Hi @anicolle  sorry imx9596 is not launched yet.   I would suggest you contact the person who gave you this product for support. Regards Daniel

S32K312 CAN configuration Hello, I have developed a code using Matlab/Simulink MBDT to echo CAN messages (the echoed message has a CAN ID equal to the received message CAN ID + 1). I use PCAN-View to send to and receive from the board. This is S32K312-Q172. This works OK for messages with extended CAN IDs, but not for standard IDs. To receive CAN messages on the board, I use CanIf_RxIndication. To send CAN messages from the board, I use CanHardwareObject_Can0_Tx_Interrupt with the following configuration: Can Implementation Type: FULL Can ID Message Type: MIXED In the simulink mask of the Can_Write block, the "Extended ID CAN Message" option is unchecked I also use a CanIf_TxConfirmation block. Could you please provide some guidance to make my code work for both types of CAN Messages IDs? Re: S32K312 CAN configuration Hello Pablo, I'm glad to hear it worked. And thank you for confirming the solution was successful! Regards, Robert V Re: S32K312 CAN configuration Hi Robert, I managed to get my model working with your suggestions, receiving and echoing both standard and extended ID CAN messages. Thank you!! Pablo Re: S32K312 CAN configuration Hello Pablo, I looked at your model and I think I found a solution for your issue. What I ultimately had to do was to set Can ID Message Type either to STANDARD or EXTENDED, for the RECEIVE objects. By keeping one of them as a polling hardware object, the MainFunction_Read is still necessary.  I chose STANDARD for CanHardwareObject_Can0_Rx_Std_Polling (id=1) and EXTENDED CanHardwareObject_Can0_Rx_Ext_Interrupt (id=2) (instead of MIXED).    With these changes alone I got the model to work in the following way: - Sent EXTENDED frame from Can Analyzer - > started receiving EXTENDED frame messages with the ID incremented by 1 from the board - Sent STANDARD frame from Can Analyzer - > started receiving EXTENDED frame messages with the ID incremented by 1 from the board In case you are looking to also reply with the same message type, then you would need to implement a workflow that includes 2 Can_Write blocks (one with the checkbox for Extended enabled and one without), and based on the received frame, you redirect to the content to the appropriate Can_Write. A few ideas on how you could differentiate between the frames: - By received ID length, but this might be tricky depending on how this is stored - By Hardware Object ID: going back to the configuration referenced above, CanHardwareObject with the ID 1 was set to receive STANDARD messages, so if your received CAN message comes from the object with the ID 1, you know it's a STANDARD message; otherwise if it's ID 2, then you know it was captured by the can hardware object with ID 2, configured to receive EXTENDED frames. Please let me know if this fixes the issue you were encountering.  Regards, Robert V Re: S32K312 CAN configuration Hi @robertv , I'm afraid I've tried both options and none of the get my code to work with standard IDs. I'm attaching my model so hopefully you can have a look at it. Many thanks, Pablo Re: S32K312 CAN configuration Hello @paul_14 ,  I tried to replicate a scenario similar to what you have here. First of all, using the default configuration (no changes) that comes with the Toolbox for the S32K312-Q172, i managed to send both EXTENDED and STANDARD frames simply by checking and unchecking the "Extended ID Can Message" property inside the CAN_Write block. Additionally, I tried using the same Can Hardware Object (CanHardwareObject_Can0_Tx_Interrupt) to send EXTENDED and STANDARD frames on alternate execution steps. Where I think I noticed a possible inconvenient was when trying to receive both STANDARD and EXTENDED frames, where it seemed like only the EXTENDED frames were being received. That happens because of the way the hardware objects are configured: - CanHardwareObject_Can0_Rx_Ext_Interrupt is able to receive EXTENDED frames, and it's configured to work based on interrupts, meaning  there is nothing else you have to do in order for the message to be captured by the Hardware Interrupt Callback set to CanIf_RxIndication.  - CanHardwareObject_Can0_Rx_Std_Polling is able to receive STANDARD frames, and it's configured to work based on the polling mechanism, meaning that in order for this to trigger the Hardware Interrupt Callback, an additional block is needed, that being the Can Block set to Can_MainFunction_Read. This triggers the aforementioned Hardware Interrupt Callback when the hardware object set to polling is receiving messages. Setting the Can ID Message Type to MIXED might not lead to the desired results when using the RECEIVE objects because MIXED is treated as EXTENDED for this case.  I see the following options, to be able to RECEIVE both EXTENDED and STANDARD frames: - use the configuration provided by default and also add a Can_MainFunction_Read block into your model, triggering the interrupt for the polling can hardware object - modify the polling hardware object to work on interrupts instead: Let me know if these explanations help you and if you manage to get the model to work as expected.  Regards, Robert V Re: S32K312 CAN configuration Hi @Irina_Costachescu  Yes, I already had this CAN Hw Object with message type as MIXED. I have all these CAN Objects: 0. CanHardwareObject_Can0_Rx_FIFO: FULL/MIXED/RECEIVE 1. CanHardwareObject_Can0_Rx_Std_Polling: BASIC/MIXED/RECEIVE 2. CanHardwareObject_Can0_Rx_Ext_Interrupt: BASIC/MIXED/RECEIVE 3. CanHardwareObject_Can0_Tx_Polling: BASIC/MIXED/TRANSMIT 4. CanHardwareObject_Can0_Tx_Interrupt: BASIC/MIXED/TRANSMIT And this is how my model looks like: Thanks, Pablo Re: S32K312 CAN configuration Hi @paul_14  As a first step, could you please try and set the CAN ID Message Type for the Receive Hardware Object on MIXED? After this setting is performed, as illustrated above, could you please try and rebuild the model and check if you are able to receive messages with both EXTENDED and STANDARD IDs? Thank you, Irina

S32G3 bootconfig through serial EEPROM Hi experts, About S32G3 bootconfig through serial EEPROM how can I obtain current bootconfigwords and fix it. Thank you! Re: S32G3 bootconfig through serial EEPROM Hello @piaochunri, Sorry for the late response, once you select a correct answer the topic is marked as closed and I stop receiving notifications. Please create a new post with your new problem as it is not completely related to the original post so one of my teammates or myself can help you.  Sorry again for the late response Re: S32G3 bootconfig through serial EEPROM I'm glad to know you were able to solve the problem! Thanks for marking the answer as accepted. Re: S32G3 bootconfig through serial EEPROM I have sovled the problem after I set the host name of s32g debug probe and I can config the EEPROM now. Thank you! Re: S32G3 bootconfig through serial EEPROM Yes.We are debugging a self-developed board of S32G399A.The scheme of boot mode part is referred to S32-VNP-RDB3. I was debugging Acore and the version of bsp is 40.0.And I followed the link HOWTO: Program Serial RCON using S32 Debug Probe S32G2xx - NXP Community t o debug it. But when I runned the python script it could not pass the initialization whether I inserted the SD card or not.The result seems the same. What should I do?Thank you! Re: S32G3 bootconfig through serial EEPROM Thank you!Yes,I have read these documents.We are debugging a self-developed board of S32G399A. The designed scheme of boot mode is referred S32G-VNP-RDB3(RCON12 and RCON13).I also referred the link HOWTO: Program Serial RCON using S32 Debug Probe S32G2xx - NXP Community to debug the EEPROM.But it stopped during initialization.My A core bsp  version is 40.0. I used S32 debug probe.Is it necessary to connect the debugger to my laptop through ethernet or USB connection is ok?The info of probe is as follows. And I runned the python script.It resulted in error.What should I do?Thank you!   Re: S32G3 bootconfig through serial EEPROM Hello @piaochunri, To be able to boot from SerialRCON I recommend you check AN13456 [page 6, S32G3 Boot Process, Rev. 1, 02/2023] You can also get more information in the S32G3 reference manual [page 1319, S32G3 Reference Manual, Rev. 4, 02/202]: This means the 32bits used as boot configurations need to be already present in the EEPROM. If it's possible I can recommend using EEPROM AT24C01C-XPD-T, which is used in the EVB3-Board which supports S32G3 chips.  Let me know if this information solved your question Re: S32G3 bootconfig through serial EEPROM We are debugging a self-developed board with S32G399A. And our board only supports bootconfig through serial RCON not through parallel RCON. I want to known how can I set it.I have tried some commands during u-boot step.But I am not sure it is useful. Re: S32G3 bootconfig through serial EEPROM Hello @piaochunri , I’m assuming you are using the RDB3 board. Then the 32 bits (0 – 31) you see in the excel file represent the 4 dip switches present in your board: You can check the schematic to see the order of the bytes [page 32, S32G-VNP-RDB3, SPF-53060.pdf] available in deseing files section of the S32G-VNP-RDB3 product page: You can check the User Guide to learn more about the different switch configurations [Starting in page 3, Chapter 3, S32G-VNP-RDB3 Switch Setting, S32G-VNP-RDB3 User Guide, Rev. 1.0, 03/2023] available in de documentation section of the S32G-VNP-RDB3 product page: Let me know if this information solved your question.

S32K146 Csec ライブラリ こんにちはサポートチーム、 このページにあるS32K146 Csecライブラリをダウンロードできますか? S32XXXのAN5401SWパッケージを見つけてCsecの例を開くと、次のようなS32K144ライブラリが常にあります。 「S32K144.h」または「S32K144_features.h」 また、他のものには次のようなものが含まれます "fsl_core_cm4.h",「fsl_device_registers」 常にヘッダー内のS32K144を参照しています。 感謝。 Re: S32K146 Csec ライブラリ さて、それについては確信が持てませんでした。ありがとうございました 😃