VR5510 OTP Modify Configuration Hi. I'm having trouble modifying the OTP configuration with the VR5510 and failing to enter test mode, and I'd like to ask for some advice. Here are my steps: Tested according to AN13182 documentation. According to 5.1 Entering Debug mode/test mode, after setting the VDDOTP voltage, read the FS_STATES(0x18h) data as 0x20, 0x03. According to the table Table 1. FS_STATES judgement, in which the DBG_MODE bit is 1, Entering Debug mode is successful. - After entering debug mode, a set of test mode keys must be sent over I2C to enter test mode. This is necessary to be able to access the OTP register and modify it to the desired settings. The VDDOTP pin must be held high until a test mode key is accepted. - The same set of test mode keys must be written to both the Main Test Mode Entry Register (M_TM_ENTRY, 0x1Fh) and the Safety Test Mode Entry Register (FS_TM_ENTRY, 0x26h). Each of the following keys must be written to each register in turn. - key1: 11010101_10100111 - key2: 10111000_11101110 - key3: 00001111_00110111 The 3 keys converted to hexadecimal data are - key1: 0xD5, 0xA7 - key2: 0xB8, 0xEE - key3: 0x0F, 0x37 CRC is calculated using the lookup table method, here is the CRC table and lookup function static const uint8_t crc8_lookup[256] = { 0x00,0x1D,0x3A,0x27,0x74,0x69,0x4E,0x53,0xE8,0xF5,0xD2,0xCF,0x9C,0x81, 0xA6,0xBB, 0xCD,0xD0,0xF7,0xEA,0xB9,0xA4,0x83,0x9E,0x25,0x38,0x1F,0x02,0x51,0x4C,0x6B,0x76, 0x87,0x9A,0xBD,0xA0,0xF3,0xEE,0xC9,0xD4, 0x6F,0x72,0x55,0x48,0x1B,0x06,0x21,0x3C, 0x4A,0x57,0x70,0x6D,0x3E,0x23,0x04,0x19,0xA2,0xBF,0x98,0x85,0xD6,0xCB,0xEC,0xF1, 0x13,0x0E. 0x29,0x34,0x67,0x7A,0x5D,0x40,0xFB,0xE6,0xC1,0xDC,0x8F,0x92,0xB5,0xA8, 0xDE,0xC3,0xE4,0xF9,0xAA,0xB7,0x90,0x8D,0x36,0x2B,0x0C,0x11, 0x42,0x5F,0x78,0x65, 0x94,0x89,0xAE,0xB3,0xE0,0xFD,0xDA,0xC7,0x7C,0x61,0x46,0x5B,0x08,0x15,0x32,0x2F, 0x59,0x44,0x63,0x7E,0x2D,0x30, 0x17,0x0A,0xB1,0xAC,0x8B,0x96,0xC5,0xD8,0xFF,0xE2, 0x26,0x3B,0x1C,0x01,0x52,0x4F,0x68,0x75,0xCE,0xD3,0xF4,0xE9,0xBA,0xA7,0x80,0x9D, 0xEB,0xF6,0xD1,0xCC,0x9F,0x82,0xA5,0xB8,0x03,0x1E,0x39,0x24,0x77,0x6A,0x4D,0x50, 0xA1,0xBC,0x9B,0x86,0xD5,0xC8,0xEF,0xF2,0x49,0x54, 0x73,0x6E,0x3D,0x20,0x07,0x1A, 0x6C,0x71,0x56,0x4B,0x18,0x05,0x22,0x3F,0x84,0x99,0xBE,0xA3,0xF0,0xED,0xCA,0xD7, 0x35,0x28,0x0F,0x12, 0x41,0x5C,0x7B,0x66,0xDD,0xC0,0xE7,0xFA,0xA9,0xB4,0x93,0x8E, 0xF8,0xE5,0xC2,0xDF,0x8C,0x91,0xB6,0xAB,0x10,0x0D,0x2A,0x37,0x64,0x79, 0x5E,0x43, 0xB2,0xAF,0x88,0x95,0xC6,0xDB,0xFC,0xE1,0x5A,0x47,0x60,0x7D,0x2E,0x33,0x14,0x09, 0x7F,0x62,0x45,0x58,0x0B,0x16,0x31,0x2C, 0x97,0x8a,0xAD,0xB0,0xE3,0xFE,0xD9,0xC4 }; uint8_t crc8_table(const uint8_t *data, uint32_t len) { uint8_t crc = 0xFF; while(len--) { crc = crc8_lookup[crc ^ *data++]; } return crc; } Encapsulate the data and crc checksum results into an array according to the data format in datasheet 23.I2C: uint8_t key20_1[5] = {0x40, 0x1F, 0xD5, 0xA7, 0xA8}; uint8_t key21_1[5] = {0x42, 0x26, 0xD5, 0xA7, 0x24} uint8_t key20_2[5] = {0x40, 0x1F, 0xB8, 0xEE, 0xEA}; uint8_t key21_2[5] = {0x42, 0x26, 0xB8, 0xEE, 0x66}; uint8_t key20_3[5] = {0x40, 0x1F, 0x0F, 0x37, 0x16}; uint8_t key20_3[5] = {0x40, 0x1F, 0x0F, 0x37, 0x16}; uint8_t key21_3[5] = {0x42, 0x26, 0x0F, 0x37, 0x9A}; Write the 3 keys into two registers respectively. VR5510_Write(key20_1);// W:0x20, 0x1F, (0xD5, 0xA7) VR5510_Write(key21_1);// W:0x21, 0x26, (0xD5, 0xA7) VR5510_Write(key20_2);// W:0x20, 0x1F, (0xB8, 0xEE) VR5510_Write(key21_2);// W:0x21, 0x26, (0xB8, 0xEE) VR5510_Write(key20_3);// W:0x20, 0x1F, (0x0F, 0x37) VR5510_Write(key21_3);// W:0x21, 0x26, (0x0F, 0x37) - After successfully sending the test mode entry key, read bit 6 of the M_TM_STATUS1 (0x25h) register and bit 15 of the FS_STATES (0x18h) register to verify the test mode status. If both bits are set to 1, the test mode entry operation is successful. Read two more registers of data VR5510_Read(state_buf1, data);// R:0x20, 0x25, (0x00, 0x0C) VR5510_Read(state_buf2, data);// R:0x21, 0x18, (0x20, 0x03) FS_STATES(0x18h) data is 0x20, 0x03. according to Table Table 1. FS_STATES judgment, bit 15 is 0. M_TM_STATUS1(0x25h) data is 0x00, 0x0C. According to Table 2. M_TM_STATUS1 judgment, bit 6 is 0. Failed to enter test mode. In the case of entry failure, try to modify the OTP configuration according to 5.2 Modifying a programmed OTP in Debug mode instructions, first read the registers and then write the new data, and finally read again, the data did not change, the modification failed. VR5510_Write(OTP1_R1_W); VR5510_Read (OTP1_R2_R, data). VR5510_Write(OTP2_W1_W); VR5510_Write(OTP2_W2_W). VR5510_Write(OTP3_R1_W); VR5510_Read(OTP3_R2_R, data). May I ask where is the problem in failing to enter test mode and what should be done to fix it. Re: VR5510 OTP 修改配置 Any questions submit a ticket through the link below, this is something only you can see:
Home Re: VR5510 OTP 修改配置 Leave a phone number. Re: VR5510 OTP 修改配置 Can't we change our current chip anymore? Only an empty chip can be tested and configured according to the AN13182 document, and after the test is completed, the OTP will be performed according to the configuration at the time of test, and after the OTP, it can't be modified any more, right? Re: VR5510 OTP 修改配置 If you have already done OTP, the output is decided by OTP, you can't change the registers through IIC after powering up, so it's useless.
You yourself through the socket of the board to take an empty chip A0 version of the chip area to redo the OTP, only this is the most effective, otherwise it is very troublesome. Re: VR5510 OTP 修改配置 Model MVR5510AMDAHES, we purchased the chip with OTP already written, we now need to modify the voltage of BUCK3 when we use it, is it possible to use I2C to modify the configuration? Re: VR5510 OTP 修改配置 Hello:
Do you want to make your own OTP for VR5510?
If it is hi can you tell me the exact model number of the VR5510 that I have on hand right now?
KITVR5510SKTEVM | VR5510 PMIC Programming Board | NXP Semiconductors
Above is the board of our VR5510 specializing in OTP sockets, you see if it is more convenient to do OTP with this one.
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