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S32K344T172 时钟在示例 MBDT 项目中不工作 在学习使用带有 Simulink MBDT 的 S32K344 评估板时,我偶然发现了有关带有时钟输出的项目的问题(“s32k344_clockout_s32ct”,“s32k3xx_i2c_async_23st”,“s32k344_spi_async_interr_master_ebt”等......)。主要问题是任何引脚上都没有时钟输出,并且由于缺少时钟输出,SPI 的 MOSI 和 CP 引脚以及 I2C 的 SDA 上也没有数据信号。从硬件角度来看,评估板运行良好,因为当 SPI、I2C 和 NXP_S32 SDK 的时钟输出的示例代码上传到电路板时,时钟似乎可以工作。 为了使 MBDT 的示例项目能够在 S32K344EVB-T172 上运行,是否可能遗漏了任何其他设置和配置? 回复:S32K344T172 时钟在示例 MBDT 项目中不工作 你好@dragostoma , 谢谢您的帮助和澄清。我已将您的第一个回复标记为该问题的解决方案。我仍然对 Pin MSCR 值有疑问,因为我无法根据 S32K344 引脚排列电子表格设置适当的值,但我会将这个问题留给另一篇文章。 干杯!
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Unable to run MBDT s32k3xx_dio_ebt example on S32K396-BGA-DC1 Evaluation Board Hello We recently bought a S32K396-BGA-DC1 Evaluation Board to evaluate S32K396 MCU for a future project. Since we will use Simulink models for application development, I'm trying to use the MBDT toolbox. I could install the toolbox without any issue, but i cannot run the s32k3xx_dio_ebt example. I think that I have set the correct target in model's parameters I'm using the "Open SDA" debugger fitted on the board. Jumpers J16, J17, J18 and J19 have been set accordingly. The board is connected through USB to my laptop (I have green LED lighting next to USB connector on the board). Model download parameters are set like this The model builds, but the process fails when Simulink try to load the code in the board Here is the content of the log GNU gdb (GDB src=g2b2d27aa26 bld=gd2333b8c -v s=GDB-12-1 -L64 -W32 Earm) 12.1 Copyright (C) 2022 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "--host=i686-mingw32 --target=arm-none-eabi". Type "show configuration" for configuration details. For bug reporting instructions, please see: <https://www.gnu.org/software/gdb/bugs/>. Find the GDB manual and other documentation resources online at: <http://www.gnu.org/software/gdb/documentation/>. For help, type "help". Type "apropos word" to search for commands related to "word"... Reading symbols from C:/Matlab/AddOn_2023b/Toolboxes/NXP_MBDToolbox_S32K3/S32K3_Examples/dio/s32k3xx_dio_ebt/s32k3xx_dio_ebt.elf... tcp:localhost:7224: Connection timed out. You can't do that when your target is `exec' By the way, when the error happens, a red LED turns on. Can someone help me with this ? Thank you Vincent Re: Unable to run MBDT s32k3xx_dio_ebt example on S32K396-BGA-DC1 Evaluation Board Hello @Vincent_91687  Glad to hear! I have just forwarded your additional thread to the S32 Design Studio team. Please let us know if there are any other issues you encounter while using MBDT for S32K3 Thank you, Irina Re: Unable to run MBDT s32k3xx_dio_ebt example on S32K396-BGA-DC1 Evaluation Board Hello Irina, It works ! I knew the the guide you gave me, but looking at the doc, it wasn't obvious to me that I must set those jumpers while using J1 12V power supply. Anyway, it's clear now that i was wrong By the way, just in case you may also help me with this, I have another case about S32K396 support package installation in S32 Design Studio: https://community.nxp.com/t5/S32K/Fail-to-install-S32K396-development-package-fails/m-p/2053684#M46329 Thank you very much for your help Best regards Vincent Re: Unable to run MBDT s32k3xx_dio_ebt example on S32K396-BGA-DC1 Evaluation Board Hello @Vincent_91687  Thank you for the attached images. What I notice is that J4, J6 and J7 on your board are in the 1-2 position, corresponding to the JP1 power source, as indicated on the S32K396-BGA-DC1 Connectors and Jumpers Description table which you could find at the following link  As currently, in your setup, there is no connection on the JP1, you would need to change the jumper positions to ensure the required voltage for the MCU. For this, and a complete step by step hardware setup, I would recommend you to take a look at the Getting Started with S32K396-BGA-DC1 Evaluation Board guide, for being able to setup your power source according to your hardware design, and configure properly all the necessary jumpers on the board. Please let us know if this helps, Irina Re: Unable to run MBDT s32k3xx_dio_ebt example on S32K396-BGA-DC1 Evaluation Board Hello Irina, Thank you for your efforts. When my board is only power supplied (USB not connected) through J1 connector, I have only D4 LED turned ON. D1, D2 and D3 remain off I have D30 LED on when USB cable is connected, even if J1 is not connected When both USB and J10 are connected, I still have only D4 and D30 turned ON. I'm trying to download the code in this state. As you can see, D2, D3, and D4 are always down. Is it an issue ? Thank you Best regards Vincent Re: Unable to run MBDT s32k3xx_dio_ebt example on S32K396-BGA-DC1 Evaluation Board Hello @Vincent_91687  Your download settings seem right, as you are choosing to download the code using JTAG, into the FLASH memory.  I have tried to run the example on my setup, and I would like to mention the steps that I have taken: - Powered the board via the 12V CON_1_PWR J1 connector, - Enabled the external power supply via SW10, by switching it to the 1-2 position (please note that J3 also needs to be placed in the 1-2 position according to the board's schematics) After performing these actions, the D1, D1, D3, D4 LEDs (MCU Power IN Indicators) should also be turned on.  Could you please let us know, if, after following these steps, besides the LED lighting next to the USB connector on the board, are the MCU Power IN Indicators also ON? Thank you, Irina Re: Unable to run MBDT s32k3xx_dio_ebt example on S32K396-BGA-DC1 Evaluation Board Hello Irina, Thank you very much for your help. I have changed the "Configuration Project Template" I have also downloaded and installed PE Micro drivers (and restarted my computer), but unfortunately it didn't fix the issue. Could you please confirm that my "Download" settings are correct ? I have noticed something interresting in the log after connection failure Does it means that the MCU is already running ? The board is brand new, so I guess there is no code to run in the flash Is there any jumper to set in order to tell the MCU to boot from the JTAG instead of flash ? Thanks again for your help Best regards Vincent Re: Unable to run MBDT s32k3xx_dio_ebt example on S32K396-BGA-DC1 Evaluation Board Hello @Vincent_91687  By taking a look at the error you are encountering, I think that the problem might be related to a missing PEmicro Hardware Interface Drivers installation. These drivers are necessary for being able to use the on-board OpenSDA debugger. Could you please check if these drivers are installed? If not, you could download and install them on your setup from the official PEmicro website. Moreover, if you are aiming to use the S32K396-BGA-DC1, you could select directly the default configuration project that we are providing for this board, as the S32K396-Q289 selection matches the BGA-DC version of the EVB. The configuration project delivered for S32K396-BGA-DC1 enables the peripherals, pins, and clocks, according to this board's hardware particularities, hence it might be useful to start from this one instead of the one already selected.   Please let us know if this helps or if further details are required from our side. Irina
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S32K344闪存擦除周期寿命   #定义 FLS_MASTER_ID 0U #定义 FLS_BUF_SIZE 80U #定义 FLS_SECTOR_ADDR 0x00600000U #定义 FLS_SECTOR_TEST C40_CODE_ARRAY_0_BLOCK_2_S256   无效FlashWrite()  { /* 如果需要,解锁部门 */ 如果(STATUS_C40_IP_SECTOR_PROTECTED == C40_Ip_GetLock(FLS_SECTOR_TEST))     { C40_Ip_ClearLock(FLS_SECTOR_TEST,FLS_MASTER_ID); }   /* 擦除扇区 */ C40_Ip_MainInterfaceSectorErase(FLS_SECTOR_TEST,FLS_MASTER_ID); 做     { C40状态 = C40_Ip_MainInterfaceSectorEraseStatus(); } 当(STATUS_C40_IP_BUSY == C40Status)时; /* 检查作业结果 */ Fls_ExampleAssert(STATUS_C40_IP_SUCCESS == C40Status);   /* 写入数据 */ C40_Ip_MainInterfaceWrite(FLS_SECTOR_ADDR,FLS_BUF_SIZE,TxBuffer,FLS_MASTER_ID); 做     { C40状态 = C40_Ip_MainInterfaceWriteStatus(); } 当(STATUS_C40_IP_BUSY == C40Status)时; /* 检查作业结果 */ Fls_ExampleAssert(STATUS_C40_IP_SUCCESS == C40Status);   /* 将内存中的数据与TxBuffer进行比较 */ C40Status = C40_Ip_Compare(FLS_SECTOR_ADDR、FLS_BUF_SIZE、TxBuffer); /* 检查作业结果 */ Fls_ExampleAssert(STATUS_C40_IP_SUCCESS == C40Status);      }   我每 1 分钟调用一次此函数 FlashWrite(),并且 MCU 24 小时工作,因此考虑我将获得多少闪存寿命。另外请告诉我如何计算吗?   S32K344-WB 回复:S32K344闪存擦除周期寿命 亲爱的@lukaszadrapa和@narsimh_kamath,感谢你们提供的详细信息和计算。这正是我想要的。 回复:S32K344闪存擦除周期寿命 你好@lukaszadrapa ,谢谢。我注意到我们现在支持 S32K3(V1.6.0)的最新 MBDT 中的 FEE。 您能否帮助分享一些关于估计某个用例是否可行的计算见解(就 S32K3 的 Flash/模拟 EEPROM 规范而言)。 例如,如果我需要连续 15 年每天 24 小时每分钟写入 2KB 的数据,假设我能够使用 FEE 并能实施循环扇区方案,这是否可以支持?
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imx8plus dsp Hello, nxp developers Can anyone confirm that hifi4 dap can be used as common dsp? I want use it for sensor data calculation. By the way, can uart be sxtended?We need 5 uart, but 8mplus datasheet say there are only 4. thanks! i.MX 8 Family | i.MX 8QuadMax (8QM) | 8QuadPlus i.MX 8M | i.MX 8M Mini | i.MX 8M Nano i.MX8ULP Re: imx8plus dsp Thank you very much for your reply. We will take a detailed look at the PDF.Sincere thanks. Re: imx8plus dsp Hi, Thank you for your interest in NXP Semiconductor products, DSPs are used through their firmware, please refer to https://www.nxp.com/docs/en/user-guide/IMX_DSP_USERS_GUIDE.pdf. I found the chapter about NatureDSP Library Support, is the library that matches the common operations of a DSP. Used signal processing functions: FFT, FIR, vector, matrix, and common mathematics. For UART expansion, you could either look for multiplexer/bridges or simulate a UART from GPIO, that development would be up to you. Regards
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S32K314 UART DMA transfer, how to call Lpuart_1_Uart_Ip_DmaTxCompleteCallback(); with S32K314, I am debugging Uart_AsyncSend on PIN140/PTC7/LPUART1_TX. I plan to use DMA mode, the MCAL is generated with tresos studio 28.2 I can captuer the UART output data with oscilloscope, and the data is right what I send out. But unfortunately, only one time transfer is OK.  After one time transfer, UartState/IsTxBusy is always '1'. BytesRemaining is always the data length of what I sent and won't decrease, although the data already appeared on oscilloscope screen. I think it is caused by Lpuart_1_Uart_Ip_DmaTxCompleteCallback(). After one major DMA loop, Lpuart_1_Uart_Ip_DmaTxCompleteCallback() will be triggered by interrupt. Is it right? With PE debugger, I can not get the breakpoint in  Lpuart_1_Uart_Ip_DmaTxCompleteCallback(). So I think there must be any errors to trigger Lpuart_1_Uart_Ip_DmaTxCompleteCallback(). could you tell me how to trigger Lpuart_1_Uart_Ip_DmaTxCompleteCallback() after UART DMA transfer completed?  Thanks   Re: S32K314 UART DMA transfer, how to call Lpuart_1_Uart_Ip_DmaTxCompleteCallback(); Hello @gufengzi, The RM driver is the Resource driver in your RTD 2.0.3 configurator. Anyway, the NVIC ISER registers are configured in Platform_Init(). Do you call the function? Thank you, BR, Daniel Re: S32K314 UART DMA transfer, how to call Lpuart_1_Uart_Ip_DmaTxCompleteCallback(); hello Daniel, I can not find DMAMUX and RM in my EB project. Sorry the whole project can not be shared. how to create a support ticket? Additionally, after I set 0xE000E100 to "1",  it works well.  I think the reason is that I did not set the corresponding NVIC_ISER correctly. Could you tell me how to set NVIC_ISER bit in EB project? Thanks Re: S32K314 UART DMA transfer, how to call Lpuart_1_Uart_Ip_DmaTxCompleteCallback(); Thank you, that looks correct. What about the DMAMUX configuration in the RM configurator, can you share it? Or can you share the whole project so that I can check it and test it on my side? If you don't want to share it here, consider creating a support ticket. Regards, Daniel Re: S32K314 UART DMA transfer, how to call Lpuart_1_Uart_Ip_DmaTxCompleteCallback(); do you think the handler is Dma0_Ch0_IRQHander? I already configured it. Re: S32K314 UART DMA transfer, how to call Lpuart_1_Uart_Ip_DmaTxCompleteCallback(); Hello @gufengzi, I don't see the handler funtions in the screenshot you posted. An example is attached to the case, it is for S32DS, but the configurator is very similar. Regards, Daniel Re: S32K314 UART DMA transfer, how to call Lpuart_1_Uart_Ip_DmaTxCompleteCallback(); I already checked DMATCD0_IRQn. Re: S32K314 UART DMA transfer, how to call Lpuart_1_Uart_Ip_DmaTxCompleteCallback(); Hello @gufengzi, Did you enable the DMA interrupts in the PLATFORM configurator? Thank you
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S32K344フラッシュメモリ消去サイクル寿命   #define FLS_MASTER_ID 0U #define FLS_BUF_SIZE 80U #define FLS_SECTOR_ADDR 0x00600000U #define FLS_SECTOR_TEST C40_CODE_ARRAY_0_BLOCK_2_S256   void FlashWrite()  { /* 必要に応じてセクターのロックを解除 */ if (STATUS_C40_IP_SECTOR_PROTECTED == C40_Ip_GetLock(FLS_SECTOR_TEST))     { C40_Ip_ClearLock(FLS_SECTOR_TEST、FLS_MASTER_ID); }   /* セクタの消去 */ C40_Ip_MainInterfaceSectorErase(FLS_SECTOR_TEST、FLS_MASTER_ID); する     { C40ステータス = C40_Ip_MainInterfaceSectorEraseStatus(); } while (STATUS_C40_IP_BUSY == C40Status); /* ジョブ結果の確認 */ Fls_ExampleAssert(STATUS_C40_IP_SUCCESS == C40Status);   /* データの書き込み */ C40_Ip_MainInterfaceWrite(FLS_SECTOR_ADDR、FLS_BUF_SIZE、TxBuffer、FLS_MASTER_ID); する     { C40ステータス = C40_Ip_MainInterfaceWriteStatus(); } while (STATUS_C40_IP_BUSY == C40Status); /* ジョブ結果の確認 */ Fls_ExampleAssert(STATUS_C40_IP_SUCCESS == C40Status);   /* メモリ内のデータを TxBuffer と比較します */ C40ステータス = C40_Ip_Compare(FLS_SECTOR_ADDR, FLS_BUF_SIZE, TxBuffer); /* ジョブ結果の確認 */ Fls_ExampleAssert(STATUS_C40_IP_SUCCESS == C40Status);      }   私はこの関数を1分ごとにFlashWrite()と呼び、MCUは24時間動作しているので、フラッシュメモリの寿命がどれくらいになるかを考慮しています。また、計算方法を教えてください。   S32K344-WBの   Re:S32K344フラッシュメモリ消去サイクル寿命 親愛なる@lukaszadrapa と@narsimh_kamath詳細な情報と計算をありがとう。これが私が探していたものです。 Re:S32K344フラッシュメモリ消去サイクル寿命 こんにちは@lukaszadrapa、ありがとう。S32K3 (V1.6.0) の最新の MBDT で FEE がサポートされていることに気づきました。 特定のユースケースが実現可能かどうかを見積もるために必要な計算について、何か洞察を共有していただけますか(S32K3のフラッシュ/エミュレートEEPROM仕様の観点から)。 たとえば、15年間、1分ごとに2KBのデータを書き込む必要がある場合、FEEを使用でき、ラウンドロビンセクタースキームを実装できると仮定すると、これをサポートできますか?
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Recommendation for a camera CPU I am currently working on a camera-related project. Could you recommend a model among NXP's CPUs that meets the following three conditions? 1. CMOS sensor interface (CSI) of rt1060 2. MIPI-CSI2 interface of i.MX 8M 3. 1G Ethernet interface Best regards, Re: Recommendation for a camera CPU you can contact local DFAE, the third party company would offer such board and SW for your reference, for SW, you can refer to this https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm/boot/dts/imx6qdl-sabresd.dtsi Re: Recommendation for a camera CPU Thank you for your help. Among the CPUs you recommended, the i.MX6Quad aligns with our concept. Is there an EVK utilizing the i.MX6Quad that includes both Parallel CSI and MIPI-CSI? Additionally, are there any EVKs that can be controlled using firmware (C/C++) rather than operating system? Re: Recommendation for a camera CPU ok, you should mean parallel camera port, you can refer to imx6q or imx8qxp i.MX Applications Processors | Multicore based on 32-bit and 64-bit Arm | NXP Semiconductors Re: Recommendation for a camera CPU We need a CMOS sensor interface (CSI) like RT1060. To connect a special camera, we need pixclk, vsync, hsync, and 16-bit data line. We also need the MIPI-CSI2 interface (like i.MX 8M) to connect a regular camera. Let me add another question. Can the CMOS sensor interface of the RT1060 be implemented in the i.MX8M series? Re: Recommendation for a camera CPU what kind of camera do you need connect? csi is controller and mipi csi is interface, current imx8mq and imx8mm use mipi csi interface and csi controller, so I don't know what kind dual camera you need connect, if you mean mipi csi, you can use imx8mp, which has dual mipi csi, but imx8mp use ISI or ISP, so pls give more detailed about your camera information Re: Recommendation for a camera CPU I'm looking for a CPU that supports the following three interfaces: CMOS sensor interface + MIPI-CSI2 interface + Gigabit Ethernet I need to integrate cameras that use the CMOS sensor interface and MIPI-CSI2 interface. (I will be using two cameras.) I plan to use Gigabit Ethernet as the external interface. Re: Recommendation for a camera CPU what is your detailed use case? and what do you need? I'm confused with your request
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相机CPU推荐 我目前正在从事一个与相机相关的项目。 NXP的CPU中,能推荐一款满足下面三个条件的型号吗? 1. rt1060的CMOS传感器接口(CSI) 2. i.MX 8M的MIPI-CSI2接口 3. 1G以太网接口 顺祝商祺! 回复:推荐一款相机CPU 你可以联系当地的 DFAE,第三方公司会提供这样的板子和 SW 供你参考,对于 SW,你可以参考这个 https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm/boot/dts/imx6qdl-sabresd.dtsi 回复:推荐一款相机CPU 感谢您的帮助。 在您推荐的CPU中,i.MX6Quad符合我们的理念。 是否有使用 i.MX6Quad 的 EVK,其中包含并行 CSI 和 MIPI-CSI? 此外,是否有可以使用固件(C/C++)而不是操作系统进行控制的 EVK? 回复:推荐一款相机CPU 好的,你应该是指并行摄像头端口,你可以参考imx6q或imx8qxp i.MX 应用处理器 | 基于 32 位和 64 位 Arm 的多核 | NXP 半导体 回复:推荐一款相机CPU 我们需要一个像 RT1060 这样的 CMOS 传感器接口 (CSI)。要连接特殊相机, 我们需要 pixclk、vsync、hsync 和 16 位数据线。 我们还需要 MIPI-CSI2 接口(如 i.MX 8M)来连接普通相机。 让我再补充一个问题。 RT1060的CMOS传感器接口可以在i.MX8M系列中实现吗? 回复:推荐一款相机CPU 您需要连接什么样的相机?csi 是控制器,mipi csi 是接口,当前 imx8mq 和 imx8mm 使用 mipi csi 接口和 csi 控制器,所以我不知道您需要连接哪种双摄像头,如果您指的是 mipi csi,您可以使用 imx8mp,它有双 mipi csi,但 imx8mp 使用 ISI 或 ISP,所以请提供有关您的摄像头信息的更多详细信息 回复:推荐一款相机CPU 我正在寻找支持以下三种接口的CPU: CMOS传感器接口+MIPI-CSI2接口+千兆以太网 我需要集成使用CMOS传感器接口和MIPI-CSI2接口的相机。(我将使用两台相机。) 我计划使用千兆以太网作为外部接口。 回复:推荐一款相机CPU 您的详细用例是什么?您需要什么?我对您的请求感到困惑
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カメラCPUの推奨事項 現在、カメラ関連のプロジェクトに取り組んでいます。 NXPのCPUの中で、以下の3つの条件を満たす機種をおすすめいただけますか? 1. rt1060のCMOSセンサーインターフェース(CSI) 2. i.MX 8MのMIPI-CSI2インターフェース 3. 1Gイーサネットインターフェース よろしくお願いいたします。 Re:カメラCPUの推奨事項 あなたは地元のDFAEに連絡することができます、サードパーティの会社はあなたの参照のためにそのようなボードとSWを提供します、SWについては、これを参照することができます https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm/boot/dts/imx6qdl-sabresd.dtsi Re:カメラCPUの推奨事項 ご協力ありがとうございます。 ご提案いただいたCPUの中で、i.MX6Quadは当社のコンセプトに合致しています。 i.MX6Quad を使用した Parallel CSI と MIPI-CSI の両方を含む EVK はありますか? また、オペレーティング システムではなくファームウェア (C/C++) を使用して制御できる EVK はありますか? Re:カメラCPUの推奨事項 わかりました、あなたはパラレルカメラポートを意味するべきです、あなたはimx6qまたはimx8qxpを参照することができます i.MX アプリケーションプロセッサ |32ビットおよび64ビットArmに基づくマルチコア|NXPセミコンダクターズ Re:カメラCPUの推奨事項 RT1060のようなCMOSセンサーインターフェース(CSI)が必要です。特殊なカメラを接続するには、 pixclk、vsync、hsync、および16ビットデータラインが必要です。 また、通常のカメラを接続するには、MIPI-CSI2インターフェース(i.MX 8Mなど)も必要です。 もう一つ質問をさせてください。 RT1060のCMOSセンサーインターフェースはi.MX8Mシリーズに実装できますか? Re:カメラCPUの推奨事項 どのようなカメラを接続する必要がありますか?CSIはコントローラーで、MIPI CSIはインターフェースで、現在のIMX8MQとIMX8mmはMIPI CSIインターフェースとCSIコントローラーを使用しているので、どのようなデュアルカメラを接続する必要があるのかわかりませんが、MIPI CSIを意味する場合は、デュアルMIPI CSIを持つimx8mpを使用できますが、imx8mpはISIまたはISPを使用しますので、plsはカメラ情報についてより詳細に説明します Re:カメラCPUの推奨事項 次の3つのインターフェイスをサポートするCPUを探しています。 CMOSセンサーインターフェース+ MIPI-CSI2インターフェース+ギガビットイーサネット CMOSセンサーインターフェースとMIPI-CSI2インターフェースを使用するカメラを統合する必要があります。(カメラは2台使用します。 外部インターフェースとしてギガビットイーサネットを使用する予定です。 Re:カメラCPUの推奨事項 詳細なユースケースを教えてください。そして、あなたは何が必要ですか?私はあなたの要求と混乱しています
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ArduinoのPortenta X8ハードウェアのサポート 私が関わっている研究プロジェクトでは、NXPのMIMX8MM6CVTKZAA SoCをベースにしたArduinoのPortenta X8モジュールを利用したカスタムハードウェアを作成することが決定しました。 https://docs.arduino.cc/hardware/portenta-x8/  プロジェクトの要件により、Arduinoのファームウェアを使用できません(使用したくもありません)。これまで、NXPのピン構成ツールを使用してmex構成ファイルの作成を開始することができましたが、ここからどのように進めるかがわからなくなります。 質問1:NXPプロセッサのJTAGを介したフラッシュオプションは何ですか?MCU-Link Debug ProbeはこのSoCで動作しますか? 質問2:これはEVK開発ボードではないため、ミニマリストのLinuxビルド(yocto)を作成するためのサポートを見つけるのに苦労しています。これにはどのようなサポートがありますか?portenta X8で実行できる新しいLinuxベースのプロジェクトを作成するにはどうすればよいですか? Re:ArduinoのPortenta X8ハードウェアのサポート MIMX8MM6CVTKZAAの内部メモリに画像をフラッシュする方法はありませんか?許してください。私はSWDでマイクロコントローラを操作することに慣れています。 Re:ArduinoのPortenta X8ハードウェアのサポート X8からX8のSTマイコンをフラッシュするための独自のソリューションを生成する必要があることは理解していますが、今はそれについて尋ねているわけではありません。私の質問は次のとおりです。 NXPは、EVKボードがなくてもこのNXPプロセッサにイメージをフラッシュできるようにするために、どのようなデバッグまたはプログラミングハードウェアを提供していますか?たとえば、NXPのMCU-LinkデバッグプローブはNXPデバイスをフラッシュするために機能しますか?
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Support for Arduino's Portenta X8 Hardware I'm involved in a research project where it was decided to create custom hardware that utilizes Arduino's Portenta X8 module, which is based on NXP's MIMX8MM6CVTKZAA SoC. https://docs.arduino.cc/hardware/portenta-x8/  Due to project requirements, I can not use Arduino's firmware (nor do I want to). So far I've been able to get a start on creating the mex configuration file using NXP's pin config tool, but this is where I start to become confused on how to proceed. Question 1: What are my flashing options via JTAG for NXP processors? Does the MCU-Link Debug Probe work with this SoC? Question 2: Since this isn't an EVK development board, I'm struggling to find support for creating a minimalist Linux build (yocto). What support is there for this? How do I create a fresh Linux based project compatible to run on the portenta X8? Re: Support for Arduino's Portenta X8 Hardware Hi, Don't worry but there is no way. i.MX processors don't have internal memories because of a normal MPU architecture, You'd have to write it to eMMC, that's why I said it. It can be easily achieved through Serial Download. Regards, Re: Support for Arduino's Portenta X8 Hardware Is there no way to flash an image to internal memory on the MIMX8MM6CVTKZAA? Please forgive me. I'm used to working with microcontrollers over SWD. Re: Support for Arduino's Portenta X8 Hardware Hi, No, that'd be a third issue, you can't flash eMMC from JTAG. You must flash the board from Serial Download which may be possible (due to the ANX7625 addition) in USB-C connector. Otherwise, you could use USB1 from J1 and implement a Serial Download solution as the EVK reference. Please see the attached picture of the reference manual against Portenta BD. Regards, Re: Support for Arduino's Portenta X8 Hardware I understand that I'm going to have to generate my own solution for flashing the X8's ST MCU from the X8, but I'm not asking about that right now. My questions are: What debug or programming hardware does NXP provide that will allow me to flash an image to this NXP processor without having an EVK board? For example, will NXP's MCU-Link debug probe work to flash the NXP device? Re: Support for Arduino's Portenta X8 Hardware Hi, Thank you for your interest in NXP Semiconductor products, I just saw that Portenta HW has an additional STM32 that requires a FW which we could not create or flash. From the other side, if STM32 FW wasn't erased nor updated, you need to port the custom hardware (different DDR, different flash, different interfaces) for BSP layer. Having a BSP layer, you could create a basic yocto image as imx-image-core provided in our yocto implementation. Regards,
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支持 Arduino 的 Portenta X8 硬件 我参与了一个研究项目,该项目决定创建利用 Arduino 的 Portenta X8 模块的定制硬件,该模块基于 NXP 的 MIMX8MM6CVTKZAA SoC。 https://docs.arduino.cc/hardware/portenta-x8/ 由于项目要求,我无法使用 Arduino 的固件(我也不想使用)。到目前为止,我已经能够开始使用 NXP 的引脚配置工具创建 mex 配置文件,但这就是我开始对如何继续感到困惑的地方。 问题 1:对于 NXP 处理器,我可以通过 JTAG 进行哪些闪存选择?MCU-Link 调试探针可以与该 SoC 配合使用吗? 问题 2:由于这不是 EVK 开发板,我很难找到创建极简 Linux 构建(yocto)的支持。对此有什么支持?如何创建一个兼容在 portenta X8 上运行的全新基于 Linux 的项目? 回复:对 Arduino 的 Portenta X8 硬件的支持 有没有办法将图像刷入 MIMX8MM6CVTKZAA 上的内部存储器?请原谅我。我习惯于通过 SWD 使用微控制器。 回复:对 Arduino 的 Portenta X8 硬件的支持 我知道我必须生成自己的解决方案来从 X8 刷新 X8 的 ST MCU,但我现在不想问这个问题。我的问题是: NXP 提供什么调试或编程硬件,使我能够在没有 EVK 板的情况下将图像闪存到此 NXP 处理器?例如,NXP 的 MCU-Link 调试探针是否可以用于刷新 NXP 设备?
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i.mx93 jtag disable Hello, I'm starting evaluating i.mx93 board. I'd like to run WIN 10 IoT OS. I'm wondering what is the best way to disable JTAG in production. The result to achieve is that no one can estabilish a jtag connection and read memory. Is there a way to do so? Thanks. Evaluation Board Re: i.mx93 jtag disable Hi @marco95! No, all made for Windows 10 are something confidential due to the licenses that Windows has. If you need support to customize Windows 10 for your product should be under pro support. Sorry for the mistake! Best Regards! Chavira Re: i.mx93 jtag disable Hello, is there a guide explaining how to set-up the "password based autenthication" for JTAGC? Re: i.mx93 jtag disable Hi @marco95! We have the next user guide for iMX Windows 10: https://www.nxp.com/docs/en/user-guide/IMXWGU.pdf Best Regards! Chavira Re: i.mx93 jtag disable Hello, you mean "i.MX 93 Applications Processir Security Reference Manual"? I attached an image of the description found. How can I get more about the description? Are there any resource example to get started? Thanks Re: i.mx93 jtag disable Hi @marco95! Thank you for contacting NXP Support! You can consult the iMX93 Secure Reference Manual in the chapter "Secure Debug" to consult the best way to protect the SOC. Best Regards! Chavira
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HSE S32K312 SHE based secure boot Hi, I am trying to achieve SHE based secure boot using S32K312 microcontroller. My aim is to load the keys to secure NVM of HSE. For loading the keys, I am generating M1, M2 and M3 messages using Miyaguchi-Preneel Compression protocol and AES encryption. I am getting HSE_SRV_RSP_INVALID_PARAM as a response from HSE.  Please check below details. 1) Microcontroller : S32K312_100MQFP 2) IDE: S32DS 3.5  3) SDK Version: PlatformSDK_S32K3_2022_03 Steps I am following : 1) Key Catalogue Formatting -> Getting  HSE_SRV_RSP_OK  2) Load She keys to Secure NVM             2.1. Loading ECU_MASTER_KEY                    2.1.1 Miyaguchi-Preneel Compression                    API : Crypto_Exts_MPCompression(constArr, (uint32)(AES_BLOCK_SIZE * 2), K1, ConstOutLen)                    Parameters: constArr -> const uint8_t *constArr This is input data                                         (uint32)(AES_BLOCK_SIZE * 2) -> Size of input data which is 32 bytes.                                         K1 ->  const uint8_t K1[AES_BLOCK_SIZE * 2]; -> output                                        ConstOutLen -> const uint32_t *ConstOutLen -> length of the output Any help on this topic is highly recommended. Thanks in advance.        Re: HSE S32K312 SHE based secure boot @lukaszadrapa  I am able to load keys to secure NVM by adding key data in non-cacheable memory. Re: HSE S32K312 SHE based secure boot Hi @lukaszadrapa, Can you share configuration file (.mex) for the SHE memory update protocol? So that I could check what I am doing wrong? Re: HSE S32K312 SHE based secure boot Some update: provided code was intended mainly for S32K1 and its CSEc. So, make sure that "CSEC" is not defined because EmptyKey needs to be all '0' for HSE: #ifdef CSEC static uint8 au8EmptyKey[SHE_KEY_SIZE] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; #else /* Array to be passed to Crypto driver during various operations as output buffer */ static uint8 au8EmptyKey[SHE_KEY_SIZE] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; #endif And next thing - CSEc on S32K1 has either 5 or 6 attribute key flags. SHE define 5 flags and there could be one more flag enabled (VERIFY_ONLY). HSE always expects 6 flags. But I can see that the code expects 5 flags only: aM2Plain[3] |= (flags & 0x1e) >> 1U; aM2Plain[4] |= (flags & 0x01) << 7U; You can update it to this: aM2Plain[3] |= (flags & 0x3c) >> 2U; aM2Plain[4] |= (flags & 0x03) << 6U; To understand where it goes - there's 28bit counter in M2 value and then the flags... But if you used flags=0, I don't think this will make a difference. Re: HSE S32K312 SHE based secure boot Still waiting... I'm also checking if there's an option to provide direct support from local FAE team. Re: HSE S32K312 SHE based secure boot Hi @lukaszadrapa  Have you got any update? Re: HSE S32K312 SHE based secure boot Hi @lukaszadrapa, Thank you for the clarification. I am getting HSE_SRV_RSP_KEY_INVALID while caling RetVal = Crypto_KeyElementSet(ECU_MASTER_KEY_ID, SHE_KEY_MATERIAL_ELEMENT_ID, KeyPram, 64) for this error it says in SHE, the key ID provided is either invalid or non-usable due to some flag restrictions. */ I am following example which you shared Crypto_CalculatedM1M2M3 and giving the flag value as 0 and configured the value as VERIFY ONLY from the configurator for the key. I tried by changing these 0 values to 1 for but still error is same. P.S. I am able to load the key in plain format. But when encryption is applied, error is coming. Re: HSE S32K312 SHE based secure boot You can set required flags when calculating M1-M3 values. The function is: void Crypto_CalculatedM1M2M3(CONST(uint8, AUTOMATIC) authKey[16], uint8 authKeyId, uint8 keyId, CONST(uint8, AUTOMATIC) key[16], uint32 counter, CONST(uint8, AUTOMATIC) uid[15], uint8 flags, VAR(uint8, AUTOMATIC) KeyPram[64]) Parameter 'uint8 flags' should be used. The order of bits is: For example, if you want to set VERIFY_ONLY, the 'flags' should be 0x01. There are no general rules which flags should be set, it depends on your requirements and on your application. Regards, Lukas PS. Still waiting for response from SW team... Re: HSE S32K312 SHE based secure boot Hi @lukaszadrapa , What attributes should we set while loading SHE key to secure NVM. In the RM758221-HSE-B Firmware Reference Manual - V2.1(2.1).pdf it is mentioned as below.   However, In the configurator I cannot see the WILDCARD and KEY_USAGE flag. Can you please guide me on this? Re: HSE S32K312 SHE based secure boot @lukaszadrapa Okay. Please let me know if you got anything on this topic. It's a bit urgent. Re: HSE S32K312 SHE based secure boot I'm not sure about this, I'm checking with SW team. It may take some time. Re: HSE S32K312 SHE based secure boot @lukaszadrapa , I tried with 1 as well but no change in results. Please check below configuration. Re: HSE S32K312 SHE based secure boot ECU_MASTER_KEY_ID is defined as 1 in the SHE spec. Isn't this the problem? Re: HSE S32K312 SHE based secure boot Hi @lukaszadrapa, I got HSE_SRV_RSP_OK for Crypto_CalculatedM1M2M3(). but while calling Crypto_KeyElementSet(ECU_MASTER_KEY_ID, SHE_KEY_MATERIAL_ELEMENT_ID, KeyPram, SHE_M1M2M3_SIZE) I am getting HSE_SRV_RSP_KEY_INVALID. ECU_MASTER_KEY_ID = 0 SHE_KEY_MATERIAL_ELEMENT_ID = 1 I have set HSE flag as VERIFY. What could be the reason? Can you please guide me? Re: HSE S32K312 SHE based secure boot Hi @lukaszadrapa  Thank you so much for providing me with test code. I will try this. Regards Shravani Re: HSE S32K312 SHE based secure boot Hi @shravani  I got attached test code which shows how to generate M1-M3 values using Crypto layer. There's a function Crypto_CalculatedM1M2M3(). Regards, Lukas
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S32DS3.5 在ubuntu 中SDK识别不到 我在Ubuntu 22.04中安装的S32DS 3.5 IDE ,但在使用RTD时出现了如下的问题 PIT 组建可以添加进工程。但是会提示找不到对应的js,也不会生成代码。 RTD 的安装如下,之使用S32K3系列的组建(使用mcu为S32K312) 这个需要怎么处理呢?
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i.MX8qxp can't config ADC_IN as GPIO output Hi, My question is, when I try to config ADC_IN1 as GPIO1_IO09, I cannot control it. This is my dts file. or When I set HIGH or LOW with GPIO1_IO09, it doesn't change. Below is what I tried to do. Even I read below article already, however it isn't help me. Solved: i.MX8 ADC_IN0 pin can't set as GPIO function - NXP Community Re: i.MX8qxp can't config ADC_IN as GPIO output I solved this. Due to incorrect pinctrl group, I couldn't. I referred below. Re: i.MX8qxp can't config ADC_IN as GPIO output Hello Alejandro, Thanks for your reply. I am using custom BSP using IMX8QXP. And I send to you device tree file attached. Please check "pinctrl_mipi_dsi_rst" part. Re: i.MX8qxp can't config ADC_IN as GPIO output Hello @hansung_jung  Could you please share what BSP are you using? Also, if possible, send the device tree file. Best regards. Salas.
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USBPHY and USBHS in demo for USB audio device I noticed that the usb_device_audio_generator demo is not actually configuring the USBPHY and USBHS clocks (at least looking at the clock configuration tool). Is this expected? I'm using this demo as starting point for a project (USB audio device / UAC2) and I'm trying to understand whether I have to do that or that is not necessary. Thanks. i.MXRT 600 Re: USBPHY and USBHS in demo for USB audio device Hi @carlocaione, You are correct, the required USB clocks are not enabled using ConfigTools. If they were, their respective code would be present on the BOARD_InitBootClocks() routine on the very top of the main function. However, the clocks for our USB example codes are initialized later on the execution. In this case, they get initialized during the APPInit() routine, using a function called USB_DeviceClockInit(). Please look into this function and let me know if you have further inquiries about this topic. BR, Edwin.
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XRDC in s32k344 running in lockstep mode HI There in XRDC module in a s32k344 running in lockstep , I read in manual that  master core could be CM7 or AHBP or AXI. So i am convinced that a s32k344 in lockstep mode is to referring to a AHBP core master access, is it true? in RTD4.0.0 in   Rm RTD module ,the  core types are the following: typedef enum { XRDC_CORE_M7_0 = 0x00U, XRDC_CORE_HSE = 0x03U, XRDC_CORE_M7_1 = 0x04U } Xrdc_Ip_MasterCoreType; It seams that lockstep configuration is not suited for these RTD ...? What is the situation about XRDC in lockstep mode for s32k344 ? best regards, Fabio Re: XRDC in s32k344 running in lockstep mode Hi There, Referring Figure8 Block Diagram page 24 Reference manual: It seems that CM7_1 accesses to bus via MDAC4, when XRDC is enabled. So in Lockstep mode i have to manage only MDAC0 (CM7_0)? Regards Fabio Re: XRDC in s32k344 running in lockstep mode Hi @FabioG  A small explanation of how Lockstep Core works is that two identical processors are initialized to the same state, and they receive the same inputs (code, bus operations, and asynchronous events), so during normal operation, the two processors operate in parallel, executing the same set of instructions simultaneously. The key feature of lockstep is that both cores execute the same instructions and compare their results at every step to ensure they match. If a discrepancy is detected, it indicates a potential error or fault in one of the cores, triggering a fault-handling mechanism. Because of this behavior, in lockstep, there is only a reference to M7_0 and M7_1 would be N/A.  B.R. VaneB
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Uart Module of S32G274 Chip Callback Event: LINFLEXD_UART_IP_EVENT_IDLE_STATE mechanism Problem   As shown in the figure above, we see the Uart module timeout related functionality in the Uart module UM. So we Enable the function of "Uart Timeout Enable", generate the configuration file, compile and run in the project.   Within the project, we enable the "Uart Callback Capability" option, using a custom Callback function, where the Callback parameter Event is the enumerated type defined by the Uart module: 、   At the same time, the data on the Uart channel is sent at a frequency of 1Hz. Through Lauderbach debugging, we find that after the program starts running, the program triggers an interrupt of the event LINFLEXD_UART_IP_EVENT_IDLE_STATE and enters the Callback function. Uart then stops updating the data and looks at the register as follows:   Then, we do the corresponding processing under the event, found that when the event is triggered, re-call "Uart_AsyncReceive" function, so that the Timeout event is rolling triggered;   Can we understand the timeout mechanism of uart as follows:   When the Uart channel receives a frame of data, if the Uart is idle, the register UARTCTO will increase one by one. When the UARTCTO is equal to the preset register UARTPTO, the timeout event will be interrupted and RxEn register will be disabled, and the Uart will not actively resume the receiving state. If the Uart_AsyncReceive function is called again after the received data is processed, and the Uart is still idle, it will enter the timeout interrupt again.   We don't know if the chip's Uart mechanism is as we guessed. If not, please correct, so that we can better achieve business function.   We hope that the timeout mechanism of the Uart is as follows: The timeout interrupt only notifies the Uart when it changes from busy to idle. And you don't need to call the Uart_AsyncReceive  function again. In this case, the relevant interrupt is triggered. In this way, we can process the current frame data received when the interrupt is triggered, providing real-time data transmission. Hope NXP can have an expert answer, thank you!   如上图所示,我们在Uart模块的UM中查看到了关于Uart模块的超时的相关功能。于是我们将“Uart Timeout Enable”的功能使能,生成配置文件后,在项目中进行编译运行。   在项目内,我们使能了“Uart Callback Capability”选项,使用自定义的Callback函数,其中Callback的形参Event为Uart模块定义的枚举类型: 、   同时,在该Uart频道上的数据为1Hz的发送频率,通过劳德巴赫调试,我们发现,在程序开始运行之后,程序触发事件为LINFLEXD_UART_IP_EVENT_IDLE_STATE的中断,并进入了Callback函数内。然后Uart就不再更新数据了,查看了寄存器如下:   然后,我们又在该事件下做了相应的处理,发现当触发事件后,重新调用“Uart_AsyncReceive”函数,这样Timeout事件就是滚动触发;   是否可以这样理解uart的超时机制:   当Uart频道接收完一帧数据之后,如果Uart处于空闲状态,寄存器UARTCTO会逐一增加,当UARTCTO等于预设寄存器UARTPTO时,触发超时事件中断,关闭RxEn使能,Uart不会主动恢复接收状态。如果将接收后的数据处理完后,再次调用Uart_AsyncReceive函数,若Uart还是处于空闲时候,又会再次进入超时中断。   我们期望需求:   不知道该芯片的Uart机制是否如上我们猜测这样。如果不是请指正,便于我们更好的实现业务。我们希望的Uart的超时机制为:超时中断只做通知操作,且只在当Uart由繁忙转为空闲的时候,该种情况下会触发相关中断,不需要重复调用 Uart_AsyncReceive 函数。这样我们就能够在中断触发时候对收到的当前帧数据做处理,提供数据传递的实时性。     希望NXP能有专家解答,谢谢! S32G2  GoldVIP Re: Uart Module of S32G274 Chip Callback Event: LINFLEXD_UART_IP_EVENT_IDLE_STATE mechanism Problem Thank you for your answer. That should answer some of our questions. The baud rate we use is the same, but the output data of the GNSS module is updated once per second, which can be understood in this way. Re: Uart Module of S32G274 Chip Callback Event: LINFLEXD_UART_IP_EVENT_IDLE_STATE mechanism Problem Hi, Thanks for your feedback. We still have some doubts on regards of the application, since UART can only be synchronized if both interfaces are set at the same baudrate, and at this moment we understand that they are not. Again, this seems to be a misunderstanding from our side, we do apologize. As for the overall situation, what you are mentioning under point 5 seems to be correct. If you are expecting to receive information, but you cannot wait for it, AsyncReceive is a non-blocking function which should trigger an interrupt once information is available under the respective buffers. Also, the following recommendations are shown under the S32G2 RM: For which, if the number of bytes to be received are not always the same, the recommendation is to receive byte per byte, to trigger the respective interrupt as expected. Please, let us know. Re: Uart Module of S32G274 Chip Callback Event: LINFLEXD_UART_IP_EVENT_IDLE_STATE mechanism Problem Thank you for your attention, the following questions to clarify and confirm: 1. The version of the RTD is S32_RTD_4.4_4.0.1_D2302, and the version of the Uart module is V4.0.1, AS4.4.0. 2. The development board we use is S32G-VNP-RDB2, namely GoldVIP. Our self-developed T-Box design and development based on reference 3. The example we use is the Autosar version provided by EB, AutoCore_OS, which is modified based on this project 4. The baud rate of the UART channel is set to 460800 BPS, but the GNSS module connected to the channel sends 1bps of data. In addition, the timeout module that we enable is under the LINFlexD module, and the UART mode (UARTCR[UART] = 1) is selected. 5. “The timeout feature will trigger an interrupt, and you are looking for receiving frames in the timeout interrupt?” Basically yes, it is also based on GNSS data frames of indefinite length. We hope to receive an interrupt at the end of receiving, and then the channel will continue to receive. The interrupt can only give a Notification, just like the notification in ADC module. Of course, recently we looked at the relevant manual introduction, it seems that the use of Uart at this stage is the need to constantly call Uart_AsyncReceive related functions to enable the receive register to open the channel, so that the data is constantly rolling reception.   Thanks! Looking forward to your reply Re: Uart Module of S32G274 Chip Callback Event: LINFLEXD_UART_IP_EVENT_IDLE_STATE mechanism Problem Hi, Can you let us know which RTD version are you using? Also, is this a custom board or an NXP reference board? Are you using any NXP examples as a base? As for the overall behavior, we might not understand it correctly. We understand the following: Speed of UART is 1 bps. You enabled the timeout feature under the LINFlexD module. Is this correct? As for the following comment: "We hope that the timeout mechanism of the Uart is as follows: The timeout interrupt only notifies the Uart when it changes from busy to idle. And you don't need to call the Uart_AsyncReceive  function again. In this case, the relevant interrupt is triggered. In this way, we can process the current frame data received when the interrupt is triggered, providing real-time data transmission." We don't understand the reason for the timeout callback. The timeout feature will trigger an interrupt, and you are looking for receiving frames in the timeout interrupt? Help us elaborate more on the application you are looking for, for us to better understand the implementation you require.  We do apologize. Please, let us know.
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NX5P3090 FAULT 引脚电压(Vin=0V) 你好。我正在使用 NX5P3090 USB 电源开关,并希望将漏极开路 FAULT 输出拉至 1.8V 电源,即使开关没有输入(Vin=0V)也可以存在。当 Vin=0V 时,FAULT 引脚上存在 1.8V(通过 47kohm 上拉电阻)是否会导致开关出现任何不良行为?我看到这个引脚有 6V 的绝对限制,但我不清楚这是否适用于 Vin=0V 的情况。谢谢。-杰森 回复:NX5P3090 FAULT 引脚电压(Vin=0V) 好的,谢谢。——杰森
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