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Is IMX95 { 15 x 15 } supported LPDDR4/4X 16 GB RAM Hi NXP Team,  I want some general Information about the IMX95{ 15 x 15 } "MIMX9556CVTXN" will support 16 GB of RAM { LPDDR4/4X } "MT53E4G32D8GS-046 WT:C ?" I could not able to find the reference of the schematic to connect the 16 GB RAM to IMX 95 { 15x 15}  ,  I only found the schematic of  imx95 { 19 x 19 } with the 16 GB RAM {LPDDR5}.  can you please help me out with connection of 16GB RAM{ LPDDR4/4x } with imx95{ 15 x 15 } if Supported. and What about the BSP file? , is DTS file present for the 16 GB of ram or need to generated manually.  Yocto Project Re: Is IMX95 { 15 x 15 } supported LPDDR4/4X 16 GB RAM Hi @Asadeds, Thank you for contacting NXP Support. According to our Memory Compatibility Guide, the memory part number MT53E4G32D8GS-046 is fully compatible with the i.MX95 and has been thoroughly validated and tested on this platform. Therefore, this device can be used with the i.MX95 following the recommended configuration and design guidelines. Best regards, Alejandro Garcia Re: Is IMX95 { 15 x 15 } supported LPDDR4/4X 16 GB RAM Hi @Asadeds, The MT53E4G32D8GS is a supported memory device and has been validated internally with the i.MX95. However, this device uses a special byte mode configuration, which requires additional support in both the configuration tools and software stack. At the moment, although internal support is available, the current public release of Config Tools does not yet include the required options to configure this specific memory device. Support for this memory is planned for a future tool release. Best Regards, Chavira Re: Is IMX95 { 15 x 15 } supported LPDDR4/4X 16 GB RAM Hi @Chavira  Thanks for the quick Reply,  As I see the Application " Config tool for imx  26.06" when I try to configure the DDR , then there is Only supportable LPDDR4/4x upto 8GB, while i select the LPDDR5 for any packages it Support upto 16GB. As i attached  the screenshot for reference , If i m missing something please let me know. can you please help me Out this , and as well as , i want to use LPDDR4/4x for my project the part number is this one "MT53E4G32D8GS-046 WT:C" Re: Is IMX95 { 15 x 15 } supported LPDDR4/4X 16 GB RAM Hi @Chavira , Thank you for your quick reply. I am still confused, so I'd like to simplify the question. For now, let's ignore the specific RAM vendor and part number. Could you please confirm whether the Config Tools support 16GB LPDDR4/LPDDR4X memory for the i.MX95, for either the 15×15 or 19×19 package? If the answer is no, then how are we expected to obtain support for 16GB? You mentioned that internal support is available, so I would appreciate it if you could explain the process for accessing that support. We are currently finalizing our PCB design, and our project is on hold solely because of the RAM selection. This is the only remaining item preventing us from moving forward, so we need a clear answer as soon as possible. I would appreciate your prompt clarification. Thank you. Re: Is IMX95 { 15 x 15 } supported LPDDR4/4X 16 GB RAM Hi @Asadeds, After discussing this with the internal team, I would like to provide the following update. NXP typically releases a new version of Config Tools once per quarter, so the next expected release is version 26.09. Although the i.MX95 itself supports this 16 GB memory device, the current public version of the DDR configuration tool does not yet support configuring this specific memory. The good news is that support already exists in an internal version of the tool, but it has not yet been incorporated into the public release. I am not certain whether it will be possible to provide access to the internal tool. However, I recommend opening a support case through our website using your company email address. This will allow the appropriate teams to review your request and determine whether any additional assistance or early support options are available. We apologize for the inconvenience and appreciate your patience while this support is integrated into a future public release. Best regards, Chavira
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Architectural Overview for the Dual-Motor EV Control System 1 Introduction After introducing the Dual-Motor EV Traction platform and the Software & Hardware environment behind it, this article moves one step closer to the running application. It looks inside the Motor Control System and explains how the Simulink model is structured to control two PMSM motors using the NXP S32K396 MCU as the target hardware. The goal is to provide a clear architectural view of the application before diving into simulation, validation, or deployment details. We will follow the main signal paths, from vehicle-level CAN commands and inverter feedback to FOC execution, PWM generation, ADC measurement, and communication back to the vehicle network. The focus remains intentionally architectural. Instead of covering controller tuning, peripheral configuration, or low-level implementation, this article highlights the building blocks that make the dual-motor application understandable as a complete embedded control system. This article is organized around five architectural views: the application overview, the system interfaces, the CAN communication path, the Simulink model structure, and the peripheral-to-data-flow mapping. Together, these views explain how the dual-motor application receives commands, measures feedback, executes control, drives the inverters, and reports diagnostic information back to the vehicle network.   2 Table of Contents • Introduction • Application Overview • System Inputs and Outputs • Vehicle-Level Communication • Simulink Application Architecture • Peripheral Mapping • Data Flow • Conclusion • References   3 Application Overview The Motor Control System is implemented on the NXP S32K396 microcontroller and runs as a single-core embedded application. The ECU controls two PMSMs, each connected to its own three-phase inverter stage. From a control perspective, the application contains two Field-Oriented Control implementations. Each FOC instance is responsible for one motor and executes independently, based on its own sensing path, control states, and output generation. Both control loops are scheduled from independent interrupt sources and are triggered every 100 microseconds. This execution period supports the fast current-control layer required by traction inverter applications, while the single-core implementation requires both motor-control paths to complete within the available timing budget.   Figure 3-1. Overall Simulink Application At vehicle level, the Motor Control System behaves as a actuating end node. It receives enable and speed commands from the Central Node over CAN and sends back monitoring and diagnostic information at a slower periodic rate. The Motor Control System exchanges CAN data with the vehicle network through the South Zone Controller. 3.1. Control Strategy At the heart of the application is the Field-Oriented Control algorithm, which provides the control structure required to drive each PMSM efficiently and independently. In this architecture, FOC transforms the three-phase motor behavior into a control problem handled in a rotating reference frame, where torque-producing and flux-producing current components are regulated separately. The control strategy is built around speed control. The requested speed comes from the vehicle-level command interface, while the estimated rotor speed is provided by the sensorless observer. The speed controller compares these values and generates the current reference needed to reach the commanded operating point. For each motor, the FOC structure combines an outer speed loop with inner current-control loops. The current PI controllers regulate the direct-axis and quadrature-axis currents in the rotating reference frame, allowing the application to control the electrical behavior of the motor in a deterministic and decoupled way. Sensorless operation is achieved using an Extended EMF Observer. This observer estimates the rotor position and speed from the measured electrical quantities, removing the need for a physical position sensor in the control loop. The estimated position is then used by the Park and inverse Park transformations that connect the stationary and rotating reference frames. The feedback path is based on phase-current reconstruction using the dual-shunt measurement method. The reconstructed phase currents are processed through the Clarke and Park transformations, while the DC bus voltage feedback is used to keep the control and modulation stages aware of the available inverter supply. The two FOC implementations follow the same control structure, but each one operates on its own motor-specific inputs, states, and outputs. This separation allows Motor 1 and Motor 2 to be controlled independently, even though both algorithms execute on the same S32K396 device. Because the control loops are executed every 100 microseconds, the FOC layer must remain compact and deterministic. The model architecture therefore separates the fast control path from slower communication and monitoring tasks, ensuring that current regulation and PWM update remain the highest-priority activities in the application.   Figure 3-2. Sensorless Field-Oriented Control diagram 4 System Inputs and Outputs The application interface can be viewed through two categories of signals. The first category contains vehicle-level commands exchanged over CAN. These signals define how the traction application is started, stopped, and commanded from the rest of the vehicle. The second category contains real-time electrical feedback and actuation signals exchanged with the inverter hardware.   Figure 4-1. Split the Simulink model to Inputs, Outputs and Application layers 4.1. Inputs The main vehicle-level inputs are received from the Central Node over CAN through the South Zone Controller. The command message contains the CCS_EnableMotors signal, used to engage or disengage the motors, and the CCS_SetSpeed signal, used to provide the desired speed reference for the control application.   Figure 4-2. CAN Message Unpack block for receiving the command signals   These CAN inputs are not part of the fast current-control loop, but they directly influence its behavior. Once decoded, the enable command defines whether the control logic is allowed to drive the inverters, while the speed reference becomes the target followed by the outer speed controller. The hardware feedback inputs are acquired from the inverter stages through ADC measurements. For each motor, two phase currents are measured using the dual-shunt method, while the third phase current is reconstructed in software using Kirchhoff’s Current Law. The DC bus voltage is measured for each inverter so the control, modulation, and monitoring logic remain aware of the available supply voltage.   Figure 4-3. Gathering analog quantities via ADC Block   4.2. Outputs The primary real-time outputs are the PWM commands used to actuate the inverter phases for both motors. The FOC algorithm computes the voltage commands required by each PMSM, and these commands are translated into duty cycles for the three-phase inverter. Because each inverter leg requires a high-side and a low-side control signal, the application ultimately drives six PWM signals per motor. These signals are generated from the MCU timing path and routed to the gate-driver stage that controls the external power switches.   Figure 4-4. PWM Actuation Subsystem   In addition to the PWM outputs, the application sends CAN data to the South Zone Controller every 0.1 seconds. These messages are intended for diagnostics, monitoring, and vehicle-level observability. The transmitted CAN data includes the estimated speed of each motor, the fault status reported by each control channel, the measured DC bus voltage for each inverter, the current operating state of each motor-control instance and many more. The following table highlights the output data sent over CAN bus:   Name Description Unit MC_BusVoltageM1 DC Bus Voltage measured by inverter for Motor 1 V MC_BusVoltageM2 DC Bus Voltage measured by inverter for Motor 2 V MC_FaultStatusM1 Fault status reported by Motor 1 true/false MC_FaultStatusM2 Fault status reported by Motor 2 true/false MC_PhACurrentM1 Phase A current – Motor 1 A MC_PhACurrentM2 Phase A current – Motor 2 A MC_PhBCurrentM1 Phase B current – Motor 1 A MC_PhBCurrentM2 Phase B current – Motor 2 A MC_PhCCurrentM1 Phase C current – Motor 1 A MC_PhCCurrentM2 Phase C current – Motor 2 A MC_SpeedEstM1 Motor 1 estimated speed rpm MC_SpeedEstM2 Motor 2 estimated speed rpm MC_SpeedRefM1 Motor 1 desired speed rpm MC_SpeedRefM2 Motor 2 desired speed rpm MCS_StateM1 Motor 1 state. It can be Stand By, Running, Fault - MCS_StateM2 Motor 2 state. It can be Stand By, Running, Fault - MCS_PhAVoltageM1 Phase A Voltage – Motor 1 V MCS_PhAVoltageM2 Phase A Voltage – Motor 2 V MCS_PhBVoltageM1 Phase B Voltage – Motor 1 V MCS_PhBVoltageM2 Phase B Voltage – Motor 2 V MCS_PhCVoltageM1 Phase C Voltage – Motor 1 V MCS_PhCVoltageM2 Phase C Voltage – Motor 2 V   Figure 3-5. Example for CAN Pack Message 5 Vehicle-Level Communication The Motor Control System is part of a distributed EV control architecture. It does not operate as an isolated controller. Instead, it receives high-level commands from the vehicle network and reports measured and estimated values back to the rest of the system. The communication path is organized around the CAN interface between the Central Node, the South Zone Controller, and the Motor Control System Node. Commands such as motor enable and desired speed are received through this path, while feedback messages such as estimated speed, DC bus voltage, phase-current information, and fault status are sent back through the same zonal communication route. CAN receive handling is interrupt-driven. When a command frame is received, the application decodes the enable and speed request signals and updates the internal command variables used by the Simulink control model. This keeps the command interface responsive without placing CAN processing inside the 100 microsecond FOC interrupt.   Figure 4-1. CAN Receive Interrupt block   CAN transmit handling is periodic. A PIT interrupt schedules outgoing monitoring messages every 0.1 seconds. This separates network reporting from the real-time control path and ensures that diagnostics transmission does not disturb the deterministic execution of the motor-control interrupts.   Figure 4-2. Periodic Interrupt for transmitting CAN messages   The CAN database defines the mapping between application variables and network messages. For example, the enable and speed command are grouped in dedicated message, while fault information, estimated speed, DC bus voltage, and phase-current feedback are exposed through dedicated monitoring messages. More information about the CAN database created for organizing the CAN messages and signals will be presented in a dedicated article. 6 Simulink Application Architecture The Simulink model is organized around a dual-control structure. Each motor channel contains the algorithmic blocks required to transform measured currents, estimate rotor position and speed, regulate the control loops, and generate voltage commands for PWM modulation. Although both channels implement the same FOC strategy, they are treated as separate execution paths. This separation makes it easier to scale from a single-motor setup to a dual-motor configuration and to validate each channel independently before running both motors together. 6.1. Real-Time Control Layer The real-time control layer is executed inside the BCTU-triggered interrupt flow. The BCTU is synchronized with the PWM timing generated by eMIOS, so the ADC conversions are requested at the correct moment within the switching period. Once the required current measurements are available, the interrupt allows the control algorithm to run using a coherent feedback set.   Figure 5-1. FOC Implementation   Inside this layer, the application reconstructs the three-phase current set, executes the Clarke and Park transformations, estimates rotor position and speed through the Extended EMF Observer, runs the speed and current PI controllers, and generates the voltage commands required by the modulation stage. The voltage commands are then translated into PWM duty cycles. eMIOS provides the base PWM generation, while the LCU forms the complementary high-side and low-side signals needed by the inverter legs. LCU also adds the necessary dead-time in complementary PWM signals to avoid the DC source damage. TRGMUX routes the required trigger signals between these peripherals, maintaining alignment between actuation and measurement.   Figure 5-2. Fast Loop Subsystem   The same execution concept is applied to the second motor channel. The two FOC instances run on the same S32K396 core, so the application depends on the MCU processing capability and on a carefully scheduled interrupt structure to complete both control paths within the available timing budget. 6.2. Communication and Monitoring Layer The communication and monitoring layer connects the fast control application with the vehicle network. It receives the enable and speed commands from CAN, prepares diagnostic information, and schedules outgoing status messages. This layer runs at a lower rate than the FOC loops. It is intended for command exchange, observability, and integration with the Central Node through the South Zone Controller. 6.3. Hardware Abstraction and Peripheral Layer The hardware abstraction and peripheral layer connects the generated Simulink application to the physical resources of the S32K396 MCU. Its purpose is to keep the control algorithm separated from the low-level hardware access, while still allowing the model to read measurements, update PWM outputs, handle interrupts, and exchange data over communication interfaces. In practice, this layer contains the target-specific blocks used for ADC acquisition, PWM generation, and CAN communication. These blocks provide the interface between the algorithmic part of the model and the peripherals configured on the MCU. This layer also makes the model easier to understand and maintain. The FOC subsystems can remain focused on control behavior, while the peripheral layer handles how signals enter and leave the MCU. As a result, the same architectural structure can be reused when moving between simulation, generated code, and target execution. The NXP Model-Based Design Toolbox provides the Simulink blocks that expose these S32K396 peripherals at model level. This allows engineers to configure and connect hardware-facing functions directly in Simulink, while the generated embedded code uses the corresponding target drivers and configuration. 7 Peripheral Mapping The peripheral mapping is centered on the synchronization between measurement, control execution, actuation, gate-driver communication, and vehicle-level CAN communication. Each peripheral has a specific role in this chain, and together they allow the generated Simulink application to interact deterministically with the inverter hardware. SAR-ADC is used to measure the analog quantities required by the control algorithm. These measurements include the phase-current feedback acquired from the inverter stages and the DC bus voltage used by the modulation and monitoring logic. BCTU (Body Cross Triggering Unit) performs the triggering of the ADC conversions. Instead of sampling the analog signals at an arbitrary moment, BCTU waits for the synchronization event coming from the PWM timing path and then starts the SARADC conversions at the correct point in the switching period. eMIOS (Enhanced Multiple Input Output System) generates the three phase PWM signals for each motor channel. These PWM signals represent the base timing generated from the duty cycles computed by the FOC algorithm. LCU (Logic Control Unit) takes the three PWM signals generated by eMIOS and creates the six PWM outputs required by the inverter. For each motor phase, it generates the complementary high-side and low-side control signals with dead-time insertion used to drive the corresponding inverter leg. TRGMUX provides the internal routing between peripherals. It connects the three PWM outputs from eMIOS to the LCU inputs and also routes the synchronization signal between eMIOS and BCTU. This routing keeps the actuation path and the measurement path aligned. LPSPI is used as the communication layer between the S32K396 controller and the MC33937 gate driver. Through this interface, the application can configure and exchange diagnostic information with the gate-driver device, complementing the direct PWM actuation path. FlexCAN provides the CAN communication controller used by the Motor Control System. It enables reception of command messages from the South Zone Controller and transmission of monitoring and diagnostic data back to the vehicle network. In this mapping, the fast motor-control path is formed by eMIOS, TRGMUX, BCTU, SARADC, and LCU, while LPSPI supports gate-driver interaction and FlexCAN supports vehicle-level communication. This separation helps keep the time-critical control loop independent from slower configuration, diagnostics, and network tasks.   Figure 6-1. Peripherals Mapping Overview   PIT (Periodic Interrupt Timer) peripheral is used for slower periodic activity, such as CAN diagnostics transmission every 0.1 seconds. CAN receive interrupts are used for incoming command messages from the South Zone Controller. 8 Data Flow The data flow starts at the vehicle network and at the analog feedback interface. CAN provides the high-level operating commands, while the inverter sensing path provides the real-time electrical feedback required by the FOC loops. When a CAN command is received, the enable and speed references are decoded and stored as application-level command variables. These signals are then consumed by the motor-control logic during the next control execution. In parallel, synchronized ADC conversions provide the latest phase-current and DC bus voltage values. The control algorithm reconstructs the motor currents, estimates rotor position and speed, transforms the feedback into the rotating reference frame, and computes the required voltage commands. The voltage commands are converted into PWM duty cycles and applied to the inverter actuation path. The resulting gate-drive signals control the external power stage, which drives the PMSM phases. At a slower rate, selected internal variables are packed into CAN monitoring frames. These values allow the South Zone Controller and Central Node to observe the Motor Control System state without interfering with the fast control-loop execution. 9 Conclusion This article described the architectural overview of the Dual-Motor EV Control System application. It presented the main Simulink model structure, the system inputs and outputs, the vehicle-level CAN communication path, the peripheral mapping, and the data flow between command reception, sensing, control, actuation, and monitoring. The architecture is built around two independent FOC control paths running on the S32K396 in a single-core configuration. Each motor channel receives synchronized analog feedback, executes its control algorithm every 100 microseconds, and generates the PWM outputs required by its inverter stage. By combining Model-Based design with target-specific peripheral integration, the application provides a scalable foundation for validating dual-motor traction behavior in simulation and on real hardware. The next article can build on this architecture by focusing on Model-in-the-Loop development and controller validation before deployment. 10 References Developing a Dual-Motor EV Control System with Model-Based Design Toolbox Software & Hardware Enablement for the Dual-Motor EV Control System Sensorless FOC with Motor Control Blockset Extended EMF Observer – Motor Control Blockset NXP Model-Based Design Toolbox for S32K3 NXP S32K396 microcontroller documentation AN14481: MCSPTR2AK396 3-phase PMSM Motor Control Kit with S32K396 Application Note
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Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board Hi Everyone, I am working with the RIOP RT1189 board and have a few questions regarding software compatibility and debugging. Initially, I successfully programmed the RIOP demo application using the Secure Provisioning Tool in Serial Download Mode, and the demo is working as expected. After that, I tried to run the MIMXRT1180 EVK SDK example projects (for example, the LED Blinky example) on the RIOP RT1189 board. What I tried Modified the LED pin configuration in the RT1180 EVK LED Blinky example to match the RIOP RT1189 board. Programmed the image using the Secure Provisioning Tool in Serial Download Mode. However, the application does not run on the RIOP board. To verify the hardware, I took the working RIOP demo project, commented out most of the demo functionality, added only the LED Blinky code, and programmed it again. In this case, the LED Blinky works correctly. This makes me think there are additional board-specific configurations in the RIOP demo that are required beyond simply changing the LED GPIO pin. Questions Can the MIMXRT1180 EVK SDK example projects be used directly on the RIOP RT1189 board? If not, what board-specific modifications are required (clock configuration, memory configuration, FlexSPI, linker script, startup code, etc.) to make the SDK examples work on the RIOP board? Debugging Issue I also tried to debug the demo application using MCU-Link, but the debugger fails during flash initialization with the following error: Inspected v.2 External Flash Device on SPI using SFDP JEDEC ID MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx Image 'iMXRT1180_SFDP_FlexSPI1_A_QSPI Jun 26 2025 18:32:16' Opening flash driver MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx VECTRESET requested, but not supported on ARMv8-M CPUs. Using SOFTRESET instead. Using SOFT reset to run the flash driver Driver V.2 dynamic startup failed - driver Init provided no flash parameters Flash Driver V.2 startup failed - rc Ef(55): Dynamic flash driver startup failed to provide flash parameters. Terminate (0x0, 0x0, 0x0) status 0x40 - driver reports init failure - EXTSPIJ driver rc 20107 (0x4E8B) chip initialization failed - Ef(55): Dynamic flash driver startup failed to provide flash parameters. failed to initialize flash driver MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx Could this error indicate that the RT1180 EVK flash driver is incompatible with the external flash used on the RIOP RT1189 board, or is there an additional flash configuration that needs to be provided for debugging? Any guidance or suggestions would be greatly appreciated. Thank you! Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board Hello @Pavankumar1, The Remote I/O Platform (RIOP) is intended as a production-ready platform that supports industrial communication protocols such as EtherCAT®, EtherNet/IP™, and PROFINET® RT. I would like to clarify that the hardware configuration of the RIOP RT1189 board differs from that of the RT1180-EVK, examples developed for the RT1180-EVK cannot run directly on the RIOP hardware. Porting an RT1180-EVK example to the RIOP RT1189 will require additional development to adapt the application to the different hardware connections and peripherals. For this reason, I recommend starting with the examples specifically provided for the RIOP RT1189 board. As a starting point, I recommend check firstly the Getting Started with the Remote I/O Platform (RIOP), which provides an overview of the platform architecture and demonstrates its capabilities. If your objective is to evaluate the RIOP hardware without using industrial communication protocols, you can refer to the following example: https://github.com/nxp-appcodehub/rd-riop-demo/tree/main In addition, some example applications are available for the supported industrial protocols. Their corresponding User Guides include instructions on how to download, install, and import the projects into the MCUxpresso for VS Code extension. If you have any further questions about these user's guide, do not hesitate to let me know. These guides can be found in the Documentation section, as shown in the image below: If you are interested on these examples the following link might be helpful: https://github.com/nxp-appcodehub/rd-riop In order to support you better, could you please share me more details about your intended application? Specifically, could you clarify why you would like to port an RT1180-EVK example to the RIOP RT1189 platform and what functionality you are interested to implement? BR Habib Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board Hi @Habib_MS  Thank you for your reply. I have explored the RIOP demo application available at the following link and tested it with the FreeMASTER application:  https://github.com/nxp-appcodehub/rd-riop-demo/tree/main The demo works correctly when I program it using the Secure Provisioning Tool in Serial Download Mode. However, I am unable to debug the demo project using MCUXpresso for VS Code and MCU-Link. During the debug process, I encounter the following error: Could you please let me know if there are any additional steps required to enable debugging on the RIOP RT1189 board? Is there a specific flash driver or debug configuration that should be used instead of the default RT1180 EVK configuration? My objective is to explore and develop applications for the Analog Front End (AFE) module available on the RIOP board. For this, I need to be able to build, debug, and modify the firmware. Could you please advise on the following? 1. Is it possible to create a new MCUXpresso project from scratch specifically for the RIOP RT1189 board and configure the Analog Front End module? 2. Is there a basic example project, such as an LED Blinky example, specifically for the RIOP RT1189 board that I can use as a starting point for my application? 3. If no such example is available, what is the recommended approach for developing custom applications on the RIOP RT1189 platform? Any guidance or documentation would be greatly appreciated. Thank you for your support. Best regards, Pavankumar A G Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board Hello @Pavankumar1, I understand that you are using MCUXpresso IDE instead of MCUXpresso for VS Code extension, as the screenshot references a .cfx file, which is the flash loader format used by MCUXpresso IDE. Is my understanding correct? If so, could you try debugging the application using the MCUXpresso for VS Code extension, or alternatively attach the debugger after programming the image with the Secure Provisioning Tool, and let me know the results? Also, thank you for providing additional details about your application. The example already includes a driver for the NAFE13388, which can be found in the NAFE_hw folder. It also demonstrates how to configure the device in the AFE_Init() task located in the api_afe.c file, which may serve as a useful reference for your implementation. BR Habib Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board Hi @Habib_MS, Thank you for your response. I tried debugging the riop_demo application using MCUXpresso for VS Code, but I encountered the attached error. I also programmed the image using the Secure Provisioning Tool and attempted to attach to the running target, as you suggested. However, I am still encountering the same error. Could you please advise on the required modifications if I create a new project for the RIOP board? Specifically, I would like to know what changes are needed to make the application run correctly on the RIOP hardware. Thank you for your support. Regards, Pavanakumar A G Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board Hello @Pavankumar1, The errors occur because the debug configurations used to communicate with the external flash were not designed as a full debugging solution for the RIOP. Instead, the examples and the guides are primarily intended to demonstrate the use of the different software components that the board offers. With that in mind, one option would be to debug the application from the internal RAM. Once you are satisfied with the behavior of your application, you can follow the Secure Provisioning Tool flow to program the image into the external flash and perform the tests you require. You can refer to the "Image Running in Internal RAM" section of the MCUXpresso Secure Provisioning Tool v26.06 User's Guide for details on how to create an image that runs from internal RAM using MCUXpresso IDE. This approach allows you to work with the SDK examples provided for the RT1180-EVK. However, since your hardware differs from the EVK, some project modifications may be required. Alternatively, if you would like to debug directly from the external flash, you could create and use your own flash loader. MCUxpresso IDE uses a .cfx file to communicate with the external flash and program the image, so you can develop a custom .cfx flash loader for your device and configure the IDE accordingly. The following documents can be used as reference: AN13386: RT600 Flash Loader for Custom Flash Device How to Create a New Flash Driver for MCUXpresso IDE At the moment, there is no specific guide describing how to implement this workflow with the VS Code extension. However, you can take the different build configurations available in the RT1180-EVK SDK examples as a reference for creating a similar setup: BR Habib Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board Hello @Pavankumar1, As you may know each memory has specific commands to performing read, write or erase operations. For this reason, the LUT configuration used in the example may not be compatible with this specific flash device. You can use the Boot Memory Configuration feature in the MCUXpresso Secure Provisioning Tool v26.6 to make your entire FCB. You can take the flash configurations used in the "Running the ECAT application" section as a reference when configuring the FCB for the flash device. Additionally, I recommend reviewing this community post, particularly the steps starting from point 15. That section provides a more detailed explanation of how the Secure Provisioning Tool generates the boot memory configuration and may help clarify the parameters and output produced by the tool. If you have any further questions, I would kindly ask you to open a new community post and include your questions there. This helps us provide more organized support and makes future reference easier. Feel free to tag me and with pleasure I will continuing supporting you. BR Habib Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board Hi @Habib_MS, I am now able to debug my application by running it from the internal RAM. Currently, I am trying to interface the Macronix MX25UW6345GXDI00 Octal Flash on the RT1189 RIOP board and test the read/write operations while executing the application from RAM. For this, I started with the FlexSPI Octal Flash Polling example from the RT1189 EVK SDK and made the following modifications: Updated the pin configuration to match the RIOP board. Changed the Flash port from Port A to Port B (kFLEXSPI_PortB1). However, when I try to read the Flash Vendor ID, the FLEXSPI_TransferBlocking() API returns kStatus_FLEXSPI_SequenceExecutionTimeout, and the Vendor ID is 0x00. I would like to know: 1. Besides changing the pin configuration and FLASH_PORT to kFLEXSPI_PortB1, are there any other FlexSPI configurations that need to be modified for the RIOP board? 2. Does the MX25UW6345GXDI00 power up directly in Octal mode, or does it need to be switched to Octal/OPI mode before using the Octal LUT? 3. Does the FlexSPI LUT provided in the RT1189 EVK example (which is based on the Micron MT35XU512 flash) need to be modified for the Macronix MX25UW6345GXDI00? 4. Has anyone successfully used the MX25UW6345GXDI00 with the RT1189 FlexSPI interface? If so, could you please share the required initialization sequence or any additional configuration changes? Any guidance would be greatly appreciated. Best regards, Pavanakumar A G
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LPC-Link2のシリアル番号の一貫性について 複数のLPC-Link2チップのシリアル番号が同一である場合、それらのシリアル番号を変更する方法を教えていただきたいです。よろしくお願いいたします。 Re: 关于lpc-link2 SN码一致 こんにちは@chenwe97 このシリアル番号は変更できません。 複数のLPC-LINK2デバイスを同時に接続する場合は、CMSIS-DAPファームウェアにアップデートすることをお勧めします。これにより、各デバッガに固有のID番号が割り当てられます。 BR アリス
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RIOP RT1189ボード上でRT1180 EVK SDKの例を実行できない こんにちは、皆さん 私はRIOP RT1189ボードを使っており、ソフトウェアの互換性やデバッグについていくつか質問があります。 最初は、シリアルダウンロードモードでSecure Provisioning Toolを使ってRIPデモアプリケーションを無事にプログラムでき、デモは期待通りに動作しています。 その後、MIMXRT1180 EVK SDKの例プロジェクト(例えばLED Blinkyの例)をRIOP RT1189ボード上で実行しようとしました。 私が試したこと RT1180 EVK LED点滅サンプルにおけるLEDピン配置を、RIOP RT1189ボードに合わせて変更しました。 セキュアプロビジョニングツールをシリアルダウンロードモードで使用してイメージをプログラムしました。 ただし、このアプリケーションはRIOPボード上で動作しません。 ハードウェアを検証するために、動作確認済みのRIOPデモプロジェクトを入手し、デモ機能のほとんどをコメントアウトし、LED点滅コードのみを追加して、再度プログラムを書き込んだ。この場合、LEDブリンキーは正常に動作します。 このことから、RIOPデモには、LEDのGPIOピンを変更する以外にも、ボード固有の設定がいくつか必要になるのではないかと考えています。 質問 MIMXRT1180 EVK SDKのサンプルプロジェクトはRIOP RT1189ボード上で直接使用できますか? もしそうでなければ、RIPボード上でSDKの例を動作させるために、どんなボード固有の変更(クロック設定、メモリ設定、FlexSPI、リンカースクリプト、スタートアップコードなど)が必要ですか? デバッグの問題 また、MCU-Linkを使ってデモアプリケーションのデバッグも試みましたが、フラッシュ初期化中にデバッガが以下のエラーで失敗しました。 SPI上でSVDP JEDEX ID MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfxを使ってv.2外部フラッシュデバイスを検査しました 画像『iMXRT1180_SFDP_FlexSPI1_A_QSPI 2025年6月26日 18:32:16』 フラッシュドライバーの開MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx VECTRESETが要求されましたが、ARMv8-M CPUではサポートされていません。代わりにソフトリセットを使用してください。 フラッシュドライバを動かすためのソフトリセット ドライバV.2の動的起動失敗 - ドライバのInitがフラッシュパラメータを提供しませんでした Flash ドライバ V.2の起動失敗 - rc Ef(55): 動的フラッシュドライバの起動がフラッシュパラメータを提供できませんでした。 終了(0x0、0x0、0x0)ステータス0x40 - ドライバーがinit失敗を報告 - EXTSPIJドライバーrc 20107(0x4E8B) チップ初期化失敗 - Ef(55): 動的フラッシュドライバー起動時にフラッシュパラメータが提供されませんでした。 フラッシュドライバーの初期化に失敗MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx このエラーは、RT1180 EVKフラッシュドライバーがRIOP RT1189ボードで使用されている外部フラッシュと互換性がないことを示唆しているのでしょうか?それともデバッグのために追加のフラッシュ構成が必要でしょうか? 何かご助言やご提案があれば、大変ありがたく思います。 ご回答をお待ちしています。 Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board こんにちは、 @Pavankumar1 さん。 リモートI/Oプラットフォーム(RIOP)は、EtherCAT®、EtherNet/IP™、PROFINET® RTなどのインダストリアル通信プロトコルをサポートする本番対応プラットフォームとして設計されています。 RIOP RT1189ボードのハードウェア構成はRT1180-EVKとは異なり、RT1180-EVK用に開発された例はRIOPハードウェア上で直接動作できません。RT1180-EVKをRIOP RT1189に移植するには、異なるハードウェア接続やペリフェラルに適応させるための追加開発が必要です。そのため、RIOP RT1189ボード専用に提供されているサンプルから始めることをお勧めします。 まずは『 リモートI/Oプラットフォームの入門ガイド(RIOP)』を確認することをお勧めします。これはプラットフォームアーキテクチャの概要と能力の実演です。 インダストリアル通信プロトコルを使わずにRIOPハードウェアを評価することが目的であれば、以下の例を参照できます: https://github.com/nxp-appcodehub/rd-riop-demo/tree/main さらに、サポートされているインダストリアルプロトコル向けのいくつかの例のアプリケーションも用意されています。対応するユーザーガイドには、 MCUXpresso for VS Code 拡張機能へのプロジェクトのダウンロード、インストール、インポート方法の説明が含まれています。このユーザーガイドについてさらに質問があれば、遠慮なくお知らせください。これらのガイドは、下の画像に示すように ドキュメント セクションでご覧いただけます。 これらの例に興味がある場合は、以下のリンクが役立つかもしれません。 https://github.com/nxp-appcodehub/rd-riop より良く**サポート**するために、ご希望の**アプリケーション**についてもう少し詳しく教えていただけますか?具体的には、なぜRT1180-EVKの例をRIOP RT1189プラットフォームに移植したいのか、またどのような機能を実装したいのかを明確にしていただけますか? BR ハビブ Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board こんにちは、 @Habib_MS さん。 ご返信よろしくお願いします。 以下のリンクで入手可能なRIOPデモアプリケーションを探索し、FreeMASTERアプリケーションでテストしました。 https://github.com/nxp-appcodehub/rd-riop-demo/tree/main シリアルダウンロードモードでセキュアプロビジョニングツールを使用してプログラムすると、デモは正しく動作します。しかし、MCUXpresso for VS CodeとMCU-Linkを使ってデモプロジェクトのデバッグができません。デバッグ中に、以下のエラーが発生しました。 RIOP RT1189ボードでデバッグを有効にするために追加で必要な手順があれば教えていただけますか?デフォルトのRT1180 EVK構成の代わりに使うべき特定のフラッシュドライバーやデバッグ設定はありますか? 私の目的は、RIOPボードで利用可能なアナログフロントエンド(AFE)モジュールのアプリケーションを探求・開発することです。そのためには、ファームウェアの構築、デバッグ、および修正ができる必要があります。 以下の点についてアドバイスいただけますか? 1. RIOP RT1189ボード専用に新しいMCUXpressoプロジェクトを一から作成し、アナログフロントエンドモジュールを構成することは可能ですか? 2. 私のアプリケーションの出発点として使える、例えばLEDブリンキーの例のような基本的な例プロジェクトはありますか? 3.そのような例がない場合、RIOP RT1189プラットフォーム上でカスタムアプリケーションを開発する際に推奨されるアプローチは何でしょうか? どんなガイダンスやドキュメントでも大変ありがたいです。 再開まで今しばらくお待ちください。 よろしくお願いします、 パヴァンクマールAG Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board こんにちは、 @Pavankumar1 。 VS MCUXpresso for VS Code ではなく MCUXpresso IDE を使っていると理解しています。スクリーンショットは.cfxを参照していますファイルはMCUXpresso IDEで使用されるフラッシュローダー形式です。私の理解は正しいでしょうか? もしそうなら、MCUXpresso for VS Code拡張機能を使って デバッグ を試してみてもらえますか?あるいは、画像をSecure Provisioning Toolでプログラムした後にデバッガー を接続 して、結果を教えてもらえますか? また、アプリケーションに関する追加情報を教えてくださりありがとうございます。例にはすでにNAFE13388のドライバが含まれており、NAFE_hwフォルダにあります。また、api_afe.c にある AFE_Init() タスクでデバイスを設定する方法も示しています。このファイルは、実装の際に役立つ参考資料となる可能性があります。 BR ハビブ Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board こんにちは、 @Habib_MS さん。 ご返信ありがとうございます。 MCUXpresso for VS Codeを使ってriop_demoアプリケーションのデバッグを試みましたが、添付されたエラーが発生しました。 ご指摘いただいたとおり、セキュアプロビジョニングツールを使用してイメージをプログラムし、実行中のターゲットへの接続を試みました。しかし、依然として同じエラーが発生しています。 RIOPボードのために新しいプロジェクトを作成する場合に必要な修正についてアドバイスいただけますか?具体的には、RIPハードウェア上でアプリケーションを正しく動作させるためにどんな変更が必要か知りたいです。 再開まで今しばらくお待ちください。 よろしくお願いいたします。 パヴァナクマールAG Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board こんにちは、 @Pavankumar1 さん。 これらのエラーは、外部フラッシュとの通信に使用されるデバッグ構成が、RIOPの完全なデバッグソリューションとして設計されていないために発生します。代わりに、これらの例やガイドは主にボードが提供するさまざまなソフトウェアコンポーネントの使い方を示すことを目的としています。 それを踏まえると、一つの方法は内部RAMからアプリケーションをデバッグすることです。アプリケーションの挙動に満足したら、Secure Provisioning Toolのフローに従って画像を外部フラッシュにプログラムし、必要なテストを行うことができます。 MCUXpresso IDEを使って内部RAMから動作するイメージを作成する方法については、MCUXpresso Secure Provisioning Tool v26.06ユーザーガイドの「Internal RAMで動作するイメージ」セクションをご参照ください。このアプローチにより、RT1180-EVK向けのSDK例を活用して作業できます。ただし、お使いのハードウェアはEVKとは異なるため、プロジェクトに一部変更が必要になる場合があります。 あるいは、外部フラッシュから直接デバッグしたい場合は、自分でフラッシュローダーを作成して使うこともできます。MCUxpresso IDEは.cfxを使用しています外部フラッシュと通信し、画像をプログラムするためのファイルなので、カスタムの.cfxを作成できますデバイス用のフラッシュローダーを使い、IDEを適切に設定してください。以下の文書が参考資料として使用できます。 AN13386:カスタムフラッシュデバイス用のRT600フラッシュローダー MCUXpresso IDE用の新しいフラッシュドライバーの作成方法 現時点では、VS Code拡張機能でこのワークフローをどのように実装するかを具体的に説明したガイドはありません。しかし、RT1180-EVK SDKの例で利用可能な異なるビルド構成を参考にして、同様のセットアップを作成できます: BR ハビブ
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关于lpc-link2 SN码一致 想请问下几块lpc-link2  SN码一致的情况下,怎么更改,谢谢。 Re: 关于lpc-link2 SN码一致 Hi @chenwei97  这个SN 码没办法修改。 如果您是为了同时连接多个LPC-LINK2,建议更新成CMSIS-DAP固件。这样每个调试器会有唯一的ID号。 BR Alice
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无法在RIOP RT1189开发板上运行RT1180 EVK SDK示例 大家好, 我正在使用RIOP RT1189开发板,有一些关于软件兼容性和调试方面的问题。 最初,我使用串行下载模式下的安全配置工具成功地对 RIOP 演示应用程序进行了编程,并且演示程序运行正常。 之后,我尝试在 RIOP RT1189 板上运行 MIMXRT1180 EVK SDK 示例项目(例如 LED Blinky 示例)。 我尝试过 修改了 RT1180 EVK LED 闪烁示例中的 LED 引脚配置,使其与 RIOP RT1189 板匹配。 使用安全配置工具在串行下载模式下对映像进行编程。 但是,该应用程序无法在 RIOP 板上运行。 为了验证硬件,我使用了可运行的 RIOP 演示项目,注释掉了大部分演示功能,只添加了 LED 闪烁代码,然后重新编写了程序。在这种情况下,LED闪烁功能工作正常。 这让我觉得,RIOP 演示中除了简单地更改 LED GPIO 引脚之外,还需要其他特定于电路板的配置。 问题 MIMXRT1180 EVK SDK 示例项目可以直接在 RIOP RT1189 板上使用吗? 如果不行,需要对电路板进行哪些特定修改(时钟配置、内存配置、FlexSPI、链接器脚本、启动代码等)才能使 SDK 示例在 RIOP 板上运行? 调试问题 我还尝试使用 MCU-Link 调试演示应用程序,但调试器在闪存初始化期间失败,并出现以下错误: 使用 SFDP JEDEC ID MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx 检查了 SPI 接口的 v.2 外部闪存设备。 图像'iMXRT1180_SFDP_FlexSPI1_A_QSPI 2025年6月26日 18:32:16' 打开闪存驱动程序 MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx 请求 VECTRESET,但 ARMv8-M CPU 不支持此功能。改用软重置。 使用软复位来运行闪存驱动程序 驱动程序 V.2 动态启动失败 - 驱动程序初始化未提供闪存参数 Flash Driver V.2 启动失败 - rc Ef(55): 动态闪存驱动程序启动未能提供闪存参数。 终止 (0x0, 0x0, 0x0) 状态 0x40 - 驱动程序报告初始化失败 - EXTSPIJ 驱动程序返回码 20107 (0x4E8B) 芯片初始化失败 - Ef(55): 动态闪存驱动程序启动未能提供闪存参数。 初始化闪存驱动程序 MIMXRT1180_SFDP_FlexSPI1_A_QSPI.cfx 失败 这个错误是否表明 RT1180 EVK 闪存驱动程序与 RIOP RT1189 板上使用的外部闪存不兼容,或者是否需要提供额外的闪存配置来进行调试? 任何指导或建议都将不胜感激。 谢谢! Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board 你好@Pavankumar1 , 远程 I/O 平台 (RIOP) 旨在成为一个可投入生产的平台,支持 EtherCAT ® 、EtherNet/IP ™和 PROFINET ® RT 等工业通信协议。 我想澄清一下,RIOP RT1189 板的硬件配置与 RT1180-EVK 不同,为 RT1180-EVK 开发的示例不能直接在 RIOP 硬件上运行。将 RT1180-EVK 示例移植到 RIOP RT1189 需要进行额外的开发,以使应用程序适应不同的硬件连接和外围设备。因此,我建议从专门为 RIOP RT1189 板提供的示例开始。 首先,我建议查看《远程 I/O 平台 (RIOP) 入门指南》 ,其中概述了平台架构并演示了其功能。 如果您的目标是在不使用工业通信协议的情况下评估 RIOP 硬件,您可以参考以下示例: https://github.com/nxp-appcodehub/rd-riop-demo/tree/main 此外,还提供了受支持的工业协议的一些示例应用程序。相应的用户指南包括如何下载、安装和将项目导入MCUxpresso for VS Code 扩展的说明。如果您对本用户指南还有任何疑问,请随时告诉我。这些指南可以在“文档”部分找到,如下图所示: 如果您对这些例子感兴趣,以下链接可能对您有所帮助: https://github.com/nxp-appcodehub/rd-riop 为了更好地为您提供帮助,能否请您详细介绍一下您的申请意向?具体来说,您能否说明一下为什么要将 RT1180-EVK 示例移植到 RIOP RT1189 平台,以及您希望实现哪些功能? BR 哈比卜 Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board 你好@Habib_MS 感谢您的回复。 我已浏览了以下链接提供的 RIOP 演示应用程序,并使用 FreeMASTER 应用程序对其进行了测试: https://github.com/nxp-appcodehub/rd-riop-demo/tree/main 当我使用安全配置工具在串行下载模式下进行编程时,演示程序可以正常运行。但是,我无法使用 MCUXpresso for VS Code 和 MCU-Link 调试演示项目。调试过程中,我遇到了以下错误: 请问启用 RIOP RT1189 开发板的调试功能是否还需要其他步骤?是否有特定的闪存驱动程序或调试配置可以替代默认的 RT1180 EVK 配置? 我的目标是探索和开发RIOP板上提供的模拟前端(AFE)模块的应用。为此,我需要能够构建、调试和修改固件。 请问您能否就以下问题提供建议? 1. 是否可以从头开始创建一个专门针对 RIOP RT1189 板的 MCUXpresso 项目,并配置模拟前端模块? 2. 是否有专门针对 RIOP RT1189 板的基本示例项目,例如 LED 闪烁示例,我可以将其作为我的应用程序的起点? 3.如果没有这样的示例,那么在 RIOP RT1189 平台上开发自定义应用程序的推荐方法是什么? 任何指导或文件都将不胜感激。 感谢您的支持。 此致, 帕万库马尔 AG Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board 你好@Pavankumar1 , 我了解到您使用的是MCUXpresso IDE而不是MCUXpresso for VS Code 扩展,因为截图中显示的是一个 .cfx 文件。文件,这是 MCUXpresso IDE 使用的闪存加载器格式。我的理解正确吗? 如果可以的话,您能否尝试使用 MCUXpresso for VS Code 扩展来调试应用程序,或者在使用安全配置工具对映像进行编程后附加调试器,并告诉我结果? 另外,感谢您提供有关申请的更多详细信息。该示例已经包含 NAFE13388 的驱动程序,可以在 NAFE_hw 文件夹中找到。它还演示了如何在位于 api_afe.c 中的 AFE_Init() 任务中配置设备。文件可作为您实现过程中的有用参考。 BR 哈比卜 Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board 你好@Habib_MS , 感谢您的反馈, 我尝试使用 MCUXpresso for VS Code 调试 riop_demo 应用程序,但遇到了附件中的错误。 我还按照您的建议,使用安全配置工具对映像进行了编程,并尝试将其连接到正在运行的目标。但是,我仍然遇到同样的错误。 如果我为RIOP板创建一个新项目,请问需要进行哪些修改?具体来说,我想知道需要进行哪些更改才能使应用程序在 RIOP 硬件上正确运行。 感谢您的支持。 问候, 帕瓦纳库马尔 AG Re: Unable to Run RT1180 EVK SDK Examples on RIOP RT1189 Board 你好@Pavankumar1 , 出现这些错误的原因是,用于与外部闪存通信的调试配置并非为 RIOP 设计的完整调试解决方案。相反,这些示例和指南主要旨在演示开发板提供的不同软件组件的使用方法。 考虑到这一点,一种方法是从内部 RAM 调试应用程序。如果您对应用程序的行为感到满意,您可以按照安全配置工具流程将映像编程到外部闪存中,并执行所需的测试。 您可以参考 MCUXpresso Secure Provisioning Tool v26.06 用户指南中的“在内部 RAM 中运行的映像”部分,了解如何使用 MCUXpresso IDE 创建在内部 RAM 中运行的映像的详细信息。这种方法允许您使用为 RT1180-EVK 提供的 SDK 示例。但是,由于您的硬件与 EVK 不同,可能需要对项目进行一些修改。 或者,如果您想直接从外部闪存进行调试,您可以创建并使用自己的闪存加载器。MCUxpresso IDE 使用 .cfx 文件。用于与外部闪存通信并对映像进行编程的文件,因此您可以开发自定义的 .cfx 文件。安装适用于您设备的闪存加载器,并相应地配置 IDE。以下文件可供参考,引用: AN13386:RT600 自定义闪存设备刷机程序 如何为 MCUXpresso IDE 创建新的闪存驱动程序 目前还没有具体的指南说明如何使用 VS Code 扩展来实现此工作流程。不过,您可以参考,引用 RT1180-EVK SDK 示例中提供的不同版本配置来创建类似的设置: BR 哈比卜
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Regarding the consistency of LPC-Link2 serial numbers I would like to ask how to change the serial number of several LPC-Link2 chips if they are identical. Thank you. Re: 关于lpc-link2 SN码一致 Hi @chenwei97 This serial number cannot be modified. If you are connecting multiple LPC-LINK2 devices simultaneously, it is recommended to update to the CMSIS-DAP firmware. This will give each debugger a unique ID number. BR Alice
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RF Power Amplifier Design - MRF13750H Hello! I am designing an 805 MHz RF power amplifier using the MRF13750H, and my design is based on the 915 MHz reference circuit found in the datasheet. However, I only have access to Usimmics for simulating the matching networks; I do not have access to the software NXP uses to open their design files. Therefore, to design the matching networks, I am requesting the complete schematic for the MRF13750H 915 MHz reference circuit from NXP, including the microstrip line dimensions, as this information is not provided in the datasheet. If possible, I would also like to request the large-signal model impedances at 805 MHz; otherwise, I will base my design on the values ​​provided for 915 MHz. The reference circuit at 915Mhz and the datasheet is attached below. On the other hand, if anyone knows a different method for designing the matching networks at 805 MHz, I would appreciate the input.
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我们能否在 i.mx9 中使用已配置的证书或密钥来设置 HTTPS 连接或 TLS 连接? i.MX93 上配置的证书和私钥可以直接用于建立 HTTPS/TLS 连接吗?如果可以,那么访问和使用这些凭据进行客户端/服务器身份验证和 mTLS 实现的推荐方法是什么? 配置完成后,安全对象 blob 会出现在 /etc/ele/ 中,那么在实际的 HTTPS/TLS 连接中使用这些已配置的凭据的推荐工作流程是什么? Re: can we use provisioned cert or key for setting up in the https connection or tls connection in i 嗨, @Manuel_Salas 谢谢你的回复。 关于 mbedTLS/opaque-key 指南——我们这边已经解决了私钥的问题。 剩下的问题具体是关于证书,该证书通过 EL2GO 配置,并与私钥一起存储在 /etc/ele/ 中。由于证书是公共数据,我们需要将其提取为纯 DER 格式,以便交给 mbedtls_x509_crt_parse_der() 进行 TLS 握手——与密钥不同,它不需要保持不透明。 支持的 SMW/PSA 调用是什么,才能检索已配置证书对象的明文 DER 字节? 具体来说:它是通过 psa_ps_get() / psa_its_get()(PSA 保护存储/内部可信存储)使用对象 ID 作为 UID 公开,还是通过不同的 SMW API 公开?我们在已安装的 SMW 头文件中看到了 protected_storage.h 和 internal_trusted_storage.h,但在基于它进行构建之前,我们想确认这是否是证书对象的预期路径。 Re: can we use provisioned cert or key for setting up in the https connection or tls connection in i 你好@NEXUSNERD 希望你一切都好。 在 i.MX93 上,配置流程的设计使得私钥始终受到ELE的保护。 因此,存储在 /etc/ele/ 中的 blob 是安全的对象表示,允许 ELE 重新加载或引用已配置的密钥材料,它们不应被视为普通的 TLS 密钥文件。 您可以查看imx-secure-enclave (Mbed-TLS)。 顺祝商祺! 萨拉斯。
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AUTOSAR マカルMPC5744P こんにちは、MPC5744P用のAUTOSAR MCALアプリケーションを無料で作成できるコンパイラオプションはありますか? Re: AUTOSAR MCAL MPC5744P こんにちは、 レガシーのAUTOSAR MCAL for MPC5744Pパッケージ(MPC574xP MCAL 4.x)では、公式に検証されたツールチェーンは通常以下の通りです: Wind River Diab Compiler(最も一般的な資格) グリーンヒルズコンパイラ(GHS) 実際には、AUTOSAR MCALには公式にサポートされているフリーコンパイラMPC5744P提供されていません。 MPC5744Pエコシステムは一般的な組み込み開発のためにS32 Design Studio for Power Architectureをサポートする一方で、MCALパッケージ自体は主にDiabとGHSで開発・検証されました。 DEVKIT-MPC5744P情報にはGCC(S32DS経由)、GHS、Cosmic、その他のMPC5744P開発ツールチェーンが掲載されていますが、それがAUTOSAR MCALリリースがGCCに適格であることを意味しません。 検証済みコンパイラのリストは常にMCALパッケージに付属するリリースノートに記載されています。 よろしくお願いします、 ピーター
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CodeWarriorのライセンスに関する質問 私たちはレガシー製品でCodeWarrior 10.6を使っており、新しいPCにインストールする必要があります。CodeWarrior 10.6のオフラインインストールファイルが見つからず、オンラインインストールも失敗します(ダウンロードサイトが見つかりません)。 10.7のダウンロードは見つかります。弊社は10.6用の永続的なフローティングライセンスを保有しています。これらは10.7でも動作し続けるのでしょうか?それともオフラインの10.6インストールを教えてもらえますか? よろしくお願いします。
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can we use provisioned cert or key for setting up in the https connection or tls connection in i.mx9 Can the provisioned certificate and private key on the i.MX93 be used directly to establish HTTPS/TLS connections? If yes, what is the recommended method for accessing and utilizing these credentials for client/server authentication and mTLS implementations? once provisioning is complete and the secure object blobs are present in /etc/ele/, what is the recommended workflow for using those provisioned credentials in a real HTTPS/TLS connection? Re: can we use provisioned cert or key for setting up in the https connection or tls connection in i Hi ,@Manuel_Salas  Thanks for your reply. Following up on the mbedTLS/opaque-key guidance — that's resolved on our side for the private key. Remaining question is specifically about the certificate, provisioned via EL2GO and stored in /etc/ele/ alongside the private key . Since a certificate is public data, we need to extract it as plain DER to hand to mbedtls_x509_crt_parse_der() for the TLS handshake — unlike the key, it doesn't need to stay opaque. What is the supported SMW/PSA call to retrieve the plaintext DER bytes for a provisioned certificate object? Specifically: is it exposed via psa_ps_get() / psa_its_get() (PSA Protected Storage / Internal Trusted Storage) using the object ID as the UID, or through a different SMW API? We see protected_storage.h and internal_trusted_storage.h in the installed SMW headers but want to confirm this is the intended path for certificate objects before building against it. Re: can we use provisioned cert or key for setting up in the https connection or tls connection in i Hello @NEXUSNERD  Hope you are doing very well. On the i.MX93, the provisioning flow is designed so that the private key remains protected by the ELE. So, the blobs stored in /etc/ele/ are secure object representations that allow ELE to reload or reference the provisioned key material, and they are not intended to be treated as ordinary TLS key files. You can take a look to the imx-secure-enclave (Mbed-TLS). Best regards, Salas.
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USDHC1に接続されたeMMCはブートデバイスとして使えますか? こんにちは、 i.MX 8DualX/8DualXPlus/8QuadXPlusファミリーの起動ROMの挙動をチェックしています。 リファレンス・マニュアルによると、推奨されるブート接続は以下の通りのようです。 USDHC0上のeMMC SD/eSD/SDXCカード(USDHC1対応) しかし、図5-17 「拡張デバイス(SD/eSD/SDXC)ブートフロー」では、SDの初期化が失敗した場合、フローはコネクタ2を経由して図5-16のMMC初期化フローへと続きます。SDプロトコルが失敗した後、ROMは同じUSDHCインターフェース上でMMCプロトコルを試すようです。 これは、 USDHC1 に接続されたeMMCが検出され、4ビットモードでブートROMブートデバイスとして使われることがあるということですか? それとも、このMMCフォールバックパスはプロトコル検出のみを目的としており、USDHC1からのeMMCブートは正式にはサポートされていないのでしょうか? また、ROMがこの時点でUSDHC1からUSDHC0に切り替わるのか、それとも同じUSDHC1インターフェースを使い続けるのかも確認したいです。 よろしくお願いします。 Re: Can an eMMC connected to USDHC1 be used as a boot device? i.MX 8DualX/8DualXPlus/8QuadXPlusのブートROMの起動フロー、特にSDカードからの起動について理解しようとしています。 私の現在の理解は以下の通りです。 プライマリブートとセカンダリブートが失敗した場合、ROMはSD/MMC製造モードに入る可能性があり、これはリカバリブートと呼ばれます。 このモードでは: ROMはUSDHC1上のSDカードまたはMMCカードをスキャンします。 通常のバス幅eFuse設定に関わらず、1ビットのデータバスが使用されます。 有効なブートイメージが見つかった場合、それがロードされて実行されます。 もしeMMCデバイスがUSDHC1に接続されていて、BOOT_MODE[3:0]が0011に設定されている場合(SDでUSDHC1を経由)、期待される起動シーケンスは次のようになりますか? ROMはまずSDブートフローを使用して通常のプライマリブートを試みるが、失敗する。 その後、ROMはセカンダリブートを試みるが、これも失敗する。 ROMはSD/MMC製造モード(リカバリブート)に入り、MMCプロトコルを使用してUSDHC1上のeMMCデバイスを検出し、そこから正常に起動します。 つまり、このハードウェア構成では、通常のプライマリブートやセカンダリブートの段階ではなく、リカバリ/製造ブートの段階でのみ、システムはeMMCから起動できるということでしょうか? Re: Can an eMMC connected to USDHC1 be used as a boot device? こんにちは、 USDHC1上のeMMCはブートデバイスとして扱えず、文書化されたプライマリマッピングはUSDHC0上のeMMC、USDHC1上のSDです。 SD/MMC製造モードでは、USDHC1のフォールバック/リカバリ動作が使用されます。リファレンス・マニュアルの5.11節を参照してください。 よろしくお願いいたします。 Re: Can an eMMC connected to USDHC1 be used as a boot device? こんにちは、 はい、あなたの理解は正しいです。 その構成ではSD/MMC製造モードが「デフォルトのブート」として使用されるため、デバイスを復旧するオプションが失われることをご了承ください。 よろしくお願いいたします。
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HTTPS接続やI.mx9のTLS接続で設定するためにプロビジョニング済みのcertやkeyを使うことは可能でしょうか? i.MX93のプロビジョニング済み証明書と秘密鍵は、直接HTTPS/TLS接続を確立するために使えますか?もしそうなら、クライアント/サーバー認証やmTLS実装のためにこれらの認証情報にアクセスし活用する推奨方法は何ですか? プロビジョニングが完了し、セキュアオブジェクトブロブが /etc/ele/ に存在する場合、プロビジョニングされた認証情報を実際の HTTPS/TLS 接続で使用するための推奨ワークフローは何ですか? Re: can we use provisioned cert or key for setting up in the https connection or tls connection in i こんにちは、 @Manuel_Salas ご返信ありがとうございます。 mbedTLS/opaque-keyに関するガイダンスに従って、プライベートキーに関する問題は弊社側で解決済みです。 残りの質問は、EL2GO を介してプロビジョニングされ、秘密鍵とともに /etc/ele/ に保存される証明書についてです。証明書は公開データであるため、TLS ハンドシェイクのために mbedtls_x509_crt_parse_der() に渡すために、プレーンな DER として抽出する必要があります。鍵とは異なり、証明書は不透明なままにしておく必要はありません。 プロビジョニングされた証明書オブジェクトの平文DERバイトを取得するためにサポートされているSMW/PSA呼び出しは何ですか? 具体的には、オブジェクトIDをUIDとして使用してpsa_ps_get() / psa_its_get()(PSA保護ストレージ / 内部信頼ストレージ)を介して公開されるのか、それとも別のSMW APIを介して公開されるのか?インストールされたSMWヘッダーにはprotected_storage.hとinternal_trusted_storage.hが見られますが、証明書オブジェクトに対してこれを意図した経路かどうかを確認したいです。 Re: can we use provisioned cert or key for setting up in the https connection or tls connection in i こんにちは、 @NEXUSNERD お元気でお過ごしのことと思います。 i.MX93では、プロビジョニングフローは秘密鍵が ELEによって保護されるように設計されています。 したがって、/etc/ele/ に保存されているブロブは、ELEがプロビジョニングされたキー素材を再ロードまたは参照できるようにする安全なオブジェクト表現であり、通常のTLSキーファイルとして扱うことを意図していません。 imx-セキュア・エンクレーブ(Mbed-TLS)を見てみてください。 よろしくお願いいたします。 サラス。
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连接到 USDHC1 的 eMMC 能否用作引导设备? 你好, 我正在检查 i.MX 8DualX/8DualXPlus/8QuadXPlus 系列的启动 ROM 行为。 根据参考手册,推荐的启动连接方式如下: USDHC0 上的 eMMC USDHC1 上的 SD/eSD/SDXC 然而,在图 5-17 “扩展设备(SD/eSD/SDXC)启动流程”中,当 SD 初始化失败时,流程会通过连接器2继续到图 5-16 中的 MMC 初始化流程。ROM 似乎在 SD 协议失败后,尝试在同一个 USDHC 接口上使用 MMC 协议。 这是否意味着可以检测到连接到USDHC1 的eMMC 并将其用作启动 ROM 启动设备,可能以 4 位模式运行? 或者说,此 MMC 回退路径仅用于协议检测,而官方并不支持从 USDHC1 启动 eMMC? 我还想确认一下,此时 ROM 是否从 USDHC1 切换到 USDHC0,还是继续使用相同的 USDHC1 接口。 谢谢! Re: Can an eMMC connected to USDHC1 be used as a boot device? 我正在尝试了解 i.MX 8DualX/8DualXPlus/8QuadXPlus 启动 ROM 的启动流程,特别是 SD 卡启动的流程。 我目前的理解如下。 主启动和辅助启动失败后,ROM 可能会进入 SD/MMC 制造模式,这被称为恢复启动。 在此模式下: ROM 扫描 USDHC1 上的 SD 或 MMC 设备。 无论正常的总线宽度 eFuse 设置如何,都使用 1 位数据总线。 如果找到有效的启动映像,则加载并执行该映像。 如果将 eMMC 设备连接到 USDHC1,并且 BOOT_MODE[3:0] 设置为 0011(通过 USDHC1 进行 SD 卡启动),则预期的启动顺序是否如下? ROM 首先尝试使用 SD 卡启动流程进行正常的主启动,但失败了。 ROM 随后尝试二次启动,但也失败了。 ROM 进入 SD/MMC 制造模式(恢复启动),使用 MMC 协议检测到 USDHC1 上的 eMMC 设备,并成功从该设备启动。 换句话说,在这种硬件配置下,系统是否只能在恢复/制造启动阶段从 eMMC 启动,而不能在正常的启动阶段(主启动或辅助启动)从 eMMC 启动? Re: Can an eMMC connected to USDHC1 be used as a boot device? 你好, USDHC1 上的 eMMC 不能作为引导设备,有记录的主要映射是 USDHC0 上的 eMMC,USDHC1 上的 SD。 USDHC1 回退/恢复行为由 SD/MMC 制造模式使用。您可以参阅参考手册第 5.11 节。 顺祝商祺! Re: Can an eMMC connected to USDHC1 be used as a boot device? 你好, 是的,你的理解是正确的。 请注意,采用该配置后,SD/MMC 制造模式将“作为默认启动模式”,您将失去恢复设备的选项。 顺祝商祺!
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CodeWarrior License Questions We use CodeWarrior 10.6 on a legacy product and need to install it on a new P.C.  I'm unable to find an offline CodeWarrior 10.6 offline install and the online install fails (missing download site). I can find a 10.7 download.  We have permanent floating licenses for 10.6.  Will these continue to work with 10.7 or can someone point me to an offline 10.6 install? thanks
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Can an eMMC connected to USDHC1 be used as a boot device? Hello, I am checking the Boot ROM behavior of the i.MX 8DualX/8DualXPlus/8QuadXPlus family. According to the reference manual, the recommended boot connections appear to be: eMMC on USDHC0 SD/eSD/SDXC on USDHC1 However, in Figure 5-17, “Expansion device (SD/eSD/SDXC) boot flow”, when SD initialization fails, the flow continues through connector 2 to the MMC initialization flow in Figure 5-16. It appears that the ROM tries the MMC protocol on the same USDHC interface after the SD protocol fails. Does this mean that an eMMC connected to USDHC1 can be detected and used as a Boot ROM boot device, possibly in 4-bit mode? Or is this MMC fallback path intended only for protocol detection, while eMMC boot from USDHC1 is not officially supported? I would also like to confirm whether the ROM switches from USDHC1 to USDHC0 at this point, or whether it continues using the same USDHC1 interface. Thank you. Re: Can an eMMC connected to USDHC1 be used as a boot device? I am trying to understand the boot flow of the i.MX 8DualX/8DualXPlus/8QuadXPlus Boot ROM, especially for SD boot. My current understanding is as follows. After Primary and Secondary Boot fail, the ROM may enter SD/MMC Manufacture Mode, which is described as Recovery Boot. In this mode: The ROM scans SD or MMC devices on USDHC1. A 1-bit data bus is used, regardless of the normal bus-width eFuse setting. If a valid boot image is found, it is loaded and executed. If an eMMC device is connected to USDHC1 and BOOT_MODE[3:0] is set to 0011 (SD boot through USDHC1), is the expected boot sequence as follows? The ROM first attempts the normal Primary Boot using the SD boot flow, but it fails. The ROM then attempts Secondary Boot, which also fails. The ROM enters the SD/MMC Manufacture Mode (Recovery Boot), detects the eMMC device on USDHC1 using the MMC protocol, and successfully boots from it. In other words, with this hardware configuration, would the system be able to boot from the eMMC only during the Recovery/Manufacture Boot stage, rather than during the normal Primary or Secondary Boot stages? Re: Can an eMMC connected to USDHC1 be used as a boot device? Hello, eMMC on USDHC1 cannot be treated as a boot device, the documented primary mapping is eMMC on USDHC0, SD on USDHC1. The USDHC1 fallback/recovery behavior is used by SD/MMC manufacture mode. You can take a look in section 5.11 of reference manual. Best regards. Re: Can an eMMC connected to USDHC1 be used as a boot device? Hello, Yes, your understanding is correct. Please consider that SD/MMC Manufacture Mode will be used "as default boot" with that considered configuration and you will lose this option to recover the device. Best regards.
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The S32K148 has secure boot functionality, but the bootloader fails to start after JTAG is disabled. Dear NXP, hello: Our company's K148 has two partitions: a bootloader and an application partition. The application partition has a function to disable JTAG. When JTAG is disabled in the application, the bootloader fails to start after a reset, causing the chip to become bricked. Investigation revealed that the bootloader is 32KB, ranging from 0x00 to 0x8000. Disabling JTAG involved writing 0xFFu , 0xFFu , 0xFFu , 0xFFu , 0xFCu, 0x7Fu , 0xFFu , 0xFFu at address 0x408 , causing a change in the flash content. After a reset, the CSEc calculates a different boot_mac value for the bootloader, resulting in the bricking. Does NXP have any mature solutions to resolve this issue? Thank you. Re: S32K148有secureboot功能,但是bootloader在jtag关闭后起不来 Hi, @lukaszadrapa According to the manual above, BOOT_MAC is a one-time, irreversible write. Is there an official API that allows changing its value? If so, could you provide this API? Re: 晶振波形异常 Using your company's FS32K144HFT0MLHT MC The crystal oscillator is an 8MHz passive crystal oscillator (AV08000009), and the waveform is abnormal. Is this waveform acceptable for your company's MCU, and will it affect normal operation? Re: S32K148有secureboot功能,但是bootloader在jtag关闭后起不来 Hi @vurtual  The common approach is to disable the debug interface during manufacturing, rather than later from the application. In that case, the process can be done in a single production step: reprogram the Flash Configuration Field (FCF) to disable the debug port and then provision the correct BOOT_MAC value (or allow the CSEc to calculate it automatically after the next reset). If you need to disable the debug interface later in the product lifecycle, that is also possible. However, once the FCF is reprogrammed, the BOOT_MAC must be updated as well, since the secure boot calculation includes the modified FCF contents. Otherwise, the secure boot verification will fail. The BOOT_MAC can be updated using the standard SHE memory update protocol, in the same way that CSEc keys are updated. After updating the BOOT_MAC to match the new FCF contents, secure boot should operate correctly with the debug port disabled. Regards, Lukas Re: S32K148有secureboot功能,但是bootloader在jtag关闭后起不来 Hi @vurtual  Where do you see that this is an irreversible operation? That is not correct. BOOT_MAC can be updated.  As I mentioned previously: "The BOOT_MAC can be updated using the standard SHE memory update protocol, in the same way that CSEc keys are updated." This means you can use the CMD_LOAD_KEY command, which is the same command used to import and update regular SHE/CSEc keys. To update BOOT_MAC, you need to generate the M1–M5 values according to the standard SHE key update procedure. The key counter must be incremented, and the update can be authorized using either the MASTER_ECU_KEY or the BOOT_MAC_KEY. Therefore, updating BOOT_MAC is a supported operation and is not irreversible. Regards, Lukas Re: 晶振波形异常 Hello,@ lukaszadrapa Our company uses your FS32K144HFT0MLHT MCU with an 8MHz passive crystal oscillator (AV08000009), and the waveform is abnormal. Is this crystal oscillator waveform acceptable for your MCU? Will it affect the normal operation of the MCU? Thank you. Re: 晶振波形异常 Please create new thread for this. Thank you.  Re: 晶振波形异常 OK ,Thank you.
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CodeWarrior 许可证问题 我们在旧版产品上使用 CodeWarrior 10.6,现在需要将其安装到新电脑上。我找不到 CodeWarrior 10.6 的离线安装包,在线安装也失败了(缺少下载站点)。 我可以找到 10.7 版本的下载。我们拥有 10.6 的永久浮动许可证。这些软件还能在 10.7 系统下运行吗?或者有人能提供一个 10.6 系统的离线安装包吗? 谢谢!
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