UART Setup on FRDM-MCXN947 Hello, I'm trying to reset LPUART to the frequency from FRO_HF (48 MHz) and keep baudrate 230400. Unfortunately I can't get it to work despite setting the CLK for the UART and baudrate. Have I forgotten something? Can I somehow change the divider? /* attach FRO HS to FLEXCOMM7 */ CLOCK_SetClkDiv(kCLOCK_DivFlexcom7Clk, 1u); CLOCK_AttachClk(kFRO_HF_DIV_to_FLEXCOMM7); My LPUART setup: LPUART_GetDefaultConfig(&config); config.baudRate_Bps = 230400; config.isMsb = false; config.enableTx = false; config.enableRx = true; PRINTF("Frequency: %d\r\n", CLOCK_GetLPFlexCommClkFreq(7u)); freq = CLOCK_GetLPFlexCommClkFreq(7u); LPUART_Init(LPUART7, &config, freq); uint32_t divider = ((LPUART7->BAUD & LPUART_BAUD_SBR_MASK) >> LPUART_BAUD_SBR_SHIFT); DisableIRQ(LPUART7_IRQn); /* Enable RX interrupt. */ LPUART_EnableInterrupts(LPUART7, kLPUART_TransmissionCompleteInterruptEnable); EnableIRQ(LPUART7_IRQn); Thank you John Adams Clock|Timers Development Board MCXN Re: UART Setup on FRDM-MCXN947 Hi @John_Adams, Of course, that would be any of the other LPUART examples that we provide in our SDK: BR, Edwin. Re: UART Setup on FRDM-MCXN947 Thank you Edwin, I will look at the example. Just by chance, is there any example that would use FIFO and not use EDMA? John Adams Re: UART Setup on FRDM-MCXN947 Hi @John_Adams, You could sequentially read the FIFO queue by letting the eDMA automatically handle these reads. Please look at the "lpuart_edma_transfer" example code, as it shows how the eDMA handles the FIFO reads automatically. BR, Edwin. Re: UART Setup on FRDM-MCXN947 Thank you, Also I will have to use LPUART FIFO, can you please advise me how to read sequentially the data from this FIFO queue? John Adams Re: UART Setup on FRDM-MCXN947 Hi @John_Adams, You can chance the FC7 divider by using the line you previously mentioned: CLOCK_SetClkDiv(kCLOCK_DivFlexcom7Clk, 1u);  However, this is already at the lowest division possible. increasing the divider will only decrease the frequency. If you wish to increase the FC7 frequency, you can try changing the source clock to another source, like the PLL divided clock (pll_clk_div) using: CLOCK_AttachClk(kPLL_DIV_to_FLEXCOMM7); Just make sure you are enabling this PLL divided clock by using: CLOCK_AttachClk(kPLL0_to_PLLCLKDIV); CLOCK_SetClkDiv(kCLOCK_DivPllClk, 1U); BR, Edwin. Re: UART Setup on FRDM-MCXN947 Thank you for your answer @EdwinHz  I have the pins installed, I don't have a problem that LPUART doesn't work at all, I have a problem that UART doesn't keep up with the speed of communication on FRO_12M. I am trying to increase the frequency, but I have the feeling that the baudrate is not set correctly, how can I change the divider? John Adams Re: UART Setup on FRDM-MCXN947 Hi @John_Adams, Please make sure you are also initializing the appropriate pins on the pin_mux.c file under board folder. BR, Edwin.

What is difference between eIQ and eIQ neural NPU? My question is same as the title. As my understanding, eIQ is software where we can train model, convert model (to tflite fro example) and visualize it. Before I traing Tensorflow model and convert to tflite model (not using eIQ) and deploy on MIMXRT board. Can I use this model to deploy on MCXN947 with NPU mode? Is there any special things to develop tensorflow lite model for MCXN947 with NPU mode? MCXN Re: What is difference between eIQ and eIQ neural NPU? @Harry_Zhang  Thank you. I could convert to NPU Tflite. I see that th output model is also .tflite model with custom operators NeutronGraph. How can I evaluate this NPU tflite model on PC with Python? Do you have any guide? I known that NeutronGraph is the custom operator and we need have its implementation to use in Python. Re: What is difference between eIQ and eIQ neural NPU? @Harry_Zhang @james598goff  Thank you. I understood. Re: What is difference between eIQ and eIQ neural NPU? Hi @nnxxpp  When you need to  deploy it on MCXN947, you need to convert TensorFlow lite for Neutron using convert tool. You can refer to it. eIQ Neutron NPU Lab Guides - NXP Community BR Harry

S912XEP100BMAG FTT & MTTF Values Customer Engineer need S912XEP100BMAG FTT & MTTF Values， Can anyone provide a pdf file? Thanks！ Freedom Development Platform Kinetis E Series MCUs Re: S912XEP100BMAG FTT & MTTF Values Hello @Louis1916  For this question, please create a private ticket to NXP support. Our commertial team will send you the report. https://support.nxp.com/s/?language=en_US Hope this will help you, Jun Zhang

Configure MR-T1ETH8 with the SJA1110 ECT GUI Hi! Is it possible to build a firmware for the MR-T1ETH8 so that it could be configured from the SJA1110 ECT GUI? Best regards Daniel Re: Configure MR-T1ETH8 with the SJA1110 ECT GUI Ok, I'll contact our sales representative. Thanks for the help! Best regards Daniel Re: Configure MR-T1ETH8 with the SJA1110 ECT GUI Hello @Daniel_W , yes, that should be possible - MR-T1ETH8 has flash and 10-pin debug connector. ECT server needs to be added to your SJA1110's firmware. Since ECT is quite new tool, I would recommend contacting your assigned sales representative or field application engineer. Best regards, Pavel

terminal authentication on national ID smartcard Hi, I am working on android application, that should use my national ID smartcard, in order to authenticate with web server, using one of two available certificates on ID (one is for authentication, the other is for encryption). Smartcard is NXP, compatible with Java Card v3.0.4 (detail from public tender). Issuer provided only IDProtect middleware for Windows, so no much information available for Android defelopers. I logged APDUs during web session, when my ID is used on Win10 PC and supported smartcard reader, along with IDProtect middleware. What I can see, is following content (only interesting part): Select MF Select AppId ChipDoc MSe-Set (CRT KAT) 00 22 41 A6 89 80 01 9B 83 01 8E 91 81 80 <128-byte data> Get Data SDO 00 CB 3F FF 06 4D 04 A6 02 91 00 00 Everything is much likely IAS ECC 5.2.3.1 Set the privacy protection (but only that 1st phase), much like IFD and ICC exchange ephemeral keys. After that, two secure messages: Select some EF/DF Verify 0C 20 02 01 18 ... I am not sure (at the moment) what DF is selected in Select APDU, but Verify APDU possibly relates to PIN entered for authentication certificate, as happens after PIN is entered during web session, for certificate selected (web server requires client authentication...). As not in posession of vendor documentation, I can only follow IAS ECC documentation. It stated, that for Terminal authentication (privacy protection phase), IFD should send PuK.IFD.DH to ICC. In order to create PuK.IFD.DH, IFD need to read DH parameters (p, g, q) from ICC (IAS ECC stated that these parameters should be read from certain EF.DH under root, using Read BINARY APDU, or through 3 separated Read DATA SDO APDUs (for p, g and q). Anyway, in logged APDUs (from the moment when smartcard is inserted in reader), I cannot find any Read BINARY command that relates to reading of EF.DH, but also I cannot find any Read DATA SDO commands (3), which are reading p, g and q (they should be of 128, 128 and 20 bytes, if I am not wrong). I also do not know, what Verify APDU with P1P2 as 0201 mean (can only assume that PIN is sent for verification). After these messages, I can see following: Verify (PIN devalidation) 00 20 FF 01 Select MF Get Challenge (returned 8 bytes from ICC) Verify 00 20 03 01 0C One more Verify, with 0301 parameters, which I cannot understand. This is only authentication part, after which comes several Mse-Set CRT CT with pair of PSO Decipher messages (due to TLS v1.2 and v1.3), RAPDU of last PSO Decipher contains 256byte packet, that is sent from web client to web server, during client's Certificate Verify message). So, here are my questions: 1. Anyone could help with explenation about Verify 0201 and Verify 0301 messages? 2. Anyone has an idea, how IFD communicate with ICC, without reading p, g, q DH parameters? Could it be possible, that IDProtect middleware has hard coded p,g,q parameters, and does not need to read EF.DH, as stated by IAS ECC? 3. Anyone could help with explanation of this authentication process, as it is not as IAS-ECC states (at least not as stated in IAS ECC v1.0.1 chapter 5.2.3 Device authentication with privacy protection. JCOP ID1 Smart Cards Re: terminal authentication on national ID smartcard Hi @marcony , I am sorry, but this part is not a mass market product supported here, so its APDU commands info is under NDA and you have to request it by yourself via the NXP secure file channel, please kindly refer to https://www.nxp.com.cn/docs/en/user-guide/nxp-secure-access-rights-registration.pdf for more details. Thanks for your patience and understanding! Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------

Understanding the Reference Manual pinout/How to i2c Hello, I am trying to make a simple board with just the S32K341EHT0MPAST on it and some pins to access some analog and digital i/o and the i2c. However looking at the reference manual and it seems like every GPIO pin is extremely multifunctional? I'm a bit overwhelmed and I don't understand how you would set each pin to a specific function. There are so many "ALTx" columns. I see on the attached excel file for the s32k3 series that pin 41 and 42 are LPI2C1_SCL and LPI2C1_SDA respectively, and that there is another set of LPI2C0 pins. Do I understand correctly that I should be fine to use pin 41 and 42 as SDA and SCL and that the I2C0 is another "set" of i2c pins I could access? For simple digital and analog i/o I'm also a little lost, I see ADC_Sx as "standard input" pins available, but for digital would those be FXIO_Dx pins? Re: Understanding the Reference Manual pinout/How to i2c Hi @pb632146 Yes, you can look at each I2C[X] as a different instance for the communication module to use. There are some pins routed to these functions as alt mux that can be changed depending on what modules you may need. Inside the S32K3xx's datasheet you can find how many communication, analog and human-machine interfaces there are supported for the family. For example, you can find the figure map where each module is listed for the specific MCU derivative: For analog, there are up to three Analog Comparators (CMP) and up to three 12-bit Analog-to-Digital Converters (with up to 24 channel analog inputs). For digital, you can use GPIOs. The FlexIO module is a flexible input and output to emulate communication protocols, you can use this presentation as reference: Introduction to FlexIO. Best regards, Julián

如何在S32G中使用PFE功能 我们正在S32G-VNP-RDB3 (s32g399a) 中开发 PFE 功能。 而Tresos使用的是 29.0.0。 当我下载并检查PFE_Driver_1_2_0时，我在example_application 文件夹中发现了一个MasterProject_RDB3示例文件。 我们预计首先在Tresos中完成PFE相关的设置，将生成的头文件插入到S32G Studio中的项目中，并配合PFE_Driver_1_2_0中提供的源代码使用。 但是在Tresos中编译MasterProject_RDB3示例文件时出现以下错误。 节点“ /AUTOSAR/TOP-LEVEL-PACKAGES/Gpt/ELEMENTS/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelConfiguration_1/GptChannelTickFrequency ” 的属性“RANGE”的 XPath 表达式无效: (1806) XPath 表达式“(num:i(contains(node:fallback(../GptHwIp,'PIT'),'PIT') = 'true') * noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)),'/GptClockReference'))), '/McuClockReferencePointFrequency'))) + ( num:i(contains(node:fallback(../GptHwIp,'STM'),'STM'))* (noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)),'/GptClockReference'))), '/McuClockReferencePointFrequency')) div (num:i(not(contains(node:fallback(../GptHwIp,'STM'),'STM'))) + node:fallback(../../../GptStm/*[contains(text:split(node:current()/../GptModuleRef, '/')[5], node:fallback(./@name,1))]/GptStmPrescaler,1))) ) + ( num:i(contains(node:fallback(../GptHwIp,'FTM'),'FTM'))* (noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)),'/GptClockReference'))), '/McuClockReferencePointFrequency')) div (num:i(not(contains(node:fallback(../GptHwIp,'FTM'),'FTM'))) + node:fallback(../../../GptFtm/*[contains(text:split(node:current()/../GptModuleRef, '/')[5], node:fallback(./@name,1))]/GptFtmPrescaler,1))) ) + ( num:i(contains(node:fallback(../GptHwIp,'RTC'),'RTC') = true()) * ( ( (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_0')) * noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)),'/GptClockReference'))), '/McuClockReferencePointFrequency')) ) + （（num：i（节点：fallback（../../../GptRtc/*/GptRtcChannelClkSrc，'RTC_IP_CLOCK_SOURCE_0'）= 'RTC_IP_CLOCK_SOURCE_1'））* num：i（16000000））+ （（num：i（节点：fallback（../../../GptRtc/*/GptRtcChannelClkSrc，'RTC_IP_CLOCK_SOURCE_0'）= 'RTC_IP_CLOCK_SOURCE_2'））* num：i（128000））+ （ (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_3')) * num:i(32000) ) ) div ( num:i( (num:i(node:when((node:fallback(../../../GptRtc/*/DivBy32,'true') = 'true'),num:i(32),num:i(1)) * node:when((node:fallback(../../../GptRtc/*/DivBy512,'true') = 'true'),num:i(512),num:i(1)))) + (num:i(contains(node:fallback(../GptHwIp,'PIT'),'PIT') = true())) + (num:i(contains(node:fallback(../GptHwIp,'STM'),'STM') = true())) + (num:i(contains(node:fallback(../GptHwIp,'FTM'),'FTM') = true())) ) ) ) " 导致错误：未定义函数：noderef:ref 如果有人知道如何使用它，请帮助我......请帮忙......

QN9080cdk Bluetooth example pin setting Hello, I try to do data transmission through QN9080cdk using SDK example: "qn908xcdk_wireless_examples_bluetooth_private_profile_server_bm". I works fine, and USB dongle get data well. Now I want to do this work in my own PCB board which MCU(QN9080) is mounted. To do it, I refer the pin setting of "qn908xcdk_wireless_examples_bluetooth_private_profile_server_bm", but I found that the RF pin is not used. How QN908xcdk board can send the data wirelessly to USB dongle without using RF pin which is connected to antenna? Which pin is a {{really}} needed one to send data wirelessly? Below is a default pin setting of above SDK example. Thanks, Product: QN9080|SIP Re: QN9080cdk Bluetooth example pin setting Oh, When I change the BOARD_XTAL0_CLK_HZ from 32M to 16M and change k32M_to_XTAL_CLK to k16M_to_XTAL_CLK, usb dongle find my PCB board BLE address! Of course, there are still other problems to be solved in my job (I will upload them to a new question subject), but I am deeply grateful to you for solving this problem. Thank you, Re: QN9080cdk Bluetooth example pin setting Hi, By default, the SDK examples are configured to work with 32MHz, as our board has a 32MHz XTAL. You should change this on code: BOARD_XTAL0_CLK_HZ Regards, Ricardo Re: QN9080cdk Bluetooth example pin setting Of course before I made my PCB board, I check the file you tell me and consider as much as possible. I checked the XTAL clks(16MHz, and 32.768kHz) and powers(VCC, VSS, etc) on my PCB through oscilloscope and those are fine (maybe this is not a reason of problem, because other SDKs such as I2C communication, ctimer works well in my PCB board). My PCB schematic and layout is as attatched on file (only parts). When I design antenna part, I refer to "BLE_Antenna_Design_AN11994.pdf" which I upload. I use "2450AT18A100". Did I miss something? Is there any possible mistakes I have made? Thanks,   Re: QN9080cdk Bluetooth example pin setting Hi, Something important to remark, is that our SDK examples ready to work on our board without modifications. If you are using an example for another board, you would need to double check that you have the needed HW, or modify the SW for your HW. Please check the clocks, GPIO's. Also, you would need to check the antenna design. Maybe this Application Note can help you with other considerations: QN908x Hardware Design Consideration. I strongly recommend comparing your design with the design files from our QN9080DK. Regards, Ricardo Re: QN9080cdk Bluetooth example pin setting Thank you your reply. The gray pins are the default, not disable.  Then here is another question. When I debug SDK "qn908xcdk_wireless_examples_bluetooth_private_profile_server_bm" in my own PCB board, loT toolbox or connectivity QTool cannot find my MCU BLE device (it works fine when I tested it using Design Kit). I didn't touch any code in SDK, except I add BleAPP_Start() function on main_task() to start task directly after debugging start without pressing a Button1 (because there is no Button1 in my own PCB board). In my PCB board, I connect RF pin to inductor and antenna as manual said. The below is a schematic.  What I have to do more to wirelessly connect my own QN9080 in my PCB to phone or PC? Do I have to connect RF pin to any other pins? or which position I have to modify in the code?   Thanks,    Re: QN9080cdk Bluetooth example pin setting Hello, Hope you are doing well. As seen on the image, some pins are "enabled" by default, like RF, RSTN, XTAL. Hope this helps! Regards, Ricardo

how to use PFE function in S32G We are developing PFE function in S32G-VNP-RDB3 (s32g399a). And Tresos is using 29.0.0. When I downloaded and checked PFE_Driver_1_2_0, I found a MasterProject_RDB3 example file in the example_application folder. We predict that we will first complete the PFE-related settings in Tresos, insert the generated header file into the project in S32G Studio, and use it with the source code provided in PFE_Driver_1_2_0. However, when compiling the MasterProject_RDB3 example file in Tresos, the following error occurs. Invalid XPath-expression for Attribute "RANGE" of node "/AUTOSAR/TOP-LEVEL-PACKAGES/Gpt/ELEMENTS/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelConfiguration_1/GptChannelTickFrequency": (1806) The XPath-expression "(num:i( contains(node:fallback(../GptHwIp,'PIT'),'PIT') = 'true') * noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)), '/GptClockReference'))), '/McuClockReferencePointFrequency'))) + ( num:i(contains(node:fallback(../GptHwIp,'STM'),'STM'))* (noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)), '/GptClockReference'))), '/McuClockReferencePointFrequency')) div (num:i(not(contains(node:fallback(../GptHwIp,'STM'),'STM'))) + node:fallback(../../../GptStm/*[contains(text:split(node:current()/../GptModuleRef, '/')[5], node:fallback(./@name, 1))]/GptStmPrescaler,1))) ) + ( num:i(contains(node:fallback(../GptHwIp,'FTM'),'FTM'))* (noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)), '/GptClockReference'))), '/McuClockReferencePointFrequency')) div (num:i(not(contains(node:fallback(../GptHwIp,'FTM'),'FTM'))) + node:fallback(../../../GptFtm/*[contains(text:split(node:current()/../GptModuleRef, '/')[5], node:fallback(./@name, 1))]/GptFtmPrescaler,1))) ) + ( num:i(contains(node:fallback(../GptHwIp,'RTC'),'RTC') = true()) * ( ( (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_0')) * noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)), '/GptClockReference'))), '/McuClockReferencePointFrequency')) ) + ( (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_1')) * num:i(16000000) ) + ( (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_2')) * num:i(128000) ) + ( (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_3')) * num:i(32000) ) ) div ( num:i( (num:i(node:when((node:fallback(../../../GptRtc/*/DivBy32,'true') = 'true'),num:i(32),num:i(1)) * node:when((node:fallback(../../../GptRtc/*/DivBy512,'true') = 'true'),num:i(512),num:i(1)))) + (num:i(contains(node:fallback(../GptHwIp,'PIT'),'PIT') = true())) + (num:i(contains(node:fallback(../GptHwIp,'STM'),'STM') = true())) + (num:i(contains(node:fallback(../GptHwIp,'FTM'),'FTM') = true())) ) ) ) " caused an error: Undefined function: noderef:ref If anyone knows how to use it, please help me.... Please help... Re: how to use PFE function in S32G Hello, @Youngsoo_do Thanks for the questions I suggest building the examples according to the release notes and the readme.txt from PFE-DRV_S32G_M7_MCAL_1.2.0 packages. Note that in order to build the project, you’d better work with the packages/tools installed and check for the compatibility. Hope it helps. Best Regards Chenyin

KW45 SPSDK burns NBU and locks up Dear Sir，   I encountered a problem that the chip locked after burning NBU through SPSDK. 1. chip type: KW45B41Z83A. 2. I downloaded the latest AN13883SW from the official website. 3. I followed this link to run SPSDK, then also successfully burned key and SB3 files. KW45xx and K32W1xx Load NBU image — SPSDK documentation 4. Finally I burned the KW45 wireless uart routine,However, it does not work, and other mcu-related routines can run normally,similar to hello world routines, my board works fine.(SDK version:V2.12.5) 5.  Then I tried to update the SB3 file generated by SPSDK to the SB3 file within the SDK(version 2.12.5) via blhost,but they refused to burn it,errors in the following picture. 6. I can only burn the SB3 file generated by SPSDK through BLHOST, as shown below, but this SB3 file can not run the radio frequency routine. So I would like to ask you what causes this,looking forward to your reply,thank you! KW45  Re: KW45 SPSDK burns NBU and locks up Hi Sir,   I have solved the problem,the cause is that the xip file under SPSDK needs to be replaced with the xip file under the SDK version to be debugged, then generate the sb3 file. In this case, the nbu is the version to be debugged,I see the document does not mention this point, need to replace the xip file, so I always think that the chip is locked. Re: KW45 SPSDK burns NBU and locks up Hello @Melton  you can try to get the NBU image from SDK, which you would like to use and then change only a xip image and call the receive-sb-file again with newly generated sb file. Let me know if you still have a problem.  Re: KW45 SPSDK burns NBU and locks up @Boured could you please describe details of your problems? Could you share your workspace with me? Re: KW45 SPSDK burns NBU and locks up Hello, If it possible can you please share with me the message you are receiving and also a image of the Secure Provisioning Tool view on the OTP/IFR window. Re: KW45 SPSDK burns NBU and locks up efuse_program_once returns failure message when using 'lock' option but still the fuse is burnt. Re: KW45 SPSDK burns NBU and locks up Hello, Thank you very much for sharing the documentation, I just finish reviewing this, and I have the following recommendations. I review that you configuration as you mention of the SB3 file has been generated properly, so in this case I would highly recommend if you can update the NBU firmware (which is failing) with the following application note guidance, and making sure that the software version SDK is the same for both files. Re: KW45 SPSDK burns NBU and locks up Hi Sir,   I have sent you the relevant documents by private email，please help to find the problem.thank you very much! KW45  Re: KW45 SPSDK burns NBU and locks up Hello, Ok, I understand can you please share with me what you generated. You can provide this to me through a private message if you rather to. So we can find the root cause about why the NBU file is not properly generated. Re: KW45 SPSDK burns NBU and locks up Hi Sir,   I have tried many versions of NBU but they cannot be upgraded,I generate NBU through SPSDK in accordance with the guidelines of AN13883,Do I need to provide you with AN_SPSDK I edited? Re: KW45 SPSDK burns NBU and locks up Hello, Thank you for the information, with the details provided on the last response you were able to update the NBU version? Re: KW45 SPSDK burns NBU and locks up Hi, on windows client, we backup an Oracle DB with catalog. It's backup about 1,6Tb Re: KW45 SPSDK burns NBU and locks up Hello, Thank you for your response. We currently do not have a command that will provide the details about the NBU firmware version available in the SPSDK. And you information is correct it is necessary that the NBU firmware version is synchronized with the SDK version in order to work properly. I will recommend to update the radio firmware version using the following guide and use the SDK version as the one you are using on your project to prevent complications. As I remember I suggested to upgrade the SDK version so make sure that the program and the NBU both are on the same SDK version maybe this is causing troubles. Re: KW45 SPSDK burns NBU and locks up Dear Sir,  I don't quite understand the program permanently you asked about,I only burned the official wireless uart routine.  There is also a question I would like to consult, how to know the SDK version of the NBU downloaded through SPSDDK,because the NBU can run properly only after the NBU version is synchronized with the SDK version. Re: KW45 SPSDK burns NBU and locks up Hello, I understand, Can you please help me with some points: I know that you understand that the RF routine won't work without the NBU upgrade, but you have generated the sb3 file with succeed following the guide mentioned in first instance. I will leave here an application note that I think could provide more details and that could help us. This is located on the section 5.2. There is mentioned that in order for updating the NBU some steps have to be performed with a new *.xip file. On your second question, I would like to know first if have program permanently the KW45? Re: KW45 SPSDK burns NBU and locks up Dear Sir,   It is a custom board,however, as I have replied you before, if the SB3 file generated by SPSDK is used, although the NBU can be successfully updated, my board cannot run radio-frequency related programs.   Let me summarize my question again: 1. I generated the key and the SB3 file through SPSDK and burned it to my custom chip,There is no problem with this process, but the problem with doing this is that it does not work properly after burning the RF routine program. 2. The second problem is that the custom board that burned the SB3 file through SPSDK can no longer update the SB3 file. This is a confusing question and I need your help~ Re: KW45 SPSDK burns NBU and locks up Hello, Thank you for the information. I'm, glad that the sb3 that you generated by the SPSDK in the C disk to update the NBU works fine. Regarding the SDK sb3 file, I ask if this was custom board, because the sb3 file that is generated on the SDK has some different keys that are used in the EVK board, this could be reason why is failing on your custom board. So in this case, it is recommended to use the one you generated with the SPSDK. Please let me know if there is anything else where I can help you. Re: KW45 SPSDK burns NBU and locks up Dear Sir,   I have tried to use the sb3 file generated by SPSDK in the C disk directory to update NBU, and it is OK. But in the same way, if I use the sb3 file in the SDK to update the NBU, it will fail. I added it to the system environment variables when I installed python. I use a board that I developed myself,NXP's official development board has burned the default key, so it seems to be no problem in updating any version of the SB3 file. Re: KW45 SPSDK burns NBU and locks up I encountered a problem that the chip locked after burning NBU through SPSDK. Re: KW45 SPSDK burns NBU and locks up Hello, Thank you for updating the SDK version, and also for sharing the results. Can you please help me on the following changes to see if this can help solve this issue. Can you please create a folder inside the C: drive directly, and make sure that python is linked to the environment variables (just to make sure this could not be causing the troubles.  I understand for the pictures you are sharing you have your device in ISP mode with no problem, can you please help me confirm if you are using an EVK board or if this is a custom board. Is important that the path to the spsdk usage is shorten this could sometimes cause problems. Re: KW45 SPSDK burns NBU and locks up Dear Sir,   Thank you for your reply,I have carried out the following operations according to your suggestions. 1. Upgrade the SDK version to the latest V2.12.7 . 2. I used the SB3 file in the latest version of the SDK to try to update it,still a failure. 3. My version of python was originally V3.11.6,then I tried python V3.12.1 and still got the error shown below. Please further analysis and help~ Re: KW45 SPSDK burns NBU and locks up Hello, Thank you for contacting NXP support. I appreciate the information and the details. Can you please help me with the following points: Can you please help me by updating the SDK version to the latest on 2.15.00. Please help me following the getting started guide where is also explained how to update the NBU for the Wireless examples. With the python problem you mention, please help me updating the python version and if it is possible like this to the cmd path. Is important to have a matching NBU image for the SDK version of the application you are working with. Please let me know if you had any changes with this modifications and if you succeed with the NBU updating. Re: KW45 SPSDK burns NBU and locks up  I tried to burn NBU through SPSDK by looking at AN13883, The version of python I use is V3.11.6。But I had a problem running script 5.2.

S32GでのPFE機能の使い方 S32G-VNP-RDB3 (s32g399a) でPFE機能を開発しています。 そして 、Tresos は 29.0.0 を使用しています。 ダウンロードして確認してみたところ、PFE_Driver_1_2_0フォルダにMasterProject_RDB3サンプルファイルが見つかりましたexample_applicationフォルダにありました。 まず、TresosでPFE関連の設定を行い、生成されたヘッダファイルを S32G Studioのプロジェクトに挿入し、PFE_Driver_1_2_0で提供されているソースコードで使用すると予測しています。 ただし、 MasterProject_RDB3 サンプルファイルをTresosでコンパイルすると、 次のエラーが発生します。 ノード "/AUTOSAR/TOP-LEVEL-PACKAGES/Gpt/ELEMENTS/Gpt/GptChannelConfigSet/GptChannelConfiguration/GptChannelConfiguration_1/GptChannelTickFrequency": (1806) XPath-expression "(num:i( contains(node:fallback(../GptHwIp,'PIT'),'PIT') = 'true') * noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)),'/GptClockReference'))), '/McuClockReferencePointFrequency'))) + ( num:i(contains(node:fallback(../GptHwIp,'STM'),'STM')))* (noderef:value(concat(noderef:ref(noderef（value）concat（noderef）ref）REF(node）フォールバック）。/GptChannelClkSrcRef, .)),'/GptClockReference'))), '/McuClockReferencePointFrequency')) div (num:i(not(contains(node:fallback(../GptHwIp,'STM'),'STM'))) + node:fallback(../../../GptStm/*[contains(text:split(node:current()/../GptModuleRef, '/')[5], node:fallback(./@name,1))]/GptStmPrescaler,1))) ) + ( num:i(contains(node:fallback(../GptHwIp,'FTM'),'FTM')))* (noderef:value(concat(noderef:ref(noderef:value(concat(noderef:ref(node:fallback(../GptChannelClkSrcRef, .)),'/GptClockReference'))), '/McuClockReferencePointFrequency')) div (num:i(not(contains(node:fallback(../GptHwIp,'FTM'),'FTM'))) + node:fallback(../../../GptFtm/*[contains(text:split(node:current()/../GptModuleRef, '/')[5], node:fallback(./@name,1))]/GptFtmPrescaler,1))) ) + ( num:i(contains(node:fallback(../GptHwIp,'RTC'),'RTC') = true()) * ( ( ( (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_0')) * noderef:value(concat(noderef:ref(noderef％value（concat）noderef％ref）/GptChannelClkSrcRef, .)),'/GptClockReference'))), '/McuClockReferencePointFrequency')) )) ) + ( (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_1')) * num:i(16000000) ) + ( ( (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_2')) * num:i(128000) + ( (num:i(node:fallback(../../../GptRtc/*/GptRtcChannelClkSrc,'RTC_IP_CLOCK_SOURCE_0') = 'RTC_IP_CLOCK_SOURCE_3')) * num:i(32000) ) ) div ( num:i( (num:i(node:when((node:fallback(../../../GptRtc/*/DivBy32,'true') = 'true'),num:i(32),num:i(1)) * node:when((node:fallback(../../../GptRtc/*/DivBy512,'true') = 'true'),num:i(512),num:i(1)))) + (num:i(contains(node:fallback(../GptHwIp,'PIT'),'PIT') = true())) + (num:i(contains(node:fallback(../GptHwIp,'STM'),'STM') = true())) + (num:i(contains(node:fallback(../GptHwIp,'FTM'),'FTM') = true())) ) ) )" エラーが発生しました: 未定義の関数: noderef:ref どなたか使い方を知っている方がいらっしゃいましたら、助けてください...。助けてください...

C40 hard fault when attempting to erase application I want to be able to reprogram my board using XCP. As a result I have a boot image that uses the first 1MB of PFLASH and and application that starts 1MB up, so address 0x00500000 or FLASH sector 128. I can switch back and forth between the images and send the flash data when running the boot image. However if I try to erase block 128 I get a hard fault. I have been following this thread Solved: S32K344 C40 IP Hardware Fault Problem - NXP Community Which talks about running the erase and write C40 routines in RAM. I do not understand why I would need to do this as the boot image and associated C40 routines all live well within the first 128 flash blocks. However I have attempted to modify C40_Ip.h as suggested in the thread as in the example below #if ( 1 == C40_RAM_CODE_ENABLE ) /* ram code start */ #define FLS_STOP_SEC_CODE #include "Fls_MemMap.h" #define FLS_START_SEC_RAMCODE #include "Fls_MemMap.h" #endif C40_Ip_StatusType C40_Ip_MainInterfaceSectorEraseStatus(void); #if ( 1 == C40_RAM_CODE_ENABLE ) /* ram code end */ #define FLS_STOP_SEC_RAMCODE #include "Fls_MemMap.h" #define FLS_START_SEC_CODE #include "Fls_MemMap.h" #endif However this does not compile  C:/NXP/S32DS.3.5/S32DS/software/PlatformSDK_S32K3/RTD/BaseNXP_TS_T40D34M30I0R0/include/Fls_MemMap.h:6865:10: error: #error "MemMap.h, no valid matching start-stop section defined." 6865 | #error "MemMap.h, no valid matching start-stop section defined." | ^~~~~ I would like to understand why I would need to do this and if I do what I need to do to make the compilation work?    Re: C40 hard fault when attempting to erase application As the data flash takes up the first 16 blocks the start block for an application running at 0x00500000 should be 144 and not 128 as had calculated. I can erase block 144 onwards.

code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Thank you so much!! Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Did any error messages pop up during the compilation process? If no error messages appear, there should be no problem. But if errors still appear, you'd better confirm with Jorge again, license-related issues, he is an expert and can give you more professional advice. Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Thank you very much for your reply. I can now compile the code and build the target normally. Is there any hidden danger of compilation or license compliance in the compiled files? Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Hi Jimmy Xu, 很抱歉你的问题还没有被解决。License支持哪一个版本，standard 还是 professional， 这取决于你购买时的选择。 Professional的功能是最全的，Standard功能会少一些。 老实说，CodeWarrior license 不是我的专业领域。我看到你还有一个private ticket， 已经有license team的support在跟进了。 希望 license team 的同事能够顺利解决你的问题，如有任何新的情况，请及时告知我们。 BRs， Celeste Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Without starting the server, lincese shows two lines of error (network problem, I can't post the picture), combined with the previous results: the lower line is activated. Does the license only support the standard edition MCU 10.5 version, but not the professional edition MCU 10.5? Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Hello JimmyXu, 我找到了下面的链接：Floating License -Environment Variables. - NXP Community 里面提到环境变量的设置，我不确定它是否与你遇到的问题有关，你可以试一下。 除此之外，你还可以尝试一下移除license，然后重新导入并重启codeWarrior，看看是否有效果。 BRs, Celeste Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 使用code warrior floating license，在官网生成license.dat后，在服务器上运行lmtools，服务正常启动。 client 使用和server相同的license.dat ，启动code warrior后报错 如何解决？ Re: code warrior floating license 注册license时提供的ip 有限制么，局域网ip可以么 Hello Jimmy, 我认为局域网是可以的，你可以尝试下。 BRs, Celeste Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? Pop-up window when opening code warrior Re: Code Warrior Floating License Is there any restriction on the IP provided when registering the license? Can the LAN IP be used? This is the picture

LPC1833 - How set Drive strength of normal drive pins? Hello, We are using LPC1833. We want to set Pin P6_5 with High-drive strength, but as per user manual this Pin P6_5 is not in the list of Pin configuration registers for high-drive pins. How we can set it using software or need to set using it hardware?   Thanks. Re: LPC1833 - How set Drive strength of normal drive pins? Thanks ZhangJennie for the quick response. Re: LPC1833 - How set Drive strength of normal drive pins? Hello @ketulpatel  P6_5  is normal drive pin and we can't set it to high drive, the limit is on chip design. According to UM, The pin configuration registers for high-drive pins control the following pins: • P1_17 • P2_3 to P2_5 • P8_0 to P8_2 • PA_1 to PA_3 Hope this will help you, Jun Zhang

port=COM9, baudrate=115200, timeout=2000' was found. blhost failed sdphost succeeded, HAB disabled ### Build flashloader as unsigned bootable image ### nxpimage hab export -c "C:\Users\Administrator\secure_provisioning00\bd_files\unsigned_MIMXRT1050_flashloader_win.bd"      -o "C:\Users\Administrator\secure_provisioning00\bootable_images\unsigned_MIMXRT1050_flashloader.bin"      "C:\nxp\MCUX_Provi_v10\bin\_internal\data\targets\MIMXRT1050\flashloader.srec" Success. (HAB container: C:\Users\Administrator\secure_provisioning00\bootable_images\unsigned_MIMXRT1050_flashloader.bin created.) nxpimage succeeded ### Write FlashLoader ### sdphost -p COM9,115200 -j -- write-file 0x20001C00 "C:\Users\Administrator\secure_provisioning00\bootable_images\unsigned_MIMXRT1050_flashloader.bin" Status (HAB mode) = 1450735702 (0x56787856) Hab Is Disabled (Unlocked). Response status = 2290649224 (0x88888888) Write File Success. sdphost succeeded, HAB disabled ### Start FlashLoader ### sdphost -p COM9,115200 -j -- jump-address 0x20001C00 Status (HAB mode) = 1450735702 (0x56787856) Hab Is Disabled (Unlocked). sdphost succeeded, HAB disabled ### Waiting FlashLoader to be initialized for 3 seconds ### ### Timeout wait value can be adjusted from Preferences ### ### Check presence of FlashLoader ### blhost -t 2000 -p COM9,115200 -j -- get-property 1 0 SpsdkNoDeviceFoundError: No devices for given interface 'uart' and parameters 'port=COM9, baudrate=115200, timeout=2000' was found. blhost failed Re: port=COM9, baudrate=115200, timeout=2000' was found. blhost failed Hi, I'd recommend to download SDK from http://mcuxpresso.nxp.com and try to debug the  flashloader example project to find the problem, In MCUXpresso Secure Provisioning tool we provide pre-compiled flashloader from the SDK which works with EVK board. If you need custom flashloader, you can replace the provided flashloader, which can be found in \nxp\MCUX_Provi_v9\bin\_internal\data\targets\MIMXRT1050\flashloader.srec  Re: port=COM9, baudrate=115200, timeout=2000' was found. blhost failed Replacing the MCU will solve the problem, I used my own hardware board. thank you Re: port=COM9, baudrate=115200, timeout=2000' was found. blhost failed Hello, you have not provided enough information about your setup and hardware - do you use your own HW, od do you use NXP EVK(B)? Anyway, in your screenshot I can see that the "ROM bootloader" is active (ISP after reboot). In this case only the sdphost can communicate with ROM and is used for uploading flashloader. Once flashloader is active, only after that you can use blhost. In case flashloader is not present or did not start, it emits `SpsdkNoDeviceFoundError: No devices for given interface 'uart' and parameters...` error. In your script output it seems that flashloader either was not ready yet, or it did not start. Have you tried to increase the timeout in Preferences do reduce the list of potential errors? Regards, Libor

Communication with FPGA using T1013 IFC Hello, I am assessing a possible use of the T1013 in an application that performs access to an FPGA. My hardware/firmware friends use the EBI in 5xxx devices and the eLBC in the P1013; I would like to know if the equivalent in the T1013 would be the IFC. As the T1023/24/13/14 states "The IFC supports both NAND and NOR flash, as well as a general purpose memory-mapped interface for connecting low speed ASICs and FPGAs", I was wondering if "low speed" in this context means something similar to the 66MHz of a MPC5777C EBI or something much slower. Thanks! Ricardo Re: Communication with FPGA using T1013 IFC The equivalent in the T1013 is IFC. "Low speed" in this context means something similar to the 66MHz of a MPC5777C EBI.

Why I change the lpuart priority cause lpuart send failed?S32K148 Please help to review the follow code;   When I open the comment for change the uart priority to 2, uart can not send data.   void uart_init(void) { uint8_t uart_proi = 0; UART_Init(&uart_pal1_instance, &uart_pal1_Config0);   INT_SYS_DisableIRQ(LPUART1_RxTx_IRQn); uart_proi = INT_SYS_GetPriority(LPUART1_RxTx_IRQn); // INT_SYS_SetPriority(LPUART1_RxTx_IRQn, 2); uart_proi = INT_SYS_GetPriority(LPUART1_RxTx_IRQn); INT_SYS_EnableIRQ(LPUART1_RxTx_IRQn);   GE_LOGI(LOG_TAG "uart_proi = %d", __func__, uart_proi); // start uart rx UART_ReceiveData(&uart_pal1_instance, uart_rx_buf, 1); }   void uart_send_data(uint8_t *data, uint32_t size) { uint32_t bytesRemaining; UART_SendData(&uart_pal1_instance, data, size); // blocking here if change priority while (UART_GetTransmitStatus(&uart_pal1_instance, &bytesRemaining) != STATUS_SUCCESS)  {   } }     S32 SDK for S32K1 Re: Why I change the lpuart priority cause lpuart send failed?S32K148 I solved this problem. Just must change priority after vTaskStartScheduler. I think it root case is osif_freertos.c should work after TaskStartScheduler., Close Re: Why I change the lpuart priority cause lpuart send failed?S32K148 Hi @Licunhao, I think it is well explained here: https://www.freertos.org/Documentation/02-Kernel/03-Supported-devices/04-Demos/ARM-Cortex/RTOS-Cortex-M3-M4 Regards, Daniel Re: Why I change the lpuart priority cause lpuart send failed?S32K148 without FreeRTOS.IT works well. with FreeRTOS.IT works fail. Why? Re: Why I change the lpuart priority cause lpuart send failed?S32K148 And I also use FreeRTOS.

Please fix meta-imx Hi, I'm trying to build a yocto linux using your latest manifest: repo init -u https://github.com/nxp-imx/imx-manifest.git -b imx-linux-scarthgap -m imx-6.6.52-2.2.0.xml I get 7 errors for do_fetch (one is from meta-freescale, 6 from meta-imx): Summary: 7 tasks failed: /yocto/sources/meta-imx/meta-imx-bsp/recipes-graphics/imx-gpu-viv/imx-gpu-viv_6.4.11.p2.10-aarch32.bb:do_fetch /yocto/sources/meta-imx/meta-imx-bsp/recipes-multimedia/imx-parser/imx-parser_4.9.2.bb:do_fetch /yocto/sources/meta-freescale/recipes-bsp/imx-lib/imx-lib_git.bb:do_fetch /yocto/sources/meta-imx/meta-imx-bsp/recipes-bsp/firmware-imx/firmware-imx_8.26.bb:do_fetch /yocto/sources/meta-imx/meta-imx-bsp/recipes-graphics/imx-g2d/imx-gpu-g2d_6.4.11.p2.10.bb:do_fetch /yocto/sources/meta-imx/meta-imx-bsp/recipes-connectivity/nxp-wlan-sdk/nxp-wlan-sdk_git.bb:do_fetch /yocto/sources/meta-imx/meta-imx-bsp/recipes-kernel/kernel-modules/kernel-module-nxp-wlan_git.bb:do_fetch Here are some stripped-down logs: ERROR: imx-gpu-viv-1_6.4.11.p2.10-aarch32-r0 do_fetch: Fetcher failure: wget -t 2 -T 30 -O /mnt/d/yocto/downloads/imx-gpu-viv-6.4.11.p2.10-aarch32-accdd64.bin.tmp -P /mnt/d/yocto/downloads 'https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx-gpu-viv-6.4.11.p2.10-aarch32-accdd64.bin' --progress=dot -v failed with exit code 8, see logfile for output ERROR: imx-gpu-viv-1_6.4.11.p2.10-aarch32-r0 do_fetch: Bitbake Fetcher Error: FetchError('Unable to fetch URL from any source.', 'https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx-gpu-viv-6.4.11.p2.10-aarch32-accdd64.bin;fsl-eula=true') ERROR: imx-parser-4.9.2-r0 do_fetch: wget -t 2 -T 30 -O /mnt/d/yocto/downloads/imx-parser-4.9.2-828fcb7.bin.tmp -P /mnt/d/yocto/downloads 'https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx-parser-4.9.2-828fcb7.bin' --progress=dot -v failed with exit code 8, see logfile for output ERROR: imx-parser-4.9.2-r0 do_fetch: Bitbake Fetcher Error: FetchError('Unable to fetch URL from any source.', 'https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx-parser-4.9.2-828fcb7.bin;fsl-eula=true') ERROR: imx-lib-1_5.9+-r0 do_fetch: Fetcher failure: Unable to find revision 8f124c3914d82019849fb697baeb730e4cb1b547 in branch master even from upstream ERROR: imx-lib-1_5.9+-r0 do_fetch: Bitbake Fetcher Error: FetchError('Unable to fetch URL from any source.', 'git://github.com/nxp-imx/imx-lib.git;protocol=https;branch=master') ERROR: firmware-imx-1_8.26-r0 do_fetch: Fetcher failure: wget -t 2 -T 30 -O /mnt/d/yocto/downloads/firmware-imx-8.26-d4c33ab.bin.tmp -P /mnt/d/yocto/downloads 'https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//firmware-imx-8.26-d4c33ab.bin' --progress=dot -v failed with exit code 8, see logfile for output ERROR: firmware-imx-1_8.26-r0 do_fetch: Bitbake Fetcher Error: FetchError('Unable to fetch URL from any source.', 'https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//firmware-imx-8.26-d4c33ab.bin;fsl-eula=true') ERROR: imx-gpu-g2d-6.4.11.p2.10-r0 do_fetch: Fetcher failure: wget -t 2 -T 30 -O /mnt/d/yocto/downloads/imx-gpu-g2d-6.4.11.p2.10-arm-accdd64.bin.tmp -P /mnt/d/yocto/downloads 'https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx-gpu-g2d-6.4.11.p2.10-arm-accdd64.bin' --progress=dot -v failed with exit code 8, see logfile for output ERROR: imx-gpu-g2d-6.4.11.p2.10-r0 do_fetch: Bitbake Fetcher Error: FetchError('Unable to fetch URL from any source.', 'https://www.nxp.com/lgfiles/NMG/MAD/YOCTO//imx-gpu-g2d-6.4.11.p2.10-arm-accdd64.bin;name=arm;fsl-eula=true') ERROR: nxp-wlan-sdk-git-r0 do_fetch: Fetcher failure: Unable to find revision 5ad19e194f49ed9447bee7864eb562618ccaf9b1 in branch master even from upstream ERROR: nxp-wlan-sdk-git-r0 do_fetch: Bitbake Fetcher Error: FetchError('Unable to fetch URL from any source.', 'git://github.com/nxp-imx/mwifiex.git;protocol=https;branch=master') ERROR: kernel-module-nxp-wlan-git-r0 do_fetch: Fetcher failure: Unable to find revision 5ad19e194f49ed9447bee7864eb562618ccaf9b1 in branch master even from upstream ERROR: kernel-module-nxp-wlan-git-r0 do_fetch: Bitbake Fetcher Error: FetchError('Unable to fetch URL from any source.', 'git://github.com/nxp-imx/mwifiex.git;protocol=https;branch=master') thanks Re: Please fix meta-imx HI @mprt42! Thank you for contacting NXP Support! The BSP version 6.1.52 is not officially launched yet. We will Launch this version soon. You can consult the latest release version in our web page. Best Regards! Chavira

The image generated by the provisioning tool does not match, I did not see "FCFB ########################################################################################################## 生成构建脚本： build_image_lnx.sh 生成构建脚本： build_image_win.bat 生成构建脚本： build_image_mac.sh 正在执行脚本C:\Users\Administrator\secure_provisioning00\build_image_win.bat ###脚本： 构建镜像: C:\Users\Administrator\secure_provisioning00\build_image_win.bat Build HAB image nxpimage hab export -c "C:\Users\Administrator\secure_provisioning00\bd_files\imx_application_gen_win.bd"  -o "D:\RT1052_Example Code\Example\1.led_test\hello_world_boot.bin"  "C:\Users\Administrator\secure_provisioning00\source_images\hello_world.srec" Success. (HAB container: D:\RT1052_Example Code\Example\1.led_test\hello_world_boot.bin created.) nxpimage succeeded ### Build flashloader as unsigned bootable image ### nxpimage hab export -c "C:\Users\Administrator\secure_provisioning00\bd_files\unsigned_MIMXRT1050_flashloader_win.bd"  -o "C:\Users\Administrator\secure_provisioning00\bootable_images\unsigned_MIMXRT1050_flashloader.bin"  "C:\nxp\MCUX_Provi_v10\bin\_internal\data\targets\MIMXRT1050\flashloader.srec" Success. (HAB container: C:\Users\Administrator\secure_provisioning00\bootable_images\unsigned_MIMXRT1050_flashloader.bin created.) nxpimage succeeded ###脚本“构建镜像”的结果： 成功（返回代码= [0]成功） 操作的状态： 成功: 构建镜像 Re: The image generated by the provisioning tool does not match, I did not see "FCFB Indeed, this issue has been resolved. thank you. Re: The image generated by the provisioning tool does not match, I did not see "FCFB Hi, in your screenshot I can see the file name has "SDRAM" in it, but also in the screenshot the DCD is not configured, it might be the root cause why the application does not run. Regards, Libor Re: The image generated by the provisioning tool does not match, I did not see "FCFB Hi, may be the training video can help you. There should be all steps captured: Secure Boot on the i.MX RT10xx Crossover MCUs | NXP Semiconductors If you cannot find any information in the user guide, please let us know what information is missing. It is not possible to provide help without information: - what you want to do - what the problem is. Re: The image generated by the provisioning tool does not match, I did not see "FCFB Can't I run the LED program even after writing it in PROVISION TOOL? The image construction is incorrect. I can run it using KEIL's original image. Is it not possible to follow the official manual step by step? The documentation for this tool is not detailed enough. I can't use it. Re: The image generated by the provisioning tool does not match, I did not see "FCFB Hi, MCUXpresso Secure Provisioning tool does not generate the image with FCB, the FCB is written to flash as extra step. The FCB can be specified either as simplified or full configuration. Kindly review generated write script for details.

How to change FLEXIO I2C MASTER to use LPI2C1 instead S32K144EVB Hi,  I am using the i2c_pal project for S32K144EVB which uses FLEXIO for the I2C Master and LPI2C0 as the salve. I would like to reconfigure to use LPI2C1 as the Slave please. When i choose the drop down in processor expert for the resource i can only choose FLEXIO or LPI2C0 which are both already in use. Im sure its a case of adding a new resource in processor expert but i cant figure out how. Project attached for reference. Thanks Rich Re: How to change FLEXIO I2C MASTER to use LPI2C1 instead S32K144EVB Hi Rich,  Sorry, only S32K148 has 2 LPI2C instances. FlexIO driver only supports master mode. This is why you can not configure FlexIO_I2C as Slave. Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: How to change FLEXIO I2C MASTER to use LPI2C1 instead S32K144EVB OKay, so i now realise there is only one LPI2C BUS for use, However, I would like to swap the example so that the master is LPI2C and slave is FLEXIO. Is it as simple as changing the "Device" in the i2c1 and i2c2 components? i have tried this and although i can swap the device resource, it removes the slave tick box from the i2c1 slave configuration and puts a stike through along the entire line, if i try to re-enable the tickbox it only momentarily takes the tick and then removes it striking through the option again. Any ideas? Thakns Rich